power module

Abstract

A power module (1) is described, which comprises a substrate (2) and at least one power transistor (3) arranged on the lower side of the substrate (2). The power module comprises at least one power connection (4, 5, 6) connected to the substrate (2). In the prior art, temperature measurement of the power transistor is either not accurate or requires a more complex construction of the power transistor. According to the invention, a conductor loop (8) for temperature measurement is arranged on the upper side opposite the power transistor (3) or on an inner or outer substrate layer (12). Thereby, the temperature can be measured closer to the heat source and thereby more accurately without significantly complicating the construction of the power module.

Description

Technical Field

[0001] The present invention relates to a power module comprising a substrate and at least one power transistor disposed on the lower side of the substrate and at least one power connection terminal connected to the substrate. Background Technology

[0002] Power modules generate a significant amount of heat in a highly localized manner, which can drastically reduce their lifespan if not adequately cooled / down. Furthermore, it is difficult to provide targeted cooling as needed within the components of larger power modules, or to measure the temperature of individual power transistors and maintain an overview of the load on each power module, or power semiconductor / transistor, without significant delay.

[0003] Temperature detection is implemented in different ways within the power module:

[0004] - NTC (Negative Temperature Coefficient) or PTC (Positive Temperature Coefficient) resistors are placed close to the power transistors in the power module, and the temperature is determined by their temperature-dependent resistance.

[0005] Temperature is detected by arranging special components (diodes / resistors) on a substrate.

[0006] - The temperature of the power transistor can be directly determined by utilizing its temperature-sensitive, electrically measurable characteristics.

[0007] However, the solutions mentioned are inaccurate and / or have a significant time delay in the measurement of temperature peaks due to their distance from the hottest part, or they require a significantly complex construction of power transistors. Summary of the Invention

[0008] According to the present invention, a power module of the type described at the beginning is provided, characterized in that a conductor loop for temperature measurement is arranged on an upper or inner or outer substrate layer opposite to the power transistor.

[0009] Advantages of the invention

[0010] This has the advantage of allowing temperature measurements to be taken significantly closer to at least one power transistor and, consequently, to the source of heat loss. This avoids the power transistors overheating excessively before heat reaches the conductor circuit via thermal conduction, as is often the case in the prior art due to the greater distance. Any significant exceedance of operating temperature typically reduces the lifespan of individual power transistors.

[0011] In power modules with multiple power transistors, there is a certain probability that one power transistor will, on average, heat up more frequently and intensely than the others, and thus fail first. Furthermore, one power transistor may heat up more than another of the same type under the same load due to manufacturing tolerances. However, the failure of one power transistor usually necessitates the replacement of the entire power module. Therefore, the solution according to the invention significantly and more effectively allows for monitoring the temperature load of individual power transistors and taking countermeasures as necessary, thereby increasing the overall lifespan of the power module.

[0012] The substrate is preferably a multilayer substrate, which allows for the integration of not only power wiring and logic wiring (e.g., control lines for power transistors) but also conductive loops required for temperature measurement. The lower side of the substrate may be, for example, the bottom layer of the substrate or at least the bottom layer with conductive elements. Correspondingly, the upper side of the substrate may be, for example, the top layer of the substrate, on which the conductive elements are disposed.

[0013] Conductor loops can be arranged relative to the entire power transistor or only relative to a portion of the power transistor. If multiple power transistors are connected to a substrate, each power transistor preferably has its own conductor loop, for example, on top of the respective power transistor in an inner layer or on the upper side of the substrate. However, the individual conductor loops can then be connected to a common analytical processing electronics device (e.g., an application-specific integrated circuit, ASIC, for the power module).

[0014] Advantageous extensions of the invention are described in the dependent claims and in the specification.

[0015] Preferably, the conductor circuit has a bend. The direction. Thus, the conductor path can be expanded under the influence of rising temperature, and thereby, for example, the absolute influence on the resistance of the conductor loop can be maximized.

[0016] Preferably, the conductor loop is arranged opposite to the source of the power transistor. In a field-effect transistor, the source is typically the strongest heat source due to its proximity to the active region of the transistor, and therefore, for optimal sensitivity, the conductor loop can be arranged only opposite to the source. Since localized peak temperatures can lead to long-term damage, these localized peak temperatures are significantly better indicators of problematic overheating than the average temperature of the power transistor. Therefore, it is advantageous to selectively measure the temperature of the typically hottest parts of the power transistor.

[0017] In one embodiment, the conductor loop runs over multiple substrate layers. This can improve the accuracy of temperature measurement. The conductor loop can have a curved path across the multiple substrate layers. The conductor loop can be connected to each substrate layer via plated vias.

[0018] Preferably, if at least two power transistors are arranged on the substrate, separate conductor loops for temperature measurement are arranged on the respective power transistors, in the inner layer or on the upper side of the substrate. More preferably, a separate conductor loop is arranged for each power transistor, i.e., for example, three, four, five, six or more power transistors and conductor loops of the same power module.

[0019] In one embodiment, at least one conductor loop has a temperature-dependent resistance. The resistance can then be measured, and thus the temperature, via this temperature-dependent resistance, for example, by measuring current at a constant voltage. The temperature-dependent resistance can be an NTC resistor or a PTC resistor.

[0020] In a preferred embodiment, the power module includes at least one application-specific integrated circuit (ASIC) connected to at least two power transistors and at least two corresponding conductor loops. The ASIC can then regulate the individual power transistors, for example, via a single gate controller, to equalize the temperature load on the power transistors (instantaneously or over time) and thereby improve the overall lifespan or performance of the power semiconductor. The ASIC can be disposed on the underside or topside of the substrate. In the latter case, the conductor loops can be connected to the ASIC, for example, via plated vias.

[0021] In one implementation, the application-specific integrated circuit (ASIC) is configured to control the load of at least two power transistors such that the temperatures measured through the conductor loop are as similar as possible. This solution is kept as simple as possible because storing a “temperature history” for each power transistor to determine which transistor can and should be loaded more is not absolutely necessary. Then, during operation, one or more power transistors whose temperatures are above the upper temperature threshold (the problematic temperature) can be simply down-regulated, and power transistors whose temperatures are below the lower temperature threshold (the non-problematic temperature) can be up-regulated. Using two different thresholds here stabilizes the regulation and avoids frequent up-and-down adjustments.

[0022] Preferably, the substrate is or comprises multiple layers of low-temperature burn-through ceramic (LTCC). A potential problem with such substrates is the need to provide additional conductive loops for temperature measurement on the upper side opposite the lower side containing the power transistors, or in the inner layers, without significantly increasing the difficulty of the manufacturing process.

[0023] In one implementation, temperature measurement in at least one conductor loop is achieved via four-point measurement or band-end adjustment. These measurement methods improve measurement accuracy without significantly complicating construction. However, if necessary, an alternative route for the conductor loop and a corresponding connection to the analytical processing electronics (e.g., a local ASIC) are then required.

[0024] In one embodiment, multiple conductor loops are arranged in different substrate layers and connected in series. This maximizes the length of the conductor loops in the hot zone. This increases the resistance change with temperature variations and thus improves the sensitivity of temperature measurements.

[0025] In one embodiment, the power module includes at least two substrates. Here, power wiring and conductor loops for temperature measurement can be arranged in one of the two substrates, for example, in different substrate layers.

[0026] In one embodiment, the power module includes a plurality of power semiconductors embedded between substrate layers. Preferably, the power module includes only one substrate having multiple substrate layers. The power semiconductors may be disposed in an inner substrate layer and embedded from both sides between additional substrate layers.

[0027] In one embodiment, the power module includes a plurality of power semiconductors embedded between two substrates, wherein a conductive loop for temperature measurement is arranged in at least one of the substrates. These power semiconductors are preferably embedded in the substrates in an "inverted" manner, such that the source region is located on the lower side. In this case, a bent structure is arranged "below" the power transistor (e.g., a MOSFET). In addition to the power transistor, the power module thus includes a plurality of power semiconductors whose temperatures can also be measured using one or more conductive loops. The power semiconductors can be, for example, power diodes, thyristors, or triacs.

[0028] In one embodiment, the power module includes at least one power semiconductor, wherein another conductive loop for temperature measurement is arranged on the upper side of the substrate opposite to the power semiconductor. Here, the power module includes at least one power semiconductor in addition to a power transistor, the temperature of which can also be measured using the conductive loop. The power semiconductor may be, for example, a power diode, a thyristor, or a triac switch.

[0029] Compared to the classic NTC arrangement where the conductor loop is positioned next to the power semiconductor on the lower substrate, according to the present invention, the conductor loop is positioned very close to the hot spot and is not in the cooling path. Therefore, the maximum temperature of the power semiconductor can be measured with high accuracy.

[0030] Preferably, the "outer layer of the substrate" is understood to be the uppermost and lowermost layers of the substrate. Therefore, the outer layer does not contact other substrate layers on one side.

[0031] Preferably, the "inner substrate layer," or so-called "inner layer," is understood as the substrate layer between two substrate layers. Correspondingly, a substrate always has at least one outer layer, but not necessarily an inner layer. For an inner layer, at least three substrate layers are required: two outer layers (top and bottom) and an inner layer between the two outer layers. Attached Figure Description

[0032] Embodiments of the invention are illustrated in more detail below with reference to a single accompanying drawing. The drawing shows:

[0033] Figure 1 A first embodiment of the power module according to the present invention is shown in a view of the top side of the power module.

[0034] Figure 2 A second embodiment of the power module according to the present invention is shown in a view of the top side of the power module.

[0035] Figure 3 A third embodiment of the power module according to the present invention is shown in cross-sectional view.

[0036] Figure 4 A fourth embodiment of the power module according to the present invention is shown in cross-sectional view. Detailed Implementation

[0037] exist Figure 1 The present invention provides an embodiment of a power module 1, which includes a substrate 2 and a plurality of power transistors 3 (two are used as an example here) arranged on the underside of the substrate 2. Figure 1 The view of the upper side of substrate 2 is shown, and the power transistor 3 on the opposite lower side or in the inner substrate layer is therefore shown only in dashed lines.

[0038] Power module 1 includes five power connection terminals 4, 5, and 6 connected to substrate 2. Power connection terminals 4, 5, and 6 can be connected, for example, to each source 7 and gate 14 of each power transistor 3 (shown as dashed lines because they are on the underside of the substrate or embedded in it). Power connection terminal 4 can provide a power supply voltage, power connection terminal 5 can provide ground, and power connection terminal 6 can be a phase connection terminal. For simplicity, the corresponding control electronics on substrate 2 are not shown here.

[0039] According to the present invention, a conductor circuit 8 for temperature measurement is arranged on the upper side of the substrate 2 opposite to the power transistor 3.

[0040] The conductor loop 8 has a curved orientation, so that the conductor path expands under the influence of rising temperature and thereby, for example, achieves the largest possible absolute influence on the resistance of the conductor loop 8.

[0041] The conductor loop 8 is arranged here substantially opposite the entire area of ​​the corresponding power transistor 3. However, the conductor loop 8 may also cover a larger area than the area of ​​the corresponding power transistor 3 (e.g., 10% to 100% larger) in order to increase the measured absolute resistance change.

[0042] The conductor loop 8 can be connected to or guided by multiple layers and plated vias to maximize its length in the hot zone above the power transistor (e.g., MOSFET). This increases the resistance variation of the conductor loop and thus improves the sensitivity of the invention.

[0043] Power module 1 includes an application-specific integrated circuit (ASIC) 9 connected to two (all) power transistors 3 and two (all) corresponding conductor loops 8. The ASIC 9 can then regulate the individual power transistors 3, for example, via a single gate controller, to equalize the temperature load on the power transistors 3 (instantaneously or over time) and thereby improve the overall lifespan of the power semiconductors. The ASIC 9 can be disposed on the underside or topside of the substrate (here, for example, on the topside). In the latter case, the conductor loops 8 can be connected to the ASIC 9, for example, via plated vias.

[0044] Conductor loop 8 and ASIC 9 are connected here only as an example at the two ends of conductor loop 8, but other connection types are also possible (e.g. for four-point measurement) to achieve higher accuracy in resistance measurement.

[0045] Figure 2 A second embodiment of the power module 1 according to the invention is shown. This embodiment is substantially the same as the first embodiment, except that the area covered by the conductor loop 8 is different. Here, the conductor loop 8 substantially only covers the area of ​​the source 7 of the power transistor 3, that is, for example, it does not cover the gate 14.

[0046] In a field-effect transistor, the source 7 is typically the strongest heat source, and therefore the conductor loop 8 can be arranged only opposite to the source 7 for optimal sensitivity. However, alternatively, the conductor loop can also be arranged opposite to other parts of the power transistor 3 or substantially opposite to the entire power transistor. Figure 1 However, conductor loops can also cover multiple power transistors.

[0047] Figure 3 The cross-section of the invention (e.g., through two conductor loops 8 and two power transistors 3) is shown. Figure 1 or Figure 2 The third embodiment of the power module 1. The "upper side" of the substrate 2 according to claim 1. Figure 3 and Figure 4 They are arranged on the left side respectively.

[0048] Here, the conductor loop 8 comprises two conductor loop segments 10, 11 in each of the two different substrate layers 12 for each power transistor 3. In this view, only the direction of the bends in the conductor loop segments 10, 11 can be guessed, as each conductor loop is cut thirteen times (exemplary only). Here, the power module 1 comprises a first substrate 2 and a second substrate 15. The first substrate 2 here comprises four substrate layers 12, but two, three, five, or more substrate layers 12 are also possible. The power transistor 3 is embedded between the two substrates 2, 15 (in part, in the form of a sandwich structure).

[0049] Conductor loop segments 10 and 11 are connected between substrate layers 12 via plated vias 13. Power transistor 3 is also connected to power wiring 16, which is specifically arranged in one or two substrate layers 12 adjacent to the power transistor. Here, power wiring 16 is located in a different substrate layer 12 than the conductor loop 8 used for temperature measurement.

[0050] Figure 4 The power module 1 according to the invention is shown (e.g., also a power module 1 according to the invention). Figure 1 or Figure 2 The fourth embodiment of the power module is described. The difference between the fourth and third embodiments is that the power module 1 has only one substrate 2, which has (hereby, as an example) seven substrate layers 12. Power transistors 3 are embedded between the substrate layers 12 of the substrate 2. Here, power wiring 16 is arranged on both sides of the power transistors 3 in every two adjacent substrate layers.

[0051] However, the conductor circuit 8 used for temperature measurement is in Figure 3 and Figure 4 They are respectively arranged in the topmost substrate layer 12 (on the far left) and the first inner substrate layer 12 below it (the second one from the left).

[0052] Although the invention has been further illustrated and described in detail with reference to preferred embodiments, the invention is not limited to the disclosed examples, and other variations can be derived therefrom by those skilled in the art without departing from the scope of protection of the invention.

Claims

1. Power module (1) comprising a multilayer substrate (2) and at least one power transistor (3) arranged on the underside of the substrate (2) and at least one power connection (4, 5, 6) connected to the substrate (2), a conductor loop (8) for temperature measurement is arranged on the upper side opposite the power transistor (3) or on an inner or outer substrate layer (12), wherein characterized in that the conductor loop (8) is arranged above the source (7) of the power transistor (3) and only covers the area of the source (7) of the power transistor (3) and not the gate (14). The conductor loop (8) has a curved course.

2. The power module (1) according to claim 1, wherein The conductor loop (8) runs above a plurality of substrate layers (12).

3. The power module (1) according to claim 1 or 2, wherein At least two power transistors (3) are arranged on the substrate (2), wherein a separate conductor loop (8) for temperature measurement is arranged above the respective power transistor (3) and in an inner substrate layer (12) or on the upper side of the substrate (2).

4. The power module (1) according to claim 1 or 2, wherein At least one conductor loop (8) has a temperature-dependent resistance.

5. The power module (1) according to claim 1 or 2, wherein 6. Power module (1) according to claim 4, comprising at least one application-specific integrated circuit (9) connected to at least two power transistors (3) and to at least two corresponding conductor loops (8). The application-specific integrated circuit (9) is designed in such a way that it controls the load of the at least two power transistors (3) in such a way that the temperatures measured by the conductor loops (8) are as identical as possible.

7. The power module (1) according to claim 6, wherein The substrate (2) comprises a multilayer low-temperature burn-through ceramic.

8. The power module (1) according to claim 1 or 2, wherein The temperature measurement in at least one conductor loop (8) is carried out by four-point measurement or band end adjustment.

9. The power module (1) according to claim 1 or 2, wherein A plurality of conductor loops (8) are arranged in different substrate layers (12) and are connected in series.

10. The power module (1) according to claim 1 or 2, wherein 11. Power module (1) according to claim 1 or 2, comprising at least two substrates (2, 15).

12. Power module (1) according to claim 1 or 2, comprising a plurality of power semiconductors embedded between substrate layers (12). In at least one of the substrates (2, 15) a conductor loop (8) for temperature measurement is arranged.

13. The power module (1) according to claim 11, comprising a plurality of power semiconductors embedded between two substrates (2, 15), wherein, A further conductor loop (8) for temperature measurement is arranged on the upper side of the substrate (2) opposite the power semiconductors.

14. The power module (1) according to claim 1 or 2, comprising at least one power semiconductor, wherein A further conductor loop (8) for temperature measurement is arranged on the upper side of the substrate (2) opposite the power semiconductors.

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