Imaging element, stacked imaging element, and solid-state imaging device

Abstract

The present invention relates to an imaging element, a stacked imaging element, and a solid-state imaging device. The imaging element may include: a photoelectric conversion unit, the photoelectric conversion unit including a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein the photoelectric conversion unit further includes a charge storage electrode, the charge storage electrode is arranged to be separated from the first electrode and arranged to face the photoelectric conversion layer via an insulating layer, and the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer between the first electrode and the charge storage electrode is smaller than the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer between the imaging element and an adjacent imaging element.

Description

[0001] This application is a divisional application of a patent application with application number 201880039926.8, whose application date is June 21, 2018 and invention name is “Imaging element, stacked imaging element and solid-state imaging device”. Technical Field

[0002] The present invention relates to an imaging element, a stacked imaging element, and a solid-state imaging device. Background Art

[0003] An imaging element including an organic semiconductor material in a photoelectric conversion layer is capable of photoelectrically converting a specific color (band). In addition, in the case of using an imaging element in a solid-state imaging device, this feature allows a structure including stacked sub-pixels (stacked imaging elements) that is impossible in a conventional solid-state imaging device to be obtained. In this structure, the sub-pixels include a combination of an on-chip color filter (OCCF) and an imaging element, and the sub-pixels are arranged two-dimensionally (for example, see Japanese Patent Laid-Open No. 2011-138927). Another advantage is that demosaicing is not required and false colors are not generated. Note that in the following description, for convenience, an imaging element including a photoelectric conversion unit disposed on a semiconductor substrate or on the upper side of a semiconductor substrate may be referred to as a "first type of imaging element". For convenience, a photoelectric conversion element included in an imaging element of the first type may be referred to as a "first type of photoelectric conversion unit". For convenience, an imaging element disposed in a semiconductor substrate may be referred to as a "second type of imaging element". For convenience, a photoelectric conversion unit included in an imaging element of the second type may be referred to as a "second type of photoelectric conversion unit".

[0004] Fig.102 An example of the structure of a conventional stacked imaging element (stacked solid-state imaging device) is shown. Fig.102 In the example shown, the third photoelectric conversion unit 331 and the second photoelectric conversion unit 321 as the second type of photoelectric conversion unit included in the third imaging element 330 and the second imaging element 320 are stacked and formed in the semiconductor substrate 370. In addition, the first photoelectric conversion unit 311 as the first type of photoelectric conversion unit is arranged on the upper side of the semiconductor substrate 370 (specifically, the upper side of the second imaging element 320). Here, the first photoelectric conversion unit 311 includes a first electrode 311, a photoelectric conversion layer 313 containing an organic material, and a second electrode 312. The first photoelectric conversion unit 311 is included in the first imaging element 310 as the first type of imaging element. Based on the difference in absorption coefficient, the second photoelectric conversion unit 321 and the third photoelectric conversion unit 331 photoelectrically convert blue light and red light, respectively. In addition, the first photoelectric conversion unit 311 photoelectrically converts, for example, green light.

[0005] The charge generated by the photoelectric conversion in the second photoelectric conversion unit 321 and the third photoelectric conversion unit 331 is temporarily stored in the second photoelectric conversion unit 321 and the third photoelectric conversion unit 331. The vertical transistor (gate portion 322 is shown) and the transfer transistor (gate portion 332 is shown) transfer the charge to the second floating diffusion layer (FloatingDiffusion) FD2 and the third floating diffusion layer FD3, respectively. The charge is further output to an external reading circuit (not shown). The transistor and the floating diffusion layers FD2 and FD3 are also formed on the semiconductor substrate 370.

[0006] The charge generated by the photoelectric conversion in the first photoelectric conversion unit 311 is stored in the first floating diffusion layer FD1 formed on the semiconductor substrate 370 through the contact hole portion 361 and the wiring layer 362. In addition, the first photoelectric conversion unit 311 is also connected to the gate portion 318 of the amplifier transistor through the contact hole portion 361 and the wiring layer 362, and the amplifier transistor converts the charge amount into a voltage. In addition, the first floating diffusion layer FD1 includes a portion of the reset transistor (the gate portion 317 is shown). Note that reference numeral 371 represents an element separation region. Reference numeral 372 represents an oxide film formed on the surface of the semiconductor substrate 370. Reference numerals 376 and 381 represent interlayer insulating layers. Reference numeral 383 represents a protective layer. Reference numeral 390 represents an on-chip microlens.

[0007] Reference List

[0008] Patent Literature

[0009] Patent Document 1: Japanese Patent Laid-Open No. 2011-138927 Summary of the invention

[0010] Technical Problems to be Solved by the Invention

[0011] Meanwhile, in the imaging element having such a configuration and structure, the electric charge generated by the photoelectric conversion may flow into the adjacent imaging element, so-called blooming phenomenon may occur, and the quality of the captured video (image) may be degraded.

[0012] Therefore, an object of the present disclosure is to provide an imaging element having a construction and structure that is less likely to cause a decrease in the quality of a captured video (image), a stacked imaging element including the imaging element, and a solid-state imaging device including the imaging element or the stacked imaging element.

[0013] Solutions to technical problems

[0014] Each imaging element according to the first to ninth aspects of the present disclosure for achieving this purpose includes a photoelectric conversion unit, which includes a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein the photoelectric conversion unit also includes a charge storage electrode, which is arranged to be separated from the first electrode and arranged to face the photoelectric conversion layer via an insulating layer.

[0015] In addition, in the imaging element according to the first aspect, when photoelectric conversion occurs in the photoelectric conversion layer after light enters the photoelectric conversion layer, the absolute value of the potential applied to the portion of the photoelectric conversion layer facing the charge storage electrode is greater than the absolute value of the potential applied to the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element.

[0016] Furthermore, in the imaging element according to the second aspect of the present disclosure, the width of a region of the photoelectric conversion layer between the first electrode and the charge storage electrode is narrower than the width of a region of the photoelectric conversion layer between the imaging element and an adjacent imaging element.

[0017] Furthermore, in the imaging element according to the third aspect of the present invention, the charge movement control electrode is formed in a region facing a region of the photoelectric conversion layer between the imaging element and an adjacent imaging element via the insulating layer.

[0018] Furthermore, in the imaging element according to the fourth aspect of the present disclosure, instead of the second electrode, a charge movement control electrode is formed within the range of a region of the photoelectric conversion layer between the imaging element and an adjacent imaging element.

[0019] Furthermore, in the imaging element according to the fifth aspect of the present disclosure, the dielectric constant of the insulating material included in the region between the first electrode and the charge storage electrode is higher than the dielectric constant of the insulating material included in the region between the imaging element and an adjacent imaging element.

[0020] Furthermore, in the imaging element according to the sixth aspect of the present disclosure, the thickness of the insulating layer in a region between the first electrode and the charge storage electrode is thinner than the thickness of the insulating layer in a region between the imaging element and an adjacent imaging element.

[0021] Furthermore, in the imaging element according to the seventh aspect of the present disclosure, the thickness of the photoelectric conversion layer in a region between the first electrode and the charge storage electrode is thicker than that in a region between the imaging element and an adjacent imaging element.

[0022] In addition, in the imaging element according to the eighth aspect of the present disclosure, the amount of fixed charge in the area of ​​the interface between the photoelectric conversion layer and the insulating layer located between the first electrode and the charge storage electrode is smaller than the amount of fixed charge in the area of ​​the interface between the photoelectric conversion layer and the insulating layer located between the imaging element and an adjacent imaging element.

[0023] In addition, in the imaging element according to the ninth aspect of the present invention, the value of charge mobility in the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is greater than the value of charge mobility in the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element.

[0024] A stacked imaging element of the present disclosure for achieving the object includes at least one imaging element according to the first to ninth aspects of the present disclosure.

[0025] A solid-state imaging device according to the first aspect of the present disclosure for achieving the above object includes a plurality of imaging elements according to the first to ninth aspects of the present disclosure. In addition, a solid-state imaging device according to the second aspect of the present invention for achieving the above object includes a plurality of stacked imaging elements according to the present invention.

[0026] Beneficial effects of the present invention

[0027] In each of the imaging elements according to the first to ninth aspects of the present disclosure, the imaging elements according to the first to ninth aspects of the present disclosure included in the stacked imaging elements, and the imaging elements according to the first to ninth aspects of the present disclosure included in the solid-state imaging devices according to the first and second aspects of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements and the like of the present disclosure" in some cases), a charge storage electrode is provided which is arranged separately from the first electrode and arranged to face the photoelectric conversion layer via an insulating layer, and when light is applied to the photoelectric conversion unit and photoelectrically converted by the photoelectric conversion unit, the charge can be stored in the photoelectric conversion layer. Therefore, the charge storage portion can be completely depleted to eliminate the charge at the start of exposure. This can suppress the phenomenon of reduced imaging quality caused by the degradation of random noise due to the increase of kTC noise.

[0028] In addition, in each of the imaging element according to the first aspect of the present disclosure, the imaging element according to the first aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the first aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements according to the first aspect of the present disclosure and the like" in some cases), when photoelectric conversion occurs in the photoelectric conversion layer after light enters the photoelectric conversion layer, the absolute value of the potential applied to the portion of the photoelectric conversion layer facing the charge storage electrode is greater than the absolute value of the potential applied to the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. Therefore, the charge generated by the photoelectric conversion is strongly attracted to the portion of the photoelectric conversion layer facing the charge storage electrode. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) will not be reduced.

[0029] Furthermore, in each of the imaging element according to the second aspect of the present disclosure, the imaging element according to the second aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the second aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements and the like according to the second aspect of the present disclosure" in some cases), the width of the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is narrower than the width of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. Furthermore, in this case, the region between the first electrode and the charge storage electrode is less likely to be affected by the voltage of the second electrode (upper electrode) than the portion located between the imaging element and the adjacent imaging element. Therefore, the electric potential becomes larger, and this can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not reduced.

[0030] In addition, in each of the imaging element according to the third aspect of the present disclosure, the imaging element according to the third aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the third aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements and the like according to the third aspect of the present disclosure" in some cases), the charge movement control electrode is formed in the following area: the area facing the photoelectric conversion layer via the insulating layer is located between the imaging element and the adjacent imaging element. This can control the electric field and potential of the area of ​​the photoelectric conversion layer located on the upper side of the charge movement control electrode. As a result, the charge movement control electrode can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) will not be reduced.

[0031] In addition, in each of the imaging element according to the fourth aspect of the present disclosure, the imaging element according to the fourth aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the fourth aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements according to the fourth aspect of the present disclosure and the like" in some cases), the charge movement control electrode is formed on the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element instead of the second electrode. Therefore, the charge movement control electrode can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not reduced.

[0032] Furthermore, in each of the imaging element according to the fifth aspect of the present disclosure, the imaging element according to the fifth aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the fifth aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements according to the fifth aspect of the present disclosure and the like" in some cases), the value of the dielectric constant of the insulating material contained in the region between the first electrode and the charge storage electrode is higher than the value of the dielectric constant of the insulating material contained in the region between the imaging element and the adjacent imaging element. Therefore, the capacity of a capacitor (for convenience, referred to as "capacitor A") formed in the region of the charge storage electrode located between the first electrode and the charge storage electrode is greater than the capacity of a capacitor (for convenience, referred to as "capacitor B") formed in the region of the charge storage electrode located between the imaging element and the adjacent imaging element. Charges are more attracted toward the region between the first electrode and the charge storage electrode than toward the region between the imaging element and the adjacent imaging element. This can prevent the charges generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not reduced.

[0033] In addition, in each of the imaging element according to the sixth aspect of the present disclosure, the imaging element according to the sixth aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the sixth aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements and the like according to the sixth aspect of the present disclosure" in some cases), the thickness of the region of the insulating layer located between the first electrode and the charge storage electrode is thinner than the thickness of the region of the insulating layer located between the imaging element and the adjacent imaging element. Therefore, the capacity of capacitor A is greater than the capacity of capacitor B, and the charge is attracted more toward the region of the insulating layer located between the first electrode and the charge storage electrode than toward the region of the insulating layer located between the imaging element and the adjacent imaging element. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) will not be reduced.

[0034] In addition, in each of the imaging element according to the seventh aspect of the present disclosure, the imaging element according to the seventh aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the seventh aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements and the like according to the seventh aspect of the present disclosure" in some cases), the thickness of the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is greater than the thickness of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. In addition, in this case, the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element is more affected by the voltage of the second electrode (upper electrode), and the electric potential becomes smaller. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) will not be reduced.

[0035] In addition, in each of the imaging element according to the eighth aspect of the present disclosure, the imaging element according to the eighth aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the eighth aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements and the like according to the eighth aspect of the present disclosure" in some cases), the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer between the first electrode and the charge storage electrode is less than the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer between the imaging element and the adjacent imaging element. In addition, in this case, the potential of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element changes more depending on the amount of fixed charge. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) will not be reduced.

[0036] In addition, in each of the imaging element according to the ninth aspect of the present disclosure, the imaging element according to the ninth aspect of the present disclosure included in the stacked imaging element, and the imaging element according to the ninth aspect of the present disclosure included in the solid-state imaging device according to the first aspect and the second aspect of the present disclosure (hereinafter, the imaging elements are collectively referred to as "imaging elements and the like according to the ninth aspect of the present disclosure" in some cases), the value of the charge mobility in the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is greater than the value of the charge mobility in the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. In this case, the charge flows more easily toward the first electrode than toward the adjacent imaging element. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) will not be reduced.

[0037] Note that the beneficial effects described in this specification are only exemplary and not limiting. In addition, there may be other beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1A and Figure 1B They are respectively a schematic cross-sectional view of a part of the imaging element of Embodiment 1 (two imaging elements arranged side by side) and a schematic cross-sectional view of a modification example (modification example 6 of Embodiment 1) of the imaging element of Embodiment 1 (two imaging elements arranged side by side).

[0039] Figure 2 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Example 1.

[0040] Figure 3 It is an equivalent circuit diagram of the imaging element of Example 1 and the stacked imaging element.

[0041] Figure 4 It is an equivalent circuit diagram of the imaging element of Example 1 and the stacked imaging element.

[0042] Figure 5 is a schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in the imaging element of Embodiment 1.

[0043] Figure 6 is a schematic layout diagram of a first electrode and a charge storage electrode included in the imaging element of Example 1.

[0044] Figure 7 is a schematic layout diagram of a modification of the first electrode and the charge storage electrode included in the imaging element of Embodiment 1 (modification of Embodiment 1).

[0045] Figure 8 is a diagram schematically illustrating the state of the potential in each portion during the operation of the imaging element of Embodiment 1.

[0046] Fig.9A , 9B 9C and 9C are equivalent circuit diagrams of the imaging elements and stacked imaging elements of Examples 1, 11 and 12, and are used to describe Figure 8 (Example 1), Fig.51 (Example 11), and Fig.58 (Example 12) various parts.

[0047] Fig.10 This is a conceptual diagram of the solid-state imaging device of Example 1.

[0048] Fig.11 It is an equivalent circuit diagram of the imaging element of Example 1 and a modification example of the stacked imaging element (Modification example 2 of Example 1).

[0049] Fig.12 yes Fig.11 FIG. 1 is a schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in a modification example (modification example 2 of embodiment 1) of the imaging element of embodiment 1. FIG.

[0050] Fig.13 is a schematic layout diagram of a modification example (modification example 3 of embodiment 1) of the first electrode and the charge storage electrode included in the imaging element of embodiment 1.

[0051] Fig.14A and 14B is a schematic layout diagram of a modification example (modification example 4 of embodiment 1) of the first electrode and the charge storage electrode included in the imaging element of embodiment 1.

[0052] Fig.15A and 15B is a schematic layout diagram of a modification example (modification example 5 of embodiment 1) of the first electrode and the charge storage electrode included in the imaging element of embodiment 1.

[0053] Fig.16A yes Fig. 15B In the modification 5 of the embodiment 1 shown, along Fig. 15B A schematic cross-sectional view taken along a dashed line BB of , and Fig. 16B When the charge movement control electrode is Fig.15A The discharge electrode is replaced along the path of the modification 5 of the embodiment 1 shown in FIG. Fig.15A A schematic cross-sectional view taken along the dashed line AA.

[0054] Fig.17A and 17Bis a schematic cross-sectional view of part of the imaging element of Embodiment 2 (two imaging elements arranged side by side).

[0055] Fig.18A and 18B is a schematic cross-sectional view of part of the imaging element of Embodiment 3 (two imaging elements arranged side by side).

[0056] Fig.19 is a schematic plan view of part of the imaging element of Embodiment 3 (2×2 imaging elements arranged side by side).

[0057] Fig. 20 It is a schematic plan view of part of a modification example (Modification example 1 of Embodiment 3) of the imaging element of Embodiment 3 (2×2 imaging elements arranged side by side).

[0058] Fig.21A and 21B Schematic illustrations show changes in electric potential within the photoelectric conversion layer in the imaging element of Example 1 in which a charge storage electrode is provided on the lower side of the photoelectric conversion layer, and changes in electric potential within the photoelectric conversion layer in the imaging element of Example 3 in which a charge storage electrode is provided on the upper side of the photoelectric conversion layer.

[0059] Fig.22A and 22B It is a schematic plan view of a portion of a modification of the imaging element of Embodiment 3 (Modification 2 of Embodiment 3).

[0060] Fig.23A , 23B 23C is a schematic plan view of a portion of a modification of the imaging element of Embodiment 3 (Modification 3 of Embodiment 3).

[0061] Fig.24A and 24B It is a schematic cross-sectional view of part of modifications (Modification 4A and Modification 4B of Embodiment 3) of the imaging element of Embodiment 3 (two imaging elements arranged side by side).

[0062] Fig.25A and 25B It is a schematic plan view of a modification of the imaging element of Embodiment 3 (Modification 4A of Embodiment 3).

[0063] Fig.26A and 26B It is a schematic plan view of a modification of the imaging element of Embodiment 3 (Modification 4B of Embodiment 3).

[0064] Fig.27A and 27B It is a schematic plan view of a modification of the imaging element of Embodiment 3 (Modification 4C of Embodiment 3).

[0065] Fig.28A and 28B It is a schematic plan view of a modification of the imaging element of Embodiment 3 (Modification 4D of Embodiment 3).

[0066] Fig.29A , 29B 29 and 29C are diagrams schematically illustrating states of potentials of respective portions in Modification 4B of Embodiment 3, Modification 4C of Embodiment 3, and Modification 4D of Embodiment 3, respectively.

[0067] Fig.30 is a schematic cross-sectional view of part of the imaging element of Embodiment 4 (two imaging elements arranged side by side).

[0068] Fig.31 is a schematic cross-sectional view of a portion of a modification of the imaging element of Embodiment 4 (two imaging elements arranged side by side).

[0069] Fig.32 is a schematic cross-sectional view of a portion of another modified example of the imaging element of Embodiment 4 (two imaging elements arranged side by side).

[0070] Fig.33 is a schematic cross-sectional view of a portion of still another modified example of the imaging element of Embodiment 4 (two imaging elements arranged side by side).

[0071] Fig.34 is a schematic cross-sectional view of part of the imaging element of Embodiment 5 (two imaging elements arranged side by side).

[0072] Fig.35 is a schematic cross-sectional view of a portion of a modification of the imaging element of Embodiment 5 (two imaging elements arranged side by side).

[0073] Fig.36 is a schematic cross-sectional view of a portion of another modified example of the imaging element of Embodiment 5 (two imaging elements arranged side by side).

[0074] Fig.37 is a schematic cross-sectional view of part of the imaging element of Embodiment 6 (two imaging elements arranged side by side).

[0075] Fig.38 is a schematic cross-sectional view of a portion of a modification of the imaging element of Embodiment 6 (two imaging elements arranged side by side).

[0076] Fig.39 is a schematic cross-sectional view of part of the imaging element of Embodiment 7 (two imaging elements arranged side by side).

[0077] Fig.40is a schematic cross-sectional view of part of the imaging element of Embodiment 8 (two imaging elements arranged side by side).

[0078] Fig.41 is a schematic cross-sectional view of a portion of a modification of the imaging element of Embodiment 8 (two imaging elements arranged side by side).

[0079] Fig.42 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Example 9.

[0080] Fig.43 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Example 10.

[0081] Fig.44 is a schematic partial cross-sectional view of a modification of the imaging element of Embodiment 10 and a stacked imaging element.

[0082] Fig.45 is a schematic partial cross-sectional view of the imaging element of Embodiment 10 and another modified example of the stacked imaging element.

[0083] Fig.46 It is a schematic partial cross-sectional view of still another modification of the imaging element of Embodiment 10 and the stacked imaging element.

[0084] Fig.47 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Example 11.

[0085] Fig.48 It is an equivalent circuit diagram of the imaging element of Example 11 and the stacked imaging element.

[0086] Fig.49 It is an equivalent circuit diagram of the imaging element of Example 11 and the stacked imaging element.

[0087] Fig.50 is a schematic layout diagram of a first electrode, a transfer control electrode, a charge storage electrode, and a transistor of a control unit included in the imaging element of Example 11.

[0088] Fig.51 is a diagram schematically illustrating the state of potential in each portion during operation of the imaging element of Embodiment 11.

[0089] Fig.52 is a diagram schematically illustrating the state of potentials in various parts during another operation period of the imaging element of Embodiment 11.

[0090] Fig.53is a schematic layout diagram of a first electrode, a transfer control electrode, a charge storage electrode, and a transistor of a control unit included in a modification example of the imaging element of Embodiment 11.

[0091] Fig.54 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Example 12.

[0092] Fig.55 It is an equivalent circuit diagram of the imaging element of Example 12 and the stacked imaging element.

[0093] Fig.56 It is an equivalent circuit diagram of the imaging element of Example 12 and the stacked imaging element.

[0094] Fig.57 is a schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in an imaging element of Example 12.

[0095] Fig.58 is a diagram schematically illustrating the state of potential in each portion during operation of the imaging element of Embodiment 12.

[0096] Fig.59 is a diagram schematically illustrating the state of potentials in various portions during another operation period (charge transfer period) of the imaging element of Embodiment 12.

[0097] Fig.60 is a schematic layout diagram of a first electrode and a charge storage electrode included in a modification of the imaging element of Embodiment 12.

[0098] Fig.61 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Example 13.

[0099] Fig.62 is a schematic partial enlarged cross-sectional view of a portion where a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked in an imaging element of Example 13.

[0100] Fig.63 is a schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in a modification example of the imaging element of Embodiment 13.

[0101] Fig.64 is a schematic partial enlarged cross-sectional view of a portion where a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked in an imaging element of Example 14.

[0102] Fig.65 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Example 15.

[0103] Fig.66 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Examples 16 and 17.

[0104] Fig.67A and 67B is a schematic plan view of a charge storage electrode segment in Example 17.

[0105] Fig.68A and 68B is a schematic plan view of a charge storage electrode segment in Example 17.

[0106] Fig.69 is a schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in an imaging element of Example 17.

[0107] Fig.70 is a schematic layout diagram of a first electrode and a charge storage electrode included in a modification of the imaging element of Embodiment 17.

[0108] Fig.71 is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Examples 18 and 17.

[0109] Fig.72A and 72B is a schematic plan view of a charge storage electrode segment in Example 18.

[0110] Fig.73 is a schematic plan view of a first electrode and a charge storage electrode section in the solid-state imaging device of Example 19.

[0111] Fig.74 19 is a schematic plan view of a first electrode and a charge storage electrode section in a first modification example of the solid-state imaging device of Embodiment 19.

[0112] Fig.75 19 is a schematic plan view of a first electrode and a charge storage electrode section in a second modification of the solid-state imaging device of Embodiment 19.

[0113] Fig.76 19 is a schematic plan view of a first electrode and a charge storage electrode section in a third modification example of the solid-state imaging device of Embodiment 19.

[0114] Fig.77 19 is a schematic plan view of a first electrode and a charge storage electrode section in a fourth modification example of the solid-state imaging device of Embodiment 19.

[0115] Fig.78 19 is a schematic plan view of a first electrode and a charge storage electrode section in a fifth modification example of the solid-state imaging device of Embodiment 19.

[0116] Fig.79 19 is a schematic plan view of a first electrode and a charge storage electrode section in a sixth modification example of the solid-state imaging device of Embodiment 19.

[0117] Fig.80 1 is a schematic plan view of a first electrode and a charge storage electrode section in a seventh modification example of the solid-state imaging device of Embodiment 19.

[0118] Fig.81 1 is a schematic plan view of a first electrode and a charge storage electrode section in an eighth modification example of the solid-state imaging device of Embodiment 19.

[0119] Fig.82 10 is a schematic plan view of a first electrode and a charge storage electrode section in a ninth modification example of the solid-state imaging device of Embodiment 19.

[0120] Fig.83A , 83B 83A and 83C are diagrams showing examples of reading and driving in the imaging element block of Embodiment 19.

[0121] Fig.84 1 is a schematic plan view of a first electrode and a charge storage electrode section of a solid-state imaging device of Example 20.

[0122] Fig.85 1 is a schematic plan view of a first electrode and a charge storage electrode section in a modification of the solid-state imaging device of Embodiment 20.

[0123] Fig.86 1 is a schematic plan view of a first electrode and a charge storage electrode section in a modification of the solid-state imaging device of Embodiment 20.

[0124] Fig.87 1 is a schematic plan view of a first electrode and a charge storage electrode section in a modification of the solid-state imaging device of Embodiment 20.

[0125] Fig.88 1 is a schematic partial cross-sectional view of the imaging element of Embodiment 1 and another modified example of the stacked imaging element.

[0126] Fig.89 It is a schematic partial cross-sectional view of still another modification of the imaging element of Embodiment 1 and the stacked imaging element.

[0127] Fig.90A , 90B 90C are schematic partial enlarged cross-sectional views of various parts of the first electrode and the like in still another modification of the imaging element of Embodiment 1 and the stacked imaging element.

[0128] Fig.91It is a schematic partial cross-sectional view of still another modification of the imaging element of Embodiment 1 and the stacked imaging element.

[0129] Fig.92 It is a schematic partial cross-sectional view of still another modification of the imaging element of Embodiment 1 and the stacked imaging element.

[0130] Fig.93 It is a schematic partial cross-sectional view of still another modification of the imaging element of Embodiment 1 and the stacked imaging element.

[0131] Fig.94 is a schematic partial cross-sectional view of the imaging element of Embodiment 11 and another modified example of the stacked imaging element.

[0132] Fig.95 It is a schematic partial cross-sectional view of still another modification of the imaging element of Embodiment 1 and the stacked imaging element.

[0133] Fig.96 It is a schematic partial cross-sectional view of still another modification of the imaging element of Embodiment 1 and the stacked imaging element.

[0134] Fig.97 is a schematic partially enlarged cross-sectional view of a portion where a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked in a modification of the imaging element of Embodiment 13.

[0135] Fig.98 is a schematic partial enlarged cross-sectional view of a portion where a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked in a modification of the imaging element of Embodiment 14.

[0136] Fig.99A and 99B is an equivalent circuit diagram of a modified example of a transistor driving a charge storage electrode.

[0137] Fig.100A and 100B The drive Fig.99A and 99B Illustration of the pulse waveform of the transistor in the equivalent circuit shown in FIG.

[0138] Fig.101 is a conceptual diagram of an example in which a solid-state imaging device including an imaging element of the present disclosure and a stacked imaging element is used in an electronic device (camera).

[0139] Fig.102 This is a conceptual diagram of a conventional stacked imaging element (stacked solid-state imaging device).

[0140] Description of Embodiments

[0141] Hereinafter, the present disclosure will be described based on the embodiments with reference to the accompanying drawings. However, the present disclosure is not limited to the embodiments, and various values ​​and materials in the embodiments are illustrative. Note that the present disclosure will be described in the following order.

[0142] 1. General description of the imaging elements and stacked imaging elements according to the first to ninth aspects of the present disclosure and the solid-state imaging devices according to the first and second aspects of the present disclosure

[0143] 2. Embodiment 1 (Imaging elements according to the first to third aspects of the present disclosure, stacked imaging element of the present disclosure, and solid-state imaging device according to the second aspect of the present disclosure)

[0144] 3. Embodiment 2 (Imaging element according to the second aspect of the present disclosure)

[0145] 4. Embodiment 3 (Imaging element according to the fourth aspect of the present disclosure)

[0146] 5. Embodiment 4 (Imaging element according to the fifth aspect of the present disclosure)

[0147] 6. Embodiment 5 (Imaging element according to the sixth aspect of the present disclosure)

[0148] 7. Example 6 (Imaging element according to the seventh aspect of the present disclosure)

[0149] 8. Embodiment 7 (Imaging element according to the eighth aspect of the present disclosure)

[0150] 9. Embodiment 8 (Imaging element according to the ninth aspect of the present disclosure)

[0151] 10. Embodiment 9 (Variation of the Imaging Element of Embodiments 1 to 8)

[0152] 11. Embodiment 10 (Modification of Embodiments 1 to 9, solid-state imaging device according to the first aspect of the present disclosure)

[0153] 12. Embodiment 11 (Variation of Embodiments 1 to 10, Imaging Element Including a Transfer Control Electrode)

[0154] 13. Embodiment 12 (Variation of Embodiments 1 to 11, Imaging Element Including Multiple Charge Storage Electrode Segments)

[0155] 14. Example 13 (Imaging Elements of the First and Sixth Configurations)

[0156] 15. Example 14 (Imaging elements of the second and sixth configurations of the present disclosure)

[0157] 16. Example 15 (Imaging element of the third structure)

[0158] 17. Example 16 (Imaging element of the fourth structure)

[0159] 18. Example 17 (Imaging element of the fifth structure)

[0160] 19. Example 18 (Imaging element of the sixth structure)

[0161] 20. Example 19 (Solid-state imaging devices of first and second configurations)

[0162] 21. Example 20 (Variation of Example 19)

[0163] 22. Others DETAILED DESCRIPTION

[0164] <General Description of Imaging Elements and Stacked Imaging Elements of the First to Ninth Aspects of the Present Disclosure and Solid-State Imaging Devices of the First to Second Aspects of the Present Disclosure>

[0165] In the following description, for convenience, the "region of the photoelectric conversion layer located between the first electrode and the charge storage electrode" is referred to as the "region A of the photoelectric conversion layer", and for convenience, the "region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element" is referred to as the "region B of the photoelectric conversion layer". In addition, for convenience, the "region of the insulating layer located between the first electrode and the charge storage electrode" is referred to as the "region A of the insulating layer", and for convenience, the "region of the insulating layer located between the imaging element and the adjacent imaging element" is referred to as the "region B of the insulating layer". Region B of the photoelectric conversion layer corresponds to region B of the insulating layer. In addition, for convenience, the "region between the first electrode and the charge storage electrode" is referred to as the "region a", and for convenience, the "region between the imaging element and the adjacent imaging element" is referred to as the "region b". In region a, region A of the photoelectric conversion layer corresponds to region A of the insulating layer. In region b, region B of the photoelectric conversion layer corresponds to region B of the insulating layer.

[0166] In the imaging element according to the first and second aspects of the present invention, etc., in other words, region B of the photoelectric conversion layer represents the following portion of the photoelectric conversion layer: the portion is positioned above a portion of the insulating layer (region B of the insulating layer) located in the region (region b) between the charge storage electrode and the charge storage electrode included in the adjacent imaging element.

[0167] In the imaging element and the like according to the third aspect of the present invention, the charge movement control electrode is formed in an area facing the area B of the photoelectric conversion layer via the insulating layer. In other words, the charge movement control electrode is formed below a portion (area B of the insulating layer) of the insulating layer located in an area (area b) between the charge storage electrode and the charge storage electrode included in the adjacent imaging element. The charge movement control electrode is disposed away from the charge storage electrode. Or, in other words, the charge movement control electrode is disposed around the charge storage electrode and is separated from the charge storage electrode, and the charge movement control electrode is arranged to face the area B of the photoelectric conversion layer via the insulating layer.

[0168] In the imaging element according to the fourth aspect of the present invention, as a substitute for the second electrode, a charge movement control electrode is formed in a region of the photoelectric conversion layer between the imaging element and the adjacent imaging element. The charge movement control electrode is provided separately from the second electrode. In other words:

[0169] [A] A second electrode may be provided for each imaging element, and the charge movement control electrode may be disposed so as to surround at least a portion of the second electrode on region B of the photoelectric conversion layer and be separated from the second electrode,

[0170] [B] A second electrode may be provided for each imaging element, the charge movement control electrode may be arranged to surround at least a portion of the second electrode and be separated from the second electrode, and a portion of the charge storage electrode may exist on the lower side of the charge movement control electrode, or

[0171] [C] A second electrode may be provided for each imaging element, the charge movement control electrode may be provided to surround at least a portion of the second electrode and be separated from the second electrode, a portion of the charge storage electrode may be present on the lower side of the charge movement control electrode, and further, the charge movement control electrode in the imaging element according to the third aspect, etc. may be formed on the lower side of the charge movement control electrode. The potential generated by the coupling of the charge movement control electrode and the second electrode is applied to a region of the photoelectric conversion layer that is located below a region between the charge movement control electrode and the second electrode in some cases.

[0172] In the imaging element and the like according to the fifth aspect of the present invention, the insulating material contained in the region a (referred to as "insulating material A" for convenience) may fill all of the region a from the plane, may fill a portion of the region a, may include the region a to the edge portion of the charge storage electrode (the edge portion facing the region a), or may be formed on part or all of the charge storage electrode. Alternatively, the insulating material may fill all of the region a or may fill a portion of the region a along the thickness direction of the insulating layer. The insulating material contained in the region B (region b) of the insulating layer (referred to as "insulating material B" for convenience) may fill all of the region B of the insulating layer from the plane, may fill a portion of the region B of the insulating layer (region b), or may include the region B (region b) of the insulating layer to the edge portion of the charge storage electrode (the edge portion of the region B (region b) facing the insulating layer). Alternatively, the insulating material may fill all of the region B (region b) of the insulating layer or may fill a portion of the region B (region b) of the insulating layer along the thickness direction of the insulating layer.

[0173] In the imaging element and the like according to the sixth aspect of the present invention, the thickness of region A of the insulating layer is thinner than that of region B. All of region A and region B of the insulating layer may suffice, or a part of the region may suffice.

[0174] In the imaging element and the like according to the seventh aspect of the present invention, the thickness of region A of the photoelectric conversion layer is thicker than the thickness of region B of the photoelectric conversion layer. Region A of the photoelectric conversion layer and all regions of region B of the photoelectric conversion layer may satisfy the requirement, or a part of the region may satisfy the requirement. The thickness of region B of the photoelectric conversion layer may be "0". That is, depending on the situation, the region of the photoelectric conversion layer positioned between the imaging element and the adjacent imaging element may not exist.

[0175] In the imaging element and the like according to the eighth aspect of the present invention, the amount of fixed charge in the region of the interface between region A of the photoelectric conversion layer and region A of the insulating layer is smaller than the amount of fixed charge in the region of the interface between region B of the photoelectric conversion layer and region B of the insulating layer. All of the region of the interface between region A of the photoelectric conversion layer and region A of the insulating layer and the region of the interface between region B of the photoelectric conversion layer and region B of the insulating layer may satisfy the requirement, or a part of the region may satisfy the requirement.

[0176] In the imaging element and the like according to the ninth aspect of the present invention, the value of the charge mobility in region A of the photoelectric conversion layer (referred to as "charge mobility A" for convenience) is greater than the value of the charge mobility in region B of the photoelectric conversion layer (referred to as "charge mobility B" for convenience). Region A of the photoelectric conversion layer and all of region B of the photoelectric conversion layer may satisfy the requirement, or a portion of the region may satisfy the requirement. Alternatively, the region of the photoelectric conversion layer having charge mobility A may extend over a portion or all of the charge storage electrode.

[0177] The imaging element or the like according to the third aspect of the present invention may further include a control unit, which is provided on the semiconductor substrate and includes a drive circuit, wherein

[0178] The first electrode, the second electrode, the charge storage electrode and the charge movement control electrode are connected to a driving circuit,

[0179] During the charge storage period, the driver circuit sets the potential V 11 Applied to the first electrode, the potential V 12 applied to the charge storage electrode and the potential V 13 applied to the charge movement control electrode, and the charge is stored in the photoelectric conversion layer, and

[0180] During the charge transfer period, the driver circuit sets the potential V 21 Applied to the first electrode, the potential V 22 applied to the charge storage electrode and the potential V 23 applied to the charge movement control electrode, and the charges stored in the photoelectric conversion layer are read out to the control unit through the first electrode, wherein

[0181] In the case where the potential of the first electrode is higher than the potential of the second electrode,

[0182] V 12 ≥V 11 , V 12 >V 13 and V 21 >V 22 >V 23 be maintained, and

[0183] When the potential of the first electrode is lower than the potential of the second electrode,

[0184] V 12 ≤V 11 , V 12 <V 13 and V 21 <V 22 <V 23The charge movement control electrode may be formed at the same level as the first electrode or the charge storage electrode, or may be formed at a different level.

[0185] The imaging element or the like according to the fourth aspect of the present invention may further include a control unit provided on the semiconductor substrate and including a drive circuit, wherein

[0186] The first electrode, the second electrode, the charge storage electrode and the charge movement control electrode are connected to a driving circuit,

[0187] During the charge storage period, the drive circuit applies a potential V2' to the second electrode and applies a potential V 13 ', and the charge is stored in the photoelectric conversion layer, and

[0188] During the charge transfer, the driving circuit applies a potential V2" to the second electrode and applies a potential V 23 ", and the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode, wherein

[0189] When the potential of the first electrode is higher than the potential of the second electrode

[0190] V2'≥V 13 ' and V2"≥V 23 "be maintained, and

[0191] When the potential of the first electrode is lower than the potential of the second electrode

[0192] V2'≤V 13 ' and V2"≤V 23 " is maintained. The charge movement control electrode is formed at the same level as the second electrode.

[0193] Each of the imaging element of the present disclosure including the above-described preferred mode may further include a semiconductor substrate, wherein the photoelectric conversion unit is arranged on the upper side of the semiconductor substrate. Note that the first electrode, the charge storage electrode, the second electrode, and the various electrodes are connected to a drive circuit described later.

[0194] In addition, each of the imaging elements and the like of the present disclosure including the above-mentioned various preferred modes may further include a transfer control electrode (charge transfer electrode) which is arranged between the first electrode and the charge storage electrode, is arranged to be separated from the first electrode and the charge storage electrode, and is arranged to face the photoelectric conversion layer via the insulating layer. Note that for convenience, in some cases, the imaging element and the like of the present disclosure in this mode is referred to as "the imaging element and the like of the present disclosure including the transfer control electrode". In addition, the imaging element and the like of the present disclosure including the transfer control electrode may further include:

[0195] A control unit is provided on a semiconductor substrate and includes a drive circuit, wherein

[0196] The first electrode, the charge storage electrode and the transfer control electrode are connected to a driving circuit,

[0197] During the charge storage period, the driver circuit sets the potential V 11 Applied to the first electrode, the potential V 12 applied to the charge storage electrode and the potential V 14 Applied to the transfer control electrode, the charge is stored in the photoelectric conversion layer, and

[0198] During the charge transfer period, the driver circuit sets the potential V 21 Applied to the first electrode, the potential V 22 applied to the charge storage electrode and the potential V 24 Applied to the transfer control electrode, the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode, wherein

[0199] When the potential of the first electrode is higher than the potential of the second electrode

[0200] V 12 >V 14 and V 22 ≤V 24 ≤V 21 be maintained, and

[0201] When the potential of the first electrode is lower than the potential of the second electrode

[0202] V 12 <V 14 And V 22 ≥V 24 ≥V 21 be maintained.

[0203] In addition, in each of the imaging elements of the present disclosure including the above-mentioned various preferred modes, the charge storage electrode may include a plurality of charge storage electrode segments. Note that for convenience, in some cases, the imaging element of the present disclosure in a mode is referred to as "the imaging element of the present disclosure including a plurality of charge storage electrode segments". The number of charge storage electrode segments may be equal to or greater than 2. In addition, in the case where different potentials are applied to each of the N charge storage electrode segments in the imaging element of the present disclosure including a plurality of charge storage electrode segments,

[0204] In the case where the potential of the first electrode is higher than the potential of the second electrode, during charge transfer, the potential applied to the charge storage electrode segment located closest to the first electrode (the first photoelectric conversion unit segment) may be higher than the potential applied to the charge storage electrode segment located farthest from the first electrode (the Nth photoelectric conversion unit segment), and

[0205] When the potential of the first electrode is lower than the potential of the second electrode, during charge transfer, the potential applied to the charge storage electrode segment (first photoelectric conversion unit segment) positioned closest to the first electrode can be lower than the potential applied to the charge storage electrode segment (Nth photoelectric conversion unit segment) positioned farthest from the first electrode.

[0206] Furthermore, in each of the imaging elements S and the like of the present disclosure including the above-mentioned various preferred modes, the size of the charge storage electrode may be larger than the size of the first electrode. Although not restrictive, it is preferred that

[0207] 4≤S1' / S 1，

[0208] Where S1' is the area of ​​the charge storage electrode and S1 is the area of ​​the first electrode.

[0209] In the imaging element according to the second aspect of the present invention, the width W of the region A of the photoelectric conversion layer is A The width W of the region B of the photoelectric conversion layer is B Narrow, and (W A / W B Examples of values ​​for ) include

[0210] 1 / 2≤(W A / W B )<1.

[0211] In the imaging element according to the fifth aspect of the present invention, specific examples of the insulating material A include SiN, and specific examples of the insulating material B include SiO 2 .

[0212] In the imaging element according to the sixth aspect of the present invention, the thickness t of the region A of the insulating layer is In-A The thickness of the insulating layer in region B is In-B Thin, and (t In-A / t In-B Examples of values ​​for ) include

[0213] 1 / 2≤(t In-A / t In-B )<1.

[0214] In the imaging element according to the seventh aspect of the present invention, the thickness t of the region A of the photoelectric conversion layer is Pc-AThan the thickness t of the region B of the photoelectric conversion layer Pc-B Thick, and (t Pc-A / t Pc-B Examples of values ​​for ) include

[0215] 1<(t Pc-A / t Pc-B )≤2.

[0216] In the imaging element according to the eighth aspect of the present invention, the fixed charge amount FC in the region of the interface between the region A of the photoelectric conversion layer and the region A of the insulating layer is A The fixed charge amount FC in a region smaller than the interface between the region B of the photoelectric conversion layer and the region B of the insulating layer B .

[0217] 1 / 10≤(FC A / FC B )<1.

[0218] Here, the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer can be controlled based on, for example, a method of depositing a thin film having fixed charge.

[0219] In the imaging element according to the ninth aspect of the present invention, the value CT of the charge mobility in the region A of the photoelectric conversion layer is A is greater than the value CT of the charge mobility in the region B of the photoelectric conversion layer B .

[0220] 1<(CT A / CT B )≤1×10 2 .

[0221] The material contained in region A of the photoelectric conversion layer and the material contained in region B of the photoelectric conversion layer can be appropriately selected from the materials contained in the photoelectric conversion layer. Alternatively, a portion of the photoelectric conversion layer may have a double-layer structure of an upper layer / lower layer. The upper layer of region A of the photoelectric conversion layer and the upper layer of region B of the photoelectric conversion layer and the portion of the photoelectric conversion layer positioned on the upper side of the charge storage electrode may contain the same material (referred to as the "upper layer constituent material" for convenience). The lower layer of region A of the photoelectric conversion layer and the lower layer of the portion of the photoelectric conversion layer positioned on the upper side of the charge storage electrode may contain the same material (referred to as the "lower layer constituent material" for convenience). The upper layer constituent material and the lower layer constituent material may be different.

[0222] In this way, a lower layer of the photoelectric conversion layer (in some cases, it will be referred to as a "lower semiconductor layer") can be provided to prevent recombination, for example, during the charge storage period. This can also improve the charge transfer efficiency of the charge stored in the photoelectric conversion layer to the first electrode. In addition, the charge generated in the photoelectric conversion layer can be temporarily retained to control the timing of the transfer, etc. In addition, the generation of dark current can also be suppressed. Note that in some cases, the upper layer of the photoelectric conversion layer is referred to as an "upper photoelectric conversion layer".

[0223] In addition to the imaging element according to the fourth aspect of the present disclosure, the second electrode located on the light incident side can be shared by multiple imaging elements. That is, the second electrode can be a so-called solid electrode. In the imaging element of the present disclosure, the photoelectric conversion layer is shared by multiple imaging elements. That is, one photoelectric conversion layer is formed in multiple imaging elements.

[0224] Furthermore, in the imaging element of the present disclosure including the above-described various preferred modes, the first electrode may extend in the opening provided in the insulating layer and may be connected to the photoelectric conversion layer. Alternatively, the photoelectric conversion layer may extend in the opening provided in the insulating layer and may be connected to the first electrode. In this case,

[0225] An edge portion of the top surface of the first electrode may be covered by an insulating layer,

[0226] The first electrode may be exposed on the bottom surface of the opening, and

[0227] The side surface of the opening portion may be inclined to extend from the first surface to the second surface, wherein the first surface is a surface of the insulating layer in contact with the top surface of the first electrode, and the second surface is a surface of the insulating layer in contact with a portion of the photoelectric conversion layer facing the charge storage electrode. In addition, the side surface of the opening portion extending obliquely from the first surface to the second surface may be located on the charge storage electrode side. Note that another layer may also be formed between the photoelectric conversion layer and the first electrode (for example, a material layer suitable for charge storage may be formed between the photoelectric conversion layer and the first electrode).

[0228] Furthermore, in the imaging element and the like of the present disclosure including the above-described various preferred modes,

[0229] At least a floating diffusion layer and an amplifying transistor included in the control unit may be provided on a semiconductor substrate, and

[0230] The first electrode may be connected to the floating diffusion layer and the gate portion of the amplifying transistor. In addition, in this case,

[0231] A reset transistor and a selection transistor included in the control unit may be further disposed on the semiconductor substrate.

[0232] The floating diffusion layer can be connected to one source / drain region of the reset transistor

[0233] One source / drain region of the amplification transistor may be connected to one source / drain region of the selection transistor, and the other source / drain region of the selection transistor may be connected to the signal line.

[0234] Alternatively, a modification of the imaging element of the present disclosure including the above-mentioned various preferred modes includes the imaging elements of the first to sixth structures described below. That is, in each of the imaging elements of the first to sixth structures in the imaging element of the present disclosure including the above-mentioned various preferred modes,

[0235] The photoelectric conversion unit includes N (where N≥2) photoelectric conversion unit segments,

[0236] The photoelectric conversion layer includes N photoelectric conversion layer segments,

[0237] The insulating layer comprises N insulating layer segments,

[0238] In each of the imaging elements of the first to third configurations, the charge storage electrode comprises N charge storage electrode segments,

[0239] In each of the imaging elements of the fourth and fifth configurations, the charge storage electrode includes N charge storage electrode segments arranged separately from each other,

[0240] The nth (where n=1, 2, 3, . . . N) photoelectric conversion unit section includes the nth charge storage electrode section, the nth insulating layer section and the nth photoelectric conversion layer section, and

[0241] The larger the n value of the photoelectric conversion unit segment is, the farther the location of the photoelectric conversion unit segment is from the first electrode.

[0242] In addition, in the imaging element of the first structure, the thickness of the photoelectric conversion layer segment gradually changes from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. In addition, in the imaging element of the second structure, the thickness of the photoelectric conversion layer segment gradually changes from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. In addition, in the imaging element of the third structure, the material contained in the insulating layer segment varies between adjacent photoelectric conversion unit segments. In addition, in the imaging element of the fourth structure, the material contained in the charge storage electrode segment varies between adjacent photoelectric conversion unit segments. In addition, in the imaging element of the fifth structure, the area of ​​the charge storage electrode segment gradually decreases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Note that the area can be reduced continuously or can be reduced in steps.

[0243] Alternatively, in the imaging element of the sixth configuration of the present disclosure including the above-mentioned various preferred modes, the cross-sectional area of ​​the stacked portion of the charge storage electrode, the insulating layer, and the photoelectric conversion layer (when the stacked portion is cut in the YZ virtual plane) changes with the distance from the first electrode, where the Z direction is the stacked direction of the charge storage electrode, the insulating layer, and the photoelectric conversion layer, and the X direction is the direction away from the first electrode. Note that the change in the cross-sectional area may be a continuous change or a stepwise change.

[0244] In each imaging element of the first and second structures, N photoelectric conversion layer segments are continuously arranged, N insulating layer segments are also continuously arranged, and N charge storage electrode segments are also continuously arranged. In each imaging element of the third to fifth structures, N photoelectric conversion layer segments are continuously arranged. In addition, in each imaging element of the fourth and fifth structures, N insulating layer segments are continuously arranged. On the other hand, on the imaging element of the third structure, N insulating layer segments are arranged to correspond to the photoelectric conversion unit segments respectively. In addition, in each imaging element of the fourth and fifth structures and in the imaging element of the third structure, as the case may be, N charge storage electrode segments are arranged to correspond to the photoelectric conversion unit segments respectively. In addition, in each imaging element of the first to sixth structures, the same potential is applied to all charge storage electrode segments. Alternatively, in each imaging element of the fourth and fifth structures and in the imaging element of the third structure, as the case may be, different potentials may be applied to each of the N charge storage electrode segments.

[0245] In each of the stacked imaging element and the solid-state imaging device of the present disclosure in the imaging element of the first to sixth structures and the imaging element applied thereto, the thickness of the insulating layer segment is defined, the thickness of the photoelectric conversion layer segment is defined, the materials contained in each insulating layer segment are different, the materials contained in each charge storage electrode segment are different, the area of ​​the charge storage electrode segment is defined, or the cross-sectional area of ​​the stacked portion is defined. Thus, a charge transfer gradient is formed, and the charge generated by the photoelectric conversion can be transferred to the first electrode more easily and more surely. In addition, as a result, the generation of an afterimage or charge transfer leftover can be prevented.

[0246] A variant of the stacked imaging element of the present disclosure includes a stacked imaging element including at least one of the imaging elements of the first to sixth structures. In addition, a variant of the solid-state imaging device according to the first aspect of the present disclosure includes a solid-state imaging device including a plurality of imaging elements of the first to sixth structures. A variant of the solid-state imaging device according to the second aspect of the present disclosure includes a solid-state imaging device including a plurality of stacked imaging elements, each stacked imaging element including at least one of the imaging elements of the first to sixth structures.

[0247] In each imaging element of the first to fifth structures, the larger the n value of the photoelectric conversion unit segment is, the farther the photoelectric conversion unit segment is from the first electrode. Whether the photoelectric conversion unit segment is positioned away from the first electrode is determined according to the X direction. In addition, in the imaging element of the sixth structure, the direction away from the first electrode is the X direction, and the "X direction" is defined as follows. That is, the pixel area including a plurality of array imaging elements or stacked imaging elements includes a plurality of pixels arranged in a two-dimensional array (i.e., systematically arranged along the X direction and the Y direction). In the case where the planar shape of the pixel is a rectangle, the extension direction of the side closest to the first electrode is the Y direction, and the direction orthogonal to the Y direction is the X direction. Alternatively, in the case where the planar shape of the pixel is an arbitrary shape, the overall direction including the straight line segment or curve closest to the first electrode is the Y direction, and the direction orthogonal to the Y direction is the X direction.

[0248] Hereinafter, the case where the potential of the first electrode is higher than the potential of the second electrode will be described for the imaging elements of the first to sixth configurations. In the case where the potential of the first electrode is lower than the potential of the second electrode, it is only necessary to reverse the high and low potentials.

[0249] In the imaging element of the first configuration, the thickness of the insulating layer section gradually changes from the first photoelectric conversion unit section to the Nth photoelectric conversion unit section. The thickness of the insulating layer section may gradually increase or gradually decrease. Thus, a charge transfer gradient is formed.

[0250] In the case where the charges to be stored are electrons, the thickness of the insulating layer sections can be gradually increased. In the case where the charges to be stored are electron holes, the thickness of the insulating layer sections can be gradually reduced. Furthermore, in these cases, when the state becomes |V during charge storage 12 |≥|V 11 |, the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. A strong electric field is applied, which of course prevents the charge from flowing from the first photoelectric conversion unit segment to the first electrode. In addition, when the state becomes |V 22 |<|V 21 |, the charge flow from the first photoelectric conversion unit section to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit section to the nth photoelectric conversion unit section can be guaranteed.

[0251] In the imaging element of the second configuration, the thickness of the photoelectric conversion layer section gradually changes from the first photoelectric conversion unit section to the Nth photoelectric conversion unit section. The thickness of the photoelectric conversion layer section may gradually increase or gradually decrease. Thus, a charge transfer gradient is formed.

[0252] In the case where the charges to be stored are electrons, the thickness of the photoelectric conversion layer section can be gradually increased. In the case where the charges to be stored are holes, the thickness of the photoelectric conversion layer section can be gradually reduced. In addition, when the state becomes V during charge storage in the case where the thickness of the photoelectric conversion layer section is gradually increased 12 ≥V 11 When the state becomes V during charge storage, or when the thickness of the photoelectric conversion layer section is gradually reduced, 12 ≤V 11 When the electric field applied to the nth photoelectric conversion unit section is stronger than the electric field applied to the (n+1)th photoelectric conversion unit section. This can certainly prevent the flow of charge from the first photoelectric conversion unit section to the first electrode. In addition, when the state becomes V during the charge storage period in the case where the thickness of the photoelectric conversion layer section gradually increases, 22 <V 21 When the thickness of the photoelectric conversion layer section gradually decreases, or when the state becomes V 22 >V 21 When , the charge flow from the first photoelectric conversion unit section to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit section to the nth photoelectric conversion unit section can be guaranteed.

[0253] In the imaging element of the third configuration, the material contained in the insulating layer segment is different in the adjacent photoelectric conversion unit segments, thereby forming a charge transfer gradient. Preferably, the dielectric constant value of the material contained in the insulating layer segment gradually decreases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. In addition, by adopting this configuration, when the state becomes V during charge storage 12 ≥V 11 When the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. In addition, when the state becomes V in the charge transfer period 22 <V 21 When , the charge flow from the first photoelectric conversion unit section to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit section to the nth photoelectric conversion unit section can be guaranteed.

[0254] In the imaging element of the fourth configuration, the material contained in the charge storage electrode segment is different in the adjacent photoelectric conversion unit segments. Thus, a charge transfer gradient is formed. Preferably, the value of the work function of the material contained in the insulating layer segment gradually increases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. In addition, by adopting this configuration, a potential gradient that is conducive to signal charge transfer can be formed regardless of whether the voltage is positive or negative.

[0255] In the imaging element of the fifth structure, the area of ​​the charge storage electrode segment gradually decreases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Thus, a charge transfer gradient is formed. Therefore, when the state becomes V in the charge storage period 12 ≥V 11 When the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. In addition, when the state becomes V during the charge transfer period 22 <V 21 When , the charge flow from the first photoelectric conversion unit section to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit section to the nth photoelectric conversion unit section can be guaranteed.

[0256] In the imaging element of the sixth configuration, the cross-sectional area of ​​the stacked component varies according to the distance from the first electrode. Thus, a charge transfer gradient is formed. Specifically, the thickness of the cross section of the stacked component can be constant, and the width of the cross section of the stacked component can decrease as the distance from the first electrode increases. By adopting this configuration, as described in the imaging element of the fifth configuration, when the state becomes V in the charge storage period, 12 ≥V 11 When the state changes to V in the charge transfer period, the area close to the first electrode can store more charge than the area far from the first electrode. 22 <V 21 When the charge flow from the region close to the first electrode to the first electrode and the charge flow from the region far from the first electrode to the region close to the first electrode can be ensured. On the other hand, the width of the cross section of the stacked component can be constant, and the thickness of the cross section of the stacked portion, especially the thickness of the insulating layer section, can be gradually increased. By adopting this configuration, as described in the imaging element of the first configuration, when the state becomes V in the charge storage period 12 ≥V 11 When the state changes to V in the charge transfer period, the area close to the first electrode stores more charge than the area far from the first electrode. Applying a strong electric field can definitely prevent the flow of charge from the area close to the first electrode to the first electrode. In addition, when the state changes to V in the charge transfer period, 22 <V 21 When the charge flow from the region close to the first electrode to the first electrode and the charge flow from the region far from the first electrode to the region close to the first electrode can be ensured. In addition, the thickness of the photoelectric conversion layer segment can be gradually increased. By adopting this structure, as described in the imaging element of the second structure, when the state becomes V in the charge storage period 12 ≥V 11When the electric field applied to the area close to the first electrode is stronger than the electric field applied to the area far from the first electrode. This can certainly prevent the flow of charge from the area close to the first electrode to the first electrode. In addition, when the state becomes V in the charge transfer period 22 <V 21 When the charge flow from the region close to the first electrode to the first electrode and the charge flow from the region far from the first electrode to the region close to the first electrode can be guaranteed.

[0257] Another modification of the solid-state imaging device according to the first aspect of the present invention includes:

[0258] A solid-state imaging device including a plurality of imaging elements according to the first to ninth aspects of the present disclosure or imaging elements according to the first to sixth configurations, wherein

[0259] A plurality of imaging elements are included in the imaging element block, and

[0260] The first electrode is shared by a plurality of imaging elements included in the imaging element block. Note that, for convenience, the solid-state imaging device constructed in this manner is referred to as a "solid-state imaging device of the first configuration". Alternatively, another variation of the solid-state imaging device according to the second aspect of the present disclosure includes:

[0261] A solid-state imaging device comprising a plurality of stacked imaging elements, each stacked imaging element comprising at least one of the imaging elements according to the first to ninth aspects of the present disclosure or the imaging elements according to the first to sixth configurations, wherein

[0262] A plurality of stacked imaging elements are included in the imaging element block, and

[0263] The first electrode is shared by a plurality of stacked imaging elements included in the imaging element block. Note that, for convenience, the solid-state imaging device constructed in this manner will be referred to as a "solid-state imaging device of the second configuration." In addition, in this manner, the first electrode can be shared by a plurality of imaging elements included in the imaging element block to simplify and miniaturize the configuration and structure of the pixel region including a plurality of array imaging elements.

[0264] In each of the first and second structures of the solid-state imaging device, a floating diffusion layer is provided for a plurality of imaging elements (an imaging element block). The plurality of imaging elements provided for a floating diffusion layer here may include a plurality of imaging elements of the first type described later, or may include at least one imaging element of the first type and one or two or more imaging elements of the second type described later. In addition, the timing of the charge transfer period can be appropriately controlled to allow a plurality of imaging elements to share a floating diffusion layer. The plurality of imaging elements operate together and are connected to a drive circuit described later as an imaging element block. That is, the plurality of imaging elements included in the imaging element block are connected to a drive circuit. However, the charge storage electrode is controlled for each imaging element. In addition, a plurality of imaging elements may share a contact hole portion. With regard to the arrangement relationship between the first electrode shared by the plurality of imaging elements and the charge storage electrode of each imaging element, the first electrode may be arranged near the charge storage electrode of each imaging element. Alternatively, the first electrode may be arranged adjacent to the charge storage electrode of a portion of the plurality of imaging elements, and not arranged adjacent to the charge storage electrode of the rest of the plurality of imaging elements. In this case, the movement of the charge from the rest of the plurality of imaging elements to the first electrode is the movement of the portion through the plurality of imaging elements. Preferably, the distance between the charge storage electrodes included in the imaging element and the charge storage electrodes included in the imaging element (referred to as "distance A" for convenience) is longer than the distance between the first electrode and the charge storage electrode in the imaging element adjacent to the first electrode (referred to as "distance B" for convenience) to ensure that the charge is moved from each imaging element to the first electrode. In addition, preferably, the farther the imaging element is located from the first electrode, the larger the value of the distance A.

[0265] In addition, in each of the imaging elements of the present disclosure including the above-mentioned various preferred modes, light may be incident from the second electrode side, and a light shielding layer may be formed on the light incident side closer to the second electrode. Alternatively, light may be incident from the second electrode side, and the light may not be incident on the first electrode (as the case may be, the first electrode and the transmission control electrode). In addition, in this case, a light shielding layer may be formed on the light incident side closer to the second electrode and on the upper side of the first electrode (as the case may be, the first electrode and the transmission control electrode). Alternatively, an on-chip microlens may be provided on the upper side of the charge storage electrode and the second electrode, and the light incident on the on-chip microlens may be collected by the charge storage electrode. Here, the light shielding layer may be provided on the upper side of the surface on the light incident side of the second electrode, or may be provided on the surface on the light incident side of the second electrode. As the case may be, a light shielding layer may be formed on the second electrode. Examples of materials contained in the light shielding layer include chromium (Cr), copper (Cu), aluminum (Al), tungsten (W), and light-proof resins (e.g., polyimide resins).

[0266] Specific examples of the imaging element disclosed in the present invention include: an imaging element sensitive to blue light (referred to as a "first type of blue light imaging element" for convenience), which includes a photoelectric conversion layer that absorbs blue light (light of 425 to 495 nm) (referred to as a "first type of blue light photoelectric conversion layer" for convenience); an imaging element sensitive to green light (referred to as a "first type of green light imaging element" for convenience), which includes a photoelectric conversion layer that absorbs green light (light of 495 to 570 nm) (referred to as a "first type of green light photoelectric conversion layer" for convenience); and an imaging element sensitive to red light (referred to as a "first type of red light imaging element" for convenience), which includes a photoelectric conversion layer that absorbs red light (light of 620 to 750 nm) (referred to as a "first type of red light photoelectric conversion layer" for convenience). In addition, for convenience, an imaging element sensitive to blue light, which is a conventional imaging element that does not include a charge storage electrode, is referred to as a "second type of blue light imaging element". For convenience, a conventional imaging element sensitive to green light is referred to as a "second type of green light imaging element". For convenience, a conventional imaging element sensitive to red light is referred to as a "second type of red light imaging element". For convenience, the photoelectric conversion layer included in the second type of blue light imaging element is referred to as a "second type of blue light photoelectric conversion layer". For convenience, the photoelectric conversion layer included in the second type of green light imaging element is referred to as a "second type of green light photoelectric conversion layer". For convenience, the photoelectric conversion layer included in the second type of red light imaging element is referred to as a "second type of red light photoelectric conversion layer".

[0267] The stacked imaging element of the present disclosure includes at least one imaging element (photoelectric conversion element) of the present disclosure, and specific examples of the configuration and structure include:

[0268] [A] a configuration and structure in which a first-type blue photoelectric conversion unit, a first-type green photoelectric conversion unit, and a first-type red photoelectric conversion unit are stacked in a vertical direction, and

[0269] A control unit having a first type of blue light imaging element, a first type of green light imaging element, and a first type of red light imaging element is disposed on a semiconductor substrate;

[0270] [B] a configuration in which a first-type blue photoelectric conversion unit and a first-type green photoelectric conversion unit are stacked in a vertical direction,

[0271] The second type of red light photoelectric conversion unit is arranged on the lower side of the two layers of the first type of photoelectric conversion unit, and

[0272] A control unit having a first type of blue light imaging element, a first type of green light imaging element, and a second type of red light imaging element is disposed on a semiconductor substrate;

[0273] [C] a configuration and a configuration in which the second type of blue light photoelectric conversion unit and the second type of red light photoelectric conversion unit are arranged on the lower side of the first type of green light photoelectric conversion unit, and

[0274] A control unit having a first type of green light imaging element, a second type of blue light imaging element, and a second type of red light imaging element is disposed on a semiconductor substrate;

[0275] [D] a configuration and a configuration in which the second type of green light photoelectric conversion unit and the second type of red light photoelectric conversion unit are arranged on the lower side of the first type of blue light photoelectric conversion unit, and

[0276] A control unit of a first type of blue light imaging element, a second type of green light imaging element, and a second type of red light imaging element is provided on a semiconductor substrate. Note that it is preferred that the photoelectric conversion units of the imaging element are arranged in the vertical direction in the order of: from the light incident direction, a blue light photoelectric conversion unit, a green light photoelectric conversion unit, and a red light photoelectric conversion unit; or from the light incident direction, a green light photoelectric conversion unit, a blue light photoelectric conversion unit, and a red light photoelectric conversion unit. This is because light of a shorter wavelength is effectively absorbed on the incident surface side. Among the three colors, red has the longest wavelength, and it is preferred that the red light photoelectric conversion unit is located in the lowest layer from the light incident surface. The stacked structure of the imaging element provides one pixel. In addition, a first type of infrared photoelectric conversion unit may also be included. Here, it is preferred that the photoelectric conversion layer of the first type of infrared photoelectric conversion unit includes, for example, an organic material and is arranged in the lowest layer of the stacked structure of the first type of imaging element and is located above the second type of imaging element. Alternatively, the second type of infrared photoelectric conversion unit may also be included on the lower side of the first type of photoelectric conversion unit.

[0277] In the first type of imaging element, the first electrode is formed on, for example, an interlayer insulating layer provided on a semiconductor substrate. The imaging element formed on the semiconductor substrate may be a rear-illuminated type or a front-illuminated type.

[0278] In the case where the photoelectric conversion layer includes an organic material, the photoelectric conversion layer may be one of the following four modes.

[0279] (1) The photoelectric conversion layer includes a P-type organic semiconductor.

[0280] (2) The photoelectric conversion layer includes an n-type organic semiconductor.

[0281] (3) The photoelectric conversion layer comprises a stacked structure of a p-type organic semiconductor layer / an-type organic semiconductor layer. The photoelectric conversion layer comprises a stacked structure of a p-type organic semiconductor layer / a mixed layer of a p-type organic semiconductor and an n-type organic semiconductor (bulk heterostructure) / an-type organic semiconductor layer. The photoelectric conversion layer comprises a stacked structure of a p-type organic semiconductor layer / a mixed layer of a p-type organic semiconductor and an n-type organic semiconductor (bulk heterostructure). The photoelectric conversion layer comprises an n-type organic semiconductor layer / a mixed layer of a p-type organic semiconductor and an n-type organic semiconductor (bulk heterostructure).

[0282] (4) The photoelectric conversion layer includes a mixture of a p-type organic semiconductor and an n-type organic semiconductor (bulk heterostructure).

[0283] Here, the order of stacking can be changed arbitrarily.

[0284] Examples of p-type organic semiconductors include naphthalene derivatives, anthracene derivatives, phenanthrene derivatives, pyrene derivatives, perylene derivatives, tetracene derivatives, pentacene derivatives, quinacridone derivatives, thiophene derivatives, thienothiophene derivatives, benzothiophene derivatives, benzothienobenzothiophene derivatives, triallylamine derivatives, carbazole derivatives, perylene derivatives, chrysene derivatives, Derivatives, fluoranthene derivatives, phthalocyanine derivatives, subphthalocyanine derivatives, subporphyrin derivatives, metal complexes including heterocyclic compounds as ligands, polythiophene derivatives, polybenzothiadiazole derivatives, and polyfluorene derivatives. Examples of n-type organic semiconductors include fullerenes and fullerene derivatives <for example, fullerenes (higher fullerenes) such as C60, C70, and C74, or endohedral fullerenes, etc.) or fullerene derivatives (for example, fullerene fluorides, PCBM fullerene compounds, or fullerene polymers, etc.)>, organic semiconductors having larger (deeper) HOMO and LUMO than p-type organic semiconductors, and transparent inorganic metal oxides. Specific examples of n-type organic semiconductors include organic molecules containing a heterocyclic compound as part of a molecular framework, the heterocyclic compound containing a nitrogen atom, an oxygen atom and a sulfur atom, such as pyridine derivatives, pyrazine derivatives, pyrimidine derivatives, triazine derivatives, quinoline derivatives, quinoxaline derivatives, isoquinoline derivatives, acridine derivatives, phenazine derivatives, phenanthroline derivatives, tetrazole derivatives, pyrazole derivatives, imidazole derivatives, thiazole derivatives, oxazole derivatives, imidazole derivatives, benzimidazole derivatives, benzotriazole derivatives, benzoxazole derivatives, benzoxazole derivatives, carbazole derivatives, benzofuran derivatives, dibenzofuran derivatives, porphyrin derivatives, polyphenylene derivatives, polybenzothiazole derivatives and polyfluorene derivatives, organic metal complexes and subphthalocyanine derivatives. Examples of the group and the like contained in the fullerene derivative include: a halogen atom; a linear, branched or cyclic alkyl group or a phenyl group; a group including a linear or condensed aromatic compound; a group including a halide; a partial fluoroalkyl group; a perfluoroalkyl group; a silylalkyl group; a silylalkoxy group; an arylsilyl group; an arylsulfanyl group; an alkylsulfanyl group; an arylsulfonyl group; an alkylsulfonyl group; an arylsulfide group; an alkylsulfide group; an amino group; an alkylamino group; an arylamino group; a hydroxyl group; an alkoxy group; an acylamino group; an acyloxy group; a carbonyl group; a carboxyl group; a carboxamide group; an alkoxycarboxyl group; an acyl group; a sulfonyl group; a cyano group; a nitro group; a group including a sulfur compound; a phosphine group; a phosphonic acid group; and derivatives thereof. Although the thickness of the photoelectric conversion layer including an organic material (referred to as an "organic photoelectric conversion layer" in some cases) is not limited, the thickness may be, for example, 1×10 -8 m to 5×10 -7 m, preferably 2.5×10 -8 m to 3×10 -7 m, more preferably 2.5×10 -8 m to 2×10 -7 m, more preferably 1×10 -7 m to 1.8×10 -7m. Note that organic semiconductors are generally classified into p-type and n-type. The p-type indicates that holes are easily transported, and the n-type indicates that electrons are easily transported. Organic semiconductors are not limited to the following explanation: holes or electrons are included in inorganic semiconductors as thermally excited majority carriers.

[0285] Alternatively, examples of materials included in the organic photoelectric conversion layer for photoelectric conversion of green light include rhodamine dyes, merocyanine dyes, quinacridone derivatives, and subphthalocyanine dyes (subphthalocyanine derivatives). Examples of materials included in the organic photoelectric conversion layer for photoelectric conversion of blue light include coumaric acid dyes, tris (8-hydroxyquinoline) aluminum (Alq3) and merocyanine dyes. Examples of materials included in the organic photoelectric conversion layer for photoelectric conversion of red light include phthalocyanine dyes and subphthalocyanine dyes (subphthalocyanine derivatives).

[0286] Alternatively, examples of the inorganic material contained in the photoelectric conversion layer include crystalline silicon, amorphous silicon, microcrystalline silicon, crystalline selenium, amorphous selenium, chalcopyrite compounds such as CIGS (CuInGaSe), cis (CuInSe2), CuInS2, CuAlS2, CuAlSe2, CuGaS2, CuGaSe2, AgAlS2, AgAlSe2, AgInS2 and AgInSe2, III-V group compounds such as GaAs, InP, AlGaAs, InGaP, AlGaInP and InGaAsP, and CdSe, Cds, In2S e3 , In2S3, Bi2Se3, Bi2S3, ZnSe, ZnS, PbSe and PbS compound semiconductors, etc. In addition, quantum dots containing these materials can also be used for the photoelectric conversion layer.

[0287] Alternatively, the photoelectric conversion layer may have a stacked structure of a lower semiconductor layer and an upper photoelectric conversion layer as described above. The lower semiconductor layer can be arranged in such a manner as to prevent recombination, for example, during charge storage. In addition, the charge transfer efficiency of the charge stored in the photoelectric conversion layer to the first electrode can be improved. In addition, the charge generated in the photoelectric conversion layer can be temporarily retained to control the timing of the transfer, etc. In addition, the generation of dark current can also be suppressed. The material contained in the upper photoelectric conversion layer can be appropriately selected from the various materials contained in the photoelectric conversion layer. On the other hand, it is preferred that the material for the lower semiconductor layer is a material having a large band gap energy value (for example, a band gap energy value equal to or greater than 3.0 eV) and having a mobility higher than the mobility of the material contained in the photoelectric conversion layer. Specific examples of the material include: oxide semiconductor materials, such as IGZO; transition metal dihalides; silicon carbide; diamond; graphene; carbon nanotubes; and organic semiconductor materials, such as fused polycyclic hydrocarbon compounds and fused heterocyclic compounds. Alternatively, other examples of the material included in the lower semiconductor layer include: a material having an ionization potential greater than the ionization potential of the material included in the photoelectric conversion layer when the charges to be stored are electrons; and a material having an electron affinity less than the electron affinity of the material included in the photoelectric conversion layer when the charges to be stored are holes. Alternatively, it is preferred that the impurity concentration of the material included in the lower semiconductor layer is equal to or less than 1×10 18 cm -3 The lower semiconductor layer may have a single layer configuration or may have a multi-layer configuration. In addition, a material included in the lower semiconductor layer located on the upper side of the charge storage electrode and a material included in the lower semiconductor layer located on the upper side of the first electrode may be different.

[0288] The solid-state imaging devices according to the first and second aspects of the present disclosure and the solid-state imaging devices of the first and second configurations can provide a single-plate color solid-state imaging device.

[0289] In a solid-state imaging device according to the second aspect of the present disclosure or a solid-state imaging device of a second structure including a stacked imaging element, unlike in a solid-state imaging device including an imaging element of a Bayer array (i.e., a color filter is not used to separate blue, green, and red), imaging elements sensitive to multiple types of wavelengths of light are stacked in the same pixel in the direction of light incidence to provide one pixel. Therefore, the sensitivity can be improved, and the pixel density per unit volume can be increased. In addition, the absorption coefficient of the organic material is high, and the film thickness of the organic photoelectric conversion layer can be thinner than that of the conventional Si-based photoelectric conversion layer. This reduces light leakage from adjacent pixels and alleviates restrictions on the angle of light incidence. In addition, in conventional Si-based imaging elements, interpolation processing is performed on pixels of three colors to generate color signals, so false colors are generated. In a solid-state imaging device according to the second aspect of the present disclosure or a solid-state imaging device of a second structure including a stacked imaging element, false colors are suppressed. The organic photoelectric conversion layer also acts as a color filter, and colors can be separated without arranging a color filter.

[0290] On the other hand, in the solid-state imaging device according to the first aspect of the present disclosure or the solid-state imaging device of the first structure, the color filter can be used to reduce the requirements for the spectral characteristics of blue, green and red, and the mass production is high. Examples of arrays of imaging elements in the solid-state imaging device according to the first aspect of the present disclosure or the solid-state imaging device of the first structure include a Bayer array, and an interline array, a G-strip RB grid array, a G-strip RB full grid array, a grid complementary color array, a stripe array, a diagonal stripe array, a main color difference array, a field color difference sequence array, a frame color difference sequence array, a MOS array, an improved MOS array, a frame interleaved array, and a field interleaved array. Here, one imaging element provides one pixel (or sub-pixel).

[0291] A pixel region provided with a plurality of array imaging elements of the present disclosure or a plurality of array stacked imaging elements of the present disclosure includes a plurality of pixels systematically arranged in a two-dimensional array. The pixel region generally includes: an effective pixel region in which light is actually received, thereby generating a signal charge through photoelectric conversion, the signal charge being amplified and read out to a driving circuit; and a black reference pixel region for outputting an optical black color as a standard of a black level. The black reference pixel region is generally arranged at the periphery of the effective pixel region.

[0292] In the imaging element of the present disclosure including the above-mentioned various preferred modes and configurations, etc., light is applied and photoelectric conversion occurs in the photoelectric conversion layer. Carrier separation of electron holes (holes) and electrons is performed. In addition, the electrode from which holes are extracted is the anode, and the electrode from which electrons are extracted is the cathode. There is a mode in which the first electrode provides the anode and the second electrode provides the cathode. Conversely, there is also a mode in which the first electrode provides the cathode and the second electrode provides the anode.

[0293] In the case of providing a stacked imaging element, the first electrode, the charge storage electrode, the charge movement control electrode, the transfer control electrode, and the second electrode can contain a transparent conductive material. Note that in some cases, the first electrode, the charge storage electrode, the charge movement control electrode, and the transfer control electrode are collectively referred to as "first electrode, etc.". Alternatively, in the case where the imaging element, etc. of the present disclosure is arranged on a plane in, for example, a Bayer array, the second electrode may contain a transparent conductive material, and the first electrode, etc. may contain a metal material. In this case, specifically, the second electrode located on the light incident side may contain a transparent conductive material, and the first electrode, etc. may contain, for example, Al-Nd (an alloy of aluminum and neodymium) or ASC (an alloy of aluminum, samarium, and copper). Note that in some cases, an electrode containing a transparent conductive material is referred to as a "transparent electrode." Here, it is desired that the band gap energy of the transparent conductive material is equal to or greater than 2.5 eV, preferably equal to or greater than 3.1 eV. Examples of transparent conductive materials contained in the transparent electrode include conductive metal oxides. Specifically, examples of the transparent conductive material include indium oxide, indium tin oxide (including ITO, indium tin oxide, Sn-doped In2O3, crystalline ITO and amorphous ITO), indium zinc oxide (IZO, indium zinc oxide) obtained by adding indium as a dopant to zinc oxide, indium gallium oxide (IGO) obtained by adding indium as a dopant to gallium oxide, indium-gallium-zinc oxide (IGZO, In-GaZnO4) obtained by adding indium and gallium as dopants to zinc oxide, indium-tin-zinc oxide (IGZO, In-GaZnO4) obtained by adding indium and tin as dopants to zinc oxide. The transparent electrode may include a plurality of oxides, such as zinc oxide (ZnO), zinc oxide (AZO), zinc oxide (GZO), titanium oxide (TiO2), niobium titanium oxide (TNO), antimony oxide, spinel oxide, and oxide having a YbFe2O4 structure. Alternatively, the transparent electrode may include gallium oxide, titanium oxide, niobium oxide, nickel oxide, and the like as a mother layer. Examples of the thickness of the transparent electrode include 2×10-8 m to 2×10 -7 m, preferably 3×10 -8 m to 1×10 -7 m. In the case where the first electrode needs to be transparent, it is preferred that the other electrodes also include a transparent conductive material from the viewpoint of simplifying the manufacturing process.

[0294] Alternatively, where transparency is not required, it is preferred to use a substrate having a high work function (e.g. As the conductive material contained in the anode having the function of an electrode for extracting holes, a conductive material having a work function of 0.5 to 5.5 eV) is used. Specifically, examples of the conductive material include gold (Au), silver (Ag), chromium (Cr), nickel (Ni), palladium (Pd), platinum (Pt), iron (Fe), iridium (Ir), germanium (Ge), osmium (Os), rhenium (Re), and tellurium (Te). On the other hand, it is preferable to use a conductive material having a low work function (e.g. To 4.5eV) as a conductive material contained in the cathode having the function of an electrode for extracting electrons. Specifically, examples of the conductive material include alkali metals (such as Li, Na, K, etc.) and fluorides or oxides of alkali metals, alkaline earth metals (such as Mg, Ca, etc.) and fluorides or oxides of alkaline earth metals, aluminum (Al), zinc (Zn), tin (Sn), thallium (Tl), sodium-potassium alloys, aluminum-lithium alloys, magnesium-silver alloys, indium, rare earth metals (such as ytterbium) and alloys thereof. Alternatively, examples of materials included in the anode or cathode include metals such as platinum (Pt), gold (Au), palladium (PD), chromium (Cr), nickel (Ni), aluminum (Al), silver (Ag), tantalum (Ta), tungsten (W), copper (Cu), titanium (Ti), indium (In), tin (Sn), iron (Fe) cobalt (Co) and molybdenum (Mo), alloys containing these metal elements, conductive particles including these metals, conductive particles containing alloys of these metals, polycrystalline silicon containing impurities, carbon materials, oxide semiconductor materials, carbon nanotubes, and conductive materials such as graphene. The anode or cathode may also have a multilayer stacked structure containing these elements. In addition, examples of materials included in the anode or cathode also include organic materials (conductive polymers), such as poly (3,4-ethylenedioxythiophene-poly (styrene sulfonate)) [PEDOT / PSS]. In addition, these conductive materials can be mixed with a binder (polymer) to obtain a paste or ink, and the paste or ink can be cured and used as an electrode.

[0295] Dry method or wet method can be used as the deposition method of the first electrode etc. or the second electrode (cathode or anode).The example of dry method includes physical vapor deposition (PVD method) and chemical vapor deposition (CVD method).The example of deposition method using PVD method principle includes vacuum evaporation method, EB (electron beam) evaporation method, various sputtering methods (magnetron sputtering method, RF-DC coupling bias sputtering method, ECR sputtering method, target sputtering method and RF sputtering method), ion plating method, laser ablation method, molecular beam epitaxy method and laser transfer method.In addition, the example of CVD method includes plasma CVD method, thermal CVD method, organometallic (MO) CVD method and optical CVD method.On the other hand, the example of wet method includes various methods, such as electroplating method, chemical plating method, spin coating method, inkjet method, spray coating method, imprinting method, micro-contact printing method, flexographic printing method, offset printing method, gravure printing method and impregnation method. Examples of patterning methods include chemical etching such as shadow mask, laser transfer and photolithography, and physical etching using ultraviolet rays or laser, etc. Examples of planarization methods of the first electrode, etc. and the second electrode include laser planarization, reflow, and CMP (chemical mechanical polishing).

[0296] In addition to the insulating layer and the like in the imaging element according to the fifth aspect of the present disclosure, examples of the material contained in the insulating layer include not only inorganic insulating materials such as metal oxide high dielectric insulating materials, but also inorganic insulating materials such as silicon oxide materials, silicon nitride (SiN y ) and alumina (Al2O3), but also include organic insulating materials (organic polymers), such as: polymethyl methacrylate (PMMA); polyvinyl phenol (PVP); polyvinyl alcohol (PVA); polyimide; polycarbonate (PC); polyethylene terephthalate (PET); polystyrene; silanol derivatives (silane coupling agents), such as N-(2-aminoethyl)-3-aminopropyltrimethoxysilane (AEAPTMS), 3-mercaptopropyltrimethoxysilane (MPTMS) and octadecyltrichlorosilane (OTS), novolac phenolic resin; fluororesins and straight-chain hydrocarbons, such as octadecyl mercaptan and dodecyl isocyanate, including a functional group at one end that can be combined with a control electrode. Note that examples of silicon oxide materials include silicon oxide (SiOx), BPSG, PSG, BSG, AsSG, PbSG, silicon oxynitride (SiON), SOG (spin on glass), and low dielectric insulating materials (e.g., polyarylether, cyclofluorocarbon polymer, benzocyclobutene, cyclofluororesin, polytetrafluoroethylene, fluorinated arylether, fluorinated polyimide, amorphous carbon, and organic SOG). These materials can also be appropriately selected for materials included in various interlayer insulating layers and insulating films.

[0297] The configuration and structure of the floating diffusion layer, amplifying transistor, reset transistor and selection transistor included in the control unit may be similar to those of conventional floating diffusion layers, amplifying transistors, reset transistors and selection transistors. The driving circuit may also have a known configuration and structure.

[0298] The first electrode is connected to the floating diffusion layer and the gate portion of the amplifying transistor, and a contact hole portion may be formed for connecting the first electrode to the floating diffusion layer and the gate portion of the amplifying transistor. Examples of materials included in the contact hole portion include polysilicon doped with impurities, high melting point metals, and metal silicides such as tungsten, Ti, Pt, Pd, Cu, TiW, TiN, TiNW, WSi2, and MoSi2, and a stacked structure including these materials (e.g., Ti / TiN / W).

[0299] A first carrier blocking layer may be provided between the organic photoelectric conversion layer and the first electrode, and a second carrier blocking layer may be provided between the organic photoelectric conversion layer and the second electrode. In addition, a first charge injection layer may be provided between the first carrier blocking layer and the first electrode, and a second charge injection layer may be provided between the second carrier blocking layer and the second electrode. For example, examples of materials included in the electron injection layer include alkali metals such as lithium (Li), sodium (Na) and potassium (K), fluorides or oxides of alkali metals, alkaline earth metals such as magnesium (Mg) and calcium (Ca), and fluorides or oxides of alkaline earth metals.

[0300] The example of the deposition method of various organic layers includes dry deposition method and wet deposition method. The example of dry deposition method includes vacuum evaporation method, flash evaporation method, plasma deposition method, EB evaporation method, various sputtering methods (bipolar sputtering method, DC sputtering method, DC magnetron sputtering method, RF sputtering method, magnetron sputtering method, RF-DC coupling bias sputtering method, ECR sputtering method, target sputtering method, RF sputtering method and ion beam sputtering method), DC (direct current) method, RF method, multi-cathode method, activation reaction method, electric field evaporation method, various ion plating methods (such as RF ion plating method and reactive ion plating method), laser ablation method, molecular beam epitaxy method, laser transfer method and molecular beam epitaxy method (MBE method) using resistance heating, radio frequency heating or electron beam heating. In addition, the example of CVD method includes plasma CVD method, thermal CVD method, MOCVD method and optical CVD method. On the other hand, specific examples of wet methods include: spin coating; dipping; casting; microcontact printing; dripping; various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, flexographic printing, stamping, spraying; and various coating methods such as air knife coating, blade coating, rod coating, knife coating, extrusion coating, reverse roll coating, transfer roll coating, gravure coating, kiss coating, casting, spray coating, slit hole coating and calendar coater. Note that in the coating method, examples of solvents include non-polar or low-polar organic solvents such as toluene, chloroform, hexane and ethanol. Examples of patterning methods include chemical etching, such as shadow mask, laser transfer and photolithography, and physical etching using ultraviolet rays, lasers, etc. Laser planarization, reflow, etc. can be used as planarization techniques for various organic layers.

[0301] Two or more types of imaging elements according to the first to ninth aspects of the present disclosure and the like and the imaging elements of the first to sixth configurations including the above-described preferred modes and configurations may be appropriately combined as necessary.

[0302] As described above, an on-chip microlens and a light shielding layer can be provided on an imaging element or a solid-state imaging device as needed, and a drive circuit and wiring for driving the imaging element can be provided. A shutter for controlling light incident on the imaging element can be arranged as needed, and an optical cutoff filter can be provided according to the purpose of the solid-state imaging device.

[0303] In addition, the solid-state imaging devices of the first and second configurations may be in a mode in which one on-chip microlens is arranged on the upper side of one imaging element. Alternatively, two imaging elements may be included in an imaging element block, and one on-chip microlens may be arranged on the upper side of the imaging element block.

[0304] For example, in the case of stacking a solid-state imaging device and a readout integrated circuit (ROIC), a drive substrate having a readout integrated circuit and a connection portion including copper (Cu) and an imaging element provided with a connection portion may be stacked on top of each other so that the connection portions are in contact with each other. The connection portion may be combined to stack the solid-state imaging device and the readout integrated circuit, or the connection portion may be joined using a solder bump or the like.

[0305] Furthermore, the driving method for driving the solid-state imaging device according to the first and second aspects of the present disclosure may be a driving method for the solid-state imaging device that repeats the following steps:

[0306] In all imaging elements, the charge is stored in the photoelectric conversion layer, and the charge in the first electrode is discharged to the outside of the system at once; then,

[0307] The charges stored in the photoelectric conversion layer are all transferred to the first electrode at once in all the imaging elements, and after the transfer is completed, the charges transferred to the first electrode in each imaging element are sequentially read.

[0308] In a driving method of a solid-state imaging device, in each imaging element, light incident from the second electrode side is not incident on the first electrode. In all imaging elements, charges are stored in the photoelectric conversion layer in all imaging elements, and the charges in the first electrode are all released to the outside of the system at one time. Therefore, in all imaging elements, the first electrode must be able to be reset at the same time. In addition, subsequently, in all imaging elements, the charges stored in the photoelectric conversion layer are all transferred to the first electrode at one time. After the transfer is completed, the imaging element sequentially reads the charges transferred to the first electrode. Therefore, the so-called global shutter function can be easily realized.

[0309] Example 1

[0310] Embodiment 1 relates to an imaging element and the like according to the first aspect of the present disclosure, an imaging element and the like according to the third aspect of the present disclosure, a stacked imaging element of the present disclosure, and a solid-state imaging device according to the second aspect of the present disclosure.

[0311] Figure 1A A schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 1 is shown. Figure 1A or Figure 1B A schematic cross-sectional view similar to, for example, Fig.15A A schematic cross-sectional view taken along the dashed line AA of FIG. Figure 2 Schematic partial cross-sectional views of the imaging element and the stacked imaging element of Example 1 are shown. Figure 3 and Figure 4 An equivalent circuit diagram of the imaging element and the stacked imaging element of Example 1 is shown. Figure 5Schematic layout diagram of the first electrode, the charge storage electrode and the transistor of the control unit included in the imaging element of Example 1. In addition, Figure 6 and Figure 7 A schematic layout diagram of a first electrode and a charge storage electrode included in the imaging element of Embodiment 1 is shown. Figure 8 The state of the potential in each portion during the operation of the imaging element of Embodiment 1 is schematically illustrated. Fig.9A Shown is a diagram for describing Figure 8 Equivalent circuit diagram of the imaging element and the stacked imaging element of Example 1 showing various parts. Fig.10 A conceptual diagram of a solid-state imaging device of Embodiment 1 is shown. Note that, for convenience, various constituent elements of the imaging element located on the lower side of the interlayer insulating layer 81 may be collectively denoted by reference numeral 91 to simplify the drawing.

[0312] Each of the imaging element of Embodiment 1 (e.g., a green light imaging element described later) and the imaging elements of Embodiments 2 to 8 described later includes a photoelectric conversion unit including a stacked first electrode 11, a photoelectric conversion layer 13, and a second electrode 12. The photoelectric conversion unit also includes a charge storage electrode 14 arranged away from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through the insulating layer 82.

[0313] Note that Figure 6 In the example shown, one imaging element is provided with one charge storage electrode 14 corresponding to one first electrode 11. On the other hand, in Figure 7 In the illustrated example (Modification 1 of Embodiment 1), two imaging elements are provided with one common first electrode 11 corresponding to two charge storage electrodes 14 . Figure 1A The schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Example 1 shown corresponds to Figure 7 .

[0314] Except for the imaging element of Embodiment 3 described later, the second electrode 12 located on the light incident side is shared by a plurality of imaging elements, that is, the second electrode 12 is a so-called solid electrode. The photoelectric conversion layer 13 is shared by a plurality of imaging elements. That is, one photoelectric conversion layer 13 is formed in a plurality of imaging elements.

[0315] The stacked imaging element of Embodiment 1 includes at least one of the imaging element of Embodiment 1 and imaging elements of Embodiments 2 to 8 described later. In Embodiment 1, the stacked imaging element includes the imaging element of Embodiment 1 and one of imaging elements of Embodiments 2 to 8 described later.

[0316] Furthermore, the solid-state imaging device of Embodiment 1 includes a plurality of stacked imaging elements of Embodiment 1 and imaging elements of Embodiments 2 to 8 described later.

[0317] Furthermore, when light is incident on the photoelectric conversion layer 13 and photoelectric conversion occurs in the photoelectric conversion layer 13 in the imaging element of Embodiment 1, the portion 13 of the photoelectric conversion layer 13 facing the charge storage electrode 14 is applied. C The absolute value of the potential is greater than that applied to the region 13 between the imaging element and the adjacent imaging element of the photoelectric conversion layer 13. B The absolute value of the potential of (region B of the photoelectric conversion layer).

[0318] Alternatively, in the imaging element of Embodiment 1, the charge movement control electrode 21 is formed in the region 13 located between the imaging element and the adjacent imaging element, facing the photoelectric conversion layer 13 via the insulating layer 82. B In other words, the charge movement control electrode 21 is located in the portion 82 of the insulating layer 82. B The charge movement control electrode 21 is disposed to be separated from the charge storage electrode 14. In other words, the charge movement control electrode 21 is disposed around the charge storage electrode 14 and is separated from the charge storage electrode 14, and the charge movement control electrode 21 is disposed to face the region B (13) of the photoelectric conversion layer via the insulating layer 82. B ). Note that although Figure 2 The charge movement control electrode 21 is not shown in the figure. The charge movement control electrode 21 is formed in the direction of arrow "A". The charge movement control electrode 21 is arranged at Figure 5 The imaging elements in the left and right directions are shared and arranged in Figure 5 Shared by a pair of imaging elements in the upper and lower directions.

[0319] For the sake of convenience, the charge movement control electrode 21 and the connection hole 23, the pad portion 22 and the wiring V to be described later are not shown. 0B The imaging element of the present invention is referred to as an "imaging element having the basic structure of the present disclosure". Figure 2 is a schematic partial cross-sectional view of an imaging element having a basic structure of the present disclosure. Fig.42 , 43 , 44, 45, 46, 47, 54, 61, 62, 64, 65, 66, 71, 88, 89, 91, 92, 93, 94, 95, 96, 97 and 98 are as follows Figure 2 The illustrated diagrams are schematic partial cross-sectional views of various modified examples of the imaging element having the basic structure of the present disclosure, and the charge movement control electrode 21 and the like are not shown.

[0320] In addition, a semiconductor substrate (more specifically, a silicon semiconductor layer) is included, and a photoelectric conversion unit is provided on the upper side of the semiconductor substrate 70. In addition, a control unit is provided, which is provided on the semiconductor substrate 70 and includes a drive circuit connected to the first electrode 11 and the second electrode 12. Here, the light incident surface in the semiconductor substrate 70 is the upper side, and the opposite side of the semiconductor substrate 70 is the lower side. A wiring layer 62 including a plurality of wirings is provided on the lower side of the semiconductor substrate 70.

[0321] The semiconductor substrate 70 is provided with at least one floating diffusion layer FD1 and an amplifying transistor TR1 included in the control unit. amp , and the first electrode 11 is connected to the floating diffusion layer FD1 and the amplification transistor TR1 amp The semiconductor substrate 70 is also provided with a reset transistor TR1 included in the control unit. rst and select transistor TR1 set The floating diffusion layer FD1 is connected to the reset transistor TR1 rst A source / drain region of the amplifier transistor TR1 amp The other source / drain region of the select transistor TR1 is connected to set A source / drain region of the select transistor TR1 set The other source / drain region of the amplifying transistor TR1 is connected to the signal line VSL1. amp , reset transistor TR1 rst and select transistor TR1 set Included in the drive circuit.

[0322] Specifically, the imaging element and the stacked imaging element of Embodiment 1 are back-illuminated imaging elements and back-illuminated stacked imaging elements. The imaging element and the stacked imaging element have a stacked structure of three imaging elements, including: a first type of green light imaging element in Embodiment 1 that is sensitive to green light (hereinafter referred to as the "first imaging element"), the green light imaging element includes a first type of green light photoelectric conversion layer for absorbing green light; a conventional second type of blue light imaging element that is sensitive to blue light (hereinafter referred to as the "second imaging element"), the blue light imaging element includes a second type of blue light photoelectric conversion layer for absorbing blue light; and a conventional second type of red light imaging element that is sensitive to red light (hereinafter referred to as the "third imaging element"), the red light imaging element includes a second type of red light photoelectric conversion layer for absorbing red light. Here, the red light imaging element (third imaging element) and the blue light imaging element (second imaging element) are arranged in the semiconductor substrate 70, and the second imaging element is located on the light incident side relative to the third imaging element. In addition, the green light imaging element (first imaging element) is arranged on the upper side of the blue light imaging element (second imaging element). A stacked structure of the first imaging element, the second imaging element, and the third imaging element is included in one pixel. A color filter is not provided.

[0323] In the first imaging element, the first electrode 11 and the charge storage electrode 14 are formed separately from each other on the interlayer insulating layer 81. In addition, the charge movement control electrode 21 is formed separately from the charge storage electrode 14 on the interlayer insulating layer 81. The interlayer insulating layer 81, the charge storage electrode 14, and the charge movement control electrode 21 are covered by the insulating layer 82. The photoelectric conversion layer 13 is formed on the insulating layer 82, and the second electrode 12 is formed on the photoelectric conversion layer 13. A protective layer 83 is formed on the entire surface including the second electrode 12, and an on-chip microlens 90 is provided on the protective layer 83. For example, the first electrode 11, the charge storage electrode 14, the charge movement control electrode 21, and the second electrode 12 include a transparent electrode containing ITO (work function: about 4.4 eV). The photoelectric conversion layer 13 includes a layer containing a well-known organic photoelectric conversion material (for example, organic substances such as rhodamine dye, cyanine dye, and quinacridone) that is sensitive to at least green light. In addition, the photoelectric conversion layer 13 may also include a material layer suitable for charge storage. That is, a material layer suitable for charge storage may be further formed between the photoelectric conversion layer 13 and the first electrode 11 (for example, in the connection portion 67). The interlayer insulating layer 81, the insulating layer 82, and the protective layer 83 include a well-known insulating material (for example, SiO2 or SiN). The photoelectric conversion layer 13 and the first electrode 11 are connected by a connection portion 67 provided on the insulating layer 82. The photoelectric conversion layer 13 extends in the connection portion 67. That is, the photoelectric conversion layer 13 extends in the opening portion 84 provided in the insulating layer 82 and is connected to the first electrode 11.

[0324] The charge storage electrode 14 is connected to the driving circuit. Specifically, the charge storage electrode 14 is connected to the driving circuit through the connection hole 66, the pad portion 64 and the wire V disposed in the interlayer insulating layer 81. 0A Connected to the vertical driving circuit 112 included in the driving circuit.

[0325] The charge movement control electrode 21 is also connected to the drive circuit. Specifically, the charge movement control electrode 21 is connected to the drive circuit through the connection hole 23, the pad portion 22 and the wiring V provided in the interlayer insulating layer 81. 0B The charge movement control electrode 21 is connected to the vertical drive circuit 112 included in the drive circuit. More specifically, the charge movement control electrode 21 is formed in the region B (13 B ) area (insulating layer area B (82 B In other words, the charge movement control electrode 21 is in the portion 82 of the insulating layer 82. B The lower portion is formed in a region (region b) between the charge storage electrode 14 and the charge storage electrode 14 included in the adjacent imaging element. The charge movement control electrode 21 is provided separately from the charge storage electrode 14. Or, in other words, the charge movement control electrode 21 is provided around the charge storage electrode 14 and is separated from the charge storage electrode 14, and the charge movement control electrode 21 is arranged to face the region B (13 B) of the photoelectric conversion layer 13 via the insulating layer 82. B ).

[0326] The size of the charge storage electrode 14 is larger than the first electrode 11. Although not limited, it is preferred to satisfy

[0327] 4≤S1′ / S1

[0328] Here, S1′ is the area of ​​the charge storage electrode 14, and S1 is the area of ​​the first electrode 11. Although not limited, for example, in the imaging elements of Embodiment 1 and Embodiments 2 to 8 described later,

[0329] S1′ / S1=8

[0330] Note that in Embodiments 13 to 16 described later, the three photoelectric conversion unit sections ( 101 , 102 , and 103 ) are the same in size and also the same in planar shape.

[0331] The element separation region 71 is formed on the first surface (front surface) 70A side of the semiconductor substrate 70, and the oxide film 72 is formed on the first surface 70A of the semiconductor substrate 70. In addition, the reset transistor TR1 included in the control unit of the first imaging element rst , Amplifier transistor TR1 amp and select transistor TR1 selProvided on the first surface side of the semiconductor substrate 70 , a first floating diffusion layer FD1 is further provided.

[0332] Reset transistor TR1 rst The reset transistor TR1 includes a gate portion 51, a channel formation region 51A, and source / drain regions 51B and 51C. rst The gate portion 51 is connected to the reset line RST1, the reset transistor TR1 rst The source / drain region 51C also serves as the first floating diffusion layer FD1, and the other source / drain region 51B is connected to the power supply V DD .

[0333] The first electrode 11 is connected to the reset transistor TR1 through the connection hole 65 and the pad portion 63 provided in the interlayer insulating layer 81, through the contact hole portion 61 formed on the semiconductor substrate 70 and the interlayer insulating layer 76, and through the wiring layer 62 formed on the interlayer insulating layer 76. rst The source / drain region 51C (first floating diffusion layer FD1) is formed.

[0334] Amplifier transistor TR1 amp The gate portion 52 includes a gate portion 52, a channel formation region 52A, and source / drain regions 52B and 52C. The gate portion 52 is connected to the first electrode 11 and the reset transistor TR1 through a wiring layer 62. rst The source / drain region 51C (first floating diffusion layer FD1) is connected to the power supply V DD .

[0335] Select transistor TR1 sel The transistor includes a gate portion 53, a channel forming region 53A, and source / drain regions 53B and 53C. The gate portion 53 is connected to the selection line SEL1. In addition, one source / drain region 53B is connected to the amplifying transistor TR1. amp The other source / drain region 52C in the same region shares this region, and the other source / drain region 53C is connected to the signal line (data output line) VSL1 (117).

[0336] The second imaging element includes an n-type semiconductor region 41 as a photoelectric conversion layer provided on a semiconductor substrate 70. A transfer transistor TR2 including a vertical transistor trs The gate portion 45 extends to the n-type semiconductor region 41 and is connected to the transfer gate line TG2. In addition, the second floating diffusion layer FD2 is provided in the region 45C of the semiconductor substrate 70, which is close to the transfer transistor TR2. trs The charges stored in the n-type semiconductor region 41 are read out to the second floating diffusion layer FD2 through a transfer channel formed along the gate portion 45 .

[0337] On the first surface side of the semiconductor substrate 70, the second imaging element is further provided with a reset transistor TR2 included in a control unit of the second imaging element. rst , Amplifier transistor TR2 amp and select transistor TR2 sel .

[0338] Reset transistor TR2 rst It includes a gate portion, a channel formation region, and a source / drain region. Reset transistor TR2 rst The gate portion of the reset transistor TR2 is connected to the reset line RST2. rst One source / drain region is connected to the power supply V DD The other source / drain region also serves as a second floating diffusion layer FD2.

[0339] Amplifier transistor TR2 amp The gate portion is connected to the reset transistor TR2. rst Another source / drain region (second floating diffusion layer FD2) of the PDMS layer. In addition, one source / drain region is connected to the power supply V DD .

[0340] Select transistor TR2 sel The transistor includes a gate portion, a channel forming region, and a source / drain region. The gate portion is connected to a selection line SEL2. In addition, a source / drain region is connected to a transistor included in the amplifier transistor TR2. amp The region is shared with another source / drain region in the transistor, and the other source / drain region is connected to a signal line (data output line) VSL2.

[0341] The third imaging element includes an n-type semiconductor region 43 as a photoelectric conversion layer provided on a semiconductor substrate 70. The transfer transistor TR3 trs The gate portion 46 of the semiconductor substrate 70 is connected to the transfer gate line TG3. In addition, the third floating diffusion layer FD3 is provided in the region 46C of the semiconductor substrate 70, which is close to the transfer transistor TR3. trs The charges stored in the n-type semiconductor region 43 are read out to the third floating diffusion layer FD3 through a transfer channel 46A formed along the gate portion 46 .

[0342] In the third imaging element, a reset transistor TR3 included in the control unit of the third imaging element is further provided on the first surface side of the semiconductor substrate 70. rst , Amplifier transistor TR3 amp and select transistor TR3 sel .

[0343] Reset transistor TR3 rst It includes a gate portion, a channel formation region, and a source / drain region. Reset transistor TR3 rst The gate portion of the reset transistor TR3 is connected to the reset line RST3. rst One source / drain region is connected to the power supply V DD The other source / drain region also serves as a third floating diffusion layer FD3.

[0344] Amplifier transistor TR3 amp The gate portion is connected to the reset transistor TR3. rst Another source / drain region (third floating diffusion layer FD3) of the PDMS layer. In addition, one source / drain region is connected to the power supply V DD .

[0345] Select transistor TR3 sel The transistor includes a gate portion, a channel forming region, and a source / drain region. The gate portion is connected to a selection line SEL3. In addition, a source / drain region is connected to a transistor included in the amplifier transistor TR3. amp The region is shared with another source / drain region in the transistor, and the other source / drain region is connected to a signal line (data output line) VSL3.

[0346] Reset lines RST1, RST2 and RST3, selection lines SEL1, SEL2 and SEL3, and transfer gate lines TG2 and TG3 are connected to a vertical drive circuit 112 included in the drive circuit. Signal lines (data output lines) VSL1, VSL2 and VSL3 are connected to a column signal processing circuit 113 included in the drive circuit.

[0347] A p-type semiconductor region 43 is provided between the n-type semiconductor region 43 and the front surface 70A of the semiconductor substrate 70. + A p-type semiconductor layer 44 is formed between the n-type semiconductor region 41 and the n-type semiconductor region 43 to suppress the generation of dark current. + layer 42, and further, a portion of the side surface of the n-type semiconductor region 43 is p + The semiconductor substrate 70 is surrounded by the layer 42. A p + Layer 73, and from p + The layer 73 includes an HfO2 film 74 and an insulating film 75 formed to a portion of the semiconductor substrate 70 where the contact hole 61 is to be formed. In the interlayer insulating layer 76, wiring is formed in a plurality of layers, but the wiring is not shown.

[0348] The HfO2 film 74 is a film having a negative fixed charge, and the film can be provided to suppress the generation of dark current. Note that, instead of the HfO2 film, an aluminum oxide (Al2O3) film, a zirconium oxide (ZrO2) film, a tantalum oxide (Ta2O5) film, a titanium dioxide (TiO2) film, a lanthanum oxide (La2O3) film, a praseodymium oxide (Pr2O3) film, a cerium oxide (CeO2) film, a neodymium oxide (Nd2O3) film, a praseodymium oxide (Pm2O3) film, a samarium oxide (Sm2O3) film can also be used. , europium oxide (Eu2O3) film, gadolinium oxide (Gd2O3) film, terbium oxide (Tb2O3) film, dysprosium oxide (Dy2O3) film, holmium oxide (Ho2O3) film, thulium oxide (Tm2O3) film, ytterbium oxide (Yb2O3) film, lutetium oxide (Lu2O3) film, yttrium oxide (Y2O3) film, hafnium nitride film, aluminum nitride film, hafnium oxynitride film, or aluminum oxynitride film. Examples of deposition methods of these films include CVD method, PVD method and ALD method.

[0349] In the following, reference will be made to Figure 8 and 9A The operation of the imaging element (first imaging element) of Embodiment 1 is described. The imaging element of Embodiment 1 also includes a control unit disposed on a semiconductor substrate 70 and including a drive circuit, and the first electrode 11, the second electrode 12, the charge storage electrode 14, and the charge movement control electrode 21 are connected to the drive circuit. Here, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, the first electrode 11 is set to a positive potential, and the second electrode 12 is set to a negative potential. The electrons generated by the photoelectric conversion in the photoelectric conversion layer 13 are read out to the floating diffusion layer. The same applies to other embodiments. Note that in a mode in which the first electrode 11 is set to a negative potential, the second electrode is set to a positive potential, and the electron holes generated based on the photoelectric conversion in the photoelectric conversion layer 13 are read out to the floating diffusion layer, it is only necessary to reverse the high and low potentials described below.

[0350] exist Figure 8 , Example 11 described later Fig.51 and 52 And Example 12 Fig.58 and 59 The notation used in is as follows. Note that Fig.9A , 9B and 9C is used to describe Figure 8 (Example 1), Fig.51 (Example 11) and Fig.58 (Example 12) An equivalent circuit diagram of the imaging element and stacked imaging element of Example 1, Example 11 and Example 12 at each site.

[0351] P A·····A point P of a region of the photoelectric conversion layer 13 that is opposite to a region located between the charge storage electrode 14 and the first electrode 11 or located between the transfer control electrode (charge transfer electrode) 15 and the first electrode 11 A The potential at

[0352] P B ·····Point P of the region of the photoelectric conversion layer 13 facing the charge movement control electrode 21 B The potential at

[0353] P C ·····Point P of the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 C The potential at

[0354] P C1 ·····Point P of the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 14A C1 The potential at

[0355] P C2 ·····Point P of the region of the photoelectric conversion layer 13 facing the charge storage electrode section 14B C2 The potential at

[0356] P C3 ·····Point P of the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 14C C3 The potential at

[0357] P D ·····Point P of the region of the photoelectric conversion layer 13 facing the transfer control electrode (charge transfer electrode) 15 D The potential at

[0358] FD·····Potential of the first floating diffusion layer FD1

[0359] V 0A ·····The potential of the charge storage electrode 14

[0360] V 0A-A ·····The potential of the charge storage electrode segment 14A

[0361] V 0A-B ·····The potential of the charge storage electrode segment 14B

[0362] V 0A-C ·····The potential of the charge storage electrode segment 14C

[0363] V 0T ·····The potential of the transfer control electrode (charge transfer electrode) 15

[0364] RST·····Reset transistor TR1 rst The potential of the gate portion 51

[0365] V DD ·····Power supply potential

[0366] VSL1·····Signal line (data output line) VSL1

[0367] TR1 rst ·····Reset transistor TR1 rst

[0368] TR1 amp ·····Amplifier transistor TR1 amp

[0369] TR1 sel ·····Selection transistor TR1 sel

[0370] During the charge storage period, the driver circuit sets the potential V 11 Applied to the first electrode 11, the potential V 12 is applied to the charge storage electrode 14 and the potential V 13 The light incident on the photoelectric conversion layer 13 causes photoelectric conversion in the photoelectric conversion layer 13. The electron holes generated by the photoelectric conversion pass through the wiring V 0U The first electrode 11 is sent to the driving circuit from the second electrode 12. On the other hand, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, and a negative potential is applied to the second electrode 12. Therefore, the potential is set so that V 12 ≥V 11 , preferably, V 12 >V 11 , is maintained, and V 12 >V 13 Therefore, the electrons generated by the photoelectric conversion are attracted to the charge storage electrode 14, and the electrons stop in the region 13 of the photoelectric conversion layer 13 facing the charge storage electrode 14. C That is, the charge is stored in the photoelectric conversion layer 13. 12 Greater than V 11 Therefore, the electrons generated in the photoelectric conversion layer 13 do not move to the first electrode 11. In addition, V 12 Greater than V 13, therefore, the electrons generated in the photoelectric conversion layer 13 also do not move toward the charge movement control electrode 21. That is, this can prevent the charges generated by the photoelectric conversion from flowing into the adjacent imaging element. During the time of the photoelectric conversion, the potential in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 becomes a more negative value.

[0371] A reset operation is then performed during the charge storage period. This resets the potential of the first floating diffusion layer FD1, and the potential of the first floating diffusion layer FD1 becomes the potential V of the power supply. DD .

[0372] After the reset operation is completed, the charge is read out. That is, during the charge transfer period, the drive circuit sets the potential V 21 Applied to the first electrode 11, the potential V 22 is applied to the charge storage electrode 14 and the potential V 23 is applied to the charge movement control electrode 21. Here, the potential is set so that V 21 >V 22 >V 23 Therefore, the electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are read out to the first electrode 11 and further to the first floating diffusion layer FD1. That is, the charges stored in the photoelectric conversion layer 13 are read out to the control unit. In addition, V 22 Greater than V 23 , therefore, the electrons generated in the photoelectric conversion layer 13 do not move toward the charge movement control electrode 21. That is, this can prevent the charges generated by the photoelectric conversion from flowing into the adjacent imaging element.

[0373] This completes a series of operations including charge storage, reset operation, and charge transfer.

[0374] After the electrons are read out to the first floating diffusion layer FD1, the amplification transistor TR1 amp and select transistor TR1 sel The operation of the first floating diffusion layer FD1 is the same as that of a conventional transistor. In addition, a series of operations including charge storage, reset operation, and charge transfer of the second imaging element and the third imaging element are similar to a series of operations including charge storage, reset operation, and charge transfer of the conventional one. In addition, as in the conventional technology, the reset noise of the first floating diffusion layer FD1 can be removed in a correlated double sampling (CDS) process.

[0375] As described above, a charge storage electrode that is separated from the first electrode and arranged to face the photoelectric conversion layer via an insulating layer is provided in an imaging element of Embodiment 1 or Embodiments 2 to 8 described later. Therefore, in the photoelectric conversion in the photoelectric conversion unit after light is applied to the photoelectric conversion unit, the photoelectric conversion layer, the insulating layer, and the charge storage electrode constitute a capacitor. Charges can be stored in the photoelectric conversion layer. Therefore, the charge storage unit can be completely depleted to remove the charge at the beginning of exposure. This can suppress the phenomenon of decreased imaging quality caused by the degradation of random noise due to the increase in KTC noise. In addition, all pixels can be reset at once to realize the so-called global shutter function.

[0376] In addition, when light enters the photoelectric conversion layer in the imaging element of Example 1 and photoelectric conversion occurs in the photoelectric conversion layer, the absolute value of the potential applied to the portion of the photoelectric conversion layer facing the charge storage electrode is greater than the absolute value of the potential applied to region B of the photoelectric conversion layer. Therefore, the charge generated by the photoelectric conversion is strongly attracted to the portion of the photoelectric conversion layer facing the charge storage electrode. This can prevent the charge generated by the photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not reduced. Alternatively, the charge movement control electrode is formed in an area facing region B of the photoelectric conversion layer via an insulating layer, and the electric field and potential of region B of the photoelectric conversion layer located on the upper side of the charge movement control electrode can be controlled. Therefore, the charge movement control electrode can prevent the charge generated by the photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not reduced.

[0377] Fig.10 A conceptual diagram of a solid-state imaging device of Embodiment 1 is shown. Embodiment 1 of the solid-state imaging device 100 includes an imaging region 111 including stacked imaging elements 101 arranged in a two-dimensional array, a vertical drive circuit 112 as a drive circuit (peripheral circuit) of the stacked imaging elements 101, a column signal processing circuit 113, a horizontal drive circuit 114, an output circuit 115, a drive control circuit 116, and the like. Note that the circuit may include a well-known circuit or other circuit configuration (for example, various circuits used in a conventional CCD solid-state imaging device or a CMOS solid-state imaging device). Note that in Fig.10 , reference numeral “ 101 ” is shown only in one row of stacked imaging elements 101 .

[0378] The drive control circuit 116 generates a clock signal and a control signal as a reference for the operation of the vertical drive circuit 112, the column signal processing circuit 113, and the horizontal drive circuit 114 based on the vertical synchronization signal, the horizontal synchronization signal, and the main clock. In addition, the generated clock signal and control signal are input to the vertical drive circuit 112, the column signal processing circuit 113, and the horizontal drive circuit 114.

[0379] The vertical drive circuit 112 includes, for example, a shift register, and sequentially selects and scans the stacked imaging elements 101 of the imaging area 111 row by row in the vertical direction. In addition, a pixel signal (image signal) based on a current (signal) generated according to the amount of light received in each stacked imaging element 101 is sent to the column signal processing circuit 113 through a signal line (data output line) 117, VSL.

[0380] For example, the column signal processing circuit 113 is arranged for each column of the stacked imaging element 101, and is configured to use a signal from a black reference pixel (although not shown, formed around the effective pixel area) to perform signal processing such as noise removal and signal amplification for each imaging element on an image signal output from one row of the stacked imaging elements 101. A horizontal selection switch (not shown) is connected and provided between the output stage of the column signal processing circuit 113 and the horizontal signal line 118.

[0381] The horizontal drive circuit 114 includes, for example, a shift register, and sequentially outputs horizontal scanning pulses to sequentially select the column signal processing circuits 113. The horizontal drive circuit 114 outputs a signal from each column signal processing circuit 113 to a horizontal signal line 118.

[0382] The output circuit 115 applies signal processing to the signals sequentially supplied from the column signal processing circuit 113 through the horizontal signal line 118 and outputs the signals.

[0383] Fig.11 Equivalent circuit diagrams of the imaging element of Embodiment 1 and a modification example of the stacked imaging element (Modification example 2 of Embodiment 1) are shown. Fig.12 A schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in a modification of the imaging element of Embodiment 1 (Modification 2 of Embodiment 1) is shown. Thus, the reset transistor TR1 rst The other source / drain region 51B may be grounded instead of connecting the other source / drain region 51B to the power supply V DD .

[0384] For example, the imaging element and the stacked imaging element of Example 1 can be produced by the following method. That is, first, an SOI substrate is prepared. Then, a first silicon layer is formed on the surface of the SOI substrate based on an epitaxial growth method, and a p-type silicon layer is formed on the first silicon layer. + Next, a second silicon layer is formed on the first silicon layer based on an epitaxial growth method, and an element isolation region 71, an oxide film 72, a p-type semiconductor region 41 are formed on the second silicon layer. + layer 42, n-type semiconductor region 43 and p +Layer 44. In addition, various transistors included in the control unit of the imaging element are formed on the second silicon layer, and a wiring layer 62, an interlayer insulating layer 76 and various wirings are further formed on top thereof. The interlayer insulating layer 76 and a supporting substrate (not shown) are then pasted together. Subsequently, the SOI substrate is removed to expose the first silicon layer. Note that the surface of the second silicon layer corresponds to the front surface 70A of the semiconductor substrate 70, and the surface of the first silicon layer corresponds to the rear surface 70B of the semiconductor substrate 70. In addition, the first silicon layer and the second silicon layer are collectively represented as a semiconductor substrate 70. Next, an opening portion for forming the contact hole portion 61 is formed on the rear surface 70B side of the semiconductor substrate 70, and a HfO2 film 74, an insulating film 75 and a contact hole portion 61 are formed. In addition, pad portions 63, 64 and 22, an interlayer insulating layer 81, connection holes 65, 66 and 23, a first electrode 11, a charge storage electrode 14, a charge movement control electrode 21 and an insulating layer 82 are formed. Next, the connection portion 67 is opened, and the photoelectric conversion layer 13, the second electrode 12, the protective layer 83, and the on-chip microlens 90 are formed. In this way, the imaging element and the stacked imaging element of Example 1 can be obtained.

[0385] Fig.13 (Variation 3 of Embodiment 1), Fig.14A (Variation 4 of Embodiment 1), Fig. 14B , Fig.15A (Variation 5 of Example 1) and Fig. 15B Schematic layout diagrams of other modified examples of the first electrode and the charge storage electrode included in the imaging element of Embodiment 1 are shown. In the example shown in these drawings, one common first electrode 11 is provided to correspond to four charge storage electrodes 14 in four imaging elements. Fig.13 In the example shown, the charge movement control electrode 21 is formed in a portion 82 of the insulating layer 82 located in a region (region b) between the charge storage electrode 14 and the charge storage electrode 14. B On the other hand, Fig.14A In the example shown, the charge movement control electrode 21 is formed below a portion of the insulating layer 82 in a region surrounded by the four charge storage electrodes 14 . Fig.15A The example shown in Fig.13 and Fig.14A A combination of the examples shown in Fig. 15B The example shown in Fig. 14B and Fig.15A Note that Fig.13 , 14A The examples shown in 14A, 14B, 15A, and 15B also represent the solid-state imaging devices of the first configuration and the second configuration.

[0386] exist Fig. 14BIn the example shown, a common first electrode 11 is provided to correspond to four charge storage electrodes 14 in four imaging elements, and a charge movement control electrode 21 is formed below a portion of the insulating layer 82 in a region surrounded by the four charge storage electrodes 14. In addition, a discharge electrode 25 is formed below a portion of the insulating layer 82 in a region surrounded by the four charge storage electrodes 14. The discharge electrode 25 may be used as, for example, a floating diffusion region or an overflow port of the photoelectric conversion layer 13. The discharge electrode 25 and the photoelectric conversion layer 13 are connected through an opening portion provided on the insulating layer 82. That is, similar to the relationship between the photoelectric conversion layer 13 and the first electrode 11, the photoelectric conversion layer 13 extends in the opening portion provided on the insulating layer 82, and the extended portion of the photoelectric conversion layer 13 is in contact with the discharge electrode 25. The discharge electrode 25 is connected to the vertical drive circuit 112 included in the drive circuit through a connection hole 25A, a pad portion 25B, and a wiring (not shown) provided in the interlayer insulating layer 81. The discharge electrode 25 may also be applied to other embodiments. Note that, for reference, Fig. 16B It shows that when Fig.15A When the discharge electrode 25 in the modification 5 of the embodiment 1 replaces the charge movement control electrode 21, the discharge electrode 25 is arranged along the Fig.15A A schematic cross-sectional view taken along the dashed line AA.

[0387] Or, in Fig. 15B In the example shown, one common first electrode 11 is provided to correspond to four charge storage electrodes 14 in four imaging elements, and the charge movement control electrode 21 is formed below a portion of the insulating layer in a region between the charge storage electrodes 14. In addition, the discharge electrode 25 is formed below a portion of the insulating layer 82 in a region surrounded by the four charge storage electrodes 14. The discharge electrode 25 and the photoelectric conversion layer 13 are connected through an opening portion provided on the insulating layer 82. That is, similar to the relationship between the photoelectric conversion layer 13 and the first electrode 11, the photoelectric conversion layer 13 extends in the opening portion provided on the insulating layer 82, and the extended portion of the photoelectric conversion layer 13 is in contact with the discharge electrode 25. Fig.16A Shows Fig. 15B In the modification 5 of the embodiment 1 shown in FIG. Fig. 15B A schematic cross-sectional view taken along the dashed line BB.

[0388] or, Figure 1B A schematic cross-sectional view showing a portion of a modification example (modification example 6 of embodiment 1) of the imaging element of embodiment 1 (two imaging elements arranged side by side), and the photoelectric conversion layer may have a lower semiconductor layer 13 DN and the photoelectric conversion layer 13 UP The upper photoelectric conversion layer 13 UP and the lower semiconductor layer 13 DNThat is, one upper photoelectric conversion layer 13 is formed in a plurality of imaging elements. UP and a lower semiconductor layer 13 DN The lower semiconductor layer 13 can be provided in this way. DN , thereby preventing recombination during charge storage, for example. This can also improve the charge transfer efficiency of the charges stored in the photoelectric conversion layer 13 to the first electrode 11. In addition, the charges generated in the photoelectric conversion layer 13 can be temporarily held to control the timing of the transfer, etc. In addition, the generation of dark current can also be suppressed. The upper photoelectric conversion layer 13 UP The material contained in the photoelectric conversion layer 13 can be appropriately selected from various materials contained in the photoelectric conversion layer 13. On the other hand, it is preferred that the lower semiconductor layer 13 DN The material contained in the lower semiconductor layer 13 is a material having a large band gap energy value (for example, a band gap energy value equal to or greater than 3.0 eV) and having higher fluidity than the material contained in the photoelectric conversion layer. Specifically, one example of the material includes an oxide semiconductor material such as IGZO. Alternatively, the lower semiconductor layer 13 DN Another example of the material contained in the lower semiconductor layer includes a material having an ionization potential greater than the ionization potential of the material contained in the photoelectric conversion layer when the charge to be stored is electrons. Alternatively, it is preferred that the impurity concentration of the material contained in the lower semiconductor layer is preferably equal to or less than 1×10 18 cm -3 Note that the configuration and construction of Modification 6 of Embodiment 1 can be applied to other embodiments.

[0389] Example 2

[0390] Embodiment 2 relates to an imaging element and the like according to a second aspect of the present invention. Fig.17A FIG. 2 is a schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 2. In the imaging element of Embodiment 2, a region 13 of the photoelectric conversion layer 13 located between the first electrode 11 and the charge storage electrode 14 A Width W of (region A of the photoelectric conversion layer) A The region 13 between the imaging element and the adjacent imaging element of the photoelectric conversion layer 13 is B Width W of (region B of the photoelectric conversion layer) B Narrow. A / W B An example of a ) value includes

[0391] 1 / 2≤(W A / W B )<1

[0392] Specifically, in Example 2, the value is

[0393] (W A / W B )=2 / 3

[0394] Except for this, the configuration and construction in the imaging element of Embodiment 2 may be similar to the imaging element having the basic structure of the present disclosure, and the details will not be described.

[0395] Thus, in the imaging element of Example 2, the width of the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is greater than the width W of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. B This can prevent the charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) will not be reduced.

[0396] Example 3

[0397] Embodiment 3 relates to an imaging element and the like according to a fourth aspect of the present invention. Fig. 17B A schematic cross-sectional view showing a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 3, Fig.19 and Fig. 20 A schematic plan view of a portion of an imaging element (2×2 imaging elements arranged side by side) of Example 3 is shown. In the imaging element of Example 3, instead of the second electrode 12, a region 13 of the photoelectric conversion layer 13 located between the imaging element and the adjacent imaging element is B A charge movement control electrode 24 is formed on the photoelectric conversion layer 13. The charge movement control electrode 24 is provided separately from the second electrode 12. In other words, the second electrode 12 is provided for each imaging element, and the charge movement control electrode 24 is provided around at least a portion of the second electrode 12 separately from the second electrode 12 on the region B of the photoelectric conversion layer 13. The charge movement control electrode 24 is formed at the same level as the second electrode 12.

[0398] In addition, if Fig.18A 18B, which shows a schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 3, the second electrode 12 can be divided into a plurality of second electrodes 12, and different potentials can be applied individually to the divided second electrodes 12. In addition, as shown in FIG. 18B, the charge movement control electrode 24 can be provided between the divided second electrode 12 and the second electrode 12.

[0399] Note that Fig.19 In the example shown, one charge storage electrode 14 is provided to correspond to one first electrode 11 in one imaging element. Fig. 20 In the example shown in (Variation 1 of Embodiment 3), one common first electrode 11 is provided to correspond to two charge storage electrodes 14 in two imaging elements. Fig. 17B The schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Example 3 shown corresponds to Fig. 20 .

[0400] In Example 3, the second electrode 12 located on the light incident side is arranged Fig.19 The imaging elements in the left and right directions are shared and arranged in Fig.19 In addition, the charge movement control electrode 24 is also arranged in the upper and lower directions of the imaging element. Fig.19 The imaging elements in the left and right directions are shared and arranged in Fig.19 The second electrode 12 and the charge movement control electrode 24 are shared by a pair of imaging elements in the upper and lower directions. The second electrode 12 and the charge movement control electrode 24 can be obtained by depositing a material layer of the second electrode 12 and the charge movement control electrode 24 on the photoelectric conversion layer 13 and then patterning the material layer. The second electrode 12 and the charge movement control electrode 24 are respectively connected to wiring (not shown), and the wiring is connected to the driving circuit. The wiring connected to the second electrode 12 is shared by multiple imaging elements. The wiring connected to the charge movement control electrode 24 is also shared by multiple imaging elements.

[0401] In the imaging element of Embodiment 3, the driving circuit applies a potential V2′ to the second electrode 12 and applies a potential V 13 ', and the charge is stored in the photoelectric conversion layer 13 during the charge storage period. During the charge transfer period, the drive circuit applies a potential V2" to the second electrode 12 and applies a potential V 23 ", and the charge stored in the photoelectric conversion layer 13 is read out to the control unit through the first electrode 11. Here, the potential of the first electrode 11 is higher than the potential of the second electrode 12, and therefore,

[0402] V2'≥V 13 ' and V2" ≥ V 23 " was maintained.

[0403] Meanwhile, in the configuration in which the charge movement control electrode 21 is provided adjacent to the first electrode 11 as shown in FIG. 1 , the following problem may occur. That is, during charge storage, the drive circuit sets the potential V 11 Applied to the first electrode 11, the potential V 12 Applied to the charge storage electrode 14, the potential V 13 is applied to the charge movement control electrode 21, and a potential V2 is applied to the second electrode 12. For example, here, V 12 >V 11 >V2 and V 12 >V 13 >V2 is maintained. Fig.21A and Fig. 21B "A" in represents the potential in the photoelectric conversion layer 13 located on the upper side of the first electrode 11. On the other hand, at the potential V 13 When the potential is applied to the charge movement control electrode 21 and the potential is not applied to the charge storage electrode 14, the potential in the photoelectric conversion layer 13 located on the upper side of the charge movement control electrode 21 will be as follows Fig.21A However, the potential V 12 is applied to the charge storage electrode 14, and due to the influence of the charge storage electrode 14, the potential is as Fig.21A That is, within the insulating layer 82, the potential decreases toward the charge movement control electrode 21. Therefore, during charge storage, electron holes are stored in the region of the insulating layer 82 located on the upper side of the charge storage electrode 14, and the charges generated by the photoelectric conversion can be weakly attracted to the portion of the photoelectric conversion layer facing the charge storage electrode.

[0404] On the other hand, in Embodiment 3, the charge movement control electrode 24 is formed at the same level as the second electrode 12, and the potential V 13 ' is applied to the charge movement control electrode 24. Therefore, the potential in the photoelectric conversion layer 13 located on the lower side of the charge movement control electrode 24 is as follows Fig. 21B . In addition, there is no charge movement control electrode 21 on the lower side of the photoelectric conversion layer 13 located on the lower side of the charge movement control electrode 24, and the potential is further simply increased within the insulating layer 82. Therefore, during charge storage, electron holes are not stored in the region of the insulating layer 82 located on the lower side of the charge movement control electrode 24, and this can prevent the phenomenon in which the charges generated by the photoelectric conversion are weakly attracted to the portion of the photoelectric conversion layer facing the charge storage electrode. This can more surely prevent the quality of the captured video (image) from being degraded.

[0405] In this way, in the imaging element of Example 3, instead of the second electrode, a charge movement control electrode is formed on the region of the photoelectric conversion layer between the imaging element and the adjacent imaging element. Therefore, the charge movement control electrode can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not reduced.

[0406] Fig.22A and 22B A schematic plan view showing a portion of a modification of the imaging element of Embodiment 3 (Modification 2 of Embodiment 3). Note that Fig.22A , 23A, 25A, 26A, 27A, and 28A show examples in which one common first electrode 11 is provided to correspond to four charge storage electrodes 14 in four imaging elements. Fig. 22B As shown, the second electrode 12 is provided on the upper side of the charge storage electrode 14 with substantially the same size as the charge storage electrode 14. The second electrode 12 is surrounded by the charge movement control electrode 24. The charge movement control electrode 24 is shared by the imaging element. An insulating film (not shown) is formed on the photoelectric conversion layer 13 including the second electrode 12 and the charge movement control electrode 24, and a contact hole (not shown) connected to the second electrode 12 is formed on the insulating film on the upper side of the second electrode 12. A wiring V connected to the contact hole is provided on the insulating film. 0U (not shown). Note that the second electrode 12, the insulating film, the contact hole and the wiring V 0U The construction and structure are similar in the following modifications. In addition, Fig.22A , 22B The examples shown in 23A, 23B, 23C, 25A, 25B, 26A, 26B, 27A, 27B, 28A, and 28B also represent solid-state imaging devices of the first and second configurations.

[0407] Fig.23A , 23B 23C and 23C show a schematic plan view of a portion of Modification 3 of Embodiment 3. Fig. 23B and 23C As shown in FIG. 1 , the second electrode 12 is provided on the upper side of the charge storage electrode 14 with substantially the same size as the charge storage electrode 14. The second electrode 12 is surrounded by the charge movement control electrode 24. The charge movement control electrode 24 is shared by four imaging elements. The shared portion is formed on the photoelectric conversion layer 13. Note that Fig.23C In the example shown, the second electrode 12 extends to the second electrode of an adjacent imaging element.

[0408] Fig.24A A schematic cross-sectional view showing a portion of a modification example (modification example 4A of embodiment 3) of the imaging element of embodiment 3 (two imaging elements arranged side by side), Fig.25A and 25B 1 is a schematic plan view of the portion. In Modification 4A of Embodiment 3, the second electrode 12 is provided for each imaging element, and the charge movement control electrode 24 is provided around at least a portion of the second electrode 12 and is separated from the second electrode 12. A portion of the charge storage electrode 14 exists on the lower side of the charge movement control electrode 24. The second electrode 12 is provided on the upper side of the charge storage electrode 14 with a size smaller than that of the charge storage electrode 14.

[0409] Fig. 24BA schematic cross-sectional view showing a portion of a modification example (modification example 4B of embodiment 3) of the imaging element of embodiment 3 (two imaging elements arranged side by side), Fig.26A and 26B This partial schematic plan view is shown. In variant 4B, a second electrode 12 is provided for each imaging element, and a charge movement control electrode 24 surrounds at least a portion of the second electrode 12 and is separated from the second electrode 12. A portion of the charge storage electrode 14 is present on the lower side of the charge movement control electrode 24, and further, a charge movement control electrode (lower charge movement control electrode) 21 is provided on the lower side of the charge movement control electrode (upper charge movement control electrode 24). The size of the second electrode 12 is smaller than that in variant 4A. That is, the area of ​​the second electrode 12 facing the charge movement control electrode 24 is closer to the first electrode 11 than the area of ​​the second electrode 12 facing the charge movement control electrode 24 in variant 4A. The charge storage electrode 14 is surrounded by the charge movement control electrode 21.

[0410] Fig.27A and Fig.27B A schematic plan view of a portion of a variation of the imaging element of Embodiment 3 (Variation 4C of Embodiment 3) is shown. In Variation 4C, as in Variation 4B of Embodiment 3, a portion of the charge storage electrode 14 exists on the lower side of the charge movement control electrode 24. The size of the second electrode 12 is smaller than that in Variation 4A. That is, the region of the second electrode 12 facing the charge movement control electrode 24 is closer to the first electrode 11 than the region of the second electrode 12 facing the charge movement control electrode 24 in Variation 4A. In addition, the charge movement control electrode 24 includes an outer charge movement control electrode 241 and an inner charge movement control electrode 242 disposed between the outer charge movement control electrode 241 and the second electrode 12. The charge storage electrode 14 is surrounded by the charge movement control electrode 21. During charge transfer, the relationship (potential applied to the outer charge movement control electrode 241) < (potential applied to the inner charge movement control electrode 242) < (potential applied to the second electrode 12) can be satisfied to more efficiently transfer charge.

[0411] Fig.28A and Fig.28BA schematic plan view of a portion of a variation of the imaging element of Example 3 (Variation 4D of Example 3) is shown. In Example 4D, as in Variation 4B of Example 3, the charge movement control electrode (lower charge movement control electrode) 21 is disposed on the lower side of the charge movement control electrode (upper charge movement control electrode) 24. The size of the second electrode 12 is smaller than that in Variation 4B. That is, the area of ​​the second electrode 12 facing the charge movement control electrode 24 is closer to the first electrode 11 than the area of ​​the second electrode 12 facing the charge movement control electrode 24 in Variation 4B. In addition, the interval between the charge movement control electrode 24 and the second electrode 12 is wider than that in Variation 4B. The charge storage electrode 14 is surrounded by the charge movement control electrode 21. The potential generated by the coupling of the charge movement control electrode 24 and the second electrode 12 is applied to the following area of ​​the photoelectric conversion layer 13: the area is located below the area between the charge movement control electrode 24 and the second electrode 12.

[0412] Fig.29A , 29B 29 and 29C schematically illustrate potential states in each portion (during charge transfer) of Modification 4B of Embodiment 3, Modification 4C of Embodiment 3, and Modification 4D of Embodiment 3, respectively.

[0413] Example 4

[0414] Embodiment 4 relates to an imaging element and the like according to a fifth aspect of the present disclosure. Fig.30 FIG. 2 is a schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 4. In the imaging element of Embodiment 4, a region (region a) 82 located between the first electrode 11 and the charge storage electrode 14 A (Specifically, the region 82 of the insulating layer 82 located between the first electrode 11 and the charge storage electrode 14 A ) contained in the insulating material (insulating material A) 82 A The value of the dielectric constant ε A Higher than the area (area b) 82 located between the imaging element and the adjacent imaging element B (Specifically, the region 82 of the insulating layer 82 positioned between the imaging element and the adjacent imaging element B ) contained in the insulating material (insulating material B) 82 B The value of the dielectric constant ε B . Insulation material A(82 A ′) and insulating material B(82 B′) is formed in the level of the insulating layer 82 covering the charge storage electrode 14. That is, when the insulating layer 82 is represented by two layers including a lower insulating layer filling the gap between the charge storage electrode 14 and the charge storage electrode 14 and an upper insulating layer covering the charge storage electrode 14 and formed on the lower insulating layer, the insulating material A (82 A ′) and insulating material B(82 B ′) fills a portion of the upper insulating layer (specifically, a region 82 of the upper insulating layer 82 located between the first electrode 11 and the charge storage electrode 14) A A portion of the upper insulating layer and a region (region b) 82 between the imaging element and the adjacent imaging element B part of it).

[0415] The imaging element and the stacked imaging element of Example 4 can also be made by forming a layer containing the insulating material A (82) when forming the insulating layer 82 in the manufacturing process of the imaging element and the stacked imaging element of Example 1. A ′) and insulating material B(82 B ') of the insulating layer 82 of the region 82 A and 82 B To obtain.

[0416] In the imaging element of Embodiment 4, the value of the dielectric constant of the insulating material contained in the region between the first electrode and the charge storage electrode is higher than the value of the dielectric constant of the insulating material contained in the region between the imaging element and the adjacent imaging element. Therefore, the capacity of capacitor A is greater than the capacity of capacitor B, and the charge is attracted more toward the region between the first electrode and the charge storage electrode than toward the region between the imaging element and the adjacent imaging element. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not reduced.

[0417] Fig.31 A schematic cross-sectional view showing a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 4, and Fig.32 and 33 A schematic cross-sectional view of a portion of another variation is shown. Note that Fig.30 , 31 , 32 and 33 shown in the insulating material A (82 A ′) and insulating material B(82 B The formation positions of ′) can be appropriately combined.

[0418] exist Fig.31 In the example shown, the insulating material A (82 A ′) From the region 82 of the insulating layer 82 located between the first electrode 11 and the charge storage electrode 14 AThe insulating material B (82 B ') The region (region b) 82 between the imaging element and the adjacent imaging element filled with the upper insulating layer B part of.

[0419] exist Fig.32 In the example shown, the insulating material A (82 A ′) The region 82 of the filling insulating layer 82 located between the first electrode 11 and the charge storage electrode 14 A The lower insulating layer is a part of the insulating material B (82 B ') Filling the area between the imaging element and the adjacent imaging element (area b) 82 B A portion of the lower insulating layer in.

[0420] exist Fig.33 In the example shown, the insulating material A (82 A ') Filling the interlayer insulating layer 81 in the region 82 of the insulating layer 82 A The lower part, area 82 A is located between the first electrode 11 and the charge storage electrode 14, and the insulating material B (82 B ') A region (region b) 82 of the interlayer insulating layer 81 that is located between the imaging element and the adjacent imaging element B The lower part.

[0421] Example 5

[0422] Embodiment 5 relates to an imaging element and the like according to a sixth aspect of the present disclosure. Fig.34 FIG. 2 is a schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 5. In the imaging element of Embodiment 5, a region 82 of the insulating layer 82 located between the first electrode 11 and the charge storage electrode 14 is A The thickness t of the insulating layer region A is In-A The area 82 between the imaging element and the adjacent imaging element of the insulating layer 82 is B The thickness t of the insulating layer region B is In-B Thin. (t In-A / t In-B ) values ​​include

[0423] 1 / 2≤(t In-A / t In-B )<1,

[0424] Specifically, the value is

[0425] (t In -A / t In-B)=0.9.

[0426] The imaging element and the stacked imaging element of Example 5 can be formed by controlling the region 82 of the insulating layer 82 when the insulating layer 82 is formed in the manufacturing process of the imaging element and the stacked imaging element of Example 1. A and 82 B The thickness in is obtained (e.g., based on etching controlled thickness).

[0427] In the imaging element of Embodiment 5, the thickness of the region of the insulating layer between the first electrode and the charge storage electrode is thinner than the thickness of the region of the insulating layer between the imaging element and the adjacent imaging element. Therefore, the capacity of capacitor A is greater than the capacity of capacitor B, and more charges are attracted to the region of the insulating layer between the first electrode and the charge storage electrode than to the region of the insulating layer between the imaging element and the adjacent imaging element. This can prevent the charges generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not reduced.

[0428] Fig.35 A schematic cross-sectional view showing a portion of a modified example of the imaging element of Embodiment 5 (two imaging elements arranged side by side), and Fig.36 A schematic cross-sectional view showing a portion of another modification example.

[0429] exist Fig.35 In the illustrated variant, the region 82 of the insulating layer 82 between the first electrode 11 and the charge storage electrode 14 is A The thickness t of the insulating layer region A is In -A is a ratio of the area 82 of the insulating layer 82 located between the imaging element and the adjacent imaging element B The thickness t of the insulating layer region B is In-B However, the level of the top surface of the insulating layer 82 above the charge storage electrode 14 is the same as the level of the top surface of the insulating layer 82 in the region B of the insulating layer.

[0430] exist Fig.36 In the illustrated variation, the top surface of the insulating layer 82 in the region B of the insulating layer is at the same level as that included in an imaging element (located at Fig.36 The top surface of the insulating layer 82 above the charge storage electrode 14 in the imaging element on the right in FIG. 1 is at the same level. However, the top surface is at a level lower than that included in the other imaging element (located at Fig.36In the imaging element on the left in FIG. 1 , the top surface of the insulating layer 82 is at a level higher than the level of the top surface of the insulating layer 82 located above the charge storage electrode 14 included in the imaging element on the left. In addition, the level of the top surface of the insulating layer 82 in the region A of the insulating layer is the same as the level of the top surface of the insulating layer 82 located above the charge storage electrode 14 included in the other imaging element. However, the top surface is at a level lower than the level of the top surface of the insulating layer 82 located above the charge storage electrode 14 included in the one imaging element.

[0431] Example 6

[0432] Embodiment 6 relates to an imaging element and the like according to a seventh aspect of the present disclosure. Fig.37 FIG. 2 is a schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 6. In the imaging element of Embodiment 6, a region 13 of the photoelectric conversion layer 13 located between the first electrode 11 and the charge storage electrode 14 A The thickness t of (region A of the photoelectric conversion layer 13) Pc-A The region 13 between the imaging element and the adjacent imaging element of the photoelectric conversion layer 13 is B The thickness t of (region B of the photoelectric conversion layer 13) Pc-B Thick. (t Pc-A / t Pc-B ) values ​​include

[0433] 1<(t Pc-A / t Pc-B )≤2

[0434] Specifically, the value is

[0435] (t Pc-A / t Pc-B )=1.25.

[0436] The imaging element and the stacked imaging element of Example 6 can be formed by controlling the region 13 of the photoelectric conversion layer 13 when the photoelectric conversion layer 13 is formed in the manufacturing process of the imaging element and the stacked imaging element of Example 1. A and 13 B The thickness in is obtained (e.g., based on etching controlled thickness).

[0437] In the imaging element of Example 6, the thickness of the region of the photoelectric conversion layer between the first electrode and the charge storage electrode is thicker than the thickness of the region of the photoelectric conversion layer between the imaging element and the adjacent imaging element. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) will not be reduced.

[0438] Fig.38A schematic cross-sectional view showing a part of a modification of the imaging element of Embodiment 6 (two imaging elements arranged side by side), and as the case may be, t Pc-B The value of may be 0. That is, as the case may be, a region of the photoelectric conversion layer between the imaging element and the adjacent imaging element may not exist.

[0439] Example 7

[0440] Embodiment 7 relates to an imaging element and the like according to an eighth aspect of the present disclosure. Fig.39 FIG. 2 is a schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 7. In the imaging element of Embodiment 7, the photoelectric conversion layer 13 between the first electrode 11 and the charge storage electrode 14 is A (region A of the photoelectric conversion layer 13) and the insulating layer 82 A The fixed charge amount FC in the region of the interface between (region A of the insulating layer 82) and A smaller than the photoelectric conversion layer 13 located between the imaging element and the adjacent imaging element B (region B of the photoelectric conversion layer 13) and the insulating layer 82 B The fixed charge amount FC in the region of the interface between (region B of the insulating layer 82) and B . (FC A / FC B Examples of values ​​for ) include

[0441] 1 / 10≤(FC A / FC B )<1.

[0442] exist Fig.39 In FIG. 8 , black circles represent charges (electron holes) generated at the interface of the insulating layer. The amount of fixed charge in the region of the interface between the photoelectric conversion layer 13 and the insulating layer 82 can be controlled based on, for example, a method of depositing a thin film having fixed charges.

[0443] In the imaging element of Example 7, the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer located between the first electrode and the charge storage electrode is less than the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer located between the imaging element and the adjacent imaging element. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not reduced.

[0444] Example 8

[0445] Embodiment 8 relates to an imaging element and the like according to a ninth aspect of the present invention. Fig.40FIG. 1 is a schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Embodiment 8. In the imaging element of Embodiment 8, a region 13 of the photoelectric conversion layer located between the first electrode 11 and the charge storage electrode 14 A (Charge mobility CT in region A of photoelectric conversion layer 13) A The value is larger than that of the region 13 of the photoelectric conversion layer 13 located between the imaging element and the adjacent imaging element B Charge mobility CT of (region B of photoelectric conversion layer 13) B The value of (CT A / CT B ) values ​​include

[0446] 1<(CT A / CT B )≤1×10 2 .

[0447] Specifically, the value is

[0448] (CT A / CT B )=2.

[0449] The imaging element and the stacked imaging element of Example 8 can form the region 13 of the photoelectric conversion layer 13 using materials having the following relationship: A and 13 B The relationship is obtained by comparing the region 13 of the photoelectric conversion layer 13 when the photoelectric conversion layer 13 is formed during the manufacturing process of the imaging element and the stacked imaging element of Example 1. A and 13 B The materials contained in the same charge mobility CT as described above A and charge mobility CT B relationship.

[0450] In the imaging element of Example 8, the value of the charge mobility in the region of the photoelectric conversion layer between the first electrode and the charge storage electrode is greater than the value of the charge mobility in the region of the photoelectric conversion layer between the imaging element and the adjacent imaging element. This can prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) will not be reduced.

[0451] Fig.41 A schematic cross-sectional view showing a portion of a modified example of the imaging element of Embodiment 8 (two imaging elements arranged side by side). Fig.41 In the illustrated modification, a portion of the photoelectric conversion layer 13 has an upper layer (upper photoelectric conversion layer) 13 UP ' / lower layer (lower semiconductor layer) 13 DNThe region A (13) of the photoelectric conversion layer 13 has a two-layer structure. A ) and the region B (13 B ) on the upper level 13 UP ' and the portion of the photoelectric conversion layer 13 located on the upper side of the charge storage electrode 14 contain the same material (upper layer constituent material). A ) of the lower layer 13 DN ' and the lower layer 13 of the portion of the photoelectric conversion layer 13 located on the upper side of the charge storage electrode 14 DN ' contains the same material (lower layer constituent material). However, the upper layer constituent material and the lower layer constituent material are different. It is possible to provide the lower layer 13 in this way DN ', for example, to prevent recombination during charge storage. This can also improve the charge transfer efficiency of the charges stored in the photoelectric conversion layer 13 to the first electrode 11. In addition, the charges generated in the photoelectric conversion layer 13 can be temporarily held to control the timing of the transfer, etc. In addition, the generation of dark current can also be suppressed.

[0452] Example 9

[0453] Embodiment 9 is a modification of Embodiments 1 to 8. Fig.42 The imaging element and stacked imaging element of Example 9 shown in the schematic partial cross-sectional view are front-illuminated imaging elements and stacked imaging elements. The imaging element and stacked imaging element have a stacked structure of three imaging elements, including: a first type of green light imaging element (first imaging element) in Example 1 that is sensitive to green light, the green light imaging element includes a first type of green light photoelectric conversion layer for absorbing green light; a second type of conventional blue light imaging element (second imaging element) that is sensitive to blue light, the blue light imaging element includes a second type of blue light photoelectric conversion layer for absorbing blue light; and a second type of conventional red light imaging element (third imaging element) that is sensitive to red light, the red light imaging element includes a second type of red light photoelectric conversion layer for absorbing red light. Here, the red light imaging element (third imaging element) and the blue light imaging element (second imaging element) are arranged in the semiconductor substrate 70, and the second imaging element is located on the light incident side relative to the third imaging element. In addition, the green light imaging element (first imaging element) is arranged on the upper side of the blue light imaging element (second imaging element).

[0454] As in Embodiment 1, various transistors included in the control unit are provided on the front surface 70A side of the semiconductor substrate 70. Each transistor may have a configuration and structure substantially similar to that of the transistor described in Embodiment 1. In addition, the second imaging element and the third imaging element are provided in the semiconductor substrate 70, and the imaging element may also have a configuration and structure substantially similar to that of the second imaging element and the third imaging element described in Embodiment 1.

[0455] Interlayer insulating layers 77 and 78 are formed on the front surface 70A of the semiconductor substrate 70, and the photoelectric conversion unit (first electrode 11, photoelectric conversion layer 13 and second electrode 12) and charge storage electrode 14 included in the imaging element of Example 1 are arranged on the interlayer insulating layer 78.

[0456] In this way, except that the imaging element and the stacked imaging element are front-illuminated imaging elements and stacked imaging elements, the construction and structure of the imaging element and the stacked imaging element of Example 9 can be similar to the construction and structure of the imaging element and the stacked imaging element of Example 1, and the details will not be described again.

[0457] Example 10

[0458] Embodiment 10 is a modification of Embodiments 1 to 9.

[0459] Fig.43 The imaging element and the stacked imaging element of Example 10 shown in the schematic partial cross-sectional view are back-illuminated imaging elements and stacked imaging elements. The imaging element and the stacked imaging element have a stacked structure of two imaging elements including the first imaging element of the first type and the second imaging element of the second type in Example 1. In addition, Fig.44 A variation of the imaging element and the stacked imaging element of Embodiment 10 shown in the schematic partial cross-sectional view provides a front-illuminated imaging element and a stacked imaging element. The imaging element and the stacked imaging element have a stacked structure of two imaging elements including a first imaging element of the first type and a second imaging element of the second type in Embodiment 1. Here, the first imaging element absorbs primary color light, and the second imaging element absorbs complementary color light. Alternatively, the first imaging element absorbs white light, and the second imaging element absorbs infrared light.

[0460] Fig.45 A modification of the imaging element of Embodiment 10 shown in the schematic partial cross-sectional view of is a back-illuminated imaging element. The imaging element includes the first imaging element of the first type in Embodiment 1. In addition, Fig.46 A variation of the imaging element of Embodiment 10 shown in the schematic partial cross-sectional view of is a front-illuminated imaging element. The imaging element includes the first imaging element of the first type in Embodiment 1. Here, the first imaging element includes three types of imaging elements, including an imaging element that absorbs red light, an imaging element that absorbs green light, and an imaging element that absorbs blue light.

[0461] In addition, a plurality of imaging elements are included in the solid-state imaging device according to the first aspect of the present disclosure. An example of the arrangement of the plurality of imaging elements includes a Bayer array. Color filters for separating blue, green, and red are arranged on the light incident side of the imaging element as needed.

[0462] Note that, instead of providing one imaging element of the first type in Embodiment 1, two imaging elements may be stacked (i.e., two photoelectric conversion units are stacked, and control units of the two imaging elements are provided on a semiconductor substrate) or three imaging elements may be stacked (i.e., three photoelectric conversion units are stacked, and control units of the three imaging elements are provided on a semiconductor substrate). The following table illustrates a stacked structure of the first type imaging element and the second type imaging element.

[0463]

[0464]

[0465] Embodiment 11

[0466] Embodiment 11 is a modification of Embodiments 1 to 10, and Embodiment 11 relates to an imaging element of the present disclosure and the like including a transfer control electrode (charge transfer electrode). Fig.47 A schematic partial cross-sectional view showing a portion of the imaging element and the stacked imaging element of Example 11. Fig.48 and 49 An equivalent circuit diagram of the imaging element and the stacked imaging element of Example 11 is shown. Fig.50 A schematic layout diagram showing a first electrode, a transfer control electrode, a charge storage electrode, and a transistor of a control unit included in the imaging element of Example 11. Fig.51 and 52 The potential state in each segment during operation of the imaging element of Example 11 is schematically illustrated. Fig.53 A schematic layout diagram of a first electrode, a transfer control electrode, and a charge storage electrode included in the imaging element of Embodiment 11 is shown. Fig. 9B Shown is a diagram for describing Fig.51 and 52 Equivalent circuit diagram of the imaging element and the stacked imaging element of Example 11 for each segment.

[0467] The imaging element and the stacked imaging element of Example 11 further include a transfer control electrode (charge transfer electrode) 15 arranged between the first electrode 11 and the charge storage electrode 14, arranged separately from the first electrode 11 and the charge storage electrode 14, and arranged to face the photoelectric conversion layer 13 via the insulating layer 82. The transfer control electrode 15 is connected to the photoelectric conversion layer 13 through the connection hole 68B and the pad portion 68A provided in the interlayer insulating layer 81 and the wiring V 0T Connected to the pixel driving circuit included in the driving circuit.

[0468] In the following, reference will be made to Fig.51 and 52The operation of the imaging element (first imaging element) of Embodiment 11 is described. Note that, in particular, the potential applied to the charge storage electrode 14 and the point P D The value of the potential at Fig.51 and 52 Changes between.

[0469] During the charge storage period, the driver circuit sets the potential V 11 Applied to the first electrode 11, the potential V 12 is applied to the charge storage electrode 14 and the potential V 14 The light incident on the photoelectric conversion layer 13 causes photoelectric conversion in the photoelectric conversion layer 13. The electron holes generated by the photoelectric conversion pass through the wiring V 0U The first electrode 11 is sent to the driving circuit from the second electrode 12. On the other hand, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, and a negative potential is applied to the second electrode 12. Therefore, the potential is set so that V 12 >V 14 (For example, V 12 >V 11 >V 14 or V 11 >V 12 >V 14 ) is maintained. Therefore, the electrons generated by the photoelectric conversion are attracted to the charge storage electrode 14, and the electrons stop in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14. That is, the charge is stored in the photoelectric conversion layer 13. V 12 Greater than V 14 , which of course prevents the electrons generated in the photoelectric conversion layer 13 from moving toward the first electrode 11. During the time of photoelectric conversion, the potential in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 becomes a more negative value.

[0470] Subsequently, a reset operation is performed during the charge storage period. This resets the potential of the first floating diffusion layer FD1, and the potential of the first floating diffusion layer FD1 becomes the potential V of the power supply. DD .

[0471] After the reset operation is completed, the charge is read out. That is, during the charge transfer period, the drive circuit sets the potential V 21 Applied to the first electrode 11, the potential V 22 is applied to the charge storage electrode 14 and the potential V 24 is applied to the transfer control electrode 15. Here, the potential is set so that V 22 ≤V 24 ≤V 21Therefore, the electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are surely read out to the first electrode 11 and further to the first floating diffusion layer FD1. That is, the charges stored in the photoelectric conversion layer 13 are read out to the control unit.

[0472] This completes a series of operations including charge storage, reset operation and charge transfer.

[0473] The amplifying transistor TR1 after the electrons are read out to the first floating diffusion layer FD1 amp and select transistor TR1 sel The operation of the transistor is the same as that of a conventional transistor. In addition, for example, a series of operations including charge storage, reset operation, and charge transfer of the second imaging element and the third imaging element is similar to a series of operations including charge storage, reset operation, and charge transfer of the conventional transistor.

[0474] like Fig.53 FIG. 1 shows a schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in a modification of the imaging element of Embodiment 11. The reset transistor TR1 rst The other source / drain region 51B may be grounded instead of connecting the other source / drain region 51B to the power supply V DD .

[0475] Example 12

[0476] Embodiment 12 is a modification of Embodiments 1 to 11, and relates to an imaging element of the present disclosure including a plurality of charge storage electrode segments, etc.

[0477] Fig.54 A schematic partial cross-sectional view of a portion of the imaging element of Embodiment 12 is shown.

[0478] Fig.55 and 56 An equivalent circuit diagram of the imaging element and the stacked imaging element of Example 12 is shown. Fig.57 A schematic layout diagram showing a first electrode, a charge storage electrode, and a transistor of a control unit included in an imaging element of Example 12. Fig.58 and 59 The potential state in each portion during operation of the imaging element of Embodiment 12 is schematically illustrated. Fig. 9C Shown is a diagram for describing Fig.58 Equivalent circuit diagram of the imaging element and the stacked imaging element of Example 12 of each part.

[0479] In Embodiment 12, the charge storage electrode 14 includes a plurality of charge storage electrode segments 14A, 14B, and 14C. The number of charge storage electrode segments may be equal to or greater than 2, and in Embodiment 12, the number is "3". In addition, a different potential is applied to each of the N charge storage electrode segments in the imaging element and the stacked imaging element of Embodiment 12. The potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, and a negative potential is applied to the second electrode 12. Therefore, during charge transfer, the potential applied to the charge storage electrode segment (first photoelectric conversion unit segment) 14A located closest to the first electrode 11 is higher than the potential applied to the charge storage electrode segment (Nth photoelectric conversion unit segment) 14C located farthest from the first electrode 11. In this way, a potential gradient is provided to the charge storage electrode 14. Therefore, electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are more surely read out to the first electrode 11 and further to the first floating diffusion layer FD1. That is, the charges stored in the photoelectric conversion layer 13 are read out to the control unit.

[0480] exist Fig.58 In the example shown in , during the charge transfer, the potential of the charge storage electrode segment 14C < the potential of the charge storage electrode segment 14B < the potential of the charge storage electrode segment 14A is maintained. In this way, the electrons stopped in the region of the photoelectric conversion layer 13 are simultaneously read out to the first floating diffusion layer FD1. On the other hand, in Fig.59 In the example shown, during the charge transfer, the potential of the charge storage electrode segment 14C, the potential of the charge storage electrode segment 14B, and the potential of the charge storage electrode segment 14A gradually change (i.e., change stepwise or in an inclined shape). In this way, the electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 14C move to the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 14B. Then, the electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 14B move to the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 14A. Then, the electrode stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 14A is definitely read out to the first floating diffusion layer FD1.

[0481] like Fig.60 FIG. 1 shows a schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in a modification of an imaging element of Embodiment 12. The reset transistor TR1 rst The other source / drain region 51B may be grounded instead of connecting the other source / drain region 51B to the power supply V DD .

[0482] Example 13

[0483] Embodiment 13 is a modification of Embodiments 1 to 12, and relates to the first configuration and the sixth configuration of the imaging element.

[0484] Fig.61 Schematic partial cross-sectional views of the imaging element and the stacked imaging element of Example 13 are shown. Fig.62 An enlarged schematic partial cross-sectional view of a portion where a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked is shown. The equivalent circuit diagram of the imaging element and the stacked imaging element of Example 13 is similar to Figure 3 and 4 The schematic layout diagram of the first electrode, the charge storage electrode and the transistor of the control unit included in the imaging element of Example 13 is similar to Figure 5 The imaging element of Embodiment 1 described in . In addition, the operation of the imaging element (first imaging element) of Embodiment 13 is basically similar to that of the imaging element of Embodiment 1.

[0485] Here, in the imaging element of Embodiment 13 or the imaging elements of Embodiments 14 to 18 described later,

[0486] The photoelectric conversion unit includes N (where N ≥ 2) photoelectric conversion unit segments (specifically, three photoelectric conversion unit segments 101, 102, 103)

[0487] The photoelectric conversion layer 13 includes N photoelectric conversion layer sections (specifically, three photoelectric conversion layer sections 131, 132, and 133), and

[0488] The insulating layer 82 includes N insulating layer segments (specifically, three insulating layer segments 821 , 822 , and 823 ).

[0489] In Embodiments 13 to 15, the charge storage electrode 14 includes N charge storage electrode segments (specifically, three charge storage electrode segments 141, 142, and 143 in each embodiment).

[0490] In Embodiments 16 and 17 and in Embodiment 15 (as the case may be), the charge storage electrode 14 includes N charge storage electrode segments (specifically, three charge storage electrode segments 141, 142, and 143) arranged separately from each other,

[0491] The nth (where n=1, 2, 3, ... N) photoelectric conversion unit section 10 n The nth charge storage electrode segment 14 is included n , nth insulating layer segment 82 n and the nth photoelectric conversion layer segment 13n ,and

[0492] The larger the n value of the photoelectric conversion unit segment is, the farther the photoelectric conversion unit segment is from the first electrode 11 .

[0493] Alternatively, the imaging element of Embodiment 13 or the imaging elements of Embodiments 14 and 17 described later include

[0494] The photoelectric conversion unit includes a first electrode 11, a photoelectric conversion layer 13, and a second electrode 12 stacked together, wherein

[0495] The photoelectric conversion unit further includes a charge storage electrode 14 which is arranged separately from the first electrode 11 and arranged to face the photoelectric conversion layer 13 via the insulating layer 82, and

[0496] The cross-sectional area of ​​the stacked portion of the charge storage electrode 14, the insulating layer 82 and the photoelectric conversion layer 13 when cut in the YZ virtual plane varies depending on the distance from the first electrode, where the Z direction is the stacking direction of the charge storage electrode 14, the insulating layer 82 and the photoelectric conversion layer 13, and the X direction is the direction away from the first electrode 11.

[0497] Furthermore, in the imaging element of Example 13, the thickness of the insulating layer segment is from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10 N In the imaging element of Embodiment 13, the width of the cross section of the stacked portion is constant, and the thickness of the cross section of the stacked portion, specifically, the thickness of the insulating layer segment, gradually increases according to the distance from the first electrode 11. Note that the thickness of the insulating layer segment increases in a stepwise manner. The nth photoelectric conversion unit segment 10 n Insulation layer section 82 n The thickness of is constant. Assume that the nth photoelectric conversion unit segment 10 n The nth insulating layer section 82 in n The thickness of is "1", then the (n+1)th photoelectric conversion unit segment 10 (n+1) Insulation layer section 82 (n+1) The thickness of can be 2 to 10. However, the value is not limited to these. In Embodiment 13, the thickness of the charge storage electrode segments 141, 142 and 143 is gradually reduced so that the thickness of the insulating layer segments 821, 822 and 823 is gradually increased. The thickness of the photoelectric conversion layer segments 131, 132 and 133 is constant.

[0498] Hereinafter, the operation of the imaging element of Embodiment 13 will be described.

[0499] During the charge storage period, the driver circuit sets the potential V 11is applied to the first electrode 11, and the potential V 12 The light incident on the photoelectric conversion layer 13 causes photoelectric conversion in the photoelectric conversion layer 13. The electron holes generated by the photoelectric conversion pass through the wiring V 0U The first electrode 11 is sent to the driving circuit from the second electrode 12. On the other hand, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, and a negative potential is applied to the second electrode 12. Therefore, the potential is set so that V 12 ≥V 11 , preferably, V 12 >V 11 , is maintained. Therefore, the electrons generated by the photoelectric conversion are attracted to the charge storage electrode 14, and the electrons stop in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14. That is, the charge is stored in the photoelectric conversion layer 13. V 12 Greater than V 11 , therefore, the electrons generated in the photoelectric conversion layer 13 do not move toward the first electrode 11. During the time of photoelectric conversion, the potential in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 becomes a more negative value.

[0500] In the structure adopted by the imaging element of Example 13, the thickness of the insulating layer section gradually increases. Therefore, when the state becomes V 12 ≥V 11 When the nth photoelectric conversion unit segment 10 n can store more than the (n+1)th photoelectric conversion unit segment 10 (n+1) A strong electric field is applied, and the charges can be prevented from flowing from the first photoelectric conversion unit section 101 to the first electrode 11 for sure.

[0501] A reset operation is then performed during the charge storage period. This resets the potential of the first floating diffusion layer FD1, and the potential of the first floating diffusion layer FD1 becomes the potential V of the power supply. DD .

[0502] After the reset operation is completed, the charge is read out. That is, during the charge transfer period, the drive circuit sets the potential V 21 is applied to the first electrode 11, and the potential V 22 is applied to the charge storage electrode 14. Here, the potential is set so that V 21 >V 22 Therefore, the electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are read out to the first electrode 11 and further to the first floating diffusion layer FD1. That is, the charges stored in the photoelectric conversion layer 13 are read out to the control unit.

[0503] More specifically, when the state changes to V during charge transfer 21 >V 22 When the charge flow from the first photoelectric conversion unit segment 101 to the first electrode 11 and the charge flow from the (n+1)th photoelectric conversion unit segment 101 to the first electrode 11 are guaranteed, (n+1) To the nth photoelectric conversion unit section 10 n of charge flow.

[0504] This completes a series of operations including charge storage, reset operation and charge transfer.

[0505] In the imaging element of Embodiment 13, the thickness of the insulating layer section gradually changes from the first photoelectric conversion unit section to the Nth photoelectric conversion unit section. Alternatively, the cross-sectional area of ​​the stacked portion of the charge storage electrode, the insulating layer, and the photoelectric conversion layer when the stacked portion is cut in the YZ virtual plane changes according to the distance from the first electrode. Thus, a charge transfer gradient is formed, and the charge generated by the photoelectric conversion can be transferred more easily and more surely.

[0506] The imaging element and the stacked imaging element of Example 13 can be produced by a method substantially similar to that of the imaging element of Example 1, and the details will not be described.

[0507] Note that when forming the first electrode 11, the charge storage electrode 14, and the insulating layer 82 in the imaging element of Example 13, a conductive material layer for forming the charge storage electrode 143 is first deposited on the interlayer insulating layer 81. The conductive material layer is patterned, and the conductive material layer is left in the region where the photoelectric conversion unit segments 101, 102, and 103 and the first electrode 11 are to be formed. In this way, a portion of the first electrode 11 and the charge storage electrode 143 can be obtained. Next, an insulating layer for forming the insulating layer segment 823 is deposited on the entire surface. The insulating layer is patterned, and a planarization process is performed. In this way, the insulating layer segment 823 can be obtained. Next, a conductive material layer for forming the charge storage electrode 142 is deposited on the entire surface, and the conductive material layer is patterned. The conductive material layer is left in the region where the photoelectric conversion unit segments 101 and 102 and the first electrode 11 are to be formed. In this way, a portion of the first electrode 11 and the charge storage electrode 142 can be obtained. Next, an insulating layer for forming an insulating layer segment 822 is deposited on the entire surface. The insulating layer is patterned and planarized. In this way, the insulating layer segment 822 can be obtained. Next, a conductive material layer for forming a charge storage electrode 141 is deposited on the entire surface. The conductive material layer is patterned, and the conductive material layer is left in the region where the photoelectric conversion unit segment 101 and the first electrode 11 will be formed. In this way, the first electrode 11 and the charge storage electrode 141 can be obtained. Next, an insulating layer is deposited on the entire surface, and planarized. In this way, the insulating layer segment 821 (insulating layer 82) can be obtained. In addition, a photoelectric conversion layer 13 is formed on the insulating layer 82. In this way, the photoelectric conversion unit segments 101, 102 and 103 can be obtained.

[0508] like Fig.63 , which shows a schematic layout diagram of the first electrode, the charge storage electrode and the transistor of the control unit included in the variation of the imaging element of Embodiment 13, the reset transistor TR1 rst The other source / drain region 51B may be grounded instead of connecting the other source / drain region 51B to the power supply V DD .

[0509] Embodiment 14

[0510] The imaging element of Example 14 relates to the imaging elements of the second and sixth configurations of the present disclosure. Fig.64 FIG. 14 shows an enlarged schematic partial cross-sectional view of a portion of a stacked charge storage electrode, a photoelectric conversion layer, and a second electrode. In the imaging element of Example 14, the thickness of the photoelectric conversion layer segment is from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10 NAlternatively, in the imaging element of Embodiment 14, the width of the cross section of the stacked component is constant, and the thickness of the cross section of the stacked portion, in particular, the thickness of the photoelectric conversion layer segment, gradually increases according to the distance from the first electrode 11. Specifically, the thickness of the photoelectric conversion layer segment gradually increases. Note that the thickness of the photoelectric conversion layer segment increases in a stepwise manner. The nth photoelectric conversion unit segment 10 n Photoelectric conversion layer section 13 in n The thickness of is constant. Assume that the nth photoelectric conversion unit segment 10 n Photoelectric conversion layer section 13 in n The thickness of is "1", then the (n+1)th photoelectric conversion unit segment 10 (n+1) Photoelectric conversion layer section 13 in (n+1) The thickness of can be 2 to 10. However, the value is not limited to these. In Embodiment 14, the thickness of the charge storage electrode segments 141, 142 and 143 is gradually reduced so that the thickness of the photoelectric conversion layer segments 131, 132 and 133 is gradually increased. The thickness of the insulating layer segments 821, 822 and 823 is constant.

[0511] In the imaging element of Example 14, the thickness of the photoelectric conversion layer section is gradually increased. Therefore, when the state becomes V 12 ≥V 11 When applied to the nth photoelectric conversion unit section 10 n The electric field ratio is applied to the n+1th photoelectric conversion unit section 10 (n+1) This will certainly prevent the charge from flowing from the first photoelectric conversion unit section 101 to the first electrode 11. In addition, when the state becomes V 22 <V 21 When the charge flow from the first photoelectric conversion unit segment 101 to the first electrode 11 and the charge flow from the (n+1)th photoelectric conversion unit segment 101 to the first electrode 11 are ensured, (n+1) To the nth photoelectric conversion unit section 10 n of charge flow.

[0512] In this way, in the imaging element of Example 14, the thickness of the photoelectric conversion layer section gradually changes from the first photoelectric conversion unit section to the Nth photoelectric conversion unit section. Alternatively, the cross-sectional area of ​​the stacked portion of the charge storage electrode, the insulating layer, and the photoelectric conversion layer when the stacked portion is cut in the YZ virtual plane changes according to the distance from the first electrode. Thus, a charge transfer gradient is formed, and the charge generated by the photoelectric conversion can be transferred more easily and more surely.

[0513] When forming the first electrode 11, the charge storage electrode 14, the insulating layer 82, and the photoelectric conversion layer 13 in the imaging element of Example 14, first, a conductive material layer for forming the charge storage electrode 143 is deposited on the interlayer insulating layer 81. The conductive material layer is patterned, and the conductive material layer is left in the region where the photoelectric conversion unit sections 101, 102, and 103 and the first electrode 11 are to be formed. In this way, a portion of the first electrode 11 and the charge storage electrode 143 can be obtained. Next, a conductive material layer for forming the charge storage electrode 142 is deposited on the entire surface, and the conductive material layer is patterned. The conductive material layer is left in the region where the photoelectric conversion unit sections 101 and 102 and the first electrode 11 are to be formed. In this way, a portion of the first electrode 11 and the charge storage electrode 142 can be obtained. Next, a conductive material layer for forming the charge storage electrode 141 is deposited on the entire surface, and the conductive material layer is patterned. The conductive material layer is left in the region where the photoelectric conversion unit sections 101 and the first electrode 11 are to be formed. In this way, the first electrode 11 and the charge storage electrode 141 can be obtained. Next, the insulating layer 82 is conformally deposited on the entire surface. In addition, the photoelectric conversion layer 13 is formed on the insulating layer 82, and a planarization process is applied to the photoelectric conversion layer 13. In this way, the photoelectric conversion unit sections 101, 102 and 103 can be obtained.

[0514] Embodiment 15

[0515] Embodiment 15 relates to the imaging element of the third configuration. Fig.65 Schematic partial cross-sectional views of an imaging element and a stacked imaging element of Example 15 are shown. In the imaging element of Example 15, the material contained in the insulating layer segment varies between adjacent photoelectric conversion unit segments. Here, the dielectric constant value of the material contained in the insulating layer segment varies from the first photoelectric conversion unit segment 101 to the nth photoelectric conversion unit segment 10 n In the imaging element of Embodiment 15, the same potential may be applied to all N charge storage electrode segments, or different potentials may be applied to each of the N charge storage electrode segments. In the latter case, as described in Embodiment 16, the charge storage electrode segments 141, 142, and 143 arranged separately from each other may be connected to the vertical drive circuit 112 included in the drive circuit through the pad portions 641, 642, and 643.

[0516] In addition, by adopting this structure, a charge transfer gradient is formed. When the state becomes V during the charge storage period 12 ≥V 11 When the nth photoelectric conversion unit segment is able to store more charge than the (n+1)th photoelectric conversion unit segment. In addition, when the state becomes V in the charge transfer period 22<V 21 When the charge flow from the first photoelectric conversion unit section to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit section to the nth photoelectric conversion unit section can be ensured.

[0517] Example 16

[0518] Example 16 relates to an imaging element of the fourth configuration, Fig.66 Schematic partial cross-sectional views of an imaging element and a stacked imaging element of Embodiment 16 are shown. In the imaging element of Embodiment 16, the material contained in the charge storage electrode segment varies between adjacent photoelectric conversion unit segments. Here, the value of the work function of the material contained in the insulating layer segment varies from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10 N In the imaging element of Embodiment 16, the same potential may be applied to all N charge storage electrode segments, or different potentials may be applied to each of the N charge storage electrode segments. In the latter case, the charge storage electrode segments 141, 142, and 143 are connected to the vertical drive circuit 112 included in the drive circuit through the pad portions 641, 642, and 643.

[0519] Embodiment 17

[0520] The imaging element of Example 17 relates to the imaging element of the fifth configuration. Fig.67A , 67B , 68A and 68B show schematic plan views of the charge storage electrode segments in Example 17. Fig.69 Schematic layout diagram of the first electrode, the charge storage electrode and the transistor of the control unit included in the imaging element of Example 17. Schematic partial cross-sectional view of the imaging element and the stacked imaging element of Example 17 is similar to Fig.66 7 or a schematic partial cross-sectional view shown in 71. In the imaging element of Example 17, the area of ​​the charge storage electrode segment is from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10 N Gradually decreases. In the imaging element of Embodiment 17, the same potential may be applied to all N charge storage electrode segments, or different potentials may be applied to each of the N charge storage electrode segments. Specifically, as described in Embodiment 16, the charge storage electrode segments 141, 142, and 143 arranged separately from each other may be connected to the vertical drive circuit 112 included in the drive circuit through the pad portions 641, 642, and 643.

[0521] In Embodiment 17, the charge storage electrode 14 includes a plurality of charge storage electrode segments 141, 142, and 143. The number of the charge storage electrode segments may be equal to or greater than 2, and in Embodiment 17, the number is "3". In addition, in the imaging element and the stacked imaging element of Embodiment 17, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, and a negative potential is applied to the second electrode 12. Therefore, during charge transfer, the potential applied to the charge storage electrode segment 141 located at a position closest to the first electrode 11 is higher than the potential applied to the charge storage electrode segment 143 located at a position farthest from the first electrode 11. In this way, a potential gradient is provided to the charge storage electrode 14. Therefore, the electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are more certainly read out to the first electrode 11 and further read out to the first floating diffusion layer FD1. That is, the charge stored in the photoelectric conversion layer 13 is read out to the control unit.

[0522] In addition, during the charge transfer, the potential of the charge storage electrode segment 143 < the potential of the charge storage electrode segment 142 < the potential of the charge storage electrode segment 141 is maintained. In this way, the electrons stopped in the region of the photoelectric conversion layer 13 can be read out to the first floating diffusion layer FD1 at the same time. Alternatively, during the charge transfer, the potential of the charge storage electrode segment 143, the potential of the charge storage electrode segment 142, and the potential of the charge storage electrode segment 141 gradually change (i.e., change in a stepwise manner or in an inclined shape). In this way, the electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 143 move to the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 142. Next, the electrons stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 142 move to the region of the photoelectric conversion layer 13 facing the charge storage electrode segment 141. Then, the electrode stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode section 141 can surely be read out to the first floating diffusion layer FD1 .

[0523] like Fig.70 FIG. 14 shows a schematic layout diagram of a first electrode, a charge storage electrode, and a transistor of a control unit included in a modification of the imaging element of Embodiment 17. The reset transistor TR3 rst The other source / drain region 51B may be grounded instead of connecting the other source / drain region 51B to the power supply V DD .

[0524] In the imaging element of Example 17, a charge transfer gradient is also formed by adopting this structure. That is, the area of ​​the charge storage electrode segment is from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10N Therefore, when the state changes to V 12 ≥V 11 When the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. In addition, when the state becomes V during the charge transfer period 22 <V 21 When the charge flow from the first photoelectric conversion unit section to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit section to the nth photoelectric conversion unit section can be ensured.

[0525] Embodiment 18

[0526] Embodiment 18 relates to an imaging element of the sixth configuration. Fig.71 Schematic partial cross-sectional views of the imaging element and the stacked imaging element of Example 18 are shown. Fig.72A and 72B A schematic plan view of a charge storage electrode segment in Embodiment 18 is shown. The imaging element of Embodiment 18 includes a photoelectric conversion unit including a stacked first electrode 11, a photoelectric conversion layer 13, and a second electrode 12. The photoelectric conversion unit also includes a charge storage electrode 14 that is arranged separately from the first electrode 11 and arranged to face the photoelectric conversion layer 13 via an insulating layer 82. In addition, the cross-sectional area of ​​the stacked portion of the charge storage electrode 14, the insulating layer 82, and the photoelectric conversion layer 13 when the stacked portion is cut in the YZ virtual plane varies depending on the distance from the first electrode 11, wherein the Z direction is the stacking direction of the charge storage electrode 14, the insulating layer 82, and the photoelectric conversion layer 13, and the X direction is the direction away from the first electrode 11.

[0527] Specifically, in the imaging element of Embodiment 18, the thickness of the cross section of the stacked portion is constant, and the width of the cross section of the stacked portion decreases as the distance from the first electrode 11 increases. Note that the width may be continuously reduced (see Fig.72A ) or can be reduced in steps (see Fig.72B ).

[0528] Thus, in the imaging element of Embodiment 18, the cross-sectional area of ​​the stacked portion of the charge storage electrode 14, the insulating layer 82, and the photoelectric conversion layer 13 when the stacked portion is cut on the YZ virtual plane changes according to the distance from the first electrode. Thus, a charge transfer gradient is formed, and the charge generated by the photoelectric conversion can be transferred more easily and more surely.

[0529] Embodiment 19

[0530] Embodiment 19 relates to the solid-state imaging devices of the first configuration and the second configuration.

[0531] Solid-state imaging device embodiment 19 includes

[0532] The photoelectric conversion unit includes a first electrode 11, a photoelectric conversion layer 13, and a second electrode 12 stacked together, wherein

[0533] The photoelectric conversion unit further includes a plurality of imaging elements, each of which includes a charge storage electrode 14 arranged separately from the first electrode 11 and arranged to face the photoelectric conversion layer 13 via the insulating layer 82,

[0534] A plurality of imaging elements are included in an imaging element block, and

[0535] The first electrode 11 is shared by a plurality of imaging elements included in the imaging element block.

[0536] Alternatively, the solid-state imaging device of Embodiment 19 includes a plurality of imaging elements described in Embodiments 1 to 18.

[0537] In Embodiment 19, one floating diffusion layer is provided for a plurality of imaging elements. In addition, the timing of the charge transfer period can be appropriately controlled to allow a plurality of imaging elements to share one floating diffusion layer. In this case, a plurality of imaging elements can share one contact hole portion.

[0538] Note that the solid-state imaging device of Embodiment 19 has a configuration and structure basically similar to those of the solid-state imaging devices described in Embodiments 1 to 18, except that a plurality of solid-state imaging devices included in the embodiment block share the first electrode 11 .

[0539] Fig.73 (Example 19), Fig.74 (First variation of Example 19), Fig.75 (Second variant of Example 19), variant 76 (third variant of Example 19) and Example 77 (fourth variant of Example 19) schematically illustrate the arrangement states of the first electrode 11 and the charge storage electrode 14 in the solid-state imaging device of Example 19. Fig.73 , 74 , 77 and 78 show 16 imaging elements, Fig.75 and 76 12 imaging elements are shown. In addition, two imaging elements are included in the imaging element block. The imaging element block is surrounded and shown by a dotted line. The subscripts attached to the first electrode 11 and the charge storage electrode 14 are used to distinguish the first electrode 11 from the charge storage electrode 14. The same applies to the following description. In addition, an on-chip microlens ( Figures 73 to 82 In addition, in one imaging element block, two charge storage electrodes 14 are arranged on both sides of the first electrode 11 (see Fig.73 and 74Alternatively, one first electrode 11 is arranged to face two charge storage electrodes 14 arranged side by side (see Fig.77 and 78 ). That is, the first electrode is arranged adjacent to the charge storage electrode of each imaging element. Alternatively, the first electrode is arranged adjacent to the charge storage electrodes of a portion of the plurality of imaging elements, but is not arranged adjacent to the charge storage electrodes of the remaining portion of the plurality of imaging elements (see Fig.75 and 76 ). In this case, the movement of charges from the rest of the plurality of imaging elements to the first electrode is through the movement of the portion of the plurality of imaging elements. Preferably, the distance A between the charge storage electrode included in the imaging element and the charge storage electrode included in the imaging element is longer than the distance B between the first electrode and the charge storage electrode in the imaging element adjacent to the first electrode, so as to surely move the charges from each imaging element to the first electrode. Furthermore, preferably, the farther the imaging element is located from the first electrode, the greater the value of the distance A. Furthermore, in Fig.74 , 76 In the example shown in FIG. 7 and FIG. 8 , the charge movement control electrode 21 is arranged between a plurality of imaging elements included in the imaging element block. Arranging the charge movement control electrode 21 can surely suppress the movement of charges in the imaging element blocks located on both sides of the charge movement control electrode 21. Note that the potential can be set so that V 12 >V 13 (For example, V 12-2 >V 13 ) is maintained, where V 13 is the potential applied to the charge movement control electrode 21 .

[0540] The charge movement control electrode 21 may be formed at the same level as the first electrode 11 or the charge storage electrode 14, or may be formed at a different level on the first electrode side (specifically, at a level located at the lower side of the first electrode 11 or the charge storage electrode 14). In the former case, the distance between the charge movement control electrode 21 and the photoelectric conversion layer can be reduced, and the potential can be easily controlled. On the other hand, in the latter case, the distance between the charge movement control electrode 21 and the charge storage electrode 14 can be reduced, which is conducive to miniaturization.

[0541] Hereinafter, the structure including the first electrode 112 and the two charge storage electrodes 14 will be described. 21 and 14 22 Operation of the imaging element block.

[0542] During the charge storage period, the driver circuit sets the potential V a is applied to the first electrode 112, and the potential V A applied to the charge storage electrode 1421 and 14 22 The light incident on the photoelectric conversion layer 13 causes photoelectric conversion in the photoelectric conversion layer 13. The electron holes generated by the photoelectric conversion pass through the wiring V 0U The first electrode 112 is sent to the driving circuit from the second electrode 22. On the other hand, the potential of the first electrode 112 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 112, and a negative potential is applied to the second electrode 12. Therefore, the potential is set so that V A ≥V a Therefore, the electrons generated by the photoelectric conversion are attracted to the charge storage electrode 14. 21 and 14 22 , and the electrons stop at the photoelectric conversion layer 13 facing the charge storage electrode 14 21 and 14 22 That is, the charge is stored in the photoelectric conversion layer 13. V A Equal to or greater than V a Therefore, the electrons generated in the photoelectric conversion layer 13 do not move toward the first electrode 112. During the photoelectric conversion process, the photoelectric conversion layer 13 faces the charge storage electrode 14. 21 and 14 22 The potential in the region becomes more negative.

[0543] A reset operation is then performed during the charge storage period. This resets the potential of the first floating diffusion layer, and the potential of the first floating diffusion layer becomes the potential V of the power supply. DD .

[0544] After the reset operation is completed, the charge is read out. That is, during the charge transfer period, the drive circuit sets the potential V b Applied to the first electrode 112, the potential V 21-B applied to the charge storage electrode 14 21 , and the potential V 22-B applied to the charge storage electrode 14 22 Here, the potential is set so that V 21-B <V b <V 22-B Therefore, the photoelectric conversion layer 13 stops facing the charge storage electrode 14. 21 The electrons in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are read out to the first electrode 112 and further read out to the first floating diffusion layer FD1. 21 The charge in the region is read out to the control unit. Once the reading is complete, the potential is set so that V 22-B ≤V 21-B <V b be maintained. Note that Fig.77 and Fig.78 In the example shown in FIG, the potential can be set so that V 22-B <V b <V 21-B Therefore, the photoelectric conversion layer 13 stops facing the charge storage electrode 14. 22 The electrons in the region are read out to the first electrode 112 and further to the first floating diffusion layer FD1. Fig.75 and 76 In the example shown, the photoelectric conversion layer 13 is stopped at the side facing the charge storage electrode 14. 22 The electrons in the region can be connected to the charge storage electrode 14 22 The adjacent first electrode 113 reads out to the first floating diffusion layer FD1. In this way, the charge stored in the photoelectric conversion layer 13 facing the charge storage electrode 14 22 The charge in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 is read out to the control unit. Note that when the charge stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 is completed 21 When the charges in the region are read out to the control unit, the potential of the first floating diffusion layer can be reset.

[0545] Fig.83A An example of reading and driving in the imaging element block of Embodiment 19 is shown.

[0546] [Step A]

[0547] Auto zero signal to the comparator input

[0548] [Step B]

[0549] A common floating diffusion layer reset operation

[0550] [Step C]

[0551] The charge storage electrode 14 in the imaging element 21 The reading of the P phase and the movement of charges to the first electrode 112

[0552] [Step D]

[0553] The charge storage electrode 14 in the imaging element 21 Reading of the D phase and movement of charges to the first electrode 112

[0554] [Step E]

[0555] A common floating diffusion layer reset operation

[0556] [Step F]

[0557] Auto-zero signal to comparator input

[0558] [Step G]

[0559] The charge storage electrode 14 in the imaging element 22 The reading of the P phase and the movement of charges to the first electrode 112

[0560] [Step H]

[0561] The charge storage electrode 14 in the imaging element 22 Reading of the D phase and movement of charges to the first electrode 112

[0562] In this process, the charge storage electrode 14 is read. 21 and the charge storage electrode 14 22 Based on the correlated double sampling (CDS) process, the difference between the reading of the P phase in [step C] and the reading of the D phase in [step D] is the signal from the charge storage electrode 14 corresponding to the charge storage electrode 14. 21 The difference between the reading of the P phase in [step G] and the reading of the D phase in [step H] is the signal from the charge storage electrode 14. 22 The signal of the imaging element.

[0563] Note that you can skip [Step E] (see Fig.83B ). In addition, the operation of [Step F] may be skipped, in which case the operation of [Step G] may be further skipped (see Fig.83C ). The difference between the reading of the P phase in [step C] and the reading of the D phase in [step D] is the difference between the reading of the P phase and the reading of the D phase corresponding to the charge storage electrode 14. 21 The difference between the reading of the D phase in [step D] and the reading of the D phase in [step H] is the signal from the charge storage electrode 14. 22 The signal of the imaging element.

[0564] In the schematic diagram showing the arrangement of the first electrode 11 and the charge storage electrode 14 Fig.79 A variation (a sixth variation of Example 19) and Fig.80 In the seventh variation of Embodiment 19, four imaging elements are included in the imaging element block. The operation of the solid-state imaging device can be basically similar to Figures 73 to 78 The operation of the solid-state imaging device is shown in FIG.

[0565] In the schematic diagram showing the arrangement state of the first electrode 11 and the charge storage electrode 14 Fig.81 and 82 In the eighth and ninth modified examples of the present invention, 16 imaging elements are included in the imaging element block. Fig.81 and 82As shown, the charge movement control electrodes 21A1, 21A2 and 21A3 are arranged on the charge storage electrode 14 11 and the charge storage electrode 14 12 Between the charge storage electrodes 14 12 and the charge storage electrode 14 13 between and the charge storage electrode 14 13 and the charge storage electrode 14 14 In addition, Fig.82 As shown, the charge movement control electrodes 21B1, 21B2 and 21B3 are arranged on the charge storage electrode 14 21 , 14 31 and 14 41 With the charge storage electrode 14 22 , 14 32 and 14 42 Between the charge storage electrodes 14 22 , 14 32 and 14 42 With the charge storage electrode 14 23 , 14 33 and 14 43 years and the charge storage electrode 14 23 , 14 33 and 14 43 With the charge storage electrode 14 24 , 14 34 and 14 44 In addition, the charge movement control electrode 21C is provided between the imaging element block and the imaging element block. In addition, in each solid-state imaging device, the sixteen charge storage electrodes 14 can be controlled to read the charge stored in the photoelectric conversion layer 13 from the first electrode 11.

[0566] [Step 10]

[0567] Specifically, the charge stored in the photoelectric conversion layer 13 facing the charge storage electrode 14 is first read from the first electrode 11. 11 Then, the charge in the region of the photoelectric conversion layer 13 is directed toward the charge storage electrode 14. 11 The area facing the charge storage electrode 14 in the photoelectric conversion layer 13 is read from the first electrode 11. 12 Then, the charge in the region of the photoelectric conversion layer 13 is directed toward the charge storage electrode 14. 12 and the charge storage electrode 14 11 The area facing the charge storage electrode 14 in the photoelectric conversion layer 13 is read from the first electrode 11. 13 The charge in the region.

[0568] [Step 20]

[0569] Then, the charge stored in the photoelectric conversion layer 13 faces the charge storage electrode 14. 21 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 11 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 22 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 12 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 23 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 13 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 24 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 14 in the area.

[0570] [Step 21]

[0571] The charge stored in the photoelectric conversion layer 13 faces the charge storage electrode 14. 31 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 21 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 32 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 22 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 33 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 23 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 34 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 24 in the area.

[0572] [Step 22]

[0573] The charge stored in the photoelectric conversion layer 13 faces the charge storage electrode 14. 41 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 31 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 42 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 32 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 43The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 33 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 44 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 34 in the area.

[0574] [Step 30]

[0575] Furthermore, step 10 can be performed again to read the charge stored in the photoelectric conversion layer 13 through the first electrode 11 facing the charge storage electrode 14. 21 The charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 22 The charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 23 and the charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 24 The charge in the region.

[0576] [Step 40]

[0577] Then, the charge stored in the photoelectric conversion layer 13 faces the charge storage electrode 14. 21 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 11 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 22 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 12 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 23 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 13 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 24 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 14 in the area.

[0578] [Step 41]

[0579] The charge stored in the photoelectric conversion layer 13 faces the charge storage electrode 14. 31 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 21 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 32 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 22The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 33 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 23 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 34 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 24 in the area.

[0580] [Step 50]

[0581] Furthermore, step 10 can be performed again to read the charge stored in the photoelectric conversion layer 13 through the first electrode 11 facing the charge storage electrode 14. 31 The charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 32 The charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 33 and the charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 34 The charge in the region.

[0582] [Step 60]

[0583] Then, the charge stored in the photoelectric conversion layer 13 faces the charge storage electrode 14. 21 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 11 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 22 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 12 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 23 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 13 The charge storage electrode 14 facing the photoelectric conversion layer 13 is stored in the region. 24 The charges in the region move to the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14 14 in the area.

[0584] [Step 70]

[0585] Furthermore, step 10 can be performed again to read the charge stored in the photoelectric conversion layer 13 through the first electrode 11 facing the charge storage electrode 14. 41 The charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 42 The charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 1443 and the charges stored in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 44 The charge in the region.

[0586] In solid-state imaging device embodiment 19, the first electrode is shared by a plurality of imaging elements included in the imaging element block. This can simplify and miniaturize the configuration and structure in the pixel region in which the plurality of imaging elements are arranged. Note that the plurality of imaging elements provided for one floating diffusion layer may include a plurality of first-type imaging elements, or may include at least one first-type imaging element or one or two or more second-type imaging elements.

[0587] Embodiment 20

[0588] Embodiment 20 is a modification of Embodiment 19. In the schematic diagram showing the arrangement state of the first electrode 11 and the charge storage electrode 14, Fig.84 , 85 In the solid-state imaging device of Embodiment 20 in 86 and 87, two imaging elements are included in the imaging element block. In addition, an on-chip microlens 90 is provided on the upper side of the imaging element block. Note that Fig.85 and Fig.87 In the example shown in , the charge movement control electrode 21 is arranged between a plurality of imaging elements included in the imaging element block.

[0589] For example, with the charge storage electrode 14 included in the imaging element block 11 , 14 21 , 14 31 and 14 41 The corresponding photoelectric conversion layer is highly sensitive to incident light from the upper right in the figure. 12 , 14 22 , 14 32 and 14 42 The corresponding photoelectric conversion layer is highly sensitive to incident light from the upper left in the figure. Therefore, for example, the charge storage electrode 14 may be combined 11 The imaging element and the charge storage electrode 14 12 The imaging element is used to obtain the image plane phase difference signal. In addition, the charge storage electrode 14 11 The signal of the imaging element and the charge storage electrode 14 12 The signals of the imaging elements can be added, and the combination of the imaging elements can provide one imaging element. Fig.84 In the example shown, the first electrode 111 is arranged on the charge storage electrode 14 11 and the charge storage electrode 14 12However, one first electrode 111 may be arranged to face two charge storage electrodes 14 arranged side by side. 11 and 14 12 ,like Fig.86 The example shown in , further increasing the sensitivity.

[0590] Although the present disclosure has been described based on preferred embodiments, the present disclosure is not limited to these embodiments. The structures, constructions, manufacturing conditions, manufacturing methods, and materials used of the imaging elements, stacked imaging elements, and solid-state imaging devices described in the embodiments are illustrative and may be appropriately changed. The imaging elements of the embodiments may be appropriately combined. For example, the imaging element of Embodiment 13, the imaging element of Embodiment 14, the imaging element of Embodiment 15, the imaging element of Embodiment 16, and the imaging element of Embodiment 17 may be arbitrarily combined, and the imaging element of Embodiment 13, the imaging element of Embodiment 14, the imaging element of Embodiment 15, the imaging element of Embodiment 16, and the imaging element of Embodiment 18 may be arbitrarily combined.

[0591] Floating diffusion layer FD1, FD 21 , FD3, 51C, 45C and 46C can also be shared depending on the situation.

[0592] As in, for example, Fig.88 In the modified examples of the imaging element and the stacked imaging element described in Embodiment 1 shown in , the first electrode 11 may extend in the opening 84A provided in the insulating layer 82 , and the first electrode 11 may be connected to the stacked photoelectric conversion layer 13 .

[0593] Or, as in e.g. Fig.89 In the modification examples of the imaging element and the stacked imaging element described in Embodiment 1 shown in Fig.90A In the enlarged schematic partial cross-sectional view of a portion of the first electrode 11 shown in FIG. 84B , an edge portion of the top surface of the first electrode 11 is covered by the insulating layer 82, and the first electrode 11 is exposed on the bottom surface of the opening portion 84B. The side surface of the opening portion 84B has a slope extending from a first surface 82a to a second surface 82b, wherein the first surface 82a is a surface of the insulating layer 82 that contacts the top surface of the first electrode 11, and the second surface 82b is a surface of the insulating layer 82 that contacts the portion of the photoelectric conversion layer 13 that faces the charge storage electrode 14. In this way, the side surface of the opening portion 84B is inclined, and charges move more smoothly from the photoelectric conversion layer 13 to the first electrode 11. Note that although in Fig.90A In the example shown in FIG. 8 , the side surface of the opening 84B has rotational symmetry with respect to the axis of the opening 84B, but as shown in FIG. Fig.90BAs shown in FIG. 1 , the opening portion 84C may be arranged so that the side surface of the opening portion 84C extending obliquely from the first surface 82a to the second surface 82b is closer to the charge storage electrode 14. This makes it difficult for charges to move from the portion of the photoelectric conversion layer 13 located on the opposite side of the charge storage electrode 14 relative to the opening portion 84C. In addition, although the side surface of the opening portion 84B extends obliquely from the first surface 82a to the second surface 82b, the edge portion of the side surface of the opening portion 84B in the second surface 82b may be as shown in FIG. Fig.90A As shown, it is located outside the edge portion of the first electrode 11, or it can be as shown Fig.90C The structure shown is located within the edge portion of the first electrode 11. The former structure can be adopted to more easily transfer charges, and the latter structure can be adopted to reduce shape changes during the formation of the opening.

[0594] Reflow of an etching mask including a resist material formed to form openings in an insulating layer based on an etching method may slope the opening side surfaces of the etching mask, and the etching mask may be used to etch the insulating layer 82 to form openings 84B and 84C.

[0595] In addition, as in e.g. Fig.91 In the modification examples of the imaging element and the stacked imaging element described in Embodiment 1 shown in , light may be incident from the second electrode 12 side, and the light shielding layer 92 may be formed on the light incident side closer to the second electrode 12. Note that various wirings provided on the light incident side relative to the photoelectric conversion layer may also be used as the light shielding layer.

[0596] Note that although Fig.91 In the example shown, the light shielding layer 92 is formed on the upper side of the second electrode 12, that is, although the light shielding layer 92 is formed on the light incident side closer to the second electrode 12 and the upper side of the first electrode 11, the light shielding layer 92 may be formed as shown in FIG. Fig.92 As shown in FIG. 1 , the second electrode 12 is arranged on the surface of the light incident side. Fig.93 As shown in , a light shielding layer 92 may be formed on the second electrode 12 as appropriate.

[0597] Alternatively, light may be incident from the second electrode 12 side, and the light may not be incident on the first electrode 11. Specifically, as Fig.91 As shown in , the light shielding layer 92 is formed on the light incident side closer to the second electrode 12 and the upper side of the first electrode 11. Alternatively, as Fig.95As shown in , the on-chip microlens 90 may be provided on the upper side of the charge storage electrode 14 and the second electrode 12. Light incident on the on-chip microlens 90 may be collected by the charge storage electrode 14, and the light may not reach the first electrode 11. Note that in the case where the transmission control electrode 15 is provided as described in Embodiment 11, light may not be incident on the first electrode 11 and the transmission control electrode 15. Specifically, as Fig.94 As shown in FIG, a light shielding layer 92 may be formed on the upper side of the first electrode 11 and the transmission control electrode 15. Alternatively, light incident on the on-chip microlens 90 may not reach the first electrode 11, or may not reach the first electrode 11 and the transmission control electrode 15.

[0598] These configurations and structures may be adopted. Alternatively, the light shielding layer 92 may be arranged so that light is incident only on the portion of the photoelectric conversion layer 13 located on the upper side of the charge storage electrode 14. Alternatively, an on-chip microlens 90 may be designed. In this way, the portion of the photoelectric conversion layer 13 located on the upper side of the first electrode 11 (or the upper side of the first electrode 11 and the transfer control electrode 15) does not contribute to photoelectric conversion. Therefore, all pixels can be reset all at the same time with greater certainty, and a global shutter function can be more easily implemented. That is, in a driving method of a solid-state imaging device including a plurality of imaging elements having configurations and structures, the following steps are repeated:

[0599] In all imaging elements, the charges in the first electrode 11 are all released to the outside of the system at the same time, and the charges are stored in the photoelectric conversion layer 13; then,

[0600] In all the imaging elements, the charges stored in the photoelectric conversion layer 13 are all transferred to the first electrode 11 at the same time, and after the transfer is completed, the imaging elements sequentially read the charges transferred to the first electrode 11 .

[0601] In a driving method of a solid-state imaging device, in each imaging element, light from the second electrode side is not incident on the first electrode. In all imaging elements, the charge in the first electrode is released to the outside of the system at the same time, and the charge is stored in the photoelectric conversion layer. Therefore, the first electrode can be reset simultaneously in all imaging elements. In addition, subsequently, in all imaging elements, the charge stored in the photoelectric conversion layer is all transferred to the first electrode at the same time. After the transfer is completed, the imaging element sequentially reads the charge transferred to the first electrode. Therefore, the so-called global shutter function can be easily realized.

[0602] Furthermore, in a variation of Example 11, Fig.95 As shown in , a plurality of transfer control electrodes may be arranged from the position closest to the first electrode 11 toward the charge storage electrode 14. Note that Fig.96An example in which two transmission control electrodes 15A and 15B are provided is shown. In addition, the on-chip microlens 90 may be provided on the upper side of the charge storage electrode 14 and the second electrode 12. Light incident on the on-chip microlens 90 may be collected by the charge storage electrode 14, and the light may not reach the first electrode 11 and the transmission control electrodes 15A and 15B.

[0603] exist Fig.61 and 62 In the embodiment 13 shown, the thickness of the charge storage electrode segments 141, 142 and 143 is gradually reduced, so that the thickness of the insulating layer segments 821, 822 and 823 is gradually increased. Fig.97 , which is an enlarged schematic partial cross-sectional view of a stacked portion of a charge storage electrode, a photoelectric conversion layer, and a second electrode in a modification of Embodiment 13, the thickness of charge storage electrode segments 141, 142, and 143 may be constant, and the thickness of insulating layer segments 821, 822, and 823 may gradually increase. Note that the thickness of photoelectric conversion layer segments 131, 132, and 133 is constant.

[0604] In addition, Fig.64 In the embodiment 14 shown, the thickness of the charge storage electrode sections 141, 142 and 143 is gradually reduced, so that the thickness of the photoelectric conversion layer sections 131, 132 and 133 is gradually increased. Fig.98 An enlarged schematic partial cross-sectional view of the stacked portions of the charge storage electrode, the photoelectric conversion layer and the second electrode in a variant of Example 14 is shown, the thickness of the charge storage electrode segments 141, 142 and 143 can be constant, and the thickness of the insulating layer segments 821, 822 and 823 can be gradually reduced so that the thickness of the photoelectric conversion layer segments 131, 132 and 133 gradually increases.

[0605] It is obvious that the above-described various modifications can also be applied to embodiments other than Embodiment 1.

[0606] Although electrons are signal charges, and the conductivity type of the photoelectric conversion layer formed on the semiconductor substrate in the embodiment is n-type, the embodiment can also be applied to a solid-state imaging device in which holes are signal charges. In this case, each semiconductor region can be a semiconductor region of the opposite conductivity type, and the conductivity type of the photoelectric conversion layer formed on the semiconductor substrate can be p-type.

[0607] In addition, in the above example, the embodiment is applied to a CMOS solid-state imaging device, in which the unit pixels for detecting the signal charge as a physical quantity according to the amount of incident light are arranged in a matrix. However, the embodiment is not limited to being applied to a CMOS solid-state imaging device, and the embodiment can also be applied to a CCD solid-state imaging device. In the latter case, the vertical transfer register of the CCD structure transmits the signal charge in the vertical direction, and the horizontal transfer register transmits the signal charge in the horizontal direction. The charge is amplified and a pixel signal (image signal) is output. In addition, the embodiment is not limited to a conventional column-type solid-state imaging device, in which pixels are formed in a two-dimensional matrix and a column signal processing circuit is provided for each pixel column. In addition, depending on the specific circumstances, a selection transistor may not be included.

[0608] In addition, the imaging element and stacked imaging element of the present disclosure are not limited to being applied to solid-state imaging devices that detect the distribution of the incident light amount of visible light to obtain an image of the distribution. The imaging element and stacked imaging element can also be applied to solid-state imaging devices that capture images of the distribution of the incident amount of infrared rays, X-rays, particles, etc. In addition, in a broad sense, the imaging element and stacked imaging element can generally be applied to solid-state imaging devices (physical quantity distribution detection devices) such as fingerprint detection sensors, which detect the distribution of other physical quantities (such as pressure and capacitance) to obtain images of the distribution.

[0609] In addition, the imaging element and the stacked imaging element are not limited to a solid-state imaging device that sequentially scans the unit pixels of the imaging area line by line to read the pixel signal from the unit pixel. The imaging element and the stacked imaging element can also be applied to an XY address type solid-state imaging device that selects an arbitrary pixel pixel by pixel and reads the pixel signal from the selected pixel pixel by pixel. The solid-state imaging device can be formed as a chip, or can be in the form of a module with an imaging function, in which the imaging area and the driving circuit or the optical system are packaged together.

[0610] In addition, the imaging element and the stacked imaging element are not limited to application to solid-state imaging devices, and the imaging element and the stacked imaging element can also be applied to imaging devices. Here, the imaging device refers to a camera system such as a digital camera and a video camera, or an electronic device with an imaging function such as a mobile phone. In some cases, the imaging device is in the form of a module mounted on an electronic device, that is, a camera module.

[0611] Fig.99A and 99B An equivalent circuit diagram of a variation of a transistor driving a charge storage electrode is shown. Fig.100A and 100B Schematically illustrates the Fig.99A and 99B The pulse waveform of the transistor in the equivalent circuit is shown in FIG. Fig.100A and Fig.100B The horizontal axis of represents time, and the vertical axis represents the potential of the charge storage electrode 14. A transistor generally applies a potential to the charge storage electrode 14. Note that the operation of the transistor applying a potential to the charge storage electrode 14 will be expressed as "the charge storage electrode 14 is driven by the transistor". Fig.99A and 100A In the example shown, two transistors (FET-1, FET-2) drive the charge storage electrode 14. In addition, in the early stage of the charge transfer period, the charge storage electrode 14 is driven by one transistor (FET-1), and in the later stage of the charge transfer period, the charge storage electrode 14 is driven by two transistors (FET-1, FET-2) at the same time. Note that the reference numeral "FET-0" denotes a transistor for control. Fig.99B and Fig.100B In the example shown, the charge storage electrode 14 is driven by a transistor (FET-5) with a large driving capability and a transistor (FET-3) with a small driving capability. Specifically, in the early stage of the charge transfer period, the charge storage electrode 14 is driven by the transistor (FET-3) with a small driving capability, and in the later stage of the charge transfer period, the charge storage electrode 14 is driven by the transistor (FET-5) with a large driving capability. Note that reference numeral "FET-4" represents a MOS diode. The magnitude of the driving capability of a transistor is defined by, for example, the channel width of the transistor. Based on the construction, when there is a large amount of charge to be transferred, the charge storage electrode 14 can be driven by one transistor or by a transistor with a small driving capability. In this way, the generation of blooming can be suppressed. When the generation of blooming is no longer a concern, the charge storage electrode 14 can be driven by two transistors or by a transistor with a large driving capability (or by a transistor with a large driving capability and a transistor with a small driving capability). This can increase the charge transfer speed (reduce the charge transfer time).

[0612] Fig.101A conceptual diagram showing an example of using a solid-state imaging device 201 including an imaging element and a stacked imaging element of the present disclosure in an electronic device (camera) 200. The electronic device 200 includes a solid-state imaging device 201, an optical lens 210, a shutter device 211, a drive circuit 212, and a signal processing circuit 213. The optical lens 210 uses image light (incident light) from an object to form an image on an imaging surface of the solid-state imaging device 201. Therefore, signal charges are stored in the solid-state imaging device 201 for a certain time. The shutter device 211 controls the illumination period and the light shielding period of the solid-state imaging device 201. The drive circuit 212 provides a drive signal for controlling the transmission operation of the solid-state imaging device 201 and the shutter operation of the shutter device 211. The signal of the solid-state imaging device 201 is transmitted based on the drive signal (timing signal) provided from the drive circuit 212. The signal processing circuit 213 performs various types of signal processing. The video signal after signal processing is stored in a storage medium such as a memory, or is output to a monitor. In the electronic device 200, the pixel size in the solid-state imaging device 201 can be miniaturized, and the transmission efficiency can be improved. Therefore, the pixel characteristics in the electronic device 200 can be improved. The electronic device 200 to which the solid-state imaging device 201 can be applied is not limited to a camera. The solid-state imaging device 201 can be applied to a digital camera, a camera module for a mobile device (e.g., a mobile phone), and other imaging devices.

[0613] Note that the present disclosure can also be configured as follows.

[0614] [A01] <<Imaging Element: First Aspect>

[0615] An imaging element, comprising:

[0616] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0617] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0618] When light undergoes photoelectric conversion in the photoelectric conversion layer after entering the photoelectric conversion layer, the absolute value of the potential applied to a portion of the photoelectric conversion layer facing the charge storage electrode is greater than the absolute value of the potential applied to the area of ​​the photoelectric conversion layer located between the imaging element and the adjacent imaging element.

[0619] [A02] <<Imaging element: Second aspect>>

[0620] An imaging element, comprising:

[0621] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0622] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0623] The width of a region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is narrower than the width of a region of the photoelectric conversion layer located between the imaging element and an adjacent imaging element.

[0624] [A03] <<Imaging Element: Third Aspect>>

[0625] An imaging element, comprising:

[0626] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0627] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0628] The charge movement control electrode is formed in a region that faces a region of the photoelectric conversion layer between the imaging element and an adjacent imaging element via the insulating layer.

[0629] [A04] <<Imaging element: fourth aspect>>

[0630] An imaging element, comprising:

[0631] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0632] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0633] As a substitute for the second electrode, a charge movement control electrode is formed in the region of the photoelectric conversion layer between the imaging element and the adjacent imaging element.

[0634] [A05] <<Imaging element: fifth aspect>>

[0635] An imaging element, comprising:

[0636] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0637] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0638] The value of the dielectric constant of the insulating material contained in the region between the first electrode and the charge storage electrode is higher than the value of the dielectric constant of the insulating material contained in the region between the imaging element and the adjacent imaging element.

[0639] [A06] <<Imaging element: Sixth aspect>>

[0640] An imaging element, comprising:

[0641] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0642] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0643] The thickness of the insulating layer in a region between the first electrode and the charge storage electrode is thinner than the thickness of the insulating layer in a region between the imaging element and an adjacent imaging element.

[0644] [A07] <<Imaging element: Seventh aspect>>

[0645] An imaging element, comprising:

[0646] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0647] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0648] The thickness of the photoelectric conversion layer in a region between the first electrode and the charge storage electrode is thicker than the thickness of the photoelectric conversion layer in a region between the imaging element and an adjacent imaging element.

[0649] [A08] <<Imaging element: Eighth aspect>>

[0650] An imaging element comprises:

[0651] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0652] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0653] The amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer between the first electrode and the charge storage electrode is smaller than the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer between the imaging element and an adjacent imaging element.

[0654] [A09] <<Imaging element: ninth aspect>>

[0655] An imaging element comprises:

[0656] A photoelectric conversion unit comprises a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein

[0657] The photoelectric conversion unit further includes a charge storage electrode which is arranged separately from the first electrode and is arranged to face the photoelectric conversion layer via the insulating layer, and

[0658] The value of charge mobility in the region of the photoelectric conversion layer between the first electrode and the charge storage electrode is greater than the value of charge mobility in the region of the photoelectric conversion layer between the imaging element and an adjacent imaging element.

[0659] [A10]

[0660] The imaging element according to [A03], further comprising:

[0661] A control unit is provided on a semiconductor substrate and includes a drive circuit, wherein

[0662] The first electrode, the second electrode, the charge storage electrode and the charge movement control electrode are connected to a driving circuit,

[0663] During the charge storage period, the driver circuit sets the potential V 11 Applied to the first electrode, the potential V 12 applied to the charge storage electrode and the potential V 13 applied to the charge movement control electrode, and the charge is stored in the photoelectric conversion layer, and

[0664] During the charge transfer period, the driver circuit sets the potential V 21 Applied to the first electrode, the potential V 22 applied to the charge storage electrode and the potential V 23 applied to the charge movement control electrode, and the charges stored in the photoelectric conversion layer are read out to the control unit through the first electrode, wherein

[0665] When the potential of the first electrode is higher than the potential of the second electrode

[0666] Keep V 12 ≥V 11 、V 12 >V 13 and V 21 >V 22 >V 23 ,and

[0667] When the potential of the first electrode is lower than the potential of the second electrode

[0668] Keep V 12 ≤V 11 、V 12 <V 13 and V 21 <V 22 <V 23 .

[0669] [A11]

[0670] The imaging element according to [A04], further comprising:

[0671] A control unit is provided on a semiconductor substrate and includes a drive circuit, wherein

[0672] The first electrode, the second electrode, the charge storage electrode and the charge movement control electrode are connected to a driving circuit,

[0673] During the charge storage period, the driving circuit applies the potential V2' to the second electrode and the potential V 13 ' is applied to the charge movement control electrode, and the charge is stored in the photoelectric conversion layer, and

[0674] During the charge transfer period, the driving circuit applies a potential V2" to the second electrode and a potential V 23 " is applied to the charge movement control electrode, and the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode, wherein

[0675] When the potential of the first electrode is higher than the potential of the second electrode

[0676] Keep V2'≥V 13 ' and V2"≥V 23 ",and

[0677] When the potential of the first electrode is lower than the potential of the second electrode

[0678] Keep V2'≤V 13 ' and V2"≤V 23 ”.

[0679] [A12]

[0680] The imaging element according to any one of [A01] to [A11], further comprising:

[0681] Semiconductor substrate, wherein

[0682] The photoelectric conversion unit is arranged on the upper side of the semiconductor substrate.

[0683] [A13]

[0684] The imaging element according to any one of [A01] to [A12], further comprising:

[0685] A transfer control electrode is arranged between the first electrode and the charge storage electrode, is arranged separately from the first electrode and the charge storage electrode, and is arranged to face the photoelectric conversion layer via the insulating layer.

[0686] [A14]

[0687] The imaging element according to any one of [A01] to [A13], wherein

[0688] The charge storage electrode includes a plurality of charge storage electrode segments.

[0689] [A15]

[0690] The imaging element according to any one of [A01] to [A14], wherein

[0691] The size of the charge storage electrode is larger than that of the first electrode.

[0692] [A16]

[0693] The imaging element according to any one of [A01] to [A15], wherein

[0694] The first electrode extends in an opening provided in the insulating layer and is connected to the photoelectric conversion layer.

[0695] [A17]

[0696] The imaging element according to any one of [A01] to [A15], wherein

[0697] The photoelectric conversion layer extends in the opening provided in the insulating layer and is connected to the first electrode.

[0698] [A18]

[0699] The imaging element according to [A17], wherein

[0700] An edge portion of the top surface of the first electrode is covered by the insulating layer,

[0701] The first electrode is exposed on the bottom surface of the opening, and

[0702] The side surface of the opening portion is inclined to extend from a first surface to a second surface, wherein the first surface is a surface of the insulating layer in contact with the top surface of the first electrode, and the second surface is a surface of the insulating layer in contact with a portion of the photoelectric conversion layer facing the charge storage electrode.

[0703] [A19]

[0704] The imaging element according to [A18], wherein

[0705] A side surface of the opening portion extending obliquely from the first surface toward the second surface is located on the charge storage electrode side.

[0706] [A20] <<Control of Potentials of First Electrode and Charge Storage Electrode>>

[0707] The imaging element according to any one of [A01] to [A19], further comprising:

[0708] A control unit is provided on a semiconductor substrate and includes a drive circuit, wherein

[0709] The first electrode and the charge storage electrode are connected to a driving circuit,

[0710] During the ...

Claims

1. An imaging element, comprising: A photoelectric conversion unit, the photoelectric conversion unit comprising a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein: The photoelectric conversion unit further includes a charge storage electrode arranged to be separated from the first electrode and arranged to face the photoelectric conversion layer via an insulating layer, and The amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer between the first electrode and the charge storage electrode is smaller than the amount of fixed charge in the region of the interface between the photoelectric conversion layer and the insulating layer between the imaging element and an adjacent imaging element.

2. The imaging element according to claim 1, further comprising: Semiconductor substrate, wherein The photoelectric conversion unit is disposed on an upper side of the semiconductor substrate.

3. The imaging element according to claim 1, further comprising: A transfer control electrode is arranged between the first electrode and the charge storage electrode, is arranged separately from the first electrode and the charge storage electrode, and is arranged to face the photoelectric conversion layer via the insulating layer.

4. The imaging element according to claim 1, wherein The charge storage electrode includes a plurality of charge storage electrode segments.

5. The imaging element according to claim 1, wherein The charge storage electrode has a larger size than the first electrode. 6 . A stacked imaging element comprising at least one imaging element according to claim 1 . 7 . A solid-state imaging device comprising a plurality of imaging elements according to claim 1 .

8. A solid-state imaging device comprising a plurality of stacked imaging elements according to claim 6.

Images