A digital synchronous differential mode conducted electromagnetic interference suppression circuit
Through the digital synchronous differential mode conductive electromagnetic interference suppression circuit, the half-bridge circuit of the Boost converter is driven by the synchronous PWM signal driving the half-bridge circuit to reversely cancel the electromagnetic interference, solving the problem of large size and high cost of traditional filters, and achieving an effective suppression effect in the frequency range of 150kHz-2MHz.
Patent Information
- Application Number
- CN202211131245.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-16
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2042-09-16
AI Technical Summary
The prior art has high cost, large volume, and unfavorable design problems in suppressing conductive electromagnetic interference of switching power supplies. Traditional filters are not effective in the high frequency range, and digital active filters have high bandwidth and high device costs.
The digital synchronous differential mode conductive electromagnetic interference suppression circuit is adopted, and the half-bridge circuit is driven by the synchronous PWM signal of the Boost converter, and the compensation voltage with the same shape and proportional to the amplitude of the noise source waveform is constructed, and the electromagnetic interference is reversely cancelled through the injection branch formed by the series LC. The device used is a small current and low voltage device, with a simple structure and low cost.
Provides 20dB amplitude attenuation in the 150kHz-2MHz frequency range, small size and low cost, Boost converters suitable for continuous current mode, instead of traditional differential mode filters.
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Figure CN115360901B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of modeling and suppression of conducted electromagnetic interference of switching power supplies, and in particular to a digital synchronous differential-mode conducted electromagnetic interference suppression circuit. Background Art
[0002] With the continuous development of wide-bandgap devices, the switching frequency of switching power supplies continues to increase, and printed circuit board (PCB) layouts are becoming more compact. This has led to increasing power density, but this has also led to increasingly severe electromagnetic interference (EMI), especially conducted EMI. To meet EMI test standards, it is often necessary to add an EMI filter before the switching power supply.
[0003] Traditional passive EMI filters use a low-pass filter composed of inductors and capacitors to suppress EMI. However, due to safety regulations, the capacitance of the capacitors in passive EMI filters cannot be too large. To achieve better filtering, the inductor's inductance must be increased, which results in high volume and weight. Furthermore, traditional passive EMI filters can only be designed after the switching power supply is designed. The measured EMI spectrum is compared with the required pass standards to determine the required attenuation at each frequency band. This makes it impossible to effectively estimate and determine the filter's size, which is detrimental to product design.
[0004] Active EMI filters (AEFs) utilize analog circuits to collect, reconstruct, and inject EMI noise from circuits, creating a feedforward or feedback structure to achieve EMI suppression. These filters can be very compact. However, the frequency range of conducted EMI is 150kHz-30MHz. To achieve effective suppression, the AEF's analog circuits must possess extremely high bandwidth, which drives up its cost. AEFs are typically only effective in the low-frequency range of 150kHz-2MHz and require a passive filter to achieve effective filtering across the entire frequency range.
[0005] Digital active filters use a high-speed ADC to collect EMI noise, reconstruct the noise in a digital signal processing chip, convert it to an analog signal through a DAC, and then inject it back into the system to suppress EMI noise. However, this method also suffers from high bandwidth and high component cost.
[0006] The present invention provides a digital synchronous differential mode conducted electromagnetic interference suppression circuit which has simple structure, low cost, small size and is easy to implement. Summary of the Invention
[0007] The present invention provides a circuit structure for a digital synchronous differential-mode conducted electromagnetic interference suppression circuit suitable for boost converters. This circuit structure eliminates voltage sampling and feedback, resulting in a simple structure, low bandwidth requirements, and low cost. When applied to a boost converter operating in CCM mode, all components used are low-voltage, low-current devices, resulting in a compact size.
[0008] The technical solution of the present invention is achieved as follows:
[0009] A digital synchronous differential mode conducted electromagnetic interference suppression circuit is applied to the Boost converter. It uses the synchronous PWM signal of the converter to drive the half-bridge composed of low-voltage NMOS through the isolated half-bridge driver IC to build a circuit with the noise source V DS The compensation voltage v has the same waveform shape and proportional amplitude comp , injected into the busbar through the injection branch composed of series LC, reversely offsetting the differential mode conducted electromagnetic interference in the circuit. The circuit structure includes an isolated half-bridge driver IC, a half-bridge circuit composed of two low-voltage NMOS tubes, and an isolated auxiliary power supply V aux , a compensation capacitor C comp and a compensation inductor L comp The power supply of the lower tube of the isolated half-bridge driver IC and the positive bus of the half-bridge composed of the low-voltage NMOS are both connected to the isolated auxiliary power supply V aux The output end of the Boost converter is connected to the negative bus of the input; the reference ground of the lower tube of the isolated half-bridge driver IC and the negative bus of the half-bridge composed of the low-voltage NMOS are connected to the isolated auxiliary power supply V aux The reference ground is connected to the input positive bus of the Boost converter, and the compensation capacitor C comp and compensation inductor L comp The injection branch is formed in series, one end of which is connected to the midpoint of the half bridge and the other end is connected to the negative input bus of the Boost converter.
[0010] The PWM signal of the isolated half-bridge driver IC is derived from the synchronous PWM signal of the Boost converter power MOS tube Q, thereby generating a PWM signal at the midpoint of the half-bridge composed of low-voltage NMOS and the noise source v DS The compensation voltage v has the same waveform shape and proportional amplitude comp .
[0011] The power supply for the upper tube drive of the isolated half-bridge driver IC adopts a bootstrap circuit structure, and no additional auxiliary power supply is required.
[0012] To reduce the number of auxiliary power supplies, isolate the auxiliary power supply V aux At the same time, it supplies power to the half-bridge composed of the isolated half-bridge driver IC and the low-voltage NMOS. Its voltage should be within the supply voltage range of the conventional NMOS driver IC, that is, 10-20V.
[0013] The half-bridge circuit composed of NMOS is used to build a compensation voltage source v comp , and reversely inject compensation current, the half-bridge power supply is the isolated auxiliary power supply V aux , which is 10-20V, so NMOS can be a low-voltage NMOS tube with a smaller package.
[0014] The compensation capacitor C comp and compensation inductor L comp The injection branch is formed in series, and the compensation capacitor C comp The main function is to isolate the power flow from the compensation circuit and compensate the inductance L comp It plays the role of impedance matching, compensating the inductance L within the test frequency range of conducted electromagnetic interference. comp The impedance of the injection branch is dominant, so the resonant frequency of the injection branch should satisfy:
[0015]
[0016] Among them, 150kHz is the starting frequency of the conducted electromagnetic interference test frequency range.
[0017] The compensation inductor L comp Used for impedance matching to reversely offset the differential mode conducted electromagnetic interference in the circuit and compensate for the inductance value L comp , auxiliary power supply voltage V aux , the inductance value L of the Boost converter power inductor and the converter output voltage V o The following conditions should be met:
[0018]
[0019] The compensation capacitor C comp Used to isolate the power circuit from the compensation circuit. In stable state, the compensation capacitor C comp The voltage across the terminals is:
[0020] v Ccomp =V aux (1-D)+V in
[0021] Where D is the duty cycle of the Boost converter in steady state, V in The input bus voltage of the Boost converter and the compensation capacitor C comp The withstand voltage should be higher than the above value and leave enough margin.
[0022] The compensation capacitor C comp and compensation inductor L compThe injection branch is used to inject compensation current to reversely offset the differential mode conducted electromagnetic interference in the circuit. In steady state, the peak value of the compensation current flowing through the injection branch is the same as the peak value of the ripple current of the Boost converter power inductor:
[0023]
[0024] Among them, f s is the switching frequency of the Boost converter, D is the duty cycle in its steady state, V in For its input bus voltage, when the Boost converter operates in CCM mode, the inductor current ripple is very small, so the compensation current peak of the compensation circuit is very small, and both the compensation capacitor and the compensation inductor can choose surface-mount devices with smaller packages; when the Boost converter operates in DCM mode or CRM mode, the inductor current ripple is large, and the compensation capacitor and the compensation inductor need to choose devices with larger current flow or multiple surface-mount devices should be selected in parallel.
[0025] The present invention can be applied to Boost converter. DS The waveform shape is the same as that of the compensation voltage v, and the amplitude is proportional to comp The invention provides a high-frequency attenuation of up to 20dB within the frequency range of 150kHz-2MHz. The components used in continuous current mode boost converters are all low-current devices, resulting in a very small size and low cost, making them suitable for replacing traditional differential mode filters. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 It is a structural diagram of the digital synchronous differential-mode conducted electromagnetic interference suppression circuit of the present invention and a connection diagram when it is applied to a Boost circuit.
[0027] Figure 2 This is a differential-mode equivalent circuit diagram when the differential-mode conducted electromagnetic interference suppression circuit described in the present invention is applied to a Boost circuit.
[0028] Figure 3 When the differential mode conducted electromagnetic interference suppression circuit of the present invention is applied to the Boost circuit, the PWM signal and the internal noise source v of the Boost converter are DS , the compensation voltage v comp And the injected compensation current i comp Waveform diagram.
[0029] Figure 4 This is a comparison diagram of the differential-mode conducted electromagnetic interference spectrum before and after the differential-mode conducted electromagnetic interference suppression circuit described in the present invention is applied to the Boost circuit. DETAILED DESCRIPTION
[0030] The following is a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. The present invention is described in detail below in conjunction with the drawings and embodiments.
[0031] The present invention is based on the drain-source voltage v of the Boost converter power MOS tube Q DS It is the understanding of the noise source of differential mode conducted electromagnetic interference inside the converter. Through a half-bridge driven by a synchronous PWM signal of the converter power MOS tube Q and the isolated half-bridge driver IC, a half-bridge is constructed at its midpoint with v DS The compensation voltage source v has the same waveform shape and proportional amplitude comp and connected to the Boost input bus through a half-bridge circuit to make its polarity consistent with v DS On the contrary, through the compensation capacitor C comp and compensation inductor L comp The injection branch formed in series injects compensation current, which inversely offsets v DS Differential mode conducted electromagnetic interference caused by.
[0032] Figure 1 The schematic diagram of the proposed digital synchronous differential mode conducted electromagnetic interference suppression circuit and its connection diagram when applied to the Boost circuit are shown. The circuit structure includes an isolated half-bridge driver IC, two low-voltage NMOS transistors Q1 and Q2, and an isolated auxiliary power supply V aux , a compensation capacitor C comp and a compensation inductor L comp The LISN circuit is a universal linear impedance stabilization network, where R LISN =50Ω, L LISN =50μH, C1=0.1μF, C2=1μF. The detailed connection relationship of the circuit is as follows:
[0033] The source of the low-voltage NMOS transistor Q1 is connected to the positive bus input of the Boost converter, the gate is connected to the lower tube drive signal output terminal of the isolated half-bridge driver IC, and the drain is connected to the source of the low-voltage NMOS transistor Q2;
[0034] The source of the low-voltage NMOS tube Q2 is connected to the drain of the low-voltage NMOS tube Q1, the gate is connected to the upper tube drive signal output terminal of the isolation half-bridge driver IC, and the drain is connected to the auxiliary power supply V aux The voltage output terminal is connected;
[0035] The PWM signal input end of the isolated half-bridge driver IC is connected to the PWM signal input end of the Boost converter power MOS tube Q, and the power supply of the lower tube on the driving side is connected to the auxiliary power supply V aux The voltage output terminal of the drive side is connected, the reference ground of the lower tube is connected to the positive bus of the Boost converter input, and the power supply of the upper tube on the drive side is generated by the bootstrap circuit;
[0036] The auxiliary power supply V aux The voltage output terminal is connected to the drain of the low-voltage NMOS tube Q2, and the reference ground is connected to the input positive bus of the Boost converter;
[0037] The compensation inductor L comp One end is connected to the midpoint of the half bridge, that is, the drain of the low-voltage NMOS tube Q1 and the source of the low-voltage NMOS tube Q2, and the other end is connected to the compensation capacitor C comp connected;
[0038] The compensation capacitor C comp One end and the compensation inductor L comp The other end is connected to the negative bus of the Boost converter input;
[0039] Figure 2 The figure shows the differential mode equivalent circuit diagram of the proposed digital synchronous differential mode conducted electromagnetic interference suppression circuit when applied to the Boost circuit. The compensation voltage v can be calculated by using the Thevenin equivalent theorem. comp The internal noise source of the Boost converter is DS Equivalent to a voltage source v eq , Boost power inductor L and compensation inductor L comp Can be equivalent to an inductor L eq , the corresponding expression is:
[0040]
[0041] The proposed digital synchronous differential-mode conducted electromagnetic interference suppression circuit must meet the following two conditions in order to reversely offset the differential-mode conducted electromagnetic interference in the Boost converter.
[0042] First, the compensation capacitor C comp and compensation inductor L comp The resonant frequency of the injection branch formed in series should be lower than the lower limit of the conducted EMI frequency range (150kHz), that is:
[0043]
[0044] Second, in order to achieve the reverse cancellation of the compensation signal and the internal noise signal of the Boost converter, the inductance value of the compensation inductor L comp , Auxiliary power supply voltage value V aux, the inductance value L of the Boost converter and its output voltage V o The following conditions should be met:
[0045]
[0046] At this time, within the test frequency range of conducted electromagnetic interference, the compensation inductor L comp The impedance of the injection branch dominates. In steady state, the average voltage across the compensation capacitor is:
[0047] v Ccomp =V aux (1-D)+V in
[0048] Where D is the duty cycle of the Boost converter in steady state, V in is the input bus voltage of the Boost converter. The peak value of the compensation current flowing through the injection branch is:
[0049]
[0050] When the compensation inductor L comp With power inductor L, auxiliary power supply V aux and the Boost converter output voltage V o When the matching relationship is met, the peak value of the compensation current flowing through the injection branch is:
[0051]
[0052] The peak value of the compensation current is the same as the peak value of the ripple current of the power inductor when the Boost converter is in steady state.
[0053] Figure 3 The results show that when the proposed digital synchronous differential mode conducted electromagnetic interference suppression circuit is applied to the Boost converter, the PWM signal of the power MOS and the internal noise source v DS , the compensation voltage v comp And the injected compensation current i comp The simulated Boost converter operates in CCM mode with an input voltage of 15V, an output voltage of 30V, an output power of 120W, and an inductance of 100μH for the Boost power inductor. The auxiliary power supply V used in the proposed digital synchronous differential mode conducted electromagnetic interference suppression circuit is aux is 15V, compensation inductor L comp The inductance is 50μH. The compensation voltage v comp The noise source v inside the Boost converter DS The waveforms have the same shape and proportional amplitudes.
[0054] Figure 4 The figure shows the comparison of differential-mode conducted electromagnetic interference spectra before and after the proposed digital synchronous differential-mode conducted electromagnetic interference suppression circuit is applied to the Boost converter, obtained by simulation in Simulink. Figure 4 (a) is the comparison of differential mode conducted electromagnetic interference spectrum when the switching frequency is 100kHz. Figure 4 (b) shows a comparison of the differential-mode conducted EMI spectra at a switching frequency of 200kHz. In both figures, the darkest line represents the differential-mode conducted EMI spectrum of the boost converter without the differential-mode conducted EMI suppression circuit; the lightest line represents the differential-mode conducted EMI spectrum of the boost converter with the differential-mode conducted EMI suppression circuit but without auxiliary power; and the line with a color depth between the two represents the differential-mode conducted EMI spectrum of the boost converter with the differential-mode conducted EMI suppression circuit connected but without power supply. The differential-mode conducted EMI spectrum when the differential-mode conducted EMI suppression circuit is connected but without power supply is almost the same as the spectrum without it, indicating that the passive components in the proposed differential-mode conducted EMI suppression circuit—the compensation capacitor and compensation inductor—do not have a significant differential-mode suppression effect. Compared to the spectrum without the differential-mode conducted EMI suppression circuit, the differential-mode conducted EMI spectrum when the differential-mode conducted EMI suppression circuit is connected and operating normally shows a significant suppression effect in the low-frequency band below 5MHz, with a maximum amplitude attenuation of over 20dB, demonstrating the effectiveness of the proposed differential-mode conducted EMI suppression circuit.
Claims
1. A digital synchronous differential-mode conducted electromagnetic interference suppression circuit, applied to a Boost converter, characterized by: The synchronous PWM signal of the converter is used to drive the half-bridge composed of low-voltage NMOS through the isolated half-bridge driver IC to build a half-bridge with the noise source v DS The compensation voltage v has the same waveform shape and proportional amplitude comp , injected into the busbar through the injection branch composed of series LC, reversely offsetting the differential mode conducted electromagnetic interference in the circuit. The circuit structure includes an isolated half-bridge driver IC, a half-bridge circuit composed of two low-voltage NMOS tubes, and an isolated auxiliary power supply V aux , a compensation capacitor C comp and a compensation inductor L comp The power supply of the lower tube of the isolated half-bridge driver IC and the positive bus of the half-bridge composed of the low-voltage NMOS are both connected to the isolated auxiliary power supply V aux The output end of the Boost converter is connected to the negative bus of the input; the reference ground of the lower tube of the isolated half-bridge driver IC and the negative bus of the half-bridge composed of the low-voltage NMOS are connected to the isolated auxiliary power supply V aux The reference ground is connected to the input positive bus of the Boost converter, and the compensation capacitor C comp and compensation inductor L comp The injection branch is formed in series, one end of which is connected to the midpoint of the half bridge and the other end is connected to the negative input bus of the Boost converter.
2. The circuit structure of the digital synchronous differential-mode conducted electromagnetic interference suppression circuit according to claim 1, characterized in that: The PWM signal of the isolated half-bridge driver IC is derived from the synchronous PWM signal of the Boost converter power MOS tube Q, thereby generating a PWM signal at the midpoint of the half-bridge composed of low-voltage NMOS and the noise source v DS The compensation voltage v has the same waveform shape and proportional amplitude comp .
3. The circuit structure of the digital synchronous differential-mode conducted electromagnetic interference suppression circuit according to claim 1, characterized in that: The power supply for the upper tube drive of the isolated half-bridge driver IC adopts a bootstrap circuit structure, and no additional auxiliary power supply is required.
4. The circuit structure of the digital synchronous differential-mode conducted electromagnetic interference suppression circuit according to claim 1, characterized in that: To reduce the number of auxiliary power supplies, isolate the auxiliary power supply V aux At the same time, it supplies power to the half-bridge composed of the isolated half-bridge driver IC and the low-voltage NMOS. Its voltage should be within the supply voltage range of the conventional NMOS driver IC, that is, 10-20V.
5. The circuit structure of the digital synchronous differential mode conducted electromagnetic interference suppression circuit according to claim 1, characterized in that: The half-bridge circuit composed of NMOS is used to build a compensation voltage source v comp , and reversely inject compensation current, the half-bridge power supply is the isolated auxiliary power supply V aux , which is 10-20V, so NMOS can be a low-voltage NMOS tube with a smaller package.
6. The circuit structure of the digital synchronous differential mode conducted electromagnetic interference suppression circuit according to claim 1, characterized in that: The compensation capacitor C comp and compensation inductor L comp The injection branch is formed in series, and the compensation capacitor C comp The main function is to isolate the power flow from the compensation circuit and compensate the inductance L comp It plays the role of impedance matching, compensating the inductance L within the test frequency range of conducted electromagnetic interference. comp The impedance of the injection branch is dominant, so the resonant frequency of the injection branch should satisfy: Among them, 150kHz is the starting frequency of the conducted electromagnetic interference test frequency range.
7. The circuit structure of the digital synchronous differential mode conducted electromagnetic interference suppression circuit according to claim 1, characterized in that: The compensation inductor L comp Used for impedance matching to reversely offset the differential mode conducted electromagnetic interference in the circuit and compensate for the inductance value L comp , auxiliary power supply voltage V aux , the inductance value L of the Boost converter power inductor and the converter output voltage V o The following conditions should be met:
8. The circuit structure of the digital synchronous differential mode conducted electromagnetic interference suppression circuit according to claim 1, characterized in that: The compensation capacitor C comp Used to isolate the power circuit from the compensation circuit. In stable state, the compensation capacitor C comp The voltage across the terminals is: v Ccomp =V aux (1-D)+V in Where D is the duty cycle of the Boost converter in steady state, V in The input bus voltage of the Boost converter and the compensation capacitor C comp The withstand voltage should be higher than the above value and leave enough margin.
9. The circuit structure of the digital synchronous differential mode conducted electromagnetic interference suppression circuit according to claim 1, characterized in that: The compensation capacitor C comp and compensation inductor L comp The injection branch is used to inject compensation current to reversely offset the differential mode conducted electromagnetic interference in the circuit. In steady state, the peak value of the compensation current flowing through the injection branch is the same as the peak value of the ripple current of the Boost converter power inductor: Among them, f s is the switching frequency of the Boost converter, D is the duty cycle in its steady state, V in For its input bus voltage, when the Boost converter operates in CCM mode, the inductor current ripple is very small, so the compensation current peak of the compensation circuit is very small, and both the compensation capacitor and the compensation inductor can choose surface-mount devices with smaller packages; when the Boost converter operates in DCM mode or CRM mode, the inductor current ripple is large, and the compensation capacitor and the compensation inductor need to choose devices with larger current flow or multiple surface-mount devices should be selected in parallel.
Citation Information
Patent Citations
Feedback type active EMI filter optimization method suitable for PWM converter
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