Signal sampling system, method and electronic device

Abstract

The present disclosure relates to a signal sampling system, method and electronic device, and relates to the technical field of power electronics. The signal sampling system comprises: a plurality of sampling circuits configured to amplify a to-be-sampled signal at different scales respectively to generate analog sampling signals, wherein the to-be-sampled signal is a voltage analog signal or a current analog signal; a digital signal processor configured to convert the analog sampling signals generated by the plurality of sampling circuits into digital sampling signals; and a controller configured to select at least one sampling circuit according to the digital sampling signals, and generate a sampling result according to the digital sampling signal corresponding to the selected sampling circuit. According to the present disclosure, the sampling accuracy can be improved while reducing the cost.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of power electronics, and in particular, to a signal sampling system, method and electronic device. BACKGROUND

[0002] With the development of power electronics and electronic information industry, various power electronic devices are increasingly entering people's life and production. In household appliances such as refrigerators, washing machines and air conditioners, various analog signals such as current, voltage, pressure and temperature often need to be collected.

[0003] In signal sampling, A / D (Analog / Digital) analog-digital conversion is usually performed. After the analog signal is converted into a digital signal, it can be processed by software. For example, in the signal sampling process of an analog signal collection device, the signal is processed by conditioning and filtering, and is converted into a voltage or current signal. Then, the signal is input into an analog / digital converter to convert the analog quantity into a digital quantity. SUMMARY

[0004] According to a first aspect of the present disclosure, a signal sampling system is provided, comprising:

[0005] a plurality of sampling circuits configured to amplify a to-be-sampled signal at different scales respectively to generate analog sampling signals, wherein the to-be-sampled signal is a voltage analog signal or a current analog signal;

[0006] a digital signal processor configured to convert the analog sampling signals generated by the plurality of sampling circuits into digital sampling signals;

[0007] a controller configured to select at least one sampling circuit according to the digital sampling signals, and generate a sampling result according to the digital sampling signal corresponding to the selected sampling circuit.

[0008] In some embodiments, the controller is further configured to:

[0009] select the digital sampling signal corresponding to one of the plurality of sampling circuits as the sampling result when the digital sampling signal corresponding to the sampling circuit meets a preset condition;

[0010] when there is no digital sampling signal corresponding to a single sampling circuit that meets the preset condition, select at least two of the digital sampling signals corresponding to the plurality of sampling circuits to be weighted, and take the weighted result as the sampling result.

[0011] In some embodiments, the plurality of sampling circuits comprises a first sampling circuit and a second sampling circuit, the amplification scale of the first sampling circuit is greater than that of the second sampling circuit, and the controller is further configured to:

[0012] in a case where the digital sampling signal corresponding to the first sampling circuit is not greater than the first threshold value, taking the digital sampling signal corresponding to the first sampling circuit as the sampling result;

[0013] in a case where the digital sampling signal corresponding to the second sampling circuit is not less than the second threshold value, taking the digital sampling signal corresponding to the second sampling circuit as the sampling result, wherein the second threshold value is greater than the first threshold value;

[0014] in a case where the digital sampling signal corresponding to the first sampling circuit is greater than the first threshold value and the digital sampling signal corresponding to the second sampling circuit is less than the second threshold value, weighting the digital sampling signals corresponding to the first sampling circuit and the second sampling circuit as the sampling result.

[0015] In some embodiments, each sampling circuit comprises a signal following circuit and a signal amplification circuit.

[0016] In some embodiments, the signal following circuit comprises:

[0017] a first operational amplifier;

[0018] a first resistor, a first end of the first resistor being connected with an input end of the signal following circuit, and a second end of the first resistor being connected with a non-inverting input end of the first operational amplifier;

[0019] a second resistor, a first end of the second resistor being connected with a ground end of the signal sampling system, and a second end of the second resistor being connected with an inverting input end of the first operational amplifier;

[0020] a third resistor, a first end of the third resistor being connected with the inverting input end of the first operational amplifier, and a second end of the third resistor being connected with an input end of the signal amplification circuit;

[0021] a fourth resistor, a first end of the fourth resistor being connected with the ground end of the signal sampling system, and a second end of the fourth resistor being connected with the second end of the first resistor,

[0022] wherein a product of a sum of resistances of the third resistor and the second resistor and the fourth resistor is equal to a product of a sum of resistances of the first resistor and the fourth resistor and the second resistor.

[0023] In some embodiments, the signal following circuit further comprises:

[0024] a fifth resistor, a first end of the fifth resistor being connected with an output end of the first operational amplifier, and a second end of the fifth resistor being connected with the input end of the signal amplification circuit; and / or

[0025] a first capacitor, a first end of the first capacitor being connected with the inverting input end of the first operational amplifier, and a second end of the first capacitor being connected with the input end of the signal amplification circuit.

[0026] In some embodiments, the signal amplification circuit comprises:

[0027] a second operational amplifier;

[0028] a sixth resistor, a first end of the sixth resistor being connected to an output end of the signal follower circuit, and a second end of the sixth resistor being connected to a non-inverting input end of the second operational amplifier;

[0029] a seventh resistor, a first end of the seventh resistor being connected to a ground end of the signal sampling system, and a second end of the seventh resistor being connected to an inverting input end of the second operational amplifier;

[0030] an eighth resistor, a first end of the eighth resistor being connected to the inverting input end of the second operational amplifier, and a second end of the eighth resistor being connected to an output end of the sampling circuit;

[0031] a ninth resistor, a first end of the ninth resistor being connected to the ground end of the signal sampling system, and a second end of the ninth resistor being connected to the second end of the sixth resistor,

[0032] wherein a ratio of a sum of resistances of the eighth resistor and the seventh resistor to a product of the ninth resistor is equal to an amplification ratio of the sampling circuit.

[0033] In some embodiments, the signal amplification circuit further comprises:

[0034] a second capacitor, a first end of the second capacitor being connected to the inverting input end of the second operational amplifier, and a second end of the second capacitor being connected to the output end of the sampling circuit; and / or

[0035] a tenth resistor, a first end of the tenth resistor being connected to an output end of the second operational amplifier, and a second end of the tenth resistor being connected to the output end of the sampling circuit.

[0036] In some embodiments, the controller is further configured to perform at least one of:

[0037] determining the preset condition according to a maximum value of the to-be-sampled signal;

[0038] triggering sampling of the to-be-sampled signal according to the preset period.

[0039] In some embodiments, the digital signal processor is further configured to:

[0040] convert the amplitude of the analog sampling signal into a digital quantity by converting the analog sampling signal generated by the plurality of sampling circuits into a digital sampling signal.

[0041] According to a second aspect of the present disclosure, an electronic device is provided, comprising the signal sampling system according to any embodiment of the present disclosure.

[0042] In some embodiments, the electronic device further comprises:

[0043] a motor and a motor driving unit;

[0044] a master control unit configured to control the motor through the motor driving unit according to a sampling result generated by the signal sampling system. According to a third aspect of the present disclosure, a signal sampling method is provided, comprising:

[0045] amplifying, by a plurality of sampling circuits, a to-be-sampled signal respectively at different ratios to generate analog sampling signals, wherein the to-be-sampled signal is a voltage analog signal or a current analog signal;

[0046] converting, by a digital signal processor, the analog sampling signals generated by the plurality of sampling circuits into digital sampling signals;

[0047] selecting, by a controller, at least one sampling circuit according to the digital sampling signals, and generating a sampling result according to the digital sampling signal corresponding to the selected sampling circuit.

[0048] In some embodiments, the amplifying, by a plurality of sampling circuits, a to-be-sampled signal respectively at different ratios to generate analog sampling signals comprises:

[0049] selecting the digital sampling signal corresponding to one of the plurality of sampling circuits as the sampling result when the digital sampling signal corresponding to the one of the plurality of sampling circuits meets a preset condition;

[0050] when none of the digital sampling signals corresponding to the plurality of sampling circuits meets the preset condition, selecting at least two of the digital sampling signals corresponding to the plurality of sampling circuits to be weighted, and taking the weighted result as the sampling result.

[0051] In some embodiments, the selecting the digital sampling signal corresponding to one of the plurality of sampling circuits as the sampling result when the digital sampling signal corresponding to the one of the plurality of sampling circuits meets a preset condition comprises: taking the digital sampling signal corresponding to a first sampling circuit as the sampling result when the digital sampling signal corresponding to the first sampling circuit is not greater than a first threshold; and taking the digital sampling signal corresponding to a second sampling circuit as the sampling result when the digital sampling signal corresponding to the second sampling circuit is not less than a second threshold, wherein the second threshold is greater than the first threshold.

[0052] The selecting at least two digital sampling signals from the plurality of digital sampling signals in the absence of a preset condition being met by a digital sampling signal corresponding to a single sampling circuit, and weighting the at least two digital sampling signals, and taking the weighted result as a sampling result, comprises: in a case where the digital sampling signal corresponding to the first sampling circuit is greater than a first threshold value and the digital sampling signal corresponding to the second sampling circuit is less than a second threshold value, weighting the digital sampling signals corresponding to the first sampling circuit and the second sampling circuit, and taking the weighted result as the sampling result.

[0053] In some embodiments, the signal sampling method further comprises at least one of the following:

[0054] Determining the preset condition according to a maximum value of the signal to be sampled;

[0055] Triggering sampling of the signal to be sampled according to a preset period.

[0056] In some embodiments, the converting, by the digital signal processor, the analog sampling signals generated by the plurality of sampling circuits into digital sampling signals comprises:

[0057] Converting an amplitude of the analog sampling signal into a digital quantity. BRIEF DESCRIPTION OF DRAWINGS

[0058] The accompanying drawings, which form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0059] The present disclosure can be more clearly understood and appreciated from the following detailed description, taken in conjunction with the following drawings of which:

[0060] Wherein:

[0061] Figure 1 A structural schematic diagram of a signal sampling system according to some embodiments of the present disclosure is shown;

[0062] Figure 2 A structural schematic diagram of a sampling circuit according to some embodiments of the present disclosure is shown;

[0063] Figure 3 A schematic diagram showing the principle of a controller according to some embodiments of the present disclosure is shown;

[0064] Figure 4 A structural schematic diagram of an electronic device according to some embodiments of the present disclosure is shown;

[0065] Figure 5 A flowchart of a signal sampling method according to some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0066] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. Note that the relative arrangement of the components and steps illustrated in these embodiments, numerical expressions, and numerical values are not limiting of the scope of the present disclosure unless otherwise specifically stated.

[0067] It should be understood, however, that the sizes of the various portions shown in the drawings are chosen primarily for convenience and clarity of presentation, and are not intended to limit the scope of the present disclosure.

[0068] The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the scope of the present disclosure, its application, or uses.

[0069] Techniques, methods, and apparatus known to those of ordinary skill in the relevant art can not be discussed in detail herein, but should be considered as part of the specification, where appropriate.

[0070] In all of the examples shown and discussed herein, any specific values should be interpreted as merely exemplary, and not as a limitation of the scope of the exemplary embodiments. Thus, other examples of the exemplary embodiments can have different values.

[0071] It should be noted that like reference numerals and letters refer to like items in the following drawings, and thus, once an item is defined in one drawing, it need not be discussed further in subsequent drawings.

[0072] In the related art, signal sampling is usually performed using a dedicated A / D sampling chip or using a DSP (Digital Signal Processor) chip. The dedicated A / D sampling chip is accurate but expensive, increasing the cost.

[0073] A DSP chip is less expensive and also provides an A / D sampling function, and is suitable for use in situations where the performance requirement is low. However, the sampling accuracy of the DSP chip is limited by the sampling range. In the case of sampling a rated load, the sampling accuracy of the DSP chip can be guaranteed. However, for a wider sampling range, the sampling accuracy of the DSP chip decreases. This results in a decrease in accuracy and a large deviation in operation when sampling a small load, which affects the control effect. For example, in the control of a variable frequency motor set, when the load is small, the current of the motor set is small, and the sampling deviation of the DSP is large, which affects the control effect of the motor, the harmonic content is large, and the power grid is seriously polluted. This makes the DSP chip unsuitable for situations where the sampling performance requirement is high (for example, a wide sampling range and accuracy are required).

[0074] The present disclosure provides a signal sampling scheme that can guarantee the sampling range and improve the sampling accuracy while reducing the cost.

[0075] Figure 1A structural schematic diagram of a signal sampling system 1 according to some embodiments of the present disclosure is shown, which includes a plurality of sampling circuits 11, a digital signal processor 12, and a controller 13.

[0076] As shown, the plurality of sampling circuits 11 are configured to amplify the to-be-sampled signals at different scales respectively to generate analog sampling signals. The to-be-sampled signals are voltage analog signals or current analog signals. Figure 1 For example, the sampling circuit 11 amplifies the to-be-sampled signal, so that when the to-be-sampled signal is small, the sampling system is also sensitive to signal changes, thereby ensuring sampling accuracy.

[0077] Each sampling circuit 11 can ensure that the sampling result is accurate when the to-be-sampled signal changes in a small range. The present disclosure sets multiple sampling circuits, and different sampling circuits have different amplification scales, thereby being suitable for to-be-sampled signals of different sizes. That is, different sampling circuits have different sampling ranges, realizing phased sampling of signals such as current or voltage, so that the sampling system including multiple sampling circuits has a larger sampling range.

[0078]

[0079] A structural schematic diagram of a sampling circuit 11 according to some embodiments of the present disclosure is shown. As shown, Figure 2 Figure 2 The sampling circuit 11 includes a signal following circuit 110 and a signal amplification circuit 111.

[0080] The signal following circuit 110 is configured to isolate the output circuit of the to-be-sampled signal and the signal amplification circuit.

[0081] The signal amplification circuit 111 is configured to amplify the output signal of the signal following circuit to generate an analog sampling signal.

[0082] First, the signal following circuit 110 is introduced. The signal gain of the signal following circuit is 1, and the input signal is equal to the output signal, so that the front and rear circuits of the signal following circuit do not affect each other. The signal following circuit can be a voltage following circuit.

[0083] In some embodiments, the signal following circuit 110 includes:

[0084] a first operational amplifier A1;

[0085] a first resistor R1, a first end of the first resistor R1 being connected with an input end of the signal following circuit 110, and a second end of the first resistor R1 being connected with a non-inverting input end of the first operational amplifier A1;

[0086] ​The second resistor R2 has its first end connected to the ground terminal of the signal sampling system and its second end connected to the inverting input terminal of the first operational amplifier A1.

[0087] The third resistor R3 has its first end connected to the inverting input terminal of the first operational amplifier A1, and its second end connected to the input terminal of the signal amplifier circuit 111.

[0088] The fourth resistor R4 has its first terminal connected to the ground terminal of the signal sampling system, and its second terminal connected to the second terminal of the first resistor R1.

[0089] Among them, the product of the sum of the resistance values ​​of the third resistor R3 and the second resistor R2 and the fourth resistor R4 is equal to the product of the sum of the resistance values ​​of the first resistor R1 and the fourth resistor R4 and the second resistor R2.

[0090] For example, by adjusting the resistance values ​​of the first to fourth resistors, the gain of the signal follower circuit can be made to be 1, for example, by setting R1 = R2 = R3 = R4.

[0091] like Figure 2 As shown, due to the virtual short principle of operational amplifiers, the relationship between the non-inverting input terminal V+ and the inverting input terminal V- of the first operational amplifier A1 is as follows:

[0092] V + =V -

[0093] Due to the principle of virtual disconnection, we should have:

[0094]

[0095]

[0096] Wherein, U1 is the voltage at the output terminal of the signal follower circuit (i.e., the input terminal of the signal amplifier circuit, the midpoint between resistors R5 and R6), and U is the voltage at the input terminal of the signal follower circuit (i.e., the first end of the first resistor R1).

[0097] We derive that:

[0098]

[0099] make:

[0100]

[0101] Then U and U1 are equal.

[0102] In some embodiments, the signal follower circuit further includes:

[0103] A fifth resistor R5, a first end of the fifth resistor R5 is connected with the output end of the first operational amplifier A1, and a second end of the fifth resistor R5 is connected with the input end of the signal amplification circuit; and / or

[0104] A first capacitor C1, a first end of the first capacitor C1 is connected with the inverting input end of the first operational amplifier A1, and a second end of the first capacitor C1 is connected with the input end of the signal amplification circuit.

[0105] For example, the fifth resistor R5 is a protective resistor, which prevents the current from being too large and protects the first operational amplifier. The first capacitor C1 is used to prevent oscillation and suppress high-frequency noise.

[0106] The next stage of the signal following circuit 110, i.e., the signal amplification circuit 111, will be introduced below.

[0107] In some embodiments, the signal amplification circuit 111 includes:

[0108] a second operational amplifier A2;

[0109] A sixth resistor R6, a first end of the sixth resistor R6 is connected with the output end of the signal following circuit 110, and a second end of the sixth resistor R6 is connected with the non-inverting input end of the second operational amplifier A2;

[0110] A seventh resistor R7, a first end of the seventh resistor R7 is connected with the ground end of the signal sampling system, and a second end of the seventh resistor R7 is connected with the inverting input end of the second operational amplifier A2;

[0111] An eighth resistor R8, a first end of the eighth resistor R8 is connected with the inverting input end of the second operational amplifier A2, and a second end of the eighth resistor R8 is connected with the output end of the sampling circuit 11;

[0112] A ninth resistor R9, a first end of the ninth resistor R9 is connected with the ground end of the signal sampling system, and a second end of the ninth resistor R9 is connected with the second end of the sixth resistor R6,

[0113] Wherein, the ratio of the sum of the resistance values of the eighth resistor R8 and the seventh resistor R7 to the product of the ninth resistor R9, and the ratio of the sum of the resistance values of the sixth resistor R6 and the ninth resistor R9 to the product of the seventh resistor R7, is equal to the amplification ratio of the sampling circuit 11.

[0114] Reference Figure 2 It can be obtained that:

[0115]

[0116] The derivation process and the signal follower circuit are similar, and will not be described here. Among them, U1 is the voltage of the input end of the signal follower circuit (that is, the output end of the signal amplification circuit), and U2 is the voltage of the output end of the signal follower circuit (that is, the output end of the entire sampling circuit). The amplification ratio of the signal sampling circuit.

[0117] In some embodiments, the signal amplification circuit 111 further comprises:

[0118] A second capacitor C2, a first end of the second capacitor C2 is connected with the inverting input end of the second operational amplifier A2, and a second end of the second capacitor C2 is connected with the output end of the sampling circuit 11; and / or

[0119] A tenth resistor R10, a first end of the tenth resistor R10 is connected with the output end of the second operational amplifier A2, and a second end of the tenth resistor R10 is connected with the output end of the sampling circuit 11.

[0120] For example, the tenth resistor R10 is a protective resistor to prevent excessive current and protect the second operational amplifier. The second capacitor C2 is used to prevent oscillation and suppress high-frequency noise.

[0121] The above describes the process of amplifying and sampling the voltage by the sampling circuit 11. Those skilled in the art can understand that if the current signal needs to be sampled, the current signal can be linearly converted into a voltage signal, and the current value is represented by the voltage value, so that the sampling system can read the size of the current signal.

[0122] The present disclosure uses the combination of operational amplifiers and resistors to form a signal amplification circuit, amplifies the signal to be sampled, so that the sampling system can be sensitive to signal changes when the signal to be sampled is small, and the sampling accuracy is guaranteed. By adjusting the resistance value of each signal amplification circuit, the amplification ratio of different signal amplification circuits can be adjusted, the sampling range of signals in small and large power situations is compatible, multi-channel sampling multiplexing is realized, the universality is improved, the development cost is reduced, and the capacity of the main board of the sampling system is adjusted.

[0123] The structure of the sampling circuit 11 is introduced above, and now returns to Figure 1 , introduce the digital signal processor 12.

[0124] The digital signal processor 12 is configured to convert the analog sampling signals generated by the plurality of sampling circuits 11 into digital sampling signals.

[0125] For example, the output of the sampling circuit is connected to the A / D conversion pin of the DSP to realize A / D conversion.

[0126] In some embodiments, the digital signal processor is further configured to convert the amplitudes of the analog sampling signals generated by the plurality of sampling circuits into digital quantities by converting the analog sampling signals into digital sampling signals.

[0127] For example, after A / D conversion, the amplitudes of the signals are represented in binary in the digital sampling signals.

[0128] The controller 13 in the system will be introduced below. Figure 1

[0129] The controller 13 is configured to select at least one sampling circuit 11 according to the digital sampling signals, and generate a sampling result according to the digital sampling signal corresponding to the selected sampling circuit 11.

[0130] In some embodiments, the controller 13 is further configured to:

[0131] When the digital sampling signal corresponding to one of the plurality of sampling circuits 11 meets a preset condition, the digital sampling signal corresponding to the sampling circuit 11 is selected as the sampling result;

[0132] The preset condition can be pre-set or calculated by the controller according to the signal to be sampled. For example, the preset condition can be that the amplitude value is within a specified range to ensure sampling accuracy.

[0133] For example, if the sampling circuit A meets the preset condition, the digital sampling signal generated by the sampling circuit A and the DSP is selected as the sampling result. If the sampling circuit B meets the preset condition, the digital sampling signal generated by the sampling circuit B and the DSP is selected as the sampling result.

[0134] In some embodiments, the controller is further configured to:

[0135] When there is no digital sampling signal corresponding to a single sampling circuit that meets the preset condition, at least two digital sampling signals corresponding to the plurality of sampling circuits are selected for weighting, and the weighted result is taken as the sampling result.

[0136] For example, when neither sampling circuit A nor B meets the preset condition, the sampling circuits A and B are weighted, and the weighted result is taken as the sampling result.

[0137] According to some embodiments of the present disclosure, the digital sampling signals corresponding to the plurality of sampling circuits are weighted and multiplexed, so that the sampling result is more accurate and the effectiveness of the sampling data is improved.

[0138] ​In some embodiments, the controller is further configured to determine the preset condition according to a maximum value of the signal to be sampled. For example, a suitable value range is determined according to the maximum value of the signal to be sampled, so as to determine the preset condition.

[0139] For example, in Figure 3 , the controller calls the main function to initialize. Taking the signal to be sampled as current as an example, the amplification ratio of the sampling circuit A is greater than that of the sampling circuit B, the first threshold value is I max *0.7, and the second threshold value is I max *0.9, wherein I max is a preset value, for example, the maximum value of the signal to be sampled.

[0140] Figure 3 A schematic diagram showing the principle of the controller according to some embodiments of the present disclosure.

[0141] As Figure 3 shown, the plurality of sampling circuits includes a first sampling circuit and a second sampling circuit. The amplification ratio of the first sampling circuit is greater than that of the second sampling circuit. In a case where the digital sampling signal corresponding to the first sampling circuit is not greater than the first threshold value, the digital sampling signal corresponding to the first sampling circuit is taken as the sampling result; in a case where the digital sampling signal corresponding to the second sampling circuit is not less than the second threshold value, the digital sampling signal corresponding to the second sampling circuit is taken as the sampling result, wherein the second threshold value is greater than the first threshold value.

[0142] In some embodiments, the controller is further configured to, in a case where the digital sampling signal corresponding to the first sampling circuit is greater than the first threshold value and the digital sampling signal corresponding to the second sampling circuit is less than the second threshold value, weight the digital sampling signals corresponding to the first sampling circuit and the second sampling circuit as the sampling result.

[0143] For example, it is judged whether the digital sampling result I1 corresponding to the sampling circuit A is not greater than I max *0.7. When the signal to be sampled is small, the digital sampling result corresponding to the sampling circuit A may not be greater than I max *0.7, and then the result I1 corresponding to the sampling circuit A is taken as the reference.

[0144] It is judged whether the digital sampling result I2 corresponding to the sampling circuit B is not less than I max *0.9. When the signal to be sampled is large, it is judged whether the digital sampling result corresponding to the sampling circuit B is not less than I max *0.9 after sampling, and then the result I2 corresponding to the sampling circuit B is taken as the reference.

[0145] In a case where neither of the above two conditions is met, the digital sampling signals corresponding to the sampling circuits A and B are weighted and processed as the sampling result for subsequent operation.

[0146] In some embodiments, the controller is further configured to trigger sampling of the to-be-sampled signal at a preset period. For example, the signal sampling is triggered periodically by using a timer.

[0147] So far, the signal sampling system according to some embodiments of the present disclosure has been described in detail.

[0148] The present disclosure replaces high-cost professional A / D sampling chips by the combination of multiple signal sampling circuits and low-cost DSP chips, samples signals such as current or voltage in stages, and realizes multiplexing of multiple sampling. While reducing the cost, the sampling range is ensured, the sampling accuracy is improved, and the system can accurately sample real-time signal values regardless of large or small signals (for example, heavy or light load of the unit), and the harmonic content is controlled, avoiding the problems of small sampling range and low sampling accuracy caused by using a DSP chip alone.

[0149] In addition, the sampled signals can be used for control of the motor unit. The present disclosure uses multiplexing sampling technology to improve sampling accuracy and ensure reliability. In the control process of the motor unit, especially in the variable frequency control process, the harmonic of the unit can be reduced, and the pollution to the power grid can be reduced.

[0150] The present disclosure also provides an electronic device comprising the signal sampling system 1 according to any embodiment of the present disclosure.

[0151] In some embodiments, the electronic device can be an air conditioner, a washing machine, a refrigerator, or the like.

[0152] Figure 4 A structural schematic diagram of an electronic device according to some embodiments of the present disclosure is shown. As shown in Figure 4 In addition to the signal sampling system 1, the electronic device also comprises a motor driving unit 2, a motor 3, and a main control unit 4.

[0153] The main control unit 4 is configured to control the motor 3 through the motor driving unit 2 according to the sampling result generated by the signal sampling system 1.

[0154] For example, the output signal of the motor 3 is sampled by the signal sampling system 1, and the sampling result is sent to the main control unit 4. The main control unit 4 controls the motor unit 3 through the motor driving unit 2 according to the digital signal obtained by sampling.

[0155] In some embodiments, the electronic device further comprises an external power supply 5 configured to supply power to the electronic device.

[0156] In some embodiments, the electronic device further comprises a voltage detection unit 6, a fault storage unit 7, and a display unit 8, and a temperature detection unit 9.

[0157] As shown in Figure 4 The voltage detection unit 6 is configured to detect the supply voltage (DC bus voltage) of the controller of the motor and provide the detection result to the main control unit. The display unit 8 (for example, a display panel) is configured to display various information of the electronic device. The temperature detection unit 9 is configured to detect the temperature of the units such as the motor and provide the detection result to the main control unit. The fault storage unit 7 is configured to store various fault information of the electronic device occurring during operation.

[0158] The electronic device of the present disclosure realizes multiplexing of multiple sampling by using a signal sampling system. While reducing the cost, the sampling range is ensured, the sampling precision is improved, and the real-time signal value can be more accurately sampled whether the motor unit is overloaded or underloaded. Therefore, when the motor unit is controlled, the signal value can be controlled according to the accurate signal value, the harmonic of the motor unit is reduced, and the pollution to the power grid is reduced.

[0159] Figure 5 A flowchart of a signal sampling method according to some embodiments of the present disclosure is shown. As shown in Figure 5 The signal sampling method includes steps S1-S3.

[0160] In step S1, the sampling circuit is used to amplify the to-be-sampled signal by different magnifications to generate analog sampling signals, wherein the to-be-sampled signal is a voltage analog signal or a current analog signal.

[0161] For example, the to-be-sampled signal is amplified by the sampling circuit, so that when the to-be-sampled signal is small, the sampling system is also sensitive to the signal change, thereby ensuring the sampling precision.

[0162] In step S2, the digital signal processor is used to convert the analog sampling signals generated by the multiple sampling circuits into digital sampling signals.

[0163] For example, the output of the sampling circuit is connected to the A / D conversion pin of the DSP to realize A / D conversion.

[0164] In some embodiments, the digital signal processor is used to convert the analog sampling signals generated by the multiple sampling circuits into digital sampling signals, including converting the amplitude of the analog sampling signal into a digital quantity.

[0165] For example, after A / D conversion, the amplitude of the signal is represented by binary in the digital sampling signal.

[0166] In step S3, the controller is used to select at least one sampling circuit according to the digital sampling signal, and generate a sampling result according to the digital sampling signal corresponding to the selected sampling circuit.

[0167] In some embodiments, the analog sampling signal is generated by multiple sampling circuits respectively amplifying the to-be-sampled signal at different scales, including: when the digital sampling signal corresponding to one of the multiple sampling circuits meets the preset condition, selecting the digital sampling signal corresponding to the sampling circuit as the sampling result; and when none of the digital sampling signals corresponding to the multiple sampling circuits meets the preset condition, selecting at least two of the digital sampling signals corresponding to the multiple sampling circuits to be weighted, and taking the weighted result as the sampling result.

[0168] Taking a system including two sampling circuits A and B as an example, if the sampling circuit A meets the preset condition, the digital sampling signal generated through the sampling circuit A and the DSP is selected as the sampling result. If the sampling circuit B meets the preset condition, the digital sampling signal generated through the sampling circuit B and the DSP is selected as the sampling result. In the case that neither of the sampling circuits A or B meets the preset condition, the sampling circuits A and B are weighted, and the weighted result is taken as the sampling result.

[0169] In some embodiments, when the digital sampling signal corresponding to one of the multiple sampling circuits meets the preset condition, the digital sampling signal corresponding to the sampling circuit is selected as the sampling result, including: in the case that the digital sampling signal corresponding to the first sampling circuit is not greater than a first threshold, the digital sampling signal corresponding to the first sampling circuit is taken as the sampling result; and in the case that the digital sampling signal corresponding to the second sampling circuit is not less than a second threshold, the digital sampling signal corresponding to the second sampling circuit is taken as the sampling result, wherein the second threshold is greater than the first threshold.

[0170] In some embodiments, when none of the digital sampling signals corresponding to the multiple sampling circuits meets the preset condition, at least two of the digital sampling signals corresponding to the multiple sampling circuits are selected to be weighted, and the weighted result is taken as the sampling result, including: in the case that the digital sampling signal corresponding to the first sampling circuit is greater than a first threshold and the digital sampling signal corresponding to the second sampling circuit is less than a second threshold, the digital sampling signals corresponding to the first sampling circuit and the second sampling circuit are weighted as the sampling result.

[0171] Please refer to Figure 3 , to determine whether the digital sampling result I1 corresponding to the sampling circuit A is not greater than I max *0.7. When the to-be-sampled signal is small, the digital sampling result corresponding to the sampling circuit A may be not greater than I max *0.7, and the result I1 corresponding to the sampling circuit A is taken as the reference.

[0172] To determine whether the digital sampling result I2 corresponding to the sampling circuit B is not less than I max*0.9. When the to-be-sampled signal is large, it is judged that the digital sampling result corresponding to the sampling circuit B is not less than I max *0.9, the result I2 corresponding to the sampling circuit B is used as the criterion.

[0173] When neither of the above two conditions is met, the results of the sampling circuits A and B are weighted and processed as the sampling result, and subsequent operations are performed.

[0174] In some embodiments, the signal sampling method further comprises: determining a preset condition according to the maximum value of the to-be-sampled signal. For example, a suitable value range is determined according to the maximum value of the to-be-sampled signal.

[0175] In some embodiments, the signal sampling method further comprises: triggering the sampling of the to-be-sampled signal according to a preset period. For example, a timer is used to periodically trigger signal sampling.

[0176] Here, various aspects of the present disclosure are described with reference to system, method and electronic device flowcharts and / or block diagrams according to embodiments of the present disclosure.

[0177] Through the signal sampling system, method and electronic device in the above embodiments, the signal sampling range is guaranteed and the signal sampling precision is improved while reducing the cost. Thus, the signal sampling system, method and electronic device according to the present disclosure have been described in detail. In order to avoid obscuring the concept of the present disclosure, some details known in the art are not described. Those skilled in the art can fully understand how to implement the technical solutions disclosed herein according to the above description.

Claims

1. A signal sampling system, comprising: a plurality of sampling circuits configured to amplify a to-be-sampled signal at different scales respectively to generate analog sampling signals, wherein the to-be-sampled signal is a voltage analog signal or a current analog signal; a digital signal processor configured to convert the analog sampling signals generated by the plurality of sampling circuits into digital sampling signals; a controller configured to select at least one sampling circuit according to the digital sampling signals and generate a sampling result according to the digital sampling signal corresponding to the selected sampling circuit, including: selecting the digital sampling signal corresponding to one sampling circuit in the plurality of sampling circuits as the sampling result when the digital sampling signal meets a preset condition; and selecting at least two digital sampling signals from the digital sampling signals corresponding to the plurality of sampling circuits to weight the selected digital sampling signals and taking the weighted result as the sampling result when none of the digital sampling signals corresponding to the individual sampling circuits meets the preset condition.

2. The signal sampling system of claim 1, wherein, The plurality of sampling circuits includes a first sampling circuit and a second sampling circuit, the amplification scale of the first sampling circuit is greater than that of the second sampling circuit, and the controller is further configured to: select the digital sampling signal corresponding to the first sampling circuit as the sampling result when the digital sampling signal is not greater than a first threshold value; select the digital sampling signal corresponding to the second sampling circuit as the sampling result when the digital sampling signal is not less than a second threshold value, wherein the second threshold value is greater than the first threshold value; and weight the digital sampling signals corresponding to the first sampling circuit and the second sampling circuit as the sampling result when the digital sampling signal corresponding to the first sampling circuit is greater than the first threshold value and the digital sampling signal corresponding to the second sampling circuit is less than the second threshold value.

3. The signal sampling system of claim 1, wherein, Each sampling circuit includes a signal follower circuit and a signal amplification circuit.

4. The signal sampling system of claim 3, wherein, The signal follower circuit includes: a first operational amplifier; a first resistor, a first end of the first resistor is connected to an input end of the signal follower circuit, and a second end of the first resistor is connected to a non-inverting input end of the first operational amplifier; a second resistor, a first end of the second resistor is connected to a ground end of the signal sampling system, and a second end of the second resistor is connected to an inverting input end of the first operational amplifier; a third resistor, a first end of the third resistor is connected to the inverting input end of the first operational amplifier, and a second end of the third resistor is connected to an input end of the signal amplification circuit; a fourth resistor, a first end of the fourth resistor is connected to the ground end of the signal sampling system, and a second end of the fourth resistor is connected to the second end of the first resistor, wherein a product of a sum of resistances of the third resistor and the second resistor and a resistance of the fourth resistor is equal to a product of a sum of resistances of the first resistor and the fourth resistor and a resistance of the second resistor.

5. The signal sampling system of claim 4, wherein, The signal follower circuit further includes: a fifth resistor, a first end of the fifth resistor is connected to an output end of the first operational amplifier, and a second end of the fifth resistor is connected to the input end of the signal amplification circuit; and / or a first capacitor, a first end of the first capacitor is connected to the inverting input end of the first operational amplifier, and a second end of the first capacitor is connected to the input end of the signal amplification circuit.

6. The signal sampling system of claim 3, wherein, The signal amplification circuit includes: a second operational amplifier; a sixth resistor, a first end of the sixth resistor being connected to the output end of the signal following circuit, and a second end of the sixth resistor being connected to the non-inverting input end of the second operational amplifier; a seventh resistor, a first end of the seventh resistor being connected to the ground end of the signal sampling system, and a second end of the seventh resistor being connected to the inverting input end of the second operational amplifier; an eighth resistor, a first end of the eighth resistor being connected to the inverting input end of the second operational amplifier, and a second end of the eighth resistor being connected to the output end of the sampling circuit; a ninth resistor, a first end of the ninth resistor being connected to the ground end of the signal sampling system, and a second end of the ninth resistor being connected to the second end of the sixth resistor, wherein a ratio of a product of a sum of resistance values of the eighth resistor and the seventh resistor and a resistance value of the ninth resistor, and a product of a sum of resistance values of the sixth resistor and the ninth resistor and a resistance value of the seventh resistor, is equal to an amplification ratio of the sampling circuit.

7. The signal sampling system of claim 6, wherein, The signal amplification circuit further comprises: a second capacitor, a first end of the second capacitor being connected to the inverting input end of the second operational amplifier, and a second end of the second capacitor being connected to the output end of the sampling circuit; and / or a tenth resistor, a first end of the tenth resistor being connected to the output end of the second operational amplifier, and a second end of the tenth resistor being connected to the output end of the sampling circuit.

8. The signal sampling system of claim 1, wherein, The controller is further configured to perform at least one of: determining a preset condition according to a maximum value of the to-be-sampled signal; triggering sampling of the to-be-sampled signal according to a preset period.

9. The signal sampling system of claim 1, wherein, The digital signal processor is further configured to: convert the amplitudes of the analog sampling signals into digital quantities by converting the analog sampling signals generated by the plurality of sampling circuits into digital sampling signals.

10. An electronic device comprising the signal sampling system according to any one of claims 1-9.

11. The electronic device according to claim 10, further comprising: a motor and a motor driving unit; a master control unit configured to control the motor through the motor driving unit according to a sampling result generated by the signal sampling system.

12. A signal sampling method comprising: amplifying a to-be-sampled signal by a plurality of sampling circuits respectively at different ratios to generate analog sampling signals, wherein the to-be-sampled signal is a voltage analog signal or a current analog signal; converting the analog sampling signals generated by the plurality of sampling circuits into digital sampling signals by a digital signal processor; selecting at least one sampling circuit according to the digital sampling signals by a controller, and generating a sampling result according to the digital sampling signal corresponding to the selected sampling circuit, including: selecting the digital sampling signal corresponding to a sampling circuit as the sampling result when the digital sampling signal corresponding to the sampling circuit meets a preset condition; selecting at least two digital sampling signals from the digital sampling signals corresponding to the plurality of sampling circuits for weighting when none of the digital sampling signals corresponding to the individual sampling circuits meets the preset condition, and taking the weighted result as the sampling result.

13. The method of sampling a signal according to claim 12, wherein, The digital sampling signal corresponding to one of the plurality of sampling circuits meets the preset condition, and the digital sampling signal corresponding to the sampling circuit is selected as the sampling result, including: in the case that the digital sampling signal corresponding to the first sampling circuit is not greater than the first threshold value, the digital sampling signal corresponding to the first sampling circuit is selected as the sampling result; in the case that the digital sampling signal corresponding to the second sampling circuit is not less than the second threshold value, the digital sampling signal corresponding to the second sampling circuit is selected as the sampling result, wherein the second threshold value is greater than the first threshold value; In the case that the digital sampling signal corresponding to only one of the plurality of sampling circuits meets the preset condition, at least two of the digital sampling signals corresponding to the plurality of sampling circuits are selected for weighting, and the weighted result is taken as the sampling result, including: in the case that the digital sampling signal corresponding to the first sampling circuit is greater than the first threshold value, and the digital sampling signal corresponding to the second sampling circuit is less than the second threshold value, the digital sampling signals corresponding to the first sampling circuit and the second sampling circuit are weighted as the sampling result.

14. The signal sampling method of claim 12, further comprising at least one of: determining the preset condition according to a maximum value of the signal to be sampled; triggering sampling of the signal to be sampled according to a preset period.

15. The method of sampling a signal according to claim 12, wherein, The plurality of sampling circuits generate analog sampling signals, and the analog sampling signals are converted into digital sampling signals by a digital signal processor, including: converting the amplitude of the analog sampling signal into a digital quantity. The plurality of sampling circuits generate analog sampling signals, and the analog sampling signals are converted into digital sampling signals by a digital signal processor, including: converting the amplitude of the analog sampling signal into a digital quantity.

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