A method and device for starting and upgrading online a plurality of C2000 DSPs

Abstract

The application discloses a plurality of C2000 DSP starting and online upgrading method and device, the plurality of C2000 DSP starting and online upgrading method includes: data reading step: the starting mode is set by starting mode configuration circuit, and the data content is read from the off-chip SPI FLASH program;Data content verification step: after verifying whether the data content meets the RAM program format requirement, the on-chip RAM format DSP program or the on-chip FLASH format DSP program is started according to the verification result;Program updating step: according to the protocol format, the data of the on-chip RAM format DSP program or the on-chip FLASH format DSP program is copied to the off-chip SPI FLASH program.The application solves the problems of fast execution of program in high real-time scene and running of all codes and data in RAM by increasing off-chip SPI FLASH.And the program storage and loading of multiple DSPs are realized under the condition of using only one SPI FLASH, and the compatible starting of RAM format and FLASH format programs is realized.

Description

Technical Field

[0001] This application relates to the field of digital signal processor application technology, and in particular to a method and apparatus for starting up and upgrading multiple C2000DSPs online. Background Technology

[0002] The C2000 DSP, a high-performance digital signal processor from TI, is widely used in industrial control. However, its application presents several inconveniences. Firstly, the typical development process for the C2000 DSP involves first allocating the code to RAM, debugging it with a simulator, and then modifying the command file to allocate the code to FLASH for final storage. Because the CPU's read / write speeds for RAM and FLASH differ significantly (the CPU accesses on-chip RAM faster than FLASH), programs executed in RAM run faster than those in FLASH. This results in a significant difference between the debugged program and the actual executed program. The root cause of this problem is that the C2000 DSP cannot directly store executable programs in RAM format. Secondly, C2000 DSP programs are generally stored in the on-chip FLASH memory. Program upgrades require either an emulator or a serial port tool provided by TI. Emulators, due to their specialized nature, complexity, and poor electromagnetic interference resistance, are generally not suitable for field operation. TI's official serial port tool requires modifying the DSP's boot mode and suffers from slow download speeds, unstable connections, and complex software parameter configuration. Thirdly, the C2000 DSP has more FLASH resources than SRAM resources. For example, the TMS320F28335 has 256K x 16 FLASH, while its SRAM is only 34K x 16. Some applications emphasize execution speed and require all code to be executed in RAM, while others require larger code storage space and can only execute code in FLASH. However, these two approaches are incompatible. Summary of the Invention

[0003] This application provides a method and apparatus for starting up and upgrading multiple C2000 DSPs online, which at least solves the problems of C2000 DSPs being unable to directly embed executable programs in RAM format, low and complex program upgrade efficiency, and incompatibility between RAM format and FLASH format programs.

[0004] This invention provides a method for starting up and upgrading multiple C2000 DSPs online, including:

[0005] Data reading steps: Set the boot mode through the boot mode configuration circuit and read the data content from the external SPI FLASH program;

[0006] Data content verification steps: After verifying whether the data content meets the RAM program format requirements, start the on-chip RAM format DSP program or the on-chip FLASH format DSP program according to the verification result;

[0007] Program update steps: According to the protocol format, transfer the data of the on-chip RAM format DSP program or the on-chip FLASH format DSP program to the off-chip SPI FLASH program.

[0008] The aforementioned C2000 DSP startup and online upgrade methods include startup modes such as external SPI FLASH startup mode and internal FLASH startup mode.

[0009] The aforementioned methods for starting up and upgrading the C2000 DSP online include, in which the data reading step includes:

[0010] Enter the external SPI FLASH boot mode and run the BOOT program to read the data content from the external SPI FLASH program.

[0011] The aforementioned methods for starting up and upgrading the C2000 DSP online include, among which, the data content verification step includes:

[0012] If the verification result indicates that the data content conforms to the RAM program format requirements, then the data content is copied to the on-chip RAM format DSP program, and the on-chip RAM format DSP program is started.

[0013] After the on-chip RAM format DSP program starts, a start signal is sent.

[0014] The next DSP program is started based on the start signal.

[0015] The aforementioned methods for starting up and upgrading the C2000 DSP online include, in which the data content verification step further includes:

[0016] If the verification result indicates that the data content does not meet the RAM program format requirements, then exit the external SPI FLASH boot mode and enter the internal FLASH boot mode;

[0017] Start the secondary boot program from the on-chip FLASH format DSP program;

[0018] The secondary boot program reads the DSP address through the DSP address configuration circuit.

[0019] The aforementioned methods for starting up and upgrading the C2000 DSP online include, in which the data content verification step further includes:

[0020] Determine whether the on-chip FLASH format DSP program needs to be updated based on the DSP address;

[0021] If the determination result indicates that the on-chip FLASH format DSP program needs to be updated, the secondary boot program reads the off-chip SPI FLASH program data corresponding to the DSP address and calls the on-chip FLASH API.

[0022] After copying the external SPI FLASH program data to the on-chip FLASH format DSP program via the on-chip FLASH API, the on-chip FLASH format DSP program is started.

[0023] The aforementioned methods for starting up and upgrading the C2000 DSP online include, in which the data content verification step further includes:

[0024] After the on-chip FLASH format DSP program starts, it sends the start signal;

[0025] The next DSP program is started according to the start signal.

[0026] This invention also provides a plurality of C2000 DSP startup and online upgrade devices, wherein the plurality of C2000 DSP startup and online upgrade methods described above are applicable, and the plurality of C2000 DSP startup and online upgrade devices include:

[0027] Data reading module: The startup mode is set through the startup mode configuration circuit, and data content is read from the external SPI FLASH program;

[0028] Data content verification module: After verifying whether the data content conforms to the RAM program format requirements, it starts the on-chip RAM format DSP program or the on-chip FLASH format DSP program according to the verification result;

[0029] Program update module: According to the protocol format, the data of the on-chip RAM format DSP program or the on-chip FLASH format DSP program is transferred to the off-chip SPI FLASH program.

[0030] The data reading module of the aforementioned C2000 DSP startup and online upgrade systems further includes:

[0031] An external SPI FLASH chip is connected to the DSP via the SPI bus.

[0032] The aforementioned C2000 DSP startup and online upgrade devices, wherein the data content verification module further includes:

[0033] The DSP is connected to the MCU via GPIO. After reading data from the external SPI FLASH chip, it verifies whether the data content conforms to the RAM program format requirements. Based on the verification result, it starts the on-chip RAM format DSP program or the on-chip FLASH format DSP program.

[0034] The MCU is connected to the external SPI FLASH chip via the SPI bus and to the DSP reset pin RST via the GPIO. After the DSP program in the on-chip RAM format or the DSP program in the on-chip FLASH format is started, the MCU releases the SPI bus and sends a start signal to the MCU via the GPIO.

[0035] According to the start signal, the MCU releases the next DSP reset pin RST, the next DSP exits the reset state, and the MCU controls other DSPs to continue to maintain the reset state.

[0036] Compared to related technologies, this invention proposes a method and apparatus for booting and online upgrading multiple C2000 DSPs. By adding an external SPI FLASH, it achieves the embedding of RAM format programs for the C2000 series DSPs, while simultaneously ensuring complete consistency between the simulation debugging program and the final product program. Through the development of a secondary BootLoader program, it enables the loading and execution of FLASH format programs for multiple C2000 series DSPs. It achieves compatible booting of RAM and FLASH format programs without changing the hardware or software configuration. Remote online program upgrades are achieved through a WIFI module.

[0037] Details of one or more embodiments of this application are set forth in the following drawings and description to make other features, objects and advantages of this application more readily apparent. Attached Figure Description

[0038] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0039] Figure 1 This is a flowchart of several C2000 DSP startup and online upgrade methods according to embodiments of this application;

[0040] Figure 2 This is a flowchart illustrating the startup process of multiple C2000 DSPs according to embodiments of this application;

[0041] Figure 3 This is a structural diagram of the off-chip SPI FLASH according to an embodiment of this application;

[0042] Figure 4 This is a DSP on-chip FLASH structure diagram according to an embodiment of this application;

[0043] Figure 5 This is a structural diagram of multiple C2000 DSP startup and online upgrade devices according to embodiments of this application;

[0044] Figure 6 This is a structural diagram of multiple C2000 DSP startup and online upgrade devices according to embodiments of this application. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of this application clearer, the application is described and illustrated below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. All other embodiments obtained by those skilled in the art based on the embodiments provided in this application without inventive effort are within the scope of protection of this application.

[0046] Obviously, the accompanying drawings described below are merely some examples or embodiments of this application. Those skilled in the art can apply this application to other similar scenarios based on these drawings without any inventive effort. Furthermore, it is understood that although the efforts made in this development process may be complex and lengthy, for those skilled in the art related to the disclosure of this application, any changes to design, manufacturing, or production based on the technical content disclosed in this application are merely conventional technical means and should not be construed as insufficient disclosure of this application.

[0047] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment that is mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments without conflict.

[0048] Unless otherwise defined, the technical or scientific terms used in this application shall have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms “a,” “an,” “an,” “the,” and similar words used in this application do not indicate quantity limitation and may indicate singular or plural. The terms “comprising,” “including,” “having,” and any variations thereof used in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units not listed, or may include other steps or units inherent to these processes, methods, products, or devices. The terms “connected,” “linked,” “coupled,” and similar words used in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Multiple” used in this application refers to two or more. “And / or” describes the relationship between related objects, indicating that three relationships may exist; for example, “A and / or B” can represent: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following objects are in an "or" relationship. The terms "first," "second," and "third" used in this application are merely to distinguish similar objects and do not represent a specific ordering of the objects.

[0049] This invention provides a method and apparatus for starting up and upgrading multiple C2000 DSPs online, which solves the problems of C2000 DSPs being unable to directly embed executable programs in RAM format, low program upgrade efficiency and high complexity, and incompatibility between RAM format and FLASH format programs.

[0050] The present invention will now be described with reference to specific embodiments.

[0051] Example 1

[0052] This embodiment also provides a method for starting up and online upgrading multiple C2000 DSPs. Please refer to... Figures 1 to 4 , Figure 1 This is a flowchart of several C2000 DSP startup and online upgrade methods according to embodiments of this application; Figure 2 This is a flowchart illustrating the startup process of multiple C2000 DSPs according to embodiments of this application; Figure 3 This is a structural diagram of the off-chip SPI FLASH according to an embodiment of this application; Figure 4 This is a DSP on-chip FLASH structure diagram according to an embodiment of this application. For example... Figures 1 to 4 As shown, several methods for starting up and online upgrading the C2000 DSP include:

[0053] Data reading step S1: Set the startup mode through the startup mode configuration circuit and read the data content from the external SPI FLASH program;

[0054] Data content verification step S2: After verifying whether the data content meets the RAM program format requirements, start the on-chip RAM format DSP program or the on-chip FLASH format DSP program according to the verification result.

[0055] Program update step S3: According to the protocol format, transfer the data of the on-chip RAM format DSP program or the on-chip FLASH format DSP program to the off-chip SPI FLASH program.

[0056] In the embodiments, the boot modes include off-chip SPI FLASH boot mode and on-chip FLASH boot mode.

[0057] In this embodiment, the data reading step S1 includes:

[0058] Enter the external SPI FLASH boot mode and run the BOOT program to read the data content from the external SPI FLASH program.

[0059] In practice, after multiple C2000 DSPs are powered on and the online upgrade system is powered on, the MCU releases the SPI bus and pulls the RST pin of DSPs other than DSP1 low through GPIO, so that DSPs other than DSP1 enter the reset state; after the RST reset pin of DSP1 is released and exits the reset state, DSP1 runs the BOOT program built into the ROM, which loads data from the "0 address" of the external SPI FLASH chip by default.

[0060] When the RST pin of a DSP is pulled low, the DSP is in a reset state, which releases the DSP's SPI bus. Since multiple DSPs are connected to the same SPI FLASH, if multiple DSPs start up at the same time, they will compete for control of the SPI bus. Therefore, pulling the RST reset pin of DSPs other than DSP1 low allows DSP1 to be directly connected to the SPI FLASH and not affected by the SPI bus of other DSPs.

[0061] In this embodiment, the data content verification step S2 includes:

[0062] If the verification result shows that the data content meets the RAM program format requirements, then copy the data content to the on-chip RAM format DSP program and start the on-chip RAM format DSP program.

[0063] After the on-chip RAM format DSP program starts, a start signal is sent.

[0064] The next DSP program starts based on the aforementioned start signal;

[0065] If the verification result indicates that the data content does not meet the RAM program format requirements, then exit the external SPI FLASH boot mode and enter the internal FLASH boot mode.

[0066] Start the secondary boot program from the on-chip FLASH format DSP program;

[0067] The secondary boot program reads the DSP address through the DSP address configuration circuit;

[0068] Determine whether the on-chip FLASH format DSP program needs to be updated based on the DSP address;

[0069] If the determination result indicates that the on-chip FLASH format DSP program needs to be updated, the secondary boot program reads the external SPI FLASH program data corresponding to the DSP address and calls the on-chip FLASH API;

[0070] After copying the external SPI FLASH program data to the on-chip FLASH format DSP program via the on-chip FLASH API, the on-chip FLASH format DSP program is started.

[0071] After the on-chip FLASH format DSP program starts, it sends the start signal;

[0072] The next DSP program is started according to the start signal.

[0073] In specific implementation, if the verification result shows that the data content conforms to the RAM program format requirements, the data content is copied to the on-chip RAM format DSP program, and then the on-chip RAM format DSP program is started. After starting, the on-chip RAM format DSP program sends a start signal. Specifically, after DSP1 loads the SPI FLASH data, it verifies whether the data content conforms to the RAM program format requirements. If the verification result shows that the data content conforms to the RAM program format requirements, the data is copied from the SPI FLASH to the on-chip RAM format DSP1 program, and the program is run directly after loading. After the program starts, the SPI bus connected to the SPI FLASH is released first, and DSP1 sends a start signal to the MCU through the GPIO connected to the MCU. This realizes the startup and loading of the RAM format DSP1 program.

[0074] The next DSP program starts according to the start signal; specifically, after the MCU receives the start signal, it releases the reset pin RST of the next DSP and keeps the RST signals of other DSPs low, except for the already started DSP1. This is because the active release of the SPI bus by the started DSP1 will not affect the SPI bus of subsequent DSPs. The next DSP first starts from the external FLASH, and then... Figure 2 The steps shown are followed to start the process; the above technical solution enables the storage and loading of programs for multiple DSPs using only one SPI FLASH chip.

[0075] If the verification result indicates that the data content does not meet the RAM program format requirements, the system exits the external SPI FLASH boot mode and enters the internal FLASH boot mode. After starting the secondary boot program from the internal FLASH format DSP program, the secondary boot program reads the DSP address through the DSP address configuration circuit. Specifically, if the verification result indicates that the data content does not meet the RAM program format requirements, the system exits the external SPI FLASH boot mode and enters the internal FLASH boot mode. The system defaults to loading the program from address "0" of the DSP1 internal FLASH, and this address "0" location stores the user-designed secondary boot program. This secondary boot program reads the DSP1 address through the address configuration circuit.

[0076] The system determines whether the on-chip FLASH DSP program needs updating based on the DSP address. If the result indicates that the on-chip FLASH DSP program needs updating, the secondary boot program reads the external SPI FLASH program data corresponding to the DSP address and calls the on-chip FLASH API. After copying the external SPI FLASH program data to the on-chip FLASH DSP program via the on-chip FLASH API, the on-chip FLASH DSP program is started, sending a start signal. Specifically, after obtaining the address, the secondary boot program reads the corresponding program storage space in the external SPI FLASH based on the address. For example, if the DSP address is n, it reads the contents of SPI FLASH segment n. First, it reads the flag bit of the last address in that segment. If the flag bit is '1', it indicates that a new program needs to be loaded externally. At this point, all data in the external SPI FLASH segment is copied to the "UserProgram" area of ​​the on-chip FLASH. After the data copying is complete, the secondary boot program clears the flag bit of the last address in the SPI FLASH segment, thus completing the program update. If the external SPI... If the FLASH flag is "0", the program in the external SPI FLASH will not be copied, and the program will jump directly to the "UserProgram" area on the chip to start the FLASH format DSP1 program. After the FLASH format DSP program starts, the SPI bus connected to the SPI FLASH will be released first, and the DSP1 will send a start signal to the MCU through another GPIO connected to the MCU.

[0077] The next DSP program exits the reset state based on the start signal, while other DSPs remain in the reset state. Specifically, after receiving the start signal, the MCU releases the RST reset pin of the next DSP and keeps the RST reset pins of the other DSPs low, except for the already started DSP1. This is because the active release of the SPI bus by the started DSP1 will not affect the SPI bus of subsequent DSPs. The next DSP first boots from the external FLASH, and then... Figure 2 The steps shown are followed to start the process, thus enabling the storage and loading of programs for multiple DSPs using only one SPIFLASH chip.

[0078] Example 2

[0079] This embodiment also provides a multi-C2000 DSP startup and online upgrade device. Figure 5 This is a structural diagram of multiple C2000 DSP startup and online upgrade devices according to embodiments of this application; Figure 6 This is a structural diagram of multiple C2000DSP startup and online upgrade devices according to embodiments of this application. Figures 5 to 6 As shown, the C2000 DSP startup and online upgrade device of the invention is applicable to the above-mentioned multiple C2000 DSP startup and online upgrade methods. The multiple C2000 DSP startup and online upgrade device includes:

[0080] Data reading module 51: Sets the startup mode through the startup mode configuration circuit and reads data content from the external SPI FLASH program;

[0081] Data content verification module 52: After verifying whether the data content conforms to the RAM program format requirements, it starts the on-chip RAM format DSP program or the on-chip FLASH format DSP program according to the verification result;

[0082] Program update module 53: According to the protocol format, transfer the data of the on-chip RAM format DSP program or the on-chip FLASH format DSP program to the off-chip SPI FLASH program.

[0083] In this embodiment, the data reading module 51 further includes:

[0084] An external SPI FLASH chip is connected to the DSP via the SPI bus.

[0085] In this embodiment, the data content verification module 52 further includes:

[0086] The DSP connects to the MCU via GPIO. After reading data from the external SPI FLASH chip, it verifies whether the data content conforms to the RAM program format requirements. Based on the verification result, it starts the on-chip RAM format DSP program or the on-chip FLASH format DSP program.

[0087] The MCU is connected to the external SPI FLASH chip via the SPI bus and is connected to the DSP reset pin RST via GPIO. After the DSP program in on-chip RAM format or on-chip FLASH format is started, the MCU releases the SPI bus and sends a start signal to the MCU via GPIO.

[0088] Based on the start signal, the MCU releases the RST pin of the next DSP, and the next DSP exits the reset state. The MCU then controls the other DSPs to continue to maintain the reset state.

[0089] In this embodiment, the program update module 53 further includes:

[0090] A WIFI device, connected to the MCU, transmits data of the on-chip RAM format DSP program or the on-chip FLASH format DSP program to the MCU according to the protocol format.

[0091] In this embodiment, the multiple C2000 DSP startup and online upgrade devices also include:

[0092] The startup mode configuration module is connected to the DSP, and the startup mode is set through the startup mode configuration module;

[0093] The DSP address configuration module is connected to the DSP and reads the DSP address.

[0094] Example 3

[0095] This embodiment also provides multiple C2000 DSP startup process steps. Figure 2 These are flowcharts illustrating the startup process of multiple C2000 DSPs according to embodiments of this application. Figure 2 As shown, the startup process steps for multiple C2000 DSPs are as follows:

[0096] Step 1: DSP1 reads data from the external SPI FLASH program;

[0097] Step 2: Verify whether the data content conforms to the RAM program format requirements. If the data content conforms to the RAM program format requirements, proceed to Step 3. If the data content does not conform to the RAM program format requirements, skip to Step 4 and proceed to Step 4.

[0098] Step 3: After copying the data content to the DSP1 program in on-chip RAM format, start the DSP1 program in on-chip RAM format. After starting, determine whether DSP1 is the last DSP. If not, the DSP1 program in on-chip RAM format sends a start signal. DSP2 exits the reset state according to the start signal and returns to Step 1. Execution starts from Step 1 in sequence. If DSP1 is the last DSP, the process ends.

[0099] Step 4: Exit the external SPI FLASH boot mode and enter the internal FLASH boot mode. Start the secondary boot program from the internal FLASH format DSP1 program. The secondary boot program reads the DSP1 address and determines whether the internal FLASH format DSP1 program needs to be updated based on the DSP1 address.

[0100] If an update is required, the secondary boot program reads the external SPI FLASH program data corresponding to the DSP1 address and calls the on-chip FLASH API. After copying the external SPI FLASH program data to the on-chip FLASH format DSP1 program through the on-chip FLASH API, the on-chip FLASH format DSP1 program is started. After starting, it is determined whether DSP1 is the last DSP. If not, the on-chip FLASH format DSP1 program sends a start signal. DSP2 exits the reset state according to the start signal and returns to step 1. The program is executed sequentially starting from step 1. If DSP1 is the last DSP, the process ends.

[0101] If no update is required, directly start the on-chip FLASH format DSP1 program. After starting, determine whether DSP1 is the last DSP. If not, the on-chip FLASH format DSP1 program sends a start signal. DSP2 exits the reset state according to the start signal and returns to step 1. Execute sequentially from step 1. If DSP1 is the last DSP, the process ends.

[0102] In summary, this invention provides a method and apparatus for booting and online upgrading multiple C2000 DSPs. By adding an external SPI FLASH, it achieves RAM-format program embedding for the C2000 series DSPs, solving the challenges of rapid program execution and running all code and data in RAM under high real-time scenarios. Furthermore, it ensures complete consistency between the simulation debugging program and the final product program. Simultaneously, by developing a secondary BootLoader program, it enables the loading and execution of FLASH-format programs for multiple C2000 series DSPs, and achieves program storage and loading for multiple DSPs using only a single SPI FLASH. Compatible booting with both RAM and FLASH formats eliminates the need for users to worry about program formats, achieving compatibility with different program formats for different application scenarios. Finally, remote online program upgrades are achieved through a WIFI module, resolving the issues of DSP program instability and the inability to perform remote upgrades.

[0103] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the scope of the appended claims.

Claims

1. A method for starting up and online upgrading multiple C2000 DSPs, characterized in that, The multiple C2000 DSP startup and online upgrade methods include: Data reading steps: Set the boot mode through the boot mode configuration circuit and read the data content from the external SPI FLASH program; Data content verification steps: After verifying whether the data content meets the RAM program format requirements, start the on-chip RAM format DSP program or the on-chip FLASH format DSP program according to the verification result; Program update steps: According to the protocol format, transfer the data of the on-chip RAM format DSP program or the on-chip FLASH format DSP program to the off-chip SPI FLASH program.

2. The method for starting and online upgrading multiple C2000 DSPs according to claim 1, characterized in that, The boot modes include external SPI FLASH boot mode and internal FLASH boot mode.

3. The method for starting and online upgrading multiple C2000 DSPs according to claim 2, characterized in that, The data reading steps include: Enter the external SPI FLASH boot mode and run the BOOT program to read the data content from the external SPI FLASH program.

4. The method for starting and online upgrading multiple C2000 DSPs according to claim 2, characterized in that, The data content verification steps include: If the verification result indicates that the data content conforms to the RAM program format requirements, then the data content is copied to the on-chip RAM format DSP program, and the on-chip RAM format DSP program is started. After the on-chip RAM format DSP program starts, it sends a start signal; The next DSP program starts based on the start signal.

5. The method for starting and online upgrading multiple C2000 DSPs according to claim 2, characterized in that, The data content verification step also includes: If the verification result indicates that the data content does not meet the RAM program format requirements, then exit the external SPI FLASH boot mode and enter the internal FLASH boot mode. Start the secondary boot program from the on-chip FLASH format DSP program; The secondary boot program reads the DSP address through the DSP address configuration circuit.

6. The method for starting and online upgrading multiple C2000 DSPs according to claim 5, characterized in that, The data content verification step also includes: Determine whether the on-chip FLASH format DSP program needs to be updated based on the DSP address; If the determination result indicates that the on-chip FLASH format DSP program needs to be updated, the secondary boot program reads the off-chip SPI FLASH program data corresponding to the DSP address and calls the on-chip FLASH API. After copying the external SPI FLASH program data to the on-chip FLASH format DSP program via the on-chip FLASH API, the on-chip FLASH format DSP program is started.

7. A device for starting and online upgrading multiple C2000 DSPs, characterized in that, The multiple C2000 DSP startup and online upgrade devices include: Data reading module: The startup mode is set through the startup mode configuration circuit, and data content is read from the external SPI FLASH program; Data content verification module: After verifying whether the data content conforms to the RAM program format requirements, it starts the on-chip RAM format DSP program or the on-chip FLASH format DSP program according to the verification result; Program update module: According to the protocol format, the data of the on-chip RAM format DSP program or the on-chip FLASH format DSP program is transferred to the off-chip SPI FLASH program.

8. The plurality of C2000 DSP startup and online upgrade devices according to claim 7, characterized in that, The data reading module also includes: An external SPI FLASH chip is connected to the DSP via the SPI bus.

9. The plurality of C2000 DSP startup and online upgrade devices according to claim 8, characterized in that, The data content verification module also includes: The DSP is connected to the MCU via GPIO. After reading data from the external SPI FLASH chip, it verifies whether the data content conforms to the RAM program format requirements. Based on the verification result, it starts the on-chip RAM format DSP program or the on-chip FLASH format DSP program. The MCU is connected to the external SPI FLASH chip via the SPI bus and to the DSP reset pin RST via the GPIO. After the DSP program in the on-chip RAM format or the DSP program in the on-chip FLASH format is started, the MCU releases the SPI bus and sends a start signal to the MCU via the GPIO. According to the start signal, the MCU releases the next DSP reset pin RST, the next DSP exits the reset state, and the MCU controls other DSPs to continue to maintain the reset state.

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