Architecture and method for early server light up display

Abstract

The application belongs to the technical field of server display, and specifically provides a server early lighting display architecture and method, the architecture comprising a CPU, a BIOS chip, a BMC chip and a power supply module; the CPU is connected with the BIOS chip, and is used for controlling the CPU by writing code into the BIOS chip; the CPU is connected with the BMC chip; the BMC chip is used for directly connecting to an external display and / or connecting to a remote virtual desktop through a network to realize local and remote virtual display functions of a server system; the power supply module is connected with the CPU and the BMC chip respectively; and the power supply module is used for sending a power supply completion signal to the CPU and the BMC chip. The server user can intuitively and quickly know the state of the server, the usability and maintainability of the server are improved, and the method is less limited by platforms.

Description

Technical Field

[0001] This invention relates to the field of server display technology, and more specifically to an architecture and method for early-stage display activation on a server. Background Technology

[0002] Server display solutions typically reside on the BMC (Browser Control Center). Display signals are only transmitted to the BMC via the hardware channels between the CPU and the BMC after the BIOS completes its low-level initialization and reaches the display module. The BMC then synchronously transmits the signals to both the local display interface and the remote display operation interface. Intel CPU platform products generally have an I / O integrated chip called the PCH (Power Chip Center). Both the BMC and BIOS are connected to the PCH, which in turn is connected to the CPU. During BIOS startup, it gains display control as soon as the PCH starts up, so display signal transmission can usually be completed within 10 seconds of booting. Many other CPU platforms, such as AMD, Phytium, Hygon, Loongson, and Ampere, have their BMC and BIOS directly connected to the CPU. Therefore, they cannot gain output control and output signals before the CPU's low-level hardware is fully initialized. Furthermore, the BMC's display information comes entirely from the CPU; the BMC does not perform any display control and only displays the information after the CPU transmits it.

[0003] Aside from Intel platforms, which can achieve early display due to their architecture, many other platforms cannot meet the requirement of early output display. Users often wait several minutes or even more than ten minutes before discovering that the machine has failed to start. Some manufacturers omit the initialization process to achieve fast display, which introduces instability to the server. Others try to compress the initialization process, but with improved configurations, the expected early display effect is not achieved. Summary of the Invention

[0004] Except for Intel platforms, which can achieve early display due to their architecture, many other platforms cannot meet the requirement of early output display. Users often wait several minutes or even more than ten minutes before discovering that the machine has failed to start. Some manufacturers omit the initialization process to achieve fast display, which introduces instability to the server. Others try to compress the initialization process, but with improved configurations, the expected early display effect is not achieved. This invention provides an architecture and method for early display on a server.

[0005] In a first aspect, the technical solution of the present invention provides an architecture for early-stage display illumination of a server, including a CPU, a BIOS chip, a BMC chip, and a power supply module;

[0006] The CPU is connected to the BIOS chip, which is used to control the CPU by writing code into the BIOS chip.

[0007] The CPU is connected to the BMC chip;

[0008] The BMC chip is used to connect directly to an external monitor and / or connect via a network to a remote virtual desktop to enable local and remote virtual display functions for the server system.

[0009] The power supply modules are connected to the CPU and BMC chips respectively;

[0010] The power supply module is used to send a power supply completion signal to the CPU and BMC chip.

[0011] Preferably, the CPU is connected to the BIOS chip via the SPI bus;

[0012] The CPU is connected to the BMC chip via the PCIe bus.

[0013] Preferably, the BMC chip is equipped with a BMC management system and a display controller that communicates with the BMC management system;

[0014] The BMC management system controls the BMC output display through the display controller.

[0015] Preferably, the CPU transmits video signals to the display controller inside the BMC chip via the PCIe bus, and the display controller controls the output to an external monitor and / or outputs to a remote virtual desktop via a network for display.

[0016] Preferably, after the power supply module is powered on, it sends a power-on completion signal to the CPU and BMC chip;

[0017] After receiving the power-on completion signal, the CPU runs the initialization program.

[0018] After receiving the power-on completion signal, the BMC chip will switch the display information source to BMC control and display the BIOS startup prompts on the display interface.

[0019] Preferably, the CPU is also used to send a first-stage initialization completion signal to the BMC chip after the first stage of the initialization program has finished running;

[0020] After receiving the first-stage initialization completion signal, the BMC chip outputs the BIOS initialization stage status.

[0021] Preferably, when the CPU runs the initialization program and the BIOS initializes to the stage of controlling the display output, it sends a second-stage initialization completion signal to the BMC chip to notify the BMC chip to switch the display information source channel.

[0022] Preferably, after receiving the second-stage initialization completion signal, the BMC chip switches the display source channel to the CPU to complete the early lighting display.

[0023] A typical CPU connects to the BIOS chip via the SPI bus. The BIOS can be considered a storage chip, storing the code needed to run the Basic Input / Output System (BIO), also known as the BIO control system. It can control the CPU's GPIO and channels by writing code, including whether to output display signals and the output channels. Additionally, the CPU connects to the BMC chip via the PCIe bus for communication. Server CPUs generally do not integrate a display controller, as servers do not have the same display requirements as PCs or laptops and do not require remote virtual display functionality. Therefore, server display solutions typically rely on the BMC's display module to achieve local and remote virtual display functions. Besides the CPU, BIOS, BMC, and the connected buses, the architecture also includes control signals. For example, the power-on completion signal is issued by the server's power supply module and simultaneously transmitted to the CPU and BMC, notifying them that power-on is complete and the BIOS and other functions can be started. Phase 1 and Phase 2 initialization completion signals indicate the BIOS startup phase and can be implemented by BIOS programming.

[0024] Secondly, the present invention also provides a method for early server activation display, based on the architecture of early server activation display described in the first aspect, the method comprising the following steps:

[0025] Step 1: After the power supply module is powered on, it sends a power-on completion signal to the CPU and BMC chip;

[0026] Step 2: After receiving the power-on completion signal, the CPU runs the initialization program; after the first stage of the initialization program is completed, the CPU sends the first stage initialization completion signal to the BMC chip;

[0027] Step 3: After receiving the power-on completion signal, the BMC chip will switch the display information source to BMC control;

[0028] Step 4: After receiving the first-stage initialization completion signal, the BMC chip outputs and displays the BIOS initialization status information;

[0029] Step 5: When the initialization program reaches the stage of controlling the display output, the CPU sends a second-stage initialization completion signal to the BMC chip to notify the BMC chip to switch the display information source channel;

[0030] Step 6: After receiving the second-stage initialization completion signal, the BMC chip switches the display source channel to the CPU to complete the early display lighting function.

[0031] Preferably, the method further includes:

[0032] The CPU transmits video signals to the display controller inside the BMC chip via the PCIe bus. The display controller then controls the output to an external monitor and / or to a remote virtual desktop via a network for display.

[0033] As can be seen from the above technical solutions, the present invention has the following advantages: it allows server users to intuitively and quickly obtain information about the server's status, improves the server's usability and maintainability, and this method is less restricted by the platform.

[0034] Furthermore, the design principle of this invention is reliable, the structure is simple, and it has a very wide range of application prospects.

[0035] Therefore, it is evident that the present invention has outstanding substantive features and significant progress compared with the prior art, and the beneficial effects of its implementation are also obvious. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of the architecture of one embodiment of the present invention.

[0038] Figure 2 This is a schematic flowchart of a method according to an embodiment of the present invention. Detailed Implementation

[0039] Many other CPU platforms, such as AMD, Phytium, Hygon, Loongson, and Ampere, have their BMC and BIOS connected to the CPU. Therefore, they cannot obtain output control and output signals when the CPU's underlying hardware is not fully initialized. Moreover, the BMC's display information comes entirely from the CPU. The BMC does not perform any control over the display and only displays the information after the CPU transmits it.

[0040] Except for the Intel platform, which can achieve early display due to its architecture, many other platforms cannot meet the requirement of early output display. Users often wait several minutes or even more than ten minutes before discovering that the machine has failed to start. Some manufacturers omit the initialization process to achieve fast display, which introduces instability to the server. Others try to compress the initialization process, but with improved configurations, the expected early display effect is not achieved. To enable those skilled in the art to better understand the technical solutions in this invention, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0041] like Figure 1 As shown, this embodiment of the invention provides an architecture for early display activation of a server, including a CPU, a BIOS chip, a BMC chip, and a power supply module;

[0042] The CPU is connected to the BIOS chip, which is used to control the CPU by writing code into the BIOS chip.

[0043] The CPU is connected to the BMC chip;

[0044] The BMC chip is used to connect directly to an external monitor and / or connect via a network to a remote virtual desktop to enable local and remote virtual display functions for the server system.

[0045] The power supply modules are connected to the CPU and BMC chips respectively;

[0046] The power supply module is used to send a power supply completion signal to the CPU and BMC chip.

[0047] It should be noted that the CPU is connected to the BIOS chip via the SPI bus;

[0048] The CPU is connected to the BMC chip via the PCIe bus.

[0049] The BMC chip is equipped with a BMC management system and a display controller that communicates with the BMC management system;

[0050] The BMC management system controls the BMC output display through the display controller.

[0051] The CPU transmits video signals to the display controller inside the BMC chip via the PCIe bus. The display controller then controls the output to an external monitor and / or to a remote virtual desktop via a network for display.

[0052] After the power supply module is powered on, it sends a power-on completion signal to the CPU and BMC chip.

[0053] After receiving the power-on completion signal, the CPU runs the initialization program.

[0054] After receiving the power-on completion signal, the BMC chip will switch the display information source to BMC control and display the BIOS startup prompts on the display interface.

[0055] The CPU is also used to send a first-stage initialization completion signal to the BMC chip after the first stage of the initialization program has finished running.

[0056] After receiving the first-stage initialization completion signal, the BMC chip outputs the BIOS initialization stage status. When the CPU runs the initialization program and initializes the BIOS to the stage of controlling the display output, it sends a second-stage initialization completion signal to the BMC chip to notify the BMC chip to switch the display information source channel.

[0057] After receiving the second-stage initialization completion signal, the BMC chip switches the display source channel to the CPU to complete the early lighting display.

[0058] A typical CPU connects to the BIOS chip via the SPI bus. The BIOS can be considered a storage chip, storing the code needed to run the Basic Input / Output System (BIO), also known as the BIO control system. It can control the CPU's GPIO and channels by writing code, including whether to output display signals and the output channels. Additionally, the CPU connects to the BMC chip via the PCIe bus for communication. Server CPUs generally do not integrate a display controller, as servers do not have the same display requirements as PCs or laptops and do not require remote virtual display functionality. Therefore, server display solutions typically rely on the BMC's display module to achieve local and remote virtual display functions. Besides the CPU, BIOS, BMC, and the connected buses, the architecture also includes control signals. For example, the power-on completion signal is issued by the server's power supply module and simultaneously transmitted to the CPU and BMC, notifying them that power-on is complete and the BIOS and other functions can be started. Phase 1 and Phase 2 initialization completion signals indicate the BIOS startup phase and can be implemented by BIOS programming.

[0059] like Figure 2As shown, this embodiment of the invention also provides a method for early display activation in a server, based on an early display activation architecture. The architecture includes a CPU, BIOS, BMC, power supply module, and some control signals and buses. A typical CPU connects to the BIOS chip via an SPI bus. The BIOS can be considered a storage chip, storing the code needed to run the Basic Input / Output System (BIOS), also called the BIOS control system. It can control the CPU's GPIO and channels by writing code, including whether to output display signals and the output channels. Additionally, the CPU connects to the BMC chip via a PCIe bus for communication. We know that server CPUs generally do not integrate a display controller. Servers do not have the same display requirements as PCs or laptops and do not require remote virtual display functionality. Therefore, server display solutions generally rely on the BMC's display module to complete the system's local and remote virtual display functions. Besides the CPU, BIOS, BMC, and connected buses, the architecture also includes some control signals. For example, a signal indicating power-on completion is issued by the server's power supply module and simultaneously transmitted to the CPU and BMC, notifying that power-on is complete and the BIOS and other functions can be started. Phase 1 and Phase 2 initialization completion signals indicate the BIOS startup phase and can be implemented by BIOS programming. The method includes the following steps:

[0060] Step 1: After the power supply module is powered on, it sends a power-on completion signal to the CPU and BMC chip;

[0061] Step 2: After receiving the power-on completion signal, the CPU runs the initialization program; after the first stage of the initialization program is completed, the CPU sends the first stage initialization completion signal to the BMC chip;

[0062] Step 3: After receiving the power-on completion signal, the BMC chip will switch the display information source to BMC control;

[0063] Step 4: After receiving the first-stage initialization completion signal, the BMC chip outputs and displays the BIOS initialization status information;

[0064] Step 5: When the initialization program reaches the stage of controlling the display output, the CPU sends a second-stage initialization completion signal to the BMC chip to notify the BMC chip to switch the display information source channel;

[0065] Step 6: After receiving the second-stage initialization completion signal, the BMC chip switches the display source channel to the CPU to complete the early display lighting function.

[0066] After the server power supply module powers on, it sends a power OK signal to the CPU. The CPU's internal control core then begins running the initialization program, and this signal is simultaneously sent to the BMC (Browser Control Center). Upon receiving the power-on completion signal, the BMC switches the display information source to BMC control and displays a message such as "Power-on complete, BIOS starting" on the display interface. After receiving the Phase 1 initialization completion signal, the BMC outputs a message such as "BIOS has completed Phase 1 initialization" and waits for the Phase 2 completion signal. When the BIOS is about to reach the stage where it can control the display output, it sends a Phase 2 initialization completion signal to the BMC, notifying the BMC to switch the display information source channel to the CPU. Once the BMC receives the Phase 2 initialization completion signal, it switches the display source channel to the CPU, thus completing the early display activation function.

[0067] Although the present invention has been described in detail with reference to the accompanying drawings and preferred embodiments, the invention is not limited thereto. Various equivalent modifications or substitutions can be made to the embodiments of the invention by those skilled in the art without departing from the spirit and essence of the invention, and such modifications or substitutions should all be within the scope of the invention. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the invention should also be covered within the protection scope of the invention. Therefore, the protection scope of the invention should be determined by the scope of the claims.

Claims

1. A system for early-stage display activation on a server, characterized in that, This includes the CPU, BIOS chip, BMC chip, and power supply module; The CPU is connected to the BIOS chip, which is used to control the CPU by writing code into the BIOS chip. The CPU is connected to the BMC chip; The BMC chip is used to connect directly to an external monitor and / or connect via a network to a remote virtual desktop to enable local and remote virtual display functions for the server system. The power supply modules are connected to the CPU and BMC chips respectively; The power supply module is used to send a power supply completion signal to the CPU and BMC chip; The CPU connects to the BIOS chip via the SPI bus; The CPU is connected to the BMC chip via the PCIe bus; The BMC chip is equipped with a BMC management system and a display controller that communicates with the BMC management system; The BMC management system controls the BMC output display through the display controller; The CPU transmits video signals to the display controller inside the BMC chip via the PCIe bus, and the display controller controls the output to an external monitor and / or to a remote virtual desktop for display via a network. After the power supply module is powered on, it sends a power-on completion signal to the CPU and BMC chip. After receiving the power-on completion signal, the CPU runs the initialization program. After receiving the power-on completion signal, the BMC chip will switch the display information source to BMC control and display the BIOS startup prompt information on the display interface; The CPU is also used to send a first-stage initialization completion signal to the BMC chip after the first stage of the initialization program has finished running. After receiving the first-stage initialization completion signal, the BMC chip outputs the BIOS initialization stage status. When the CPU runs the initialization program and the BIOS initializes to the stage of controlling the display output, it sends a second-stage initialization completion signal to the BMC chip to notify the BMC chip to switch the display information source channel. After receiving the second-stage initialization completion signal, the BMC chip switches the display source channel to the CPU to complete the early lighting display.

2. A server early light-up display method, characterized by, Based on the server early display activation system according to claim 1, the method includes the following steps: Step 1: After the power supply module is powered on, it sends a power-on completion signal to the CPU and BMC chip; Step 2: After receiving the power-on completion signal, the CPU runs the initialization program; after the first stage of the initialization program is completed, the CPU sends the first stage initialization completion signal to the BMC chip; Step 3: After receiving the power-on completion signal, the BMC chip will switch the display information source to BMC control; Step 4: After receiving the first-stage initialization completion signal, the BMC chip outputs and displays the BIOS initialization status information; Step 5: When the initialization program reaches the stage of controlling the display output, the CPU sends a second-stage initialization completion signal to the BMC chip to notify the BMC chip to switch the display information source channel; Step 6: After receiving the second-stage initialization completion signal, the BMC chip switches the display source channel to the CPU to complete the early display lighting function; The method also includes: The CPU transmits video signals to the display controller inside the BMC chip via the PCIe bus. The display controller then controls the output to an external monitor and / or to a remote virtual desktop via a network for display.

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