A high voltage power semiconductor module packaging architecture

Abstract

The application provides a high-voltage power semiconductor module packaging architecture, comprising: an insulating substrate and a half-bridge circuit, the upper bridge arm and the lower bridge arm of the half-bridge circuit are respectively composed of a plurality of power semiconductor units in series; the power semiconductor units are welded on the insulating substrate, and the power semiconductor units comprise a dynamic voltage-sharing element, a static voltage-sharing element and a plurality of power semiconductor devices which are installed in parallel on the same insulating substrate. The application integrates the power semiconductor devices in series and the absorbing circuit into the power semiconductor module, the heat dissipation condition of the voltage-sharing element is good, the integration and the power density of the system are improved, the commonly used voltage-withstanding power semiconductor devices are used, the cost is lower, the device manufacturing process is mature, and the reliability is high.

Description

Technical Field

[0001] This invention relates to the field of power semiconductor device technology, and more specifically to a high-voltage power semiconductor module packaging architecture. Background Technology

[0002] Common voltage ratings for power semiconductor devices are 1200V, 1700V, or 3300V. In high-voltage power electronic converters with bus voltages >1000V, high-voltage power semiconductor modules, power semiconductor modules with commonly used voltage ratings connected in series, or power semiconductor modules with commonly used voltage ratings forming a multi-level circuit are generally used. In existing high-voltage power semiconductor half-bridge modules, the voltage ratings of the high-voltage power semiconductor devices used are generally 3.3kV to 10kV; or power semiconductor modules with commonly used voltage ratings are connected in series, requiring external absorption and voltage equalization components to improve static voltage equalization characteristics and dynamic voltage equalization characteristics during switching; or multi-level circuits are formed using power semiconductor modules with commonly used voltage ratings.

[0003] In traditional solutions, if high-voltage power semiconductor devices are used, the cost is high due to the complex manufacturing process and low yield. If a module series or multi-level scheme is used, the number of components in the converter system is large, the system architecture is complex, and the requirements for software and hardware control and protection strategies are high, which affects the system reliability. Summary of the Invention

[0004] In view of this, embodiments of this application provide a high-voltage power semiconductor module packaging architecture to achieve the goals of reducing manufacturing costs and improving system reliability and integration.

[0005] This application provides the following technical solution: a high-voltage power semiconductor module packaging architecture, comprising:

[0006] An insulating substrate and a half-bridge circuit, wherein the upper and lower arms of the half-bridge circuit are each composed of multiple power semiconductor units connected in series; the power semiconductor units are all soldered on the insulating substrate, and the power semiconductor units include dynamic voltage equalization elements, static voltage equalization elements and multiple power semiconductor devices mounted in parallel on the same insulating substrate.

[0007] According to one embodiment of this application, the dynamic voltage equalization element is a RC absorption chip, which is fabricated on a silicon wafer using semiconductor manufacturing processes and includes a capacitor portion and a resistor portion connected in series.

[0008] According to one embodiment of this application, the dynamic voltage equalization element is a resistor-capacitor diode absorption chip, which is fabricated on a silicon wafer using semiconductor manufacturing processes. The absorption chip includes a capacitor portion and a resistor portion connected in series, and a diode portion connected in parallel with the resistor portion.

[0009] According to one embodiment of this application, the static voltage equalization element is a voltage equalization resistor, and the voltage equalization resistor and the power semiconductor device are connected in parallel and mounted on the same insulating substrate.

[0010] According to one embodiment of the present application, the voltage equalizing resistor is a surface-mount discrete component or is fabricated on a silicon wafer using semiconductor manufacturing processes.

[0011] According to one embodiment of the present application, at least one gate drive terminal is connected to each power semiconductor unit, and a gate drive circuit of the power semiconductor device is connected in series to the gate drive terminal.

[0012] According to one embodiment of this application, the gate drive circuit is provided with multiple isolated gate drive units, and the delay is matched between each isolated gate drive unit.

[0013] According to one embodiment of this application, the power semiconductor device has a conventional withstand voltage rating of 1200V, 1700V, or 3300V.

[0014] According to one embodiment of this application, the back electrodes of the power semiconductor device, the dynamic voltage equalization element, and the static voltage equalization element are all connected to the conductor layer of the insulating substrate by welding or sintering processes, and the front electrode is connected to the conductor layer of the insulating substrate by bonding wires, bonding strips, or copper clips.

[0015] According to one embodiment of the present application, the upper bridge arm and the lower bridge arm are electrically connected by aluminum wire or copper wire bonding technology.

[0016] The multiple power semiconductor units are electrically connected by aluminum wire or copper wire bonding technology.

[0017] Compared with the prior art, the beneficial effects of the present invention are reflected in:

[0018] (1) Compared with the traditional solution that uses high-voltage power semiconductor devices, the packaging architecture proposed in this invention uses commonly used power semiconductor devices with high voltage rating, which has lower cost, mature device manufacturing process and high reliability.

[0019] (2) Compared with the traditional scheme of using power semiconductor modules in series, the present invention integrates the series power semiconductor devices and absorption circuits into the power semiconductor module, and the heat dissipation of the RC absorption chip is good, which improves the system integration and power density.

[0020] (3) Compared with the traditional scheme that uses a multi-level circuit topology, the high-voltage power semiconductor module of the present invention can use a two-level circuit topology, and the overall system scheme is simple and highly reliable.

[0021] (4) The module integrates a multi-channel, delay-matched drive circuit, which can improve the dynamic voltage equalization of series power semiconductor devices and further improve the system integration. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a circuit schematic diagram of the high-voltage power semiconductor module packaging architecture according to the first embodiment of the present invention;

[0024] Figure 2 This is a schematic diagram of the module structure of the high-voltage power semiconductor module packaging architecture according to the first embodiment of the present invention;

[0025] Figure 3 This is a circuit schematic diagram of the high-voltage power semiconductor module packaging architecture according to the second embodiment of the present invention;

[0026] Figure 4 This is a circuit schematic diagram of the high-voltage power semiconductor module packaging architecture according to the third embodiment of the present invention;

[0027] Figure 5 This is a circuit schematic diagram of the high-voltage power semiconductor module packaging architecture according to the fourth embodiment of the present invention;

[0028] Among them, 1-bridge arm, 101-power section circuit, 2-power semiconductor unit, 3-power semiconductor device, 4-RC snubber chip, 401-RCD snubber chip, 402-diode section, 5-capacitor section, 6-resistor section, 7-equalizing resistor, 8-positive bus terminal, 9-output terminal, 10-negative bus terminal, 11-gate drive terminal, 12-gate drive circuit, 13-gate drive unit, 14-drive signal and power supply terminal, 15-gate drive and isolation power supply circuit board, 16-isolation drive power supply. Detailed Implementation

[0029] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0030] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments, providing a clear and complete description of the technical solutions of the present invention. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0031] This invention provides a high-voltage power semiconductor module packaging architecture, including: an insulating substrate and a half-bridge circuit or a single transistor. The upper and lower arms of the half-bridge circuit are each composed of multiple power semiconductor units connected in series, and the upper and lower arms are electrically connected to each other by aluminum wire or copper wire bonding technology. The power semiconductor units are all soldered on the insulating substrate, and the multiple power semiconductor units are electrically connected to each other by aluminum wire or copper wire bonding technology. The power semiconductor unit includes a dynamic voltage equalization element, a static voltage equalization element, and multiple power semiconductor devices mounted in parallel on the same insulating substrate.

[0032] In one embodiment, the dynamic voltage equalization element is a RC snubber chip, which is fabricated on a silicon wafer using semiconductor manufacturing processes and includes a capacitor portion and a resistor portion connected in series.

[0033] In another embodiment, the dynamic voltage equalization element is a RC diode absorption chip, which is fabricated on a silicon wafer using semiconductor manufacturing processes. The chip includes a capacitor and a resistor connected in series, and a diode connected in parallel with the resistor.

[0034] In one embodiment, the static voltage equalization element is a voltage equalization resistor.

[0035] The embodiments of the present invention integrate series-connected power semiconductor units and absorption circuits (dynamic voltage equalization element and static voltage equalization element) into a power semiconductor module, and the voltage equalization element has good heat dissipation conditions, thereby improving the system integration and power density.

[0036] The packaging architecture of this invention uses power semiconductor devices with conventional withstand voltage specifications of 1200V, 1700V or 3300V. Using commonly used power semiconductor devices with common withstand voltage specifications results in lower costs, mature device manufacturing processes, and high reliability.

[0037] In this embodiment of the invention, at least one gate drive terminal is connected to each power semiconductor unit. A gate drive circuit for the power semiconductor device is connected in series to the gate drive terminal. The gate drive circuit includes multiple isolated gate drive units with delay matching between them. This embodiment of the invention integrates a multi-channel, delay-matched power semiconductor gate drive circuit within the module for gate driving of series-connected power semiconductor devices. This improves the dynamic voltage equalization of the series-connected power semiconductor devices and further enhances system integration.

[0038] Next, please refer to the appendix. Figures 1-5 The content of this invention will be further explained below.

[0039] Figure 1 The diagram shown is a circuit schematic of an embodiment of the high-voltage power semiconductor module packaging architecture described in this invention. Figure 1 The module shown is a half-bridge topology, including one bridge arm 1. Bridge arm 1 is composed of multiple power semiconductor units 2 connected in series. In this embodiment, three power semiconductor units 2 connected in series are used as an example. Each power semiconductor unit 2 includes a commonly used voltage-rated power semiconductor device 3, a resistor-capacitor (RC) snubber chip 4, and a voltage-equalizing resistor 7, all mounted in parallel on the same insulating substrate. The RC snubber chip 4 is fabricated on a silicon wafer using semiconductor manufacturing processes. It includes a capacitor portion 5 and a resistor portion 6, both formed using semiconductor manufacturing processes. The RC snubber chip 4 is integrated within the module to improve the dynamic voltage equalization characteristics of the series power semiconductor devices during switching. The voltage-equalizing resistor 7 is also integrated within the module to improve the static voltage equalization characteristics of the series power semiconductor devices. The voltage-equalizing resistor 7 is mounted in parallel with the power semiconductor device 3 on the same insulating substrate. The voltage-equalizing resistor 7 can be a surface-mount discrete component or fabricated on a silicon wafer using semiconductor manufacturing processes. The module also includes a positive bus terminal 8, an output terminal 9, a negative bus terminal 10, and a gate drive terminal 11.

[0040] Figure 2 The diagram shown is a schematic representation of the module structure of an embodiment of the high-voltage power semiconductor module packaging architecture described in this invention. Figure 2The module shown is a half-bridge topology, including one bridge arm 1. Bridge arm 1 is composed of multiple power semiconductor units 2 connected in series. In this embodiment, three power semiconductor units 2 connected in series are used as an example. The power semiconductor units 2 include power semiconductor devices 3 with commonly used voltage ratings. In this embodiment, three power semiconductor devices 3 are connected in parallel as an example. It also includes a resistor-capacitor (RC) snubber chip 4 and a voltage equalizing resistor 7 connected in parallel with the power semiconductor devices 3. The RC snubber chip 4 is fabricated on a silicon wafer using semiconductor manufacturing processes. The voltage equalizing resistor 7 can be a surface-mount discrete component or fabricated on a silicon wafer using semiconductor manufacturing processes. The back electrodes of the power semiconductor devices 3 and the RC snubber chip 4 are connected to the conductor layer of the insulating substrate through processes such as welding or sintering. The front electrodes are connected to the conductor layer of the insulating substrate through processes such as bonding wires, bonding strips, and copper clips. The module also includes a positive bus terminal 8, an output terminal 9, a negative bus terminal 10, and drive signal and power supply terminals 14.

[0041] Figure 3 The diagram shown is a circuit schematic of an embodiment of the high-voltage power semiconductor module packaging architecture described in this invention. Figure 3 The module includes a power section circuit 101 and a gate drive circuit 12 integrated within the module. Figure 3 The module shown is a half-bridge topology, including one bridge arm 1. Bridge arm 1 consists of multiple power semiconductor units 2 connected in series. The diagram shows three power semiconductor units 2 connected in series as an example. Each power semiconductor unit 2 includes a power semiconductor device 3 with a commonly used voltage rating, and a resistor-capacitor (RC) snubber chip 4 and a voltage equalizing resistor 7 connected in parallel with the power semiconductor device 3. The RC snubber chip 4 is fabricated on a silicon wafer using semiconductor manufacturing processes. It includes a capacitor portion 5 and a resistor portion 6, both formed using semiconductor manufacturing processes. The voltage equalizing resistor 7 can be a surface-mount discrete component or fabricated on a silicon wafer using semiconductor manufacturing processes. The module also includes a positive bus terminal 8, an output terminal 9, and a negative bus terminal 10. The gate drive circuit 12 has multiple isolated gate drive units 13, with delay matching between each gate drive unit 13. The module also includes drive signal and power supply terminals 14.

[0042] Figure 4 The diagram shown is a circuit schematic of Embodiment 3 of the high-voltage power semiconductor module packaging architecture of the present invention. Figure 4 The module includes a power section circuit 101 and an integrated gate driver and isolation power supply circuit board 15. Figure 4The module shown is a half-bridge topology, including one bridge arm 1. Bridge arm 1 is composed of multiple power semiconductor units 2 connected in series. The diagram shows three power semiconductor units 2 connected in series as an example. The power semiconductor unit 2 includes a power semiconductor device 3 with a commonly used voltage rating, and also includes a resistor-capacitor (RC) snubber chip 4 and a voltage equalizing resistor 7 connected in parallel with the power semiconductor device 3. The RC snubber chip 4 is fabricated on a silicon wafer using semiconductor manufacturing processes. It includes a capacitor portion 5 and a resistor portion 6, both formed using semiconductor manufacturing processes. The voltage equalizing resistor 7 can be a surface-mount discrete component or fabricated on a silicon wafer using semiconductor manufacturing processes. The module also includes a positive bus terminal 8, an output terminal 9, and a negative bus terminal 10. The gate drive and isolation power supply circuit board 15 includes multiple isolated gate drive units 13, delay matching between each gate drive unit, and multiple isolated drive power supplies 16 to power the gate drive units 13. It also includes the module's drive signal and power supply terminals 14.

[0043] Figure 5 The diagram shown is a circuit schematic of another embodiment of the high-voltage power semiconductor module packaging architecture described in this invention. Figure 5 The module shown is a half-bridge topology, including one bridge arm 1. Bridge arm 1 is composed of multiple power semiconductor units 2 connected in series. In this embodiment, three power semiconductor units 2 are connected in series as an example. The power semiconductor unit 2 includes a commonly used voltage-rated power semiconductor device 3 and a resistor-capacitor diode (RCD) absorber chip 401 and a voltage-equalizing resistor 7, all mounted in parallel on the same insulating substrate. The resistor-capacitor diode (RCD) absorber chip 401 is fabricated on a silicon wafer using semiconductor manufacturing processes. It includes a capacitor portion 5, a resistor portion 6, and a diode portion 402, all formed using semiconductor manufacturing processes. The integrated resistor-capacitor diode (RCD) absorber chip 401 is used to improve the dynamic voltage equalization characteristics of the series power semiconductor devices during switching. The module integrates an equalizing resistor 7 to improve the static voltage equalization characteristics of the series power semiconductor devices. The equalizing resistor 7 is mounted in parallel with the power semiconductor device 3 on the same insulating substrate. The equalizing resistor 7 can be a surface-mount discrete component or fabricated on a silicon wafer using semiconductor manufacturing processes. The module also includes a positive bus terminal 8, an output terminal 9, a negative bus terminal 10, and a gate drive terminal 11.

[0044] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A high-voltage power semiconductor module packaging architecture, characterized in that, include: An insulating substrate and a half-bridge circuit, wherein the upper and lower arms of the half-bridge circuit are each composed of multiple power semiconductor units connected in series; the power semiconductor units are all soldered on the insulating substrate, and each power semiconductor unit includes a dynamic voltage equalization element, a static voltage equalization element and multiple power semiconductor devices mounted in parallel on the same insulating substrate. At least one gate drive terminal is connected to each of the power semiconductor units, and a gate drive circuit of the power semiconductor device is connected in series to the gate drive terminal. The gate drive circuit is equipped with multiple isolated gate drive units, and the delay between each isolated gate drive unit is matched. The dynamic voltage equalization element is a RC absorption chip, which is fabricated on a silicon wafer using semiconductor manufacturing processes and includes a capacitor and a resistor connected in series.

2. The high-voltage power semiconductor module packaging architecture according to claim 1, characterized in that, The dynamic voltage equalization element is a RC diode absorption chip, which is fabricated on a silicon wafer using semiconductor manufacturing processes. It includes a capacitor and a resistor connected in series, and a diode connected in parallel with the resistor.

3. The high-voltage power semiconductor module packaging architecture according to claim 1, characterized in that, The static voltage equalization element is a voltage equalization resistor, which is connected in parallel with the power semiconductor device and mounted on the same insulating substrate.

4. The high-voltage power semiconductor module packaging architecture according to claim 3, characterized in that, The voltage equalizing resistor is a surface-mount discrete component or is fabricated on a silicon wafer using semiconductor manufacturing processes.

5. The high-voltage power semiconductor module packaging architecture according to claim 1, characterized in that, The power semiconductor devices are of standard voltage ratings of 1200V, 1700V, or 3300V.

6. The high-voltage power semiconductor module packaging architecture according to claim 1, characterized in that, The back electrodes of the power semiconductor device, the dynamic voltage equalization element, and the static voltage equalization element are all connected to the conductor layer of the insulating substrate by welding or sintering processes, and the front electrodes are connected to the conductor layer of the insulating substrate by bonding wires, bonding strips, or copper clips.

7. The high-voltage power semiconductor module packaging architecture according to claim 1, characterized in that, The upper and lower bridge arms are electrically connected by aluminum or copper wire bonding technology. The multiple power semiconductor units are electrically connected by aluminum wire or copper wire bonding technology.

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