Chip unit, communication method, device, equipment and storage medium of chip unit

Abstract

The present disclosure provides a chip unit, a communication method, an apparatus, a device and a storage medium of the chip unit. The communication method of the chip unit is applied to any chip in the chip unit. The method includes: obtaining a communication instruction; determining the current communication mode according to the communication instruction; selecting a corresponding communication PHY to establish a communication connection with a receiving object to be communicated according to the communication mode, so as to communicate data with the receiving object. The method can reduce the transmission delay and power consumption when the chips are interconnected.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a chip unit, a communication method, a device, a equipment and a storage medium of the chip unit. The present disclosure also relates to a method for preparing the chip unit. Background Art

[0002] With the development of semiconductor technology, chip size tends to be miniaturized, and the development of science and technology has made the requirements for chip data processing capabilities higher and higher.

[0003] At present, in order to improve the data processing capability of the chip, multiple chips are generally packaged together through 2.5D packaging. Among them, 2.5D packaging refers to the manufacturing process of connecting multiple chips by arranging multiple chips in parallel on the same substrate (Substrate) instead of packaging them after a single chip is made, and then connecting them to the interposer (Interposer) through technologies such as wire bonding (Wire Bonding), flip chip (Flip chip) or through silicon via (TSV, Through Silicon Via). Compared with traditional packaging processes, the 2.5D packaging process can reduce the package size and area, reduce the distance between chip interconnections, and improve the electrical performance indicators of the chip.

[0004] However, in the chip particles packaged based on the above packaging process, the interconnection between multiple chips still needs to be achieved through external solder bumps (Pads), which may cause problems such as transmission delay and increased power consumption. Summary of the invention

[0005] The present disclosure provides a method for preparing a chip unit, a chip unit, a communication method, a device, a equipment and a computer-readable storage medium of the chip unit.

[0006] In a first aspect, the present disclosure provides a method for preparing a chip unit, comprising:

[0007] obtaining a wafer including a plurality of chips;

[0008] Preparing a redistribution layer on the surface of the wafer, wherein the redistribution layer interconnects at least a portion of the chips in the wafer and rearranges the solder bumps of the chips in a preset manner;

[0009] The wafer is cut to obtain chip units, each chip unit includes a preset number of chips, and at least some of the chips in each chip unit are interconnected.

[0010] In a second aspect, the present disclosure provides a chip unit, comprising:

[0011] Wafer substrate;

[0012] a preset number of chips, wherein the preset number of chips are formed on the wafer substrate;

[0013] A redistribution layer is provided on the preset number of chips;

[0014] At least some of the preset number of chips are connected via the first connecting wires arranged in the redistribution layer.

[0015] In a third aspect, the present disclosure provides a communication method of a chip unit, which is applied to a chip, and the chip is any one of the chip units described in the second aspect. The method includes:

[0016] Get communication instructions;

[0017] Determining a current communication mode according to the communication instruction;

[0018] According to the communication mode, a corresponding communication PHY is selected to establish a communication connection with a receiving object to be communicated with, so as to perform data communication with the receiving object, wherein the communication PHY is located in the chip.

[0019] In a fourth aspect, the present disclosure provides a communication device of a chip unit, which is applied to a chip, and the chip is any chip in the chip unit as described in the first aspect above, and the device includes:

[0020] A communication controller and at least one communication PHY, wherein the at least one communication PHY is connected to the communication controller, and each communication PHY corresponds to a communication mode;

[0021] The communication controller is used to obtain a communication instruction and determine a current communication mode according to the communication instruction; and, according to the communication instruction, select a corresponding communication PHY from the at least one communication PHY to communicate with a receiving object to be communicated.

[0022] In a fifth aspect, the present disclosure provides an electronic device, comprising: at least one chip unit as described in the second aspect of the present disclosure, the chip unit comprising a preset number of processing chips and / or memory chips; and at least one memory chip and / or processing chip arranged corresponding to each of the chip units, the memory chip being bonded to the corresponding chip unit via a solder bump.

[0023] In a sixth aspect, the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the communication method of the chip unit described in the third aspect of the present disclosure.

[0024] In the embodiments provided by the present disclosure, a redistribution layer (RDL) is prepared on the surface of a wafer including a plurality of chips, at least some of the chips in the wafer are interconnected based on the redistribution layer, and after the solder pads (Pads) of the chips are rearranged in a preset manner, the wafer is cut to obtain a chip unit including a preset number of chips and at least some of the chips in each chip unit are interconnected by a first connecting wire arranged in the redistribution layer; after obtaining the chip unit, when the chip in the chip unit needs to communicate with other chips, the chip in the chip unit can directly realize the communication connection between the chips based on the first connecting wire in the chip unit when the other chip is in the chip unit, without the need to realize it based on an external solder pad. Therefore, in the embodiments provided by the present disclosure, when the chip in the chip unit receives a communication instruction, it can determine the current communication mode according to the communication instruction, thereby selecting the communication PHY corresponding to the current communication mode to establish a communication connection with the receiving object, and perform data communication with the receiving object based on the communication connection, so as to reduce the transmission delay and power consumption increase problems that may exist when the chips are interconnected.

[0025] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing detailed example embodiments with reference to the accompanying drawings, in which:

[0027] Figure 1 A flow chart of a method for preparing a chip unit provided in an embodiment of the present disclosure;

[0028] Figure 2 A schematic diagram of the structure of a chip unit provided in an embodiment of the present disclosure;

[0029] Figure 3 A schematic diagram of chip unit cutting provided by an embodiment of the present disclosure;

[0030] Figure 4 A schematic diagram of the structure of the chip interconnection provided in the embodiment of the present disclosure;

[0031] Figure 5 A flow chart of a communication method of a chip unit provided in an embodiment of the present disclosure;

[0032] Figure 6A schematic diagram of a flow chart for determining a communication mode provided in an embodiment of the present disclosure;

[0033] Figure 7 A schematic diagram of an intra-chip communication circuit provided by an embodiment of the present disclosure;

[0034] Figure 8 A schematic diagram of another intra-chip communication circuit provided by an embodiment of the present disclosure;

[0035] Fig. 9 A block diagram of a communication device of a chip unit provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0037] In the absence of conflict, the various embodiments of the present disclosure and the various features therein may be combined with each other.

[0038] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0039] The terms used herein are only used to describe specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are also intended to include plural forms, unless the context clearly indicates otherwise. It will also be understood that when the terms "including" and / or "made of" are used in this specification, the presence of the features, wholes, steps, operations, elements and / or components is specified, but the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof is not excluded. "Connected" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0040] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined as such herein.

[0041] In the related art, when it is necessary to prepare a chip, generally, multiple isomorphic chips can be manufactured on a wafer first, and then, the traditional wafer packaging technology is used, that is, the finished wafer is cut into individual chips, and then bonded and packaged. The packaging efficiency of this preparation method is usually low. With the advancement of technology, wafer-level packaging technology has gradually developed. This technology usually directly packages the chip on the wafer, and bonds the protective layer to the top or bottom of the wafer, and then connects the circuit outside the protective layer, and cuts the wafer into individual chips for use. Although this chip preparation method improves the packaging efficiency, the data processing capacity of a single chip is usually low. In order to improve the data processing capacity of the cut chip, it is generally packaged together based on 2.5D to obtain a chip unit containing multiple chips. Although this preparation method technology can reduce the packaging size area, the distance of chip interconnection and improve the electrical performance indicators of the chip, in the chip unit obtained based on this preparation method, the interconnection between multiple chips still needs to be realized through external solder bumps, which may increase transmission delay and power consumption.

[0042] In order to solve the above problems, in order to improve the packaging efficiency and the data processing capability of the cut chips, the present disclosure provides a method for preparing a chip unit. Figure 1 , which is a flow chart of a method for preparing a chip unit provided in an embodiment of the present disclosure.

[0043] like Figure 1 As shown, the method for preparing the chip unit provided in the embodiment of the present disclosure may include the following steps S11-S13.

[0044] Step S11, obtaining a wafer containing multiple chips.

[0045] Step S12, preparing a redistribution layer on the surface of the wafer, which redistribution layer interconnects at least some of the chips in the wafer and rearranges the solder bumps of the chips in a preset manner; and, step S13, cutting the wafer to obtain chip units, each chip unit includes a preset number of chips, and at least some of the chips in each chip unit are interconnected.

[0046] In the embodiment of the present disclosure, the preset number may be 2, or may be a positive integer greater than 2, that is, the chip unit obtained based on the preparation method may include at least 2 internally interconnected chips.

[0047] That is, in the embodiments of the present disclosure, in order to improve the packaging efficiency while improving the data processing capability of the chips cut directly from the wafer, when preparing the chip, for a wafer containing multiple chips, a redistribution layer can be prepared on the surface of the wafer, so that while the chip solder bumps (Pads) are rearranged in a preset manner based on the redistribution layer, all or part of the chips in the wafer are interconnected through metal wires arranged in the redistribution layer, so that the chip unit cut from the wafer and including a preset number of chips can not only have a stronger data processing capability, but also because some of the chips in the chip unit are interconnected, the chips inside the chip unit can communicate directly internally without communicating based on external solder bumps, so as to reduce transmission delay and power consumption, wherein the first metal wire in the redistribution layer used to connect at least part of the chips in the chip unit is different from the second metal wire used to rearrange the solder bumps of the chips in the chip unit in a preset manner.

[0048] For easier understanding, please refer to Figure 2 , which is a schematic diagram of the structure of the chip unit provided by the embodiment of the present disclosure. Figure 2 As shown, the chip unit 200 provided in the embodiment of the present disclosure includes: a wafer substrate 210 and a preset number of chips, the preset number of chips are formed on the wafer substrate 210, and the chips can be Figure 2 The chips 220 , 221 and 222 are shown; a redistribution layer 230 is arranged on the preset number of chips; at least some of the preset number of chips are connected via a first connecting wire 240 arranged in the redistribution layer 230 .

[0049] In addition, if Figure 2 As shown, the solder bumps 250 of each chip in the chip unit described in the embodiment of the present disclosure are rearranged through the second connecting wires 260 disposed in the redistribution layer 230 .

[0050] Among them, a first connecting wire 240 and a second connecting wire 260 can be formed in the redistribution layer 230 through a composition process, so as to interconnect at least part of the chips in the chip unit based on the first connecting wire 240 and connect each chip to a corresponding solder block based on the second connecting wire 260, so as to interconnect with an object outside the chip unit based on the solder block; of course, this is only one implementation method provided in the embodiment of the present disclosure and is not specifically limited here.

[0051] Please see Figure 3 , which is a schematic diagram of chip unit cutting provided by the embodiment of the present disclosure. In the embodiment of the present invention, when preparing Figure 2 When the chip unit is shown, in a wafer including a plurality of chips, a plurality of chips may be prepared between each two adjacent chips. Figure 2As shown in the scribe groove 270 , in this embodiment, the step S13 of cutting the wafer to obtain the chip units may be: cutting the wafer based on the scribe groove to obtain the chip units.

[0052] That is, in actual implementation, after the plurality of chips on the wafer are interconnected through the redistribution layer in the above step S12, the chip unit including the preset number of chips can be cut from the wafer based on the scribe grooves between each two adjacent chips on the wafer. For example, Figure 3 As shown in the dotted box, by cutting at the scribe groove 270 on the packaged wafer, it is convenient and accurate to obtain chip units including 2, 3, 4 or more chips, and the chips are interconnected with each other and with external solder blocks, so as to improve the packaging efficiency and conveniently obtain chip units with strong data processing capabilities and convenient connections between chips.

[0053] It should be noted that, in some embodiments, after cutting a plurality of chip units from the wafer based on the above step S13, the method may further include: bonding the first chip to the corresponding chip unit to interconnect the first chip with at least part of the second chip in the chip unit, wherein the first chip is a chip outside the chip unit.

[0054] That is, in order to further improve the data processing capability, after preparing multiple chip units, a single chip or at least one first chip in a chip unit can also be interconnected with at least part of the second chip in another chip unit by bonding. For example, after preparing a chip unit 1 including multiple processing chips and a chip unit 2 including multiple memory chips, some processing chips in the chip unit 1 and some memory chips in the chip unit 2 can be connected by bonding.

[0055] Please see Figure 4 , which is a schematic diagram of the structure of the chip interconnection provided by the embodiment of the present disclosure. Figure 4 As shown, in some embodiments, a base layer 280 (substrate) may be provided on the side of the solder block 250 away from the wafer substrate 210, and a plurality of package balls 290 (Package balls) may be provided on the side of the base layer away from the solder block 250, and the solder block 250 and the plurality of package balls 290 may be connected to each other via connecting wires.

[0056] In order to improve the communication efficiency between chips and avoid the problems of increased transmission delay and power consumption when communicating between chips, the present disclosure also provides a communication method for chip units. Figure 5, which is a flow chart of a communication method of a chip unit provided in an embodiment of the present disclosure. The method can be applied to a chip, which can be any chip in a chip unit obtained by the preparation method of a chip unit provided in an embodiment of the present disclosure, for example, Figure 2 The chip 220 in the chip unit 200 shown; in some embodiments, the chip can be applied to electronic devices such as terminal devices or servers, and the terminal device can be a vehicle-mounted device, user equipment (User Equipment, UE), mobile device, user terminal, terminal, cellular phone, cordless phone, personal digital assistant (Personal Digital Assistant, PDA), handheld device, computing device, vehicle-mounted device, wearable device, etc., without special limitation here.

[0057] like Figure 5 As shown, the communication method of the chip unit provided in the embodiment of the present disclosure may include the following steps S51-S53, which are described in detail below.

[0058] Step S51, obtaining a communication instruction.

[0059] A communication instruction may be an instruction that instructs the chip to communicate with a receiving object to exchange data and thereby perform a computing task. The communication instruction may be sent to the chip by an external object, or may be obtained by the chip according to preset instructions stored in its own processing core. No special limitation is made here. The external object may, for example, be other chips within the chip unit where the chip is located, chips within other chip units outside the chip unit, or external electronic devices, etc. The receiving object may be other chips within the chip unit where the chip is located, chips of other chip units, or external electronic devices, etc.

[0060] In addition, unless otherwise specified, the computing task performed by the chip in the chip unit described in the embodiments of the present disclosure may be any one of an image processing task, a voice processing task, a text processing task, and a video processing task. For example, in a face recognition scenario, with user authorization, the chip may perform face recognition processing on the acquired user's facial image and provide a recognition result.

[0061] Step S52: determining the current communication mode according to the communication instruction.

[0062] In the related art, since communication between chips needs to be based on external solder bumps, communication between chips in the related art needs to be based on a long-distance communication mode. In the long-distance communication mode, in order to ensure the stability and reliability of transmitted data, it is usually necessary to configure a corresponding error correction mode with a larger number of bits according to the different quality of the transmission channel, and the requirements for transmission frequency and transmission voltage are also higher, which usually increases transmission delay and power consumption.

[0063] In the embodiment of the present disclosure, since at least some chips in the chip unit obtained by the chip unit preparation method provided in the embodiment of the present disclosure are interconnected with each other through the first connecting wire, that is, physical interconnection has been achieved, when the chip communicates with the receiving object, the chip can choose to use different communication branches depending on the location of the receiving object.

[0064] That is, in the embodiment of the present disclosure, when chips in the same chip unit communicate with each other, it is not necessary to achieve communication through a communication branch of an external solder block as in the related art. Instead, stable and reliable communication transmission can be achieved based on a short-distance communication mode through a communication branch formed by a first connecting wire that directly interconnects them. When the chip of the chip unit needs to communicate with an external receiving object, communication transmission can be carried out through a long-distance communication mode.

[0065] Therefore, in order to reduce transmission delay and power consumption, and enable the chip to communicate and interconnect flexibly and efficiently, in the embodiment of the present disclosure, after the chip receives a communication instruction, it can determine the current communication mode according to the communication instruction, so as to flexibly select the corresponding communication branch according to the communication mode to establish a communication connection with the receiving object and perform data communication.

[0066] Please see Figure 6 , which is a flow chart of determining a communication mode provided by an embodiment of the present disclosure. Figure 6 As shown, in the embodiment of the present disclosure, determining the current communication mode according to the communication instruction may specifically include: step S521, obtaining the location information of the receiving object from the communication instruction; step S522, when the location information indicates that the receiving object is a chip other than the chip in the chip unit, determining that the current communication mode is the first preset communication mode; and step S523, when the location information indicates that the receiving object is an object outside the chip unit, determining that the current communication mode is the second preset communication mode.

[0067] In the embodiments of the present disclosure, for the convenience of explanation, the communication mode of the chip includes a first preset communication mode and a second preset communication mode, the first preset communication mode is a short-distance communication mode, that is, a mode in which chips in a chip unit communicate with each other, and the second preset communication mode is a long-distance communication mode, that is, a mode in which a chip in a chip unit communicates with an object outside the chip unit, for example, a chip in another chip unit. It should be noted that in actual implementation, multiple communication modes can also be set as needed, for example, the first preset communication mode is set as a short-distance communication mode, the second preset communication mode is set as a medium-short distance communication mode, and the third preset communication mode is set as a long-distance communication mode, and no special limitation is made here.

[0068] After step S52, step S53 is executed to select a corresponding communication PHY to establish a communication connection with a receiving object to be communicated with according to the communication mode, so as to perform data communication with the receiving object, wherein the communication PHY is located in the chip.

[0069] Please see Figure 7 , which is a schematic diagram of an intra-chip communication circuit provided by an embodiment of the present disclosure. Figure 7 As shown, in the embodiment of the present disclosure, the chip also includes a first communication controller 71 and a gating switch 72, the gating switch 72 includes at least two switch elements, the first end of each switch element is connected to the first communication controller 71, and the second end of each switch element is respectively connected to a communication PHY corresponding to a different communication mode, wherein the communication PHY of the different communication modes can be, for example, Figure 7 The first communication PHY 73 and the second communication PHY 74 are shown; the selection switch 72 can be a multi-channel control switch, for example, when the communication mode includes a first and a second preset communication mode, the selection switch 72 can be a two-channel control switch.

[0070] In this embodiment, after determining the current communication mode according to the above step S52, the corresponding communication PHY is selected according to the communication mode to establish a communication connection with the receiving object to be communicated with, so as to communicate data with the receiving object, including: when the communication mode includes the first preset communication mode, by controlling the switch element connected to the first communication PHY at the second end of the selection switch to be closed, so as to establish a communication connection with the receiving object through the first communication controller and the first communication PHY, wherein the first communication PHY corresponds to the first preset communication mode; and / or, when the communication mode includes the second preset communication mode, by controlling the switch element connected to the second communication PHY at the second end of the selection switch to be closed, so as to establish a communication connection with the receiving object through the first communication controller and the second communication PHY, wherein the second communication PHY corresponds to the second preset communication mode.

[0071] In this implementation, the first communication controller may be a universal communication controller (CCU, Communication Control Unit).

[0072] That is, when the current communication mode determined based on step S52 includes a first preset communication mode, such as a short-distance communication mode, the switch element connected to the first communication PHY corresponding to the first preset communication mode in the selection switch is controlled to be closed, so that the chip can communicate with other chips in the chip unit based on the communication protocol corresponding to the short-distance communication mode; and, when the current communication mode includes a second preset communication mode, such as a long-distance communication mode, the switch element connected to the second communication PHY corresponding to the second preset communication mode in the selection switch is controlled to be closed, so that the chip can communicate with other objects outside the chip unit, for example, chips outside the chip unit or other external circuits based on the communication protocol corresponding to the long-distance communication mode and with the help of external corresponding welding blocks.

[0073] According to the above description, in this embodiment, by setting a selection switch and a communication PHY corresponding to different communication modes, the chip can adaptively and flexibly select a suitable communication branch to establish a communication connection with the receiving object according to the current communication mode, so as to reduce transmission delay and power consumption.

[0074] Please see Figure 8 , which is a schematic diagram of another intra-chip communication circuit provided by an embodiment of the present disclosure. Figure 8 As shown, in the embodiment of the present disclosure, the chip may further include a second communication controller 81, and the second communication controller 81 is connected to the communication PHY corresponding to the different communication modes, wherein the communication PHY of the different communication modes may be, for example, Figure 8 A first communication PHY 82 and a second communication PHY 83 are shown.

[0075] In this embodiment, the corresponding communication PHY is selected according to the communication mode to establish a communication connection with the receiving object to be communicated so as to communicate data with the receiving object, including: when the communication mode includes a first preset communication mode, controlling the second communication controller to establish a communication connection with the receiving object based on the first communication PHY, wherein the first communication PHY corresponds to the first preset communication mode; and / or, when the communication mode includes a second preset communication mode, controlling the second communication controller to establish a communication connection with the receiving object based on the second communication PHY, wherein the second communication PHY corresponds to the second preset communication mode.

[0076] In this embodiment, the second communication controller 81 may be a configurable communication controller, which may adaptively establish a communication connection with a receiving object based on a corresponding communication PHY connected thereto according to the current communication mode, so as to reduce transmission delay and power consumption.

[0077] In addition, in the embodiment of the present disclosure, during the execution of step S53, the method further includes: configuring a communication protocol corresponding to the communication mode; and establishing a communication connection with a receiving object based on the communication protocol through the communication PHY.

[0078] That is, after determining the current communication mode, in the process of establishing a communication connection, the appropriate communication protocol can be adaptively selected according to the channel quality corresponding to different modes, so as to reduce transmission delay and power consumption as much as possible without affecting data communication.

[0079] In the embodiment of the present disclosure, the configuration of the communication protocol corresponding to the communication mode includes: configuring the communication parameters in the communication protocol according to the communication mode, wherein the communication parameters include at least one of an error correction mode, a transmission frequency and a transmission voltage.

[0080] For example, in the above Figure 7 In the embodiment shown, after determining the current communication mode, Figure 7 The configuration circuit shown, which is respectively connected to the first communication PHY73 and the second communication PHY74, configures parameters such as the error correction mode, transmission frequency and transmission voltage in the communication protocol. For example, in the short-distance communication mode, a shorter or no error correction bit can be configured, and in the long-distance communication mode, a larger number of error correction bits can be configured.

[0081] In addition, it should be noted that in the embodiment of the present disclosure, after the communication method of the chip unit based on the embodiment of the present disclosure establishes a communication connection with the receiving object, the chip communication can adopt a high-speed data communication method, for example, high-speed data communication can be based on a high-speed serial computer expansion bus standard (PCIE, Peripheral Component Interconnect Express) interface, a parallel clock (Serdes) interface, etc.

[0082] To sum up, the communication method of the chip unit provided in the embodiment of the present disclosure, when the chip in the chip unit obtained by the preparation method of the chip unit described in the embodiment of the present disclosure receives a communication instruction, can determine the current communication mode according to the communication instruction, thereby selecting the communication PHY corresponding to the current communication mode to establish a communication connection with the receiving object, and perform data communication with the receiving object based on the communication connection, so as to reduce the transmission delay and increased power consumption problems that may exist when the chips are interconnected.

[0083] It can be understood that the above-mentioned various method embodiments mentioned in the present disclosure can be combined with each other to form a combined embodiment without violating the principle logic. Due to space limitations, the present disclosure will not repeat them. It can be understood by those skilled in the art that in the above-mentioned method of the specific implementation method, the specific execution order of each step should be determined according to its function and possible internal logic.

[0084] In addition, the present disclosure also provides a communication device, an electronic device, and a computer-readable storage medium for a chip unit, all of which can be used to implement any communication method of a chip unit provided by the present disclosure. The corresponding technical solutions and descriptions are referred to the corresponding records in the method part and will not be repeated here.

[0085] Fig. 9 A block diagram of a communication device of a chip unit provided in an embodiment of the present disclosure.

[0086] Reference Fig. 9 The present disclosure embodiment provides a communication device of a chip unit. The device 900 can be used for a chip. The chip can be any chip in the chip unit obtained based on the preparation method of the chip unit described in the present disclosure embodiment. The device 900 includes: a communication controller 910 and at least one communication PHY. The at least one communication PHY can be, for example, Fig. 9 The communication PHY920 and communication PHY930 shown, at least one of which is connected to the communication controller 910, and each communication PHY corresponds to a communication mode; the communication controller 910 is used to obtain a communication instruction and determine the current communication mode according to the communication instruction; and, according to the communication instruction, select a corresponding communication PHY from at least one communication PHY to communicate with the receiving object to be communicated.

[0087] In some embodiments, when the communication controller 910 determines the current communication mode according to the communication instruction, it can be used to: obtain the location information of the receiving object from the communication instruction; when the location information indicates that the receiving object is a chip other than the chip in the chip unit, determine that the current communication mode is the first preset communication mode; when the location information indicates that the receiving object is an object outside the chip unit, determine that the current communication mode is the second preset communication mode.

[0088] In some embodiments, the communication controller 910 may be Figure 7The first communication controller 71 shown, in this embodiment, the device 900 may also include a gating switch, the gating switch includes at least two switch elements, the first end of each switch element is connected to the first communication controller, and the second end of each switch element is respectively connected to the communication PHY corresponding to the different communication modes; the communication controller 910 selects the corresponding communication PHY to establish a communication connection with the receiving object to be communicated according to the communication mode to communicate data with the receiving object, and can be used for: when the communication mode includes the first preset communication mode, by controlling the switch element of the gating switch connected to the first communication PHY at the second end to close, so as to establish a communication connection with the receiving object through the first communication controller and the first communication PHY, wherein the first communication PHY corresponds to the first preset communication mode; and / or, when the communication mode includes the second preset communication mode, by controlling the switch element of the gating switch connected to the second communication PHY at the second end to close, so as to establish a communication connection with the receiving object through the first communication controller and the second communication PHY, wherein the second communication PHY corresponds to the second preset communication mode.

[0089] In some embodiments, the communication controller 910 may be Figure 8 The second communication controller 81 shown; the communication controller 910, when selecting the corresponding communication PHY to establish a communication connection with the receiving object to be communicated according to the communication mode, so as to communicate data with the receiving object, can be used to: when the communication mode includes a first preset communication mode, control the second communication controller to establish a communication connection with the receiving object based on the first communication PHY, wherein the first communication PHY corresponds to the first preset communication mode; and / or, when the communication mode includes a second preset communication mode, control the second communication controller to establish a communication connection with the receiving object based on the second communication PHY, wherein the second communication PHY corresponds to the second preset communication mode.

[0090] In some embodiments, the communication controller 910 can also be used to configure a communication protocol corresponding to a communication mode; in the process of selecting a corresponding communication PHY to establish a communication connection with a receiving object according to the communication mode, the communication controller 910 can also be used to: establish a communication connection with a receiving object based on the communication protocol through the communication PHY.

[0091] An embodiment of the present disclosure provides an electronic device, which includes: at least one chip unit as shown in the embodiment of the present disclosure, the chip unit includes a preset number of processing chips and / or memory chips; and a memory chip and / or processing chip arranged corresponding to each chip unit, the memory chip is bonded to the corresponding chip unit through a solder block.

[0092] In some embodiments, another chip unit is bonded to the chip unit.

[0093] The present disclosure also provides a computer-readable storage medium on which a computer program is stored, wherein the computer program implements the above-mentioned chip unit communication method when executed by a processor. The computer-readable storage medium may be a volatile or non-volatile computer-readable storage medium.

[0094] The embodiment of the present disclosure also provides a computer program product, including a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the communication method of the above-mentioned chip unit.

[0095] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In a hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable storage medium, which may include a computer storage medium (or a non-transitory medium) and a communication medium (or a temporary medium).

[0096] As is known to those of ordinary skill in the art, the term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable program instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technology, portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. In addition, it is known to those of ordinary skill in the art that communication media typically contain computer-readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and may include any information delivery medium.

[0097] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0098] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed completely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be customized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0099] The computer program product described herein may be implemented in hardware, software, or a combination thereof. In one optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK), etc.

[0100] Various aspects of the present disclosure are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0101] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0102] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0103] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0104] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly noted, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, those skilled in the art will appreciate that various changes in form and detail may be made without departing from the scope of the present disclosure as set forth in the appended claims.

Claims

1. A communication method for a chip unit, characterized in that: Applied to a chip, the chip is any chip in a chip unit, the chip unit comprises: a wafer substrate; a preset number of chips, the preset number of chips are formed on the wafer substrate; a redistribution layer is arranged on the preset number of chips; at least some of the preset number of chips are connected by the first connecting wires arranged in the redistribution layer; The method comprises: Get communication instructions; Determining a current communication mode according to the communication instruction; According to the communication mode, select a corresponding communication PHY to establish a communication connection with a receiving object to be communicated with, so as to communicate with the receiving object, wherein the communication PHY is located in the chip; Wherein, determining the current communication mode according to the communication instruction includes: From the communication instruction, obtain the location information of the receiving object; when the location information indicates that the receiving object is a chip other than the chip in the chip unit, determine that the current communication mode is the first preset communication mode; when the location information indicates that the receiving object is an object outside the chip unit, determine that the current communication mode is the second preset communication mode.

2. The method according to claim 1, characterized in that The chip also includes a first communication controller and a gating switch, wherein the gating switch includes at least two switch elements, a first end of each switch element is connected to the first communication controller, and a second end of each switch element is respectively connected to a communication PHY corresponding to a different communication mode; The selecting, according to the communication mode, a corresponding communication PHY to establish a communication connection with a receiving object to be communicated with, so as to communicate with the receiving object, comprises: In the case where the communication mode includes the first preset communication mode, a switch element connected to a first communication PHY at the second end of the selection switch is controlled to be closed, so as to establish a communication connection with the receiving object through the first communication controller and the first communication PHY, wherein the first communication PHY corresponds to the first preset communication mode; and / or, In the case where the communication mode includes the second preset communication mode, the switch element connected to the second communication PHY at the second end of the selection switch is controlled to be closed, so as to establish a communication connection with the receiving object through the first communication controller and the second communication PHY, wherein the second communication PHY corresponds to the second preset communication mode.

3. The method according to claim 1, characterized in that The chip also includes a second communication controller, which is connected to a communication PHY corresponding to a different communication mode; The selecting, according to the communication mode, a corresponding communication PHY to establish a communication connection with a receiving object to be communicated with, so as to communicate with the receiving object, comprises: In a case where the communication mode includes the first preset communication mode, controlling the second communication controller to establish a communication connection with the receiving object based on a first communication PHY, wherein the first communication PHY corresponds to the first preset communication mode; and / or, In a case where the communication mode includes the second preset communication mode, the second communication controller is controlled to establish a communication connection with the receiving object based on a second communication PHY, wherein the second communication PHY corresponds to the second preset communication mode.

4. The method according to claim 1, characterized in that: In the process of selecting a corresponding communication PHY to establish a communication connection with a receiving object to be communicated according to the communication mode, the method further includes: Configuring a communication protocol corresponding to the communication mode; Through the communication PHY, a communication connection is established with the receiving object based on the communication protocol.

5. The method according to claim 4, characterized in that The configuration and the communication protocol corresponding to the communication mode include: According to the communication mode, communication parameters in the communication protocol are configured, wherein the communication parameters include at least one of an error correction mode, a transmission frequency, and a transmission voltage.

6. A chip unit, characterized in that: Any chip in the chip unit communicates using the communication method according to any one of claims 1 to 5, and the chip unit comprises: Wafer substrate; a preset number of chips, wherein the preset number of chips are formed on the wafer substrate; A redistribution layer is provided on the preset number of chips; At least some of the preset number of chips are connected via the first connecting wires arranged in the redistribution layer.

7. The chip unit according to claim 6, characterized in that: The solder bumps of each chip are rearranged through second connecting wires arranged in the redistribution layer.

8. A communication device of a chip unit, characterized in that: Applied to a chip, the chip is any chip in a chip unit, the chip unit comprises: a wafer substrate; a preset number of chips, the preset number of chips are formed on the wafer substrate; a redistribution layer is arranged on the preset number of chips; at least some of the preset number of chips are connected by the first connecting wires arranged in the redistribution layer; The device comprises: A communication controller and at least one communication PHY, wherein the at least one communication PHY is connected to the communication controller, and each communication PHY corresponds to a communication mode; The communication controller is used to obtain a communication instruction and determine a current communication mode according to the communication instruction; and select a corresponding communication PHY from the at least one communication PHY to communicate with a receiving object to be communicated according to the communication instruction; Wherein, when determining the current communication mode according to the communication instruction, the communication controller is used to: From the communication instruction, obtain the location information of the receiving object; when the location information indicates that the receiving object is a chip other than the chip in the chip unit, determine that the current communication mode is the first preset communication mode; when the location information indicates that the receiving object is an object outside the chip unit, determine that the current communication mode is the second preset communication mode.

9. An electronic device, characterized in that: include: At least one chip unit according to claim 6 or 7, wherein the chip unit comprises a preset number of processing chips and / or memory chips; as well as At least one memory chip and / or processing chip is arranged corresponding to each of the chip units, and the memory chip is bonded to the corresponding chip unit via a solder bump.

10. The electronic device according to claim 9, characterized in that: Another chip unit is bonded on the chip unit.

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