A load balancing scheduling method and computing device

Abstract

The present application discloses a load balancing scheduling method and computing device, which relates to the field of computing technology. When a processor is in a low-load state, energy saving for the computing device is achieved by controlling the power consumption of the processor core. In this method, the processor obtains the current load in response to a preset condition of calling a load balancing scheduling algorithm; wherein the processor includes multiple processor cores; the multiple processor cores each have their own task queue; at least one processor core is in a busy state; at least one processor core is in an idle state; the busy state indicates that there are tasks to be executed in the task queue of the processor core; the idle state indicates that the tasks to be executed in the task queue of the processor core have been processed; the processor determines that the current load is less than or equal to a preset value, and executes the load balancing scheduling algorithm corresponding to the preset condition; so that the processor core in the idle state remains in the idle state; wherein the preset condition corresponds one-to-one with the load balancing scheduling algorithm.

Description

Technical Field

[0001] The present application relates to the field of computing technology, and in particular to a load balancing scheduling method and computing device. Background Art

[0002] In the era of rapid cloud computing development, data center power consumption has become a key consideration in data center operating costs. Data centers contain multiple servers, and the average utilization rate of each server's central processing unit (CPU) core is around 30%, indicating that server CPU cores are generally operating at low load.

[0003] When the CPU is in a low-load state, it is typically busy with background tasks and sporadic tasks (such as background polling tasks). Current CPUs follow load balancing logic when scheduling tasks. When sporadic tasks occur, the CPU tries to distribute them evenly across CPU cores. This results in traditional load balancing-based task allocation methods being unable to achieve significant energy savings for servers. Summary of the Invention

[0004] The present application provides a load balancing scheduling method and a computing device, which achieves energy saving for the computing device by controlling the power consumption of the processor core when the processor is in a low-load state.

[0005] To achieve the above technical objectives, this application adopts the following technical solutions:

[0006] In the first aspect, the present application provides a load balancing scheduling method, in which the processor obtains the current load in response to the preset conditions of calling the load balancing scheduling algorithm; wherein the processor includes multiple processor cores; the multiple processor cores each have their own task queue; at least one processor core is in a busy state; at least one processor core is in an idle state; the busy state indicates that there are tasks to be executed in the task queue of the processor core; the idle state indicates that the tasks to be executed in the task queue of the processor core have been processed; the processor determines that the current load is less than or equal to the preset value, and executes the load balancing scheduling algorithm corresponding to the preset conditions; so that the processor core in the idle state remains in an idle state; wherein the preset conditions correspond one-to-one to the load balancing scheduling algorithm.

[0007] It is understood that when the load balancing scheduling algorithm is invoked, if the current processor load is less than or equal to a preset value, then, based on the conditions limiting the invocation of the load balancing scheduling algorithm, the load balancing scheduling algorithm corresponding to the preset conditions is executed, so that the idle core remains idle. Subsequently, after the core remains idle for a second predetermined time, the processor can shut down the clock and power supply to the core to further control core power consumption and achieve deep energy savings for the computing device.

[0008] In one possible implementation, the preset conditions for calling the load balancing scheduling algorithm include: newly added tasks; wherein, newly added tasks include creating new tasks or awakening blocked tasks; or the completion of the last task to be executed in the task queue of any processor core; or a preset time interval.

[0009] It is understandable that when any of the above three preset conditions occurs, the processor will be triggered to call the load balancing scheduling algorithm, causing the processor to enter the task scheduling process.

[0010] In another possible implementation, when the preset condition is a new task, the processor determines that the current load is less than or equal to the preset value, and executes the load balancing scheduling algorithm corresponding to the preset condition, including: determining that the current load is less than or equal to the preset value, and the processor performs load balancing between busy processor cores.

[0011] It can be understood that when a new task is added to the operating system and triggers the load balancing scheduling algorithm, the method proposed in the embodiment of the present application only performs load balancing in the busy cores, so that the tasks can be evenly concentrated in the busy cores, and the idle cores remain idle, thereby saving power consumption.

[0012] In another possible implementation, the processor performs load balancing among the processor cores in a busy state, including: the processor dispatches the newly added task to the task queue of the processor core in a busy state.

[0013] It is understandable that the processor evenly distributes the newly added tasks to at least one core in a busy state, so that the cores in an idle state remain in an idle state, thereby saving power consumption.

[0014] In another possible implementation, when the preset condition is that the last task to be executed in the task queue of any processor core is completed, the processor determines that the current load is less than or equal to the preset value, and executes the load balancing scheduling algorithm corresponding to the preset condition, including: determining that the current load is less than or equal to the preset value, the processor does not execute load balancing scheduling.

[0015] It is understandable that since the processor is in a low-load state at this time, the load of the core in the busy state is relatively low. When the last task to be executed in the task queue of any core is completed, the processor does not schedule the task in the busy core to the idle core, so that the core that has completed the last task to be executed in the task queue can enter the idle state, thereby saving power consumption for the computing device.

[0016] In another possible implementation, when the preset condition is a preset time interval, the processor determines that the current load is less than or equal to the preset value, and executes the load balancing scheduling algorithm corresponding to the preset condition, including: when determining that the current load is less than or equal to the preset value, the processor performs load balancing between processor cores in a busy state.

[0017] It is understandable that, because the processor is currently in a low-load state, the load on the busy cores is relatively low. Therefore, the processor does not need to wake up the idle cores to share the tasks of the busy cores. The processor only needs to maintain a balanced load on the busy cores. In this case, the idle cores can remain idle, thereby saving power for the computing device.

[0018] In another possible implementation, if the current load is greater than a preset value, load balancing is performed among all processor cores of the processor.

[0019] It is understandable that if the current load is greater than the preset value, it means that the processor is in a high-load state. At this time, the processor performs load balancing scheduling on all processor cores when allocating tasks to ensure that the load of each processor core remains balanced and that some cores will not be affected by excessive load, affecting performance such as processing speed.

[0020] In another possible implementation, obtaining the current load includes calculating a weighted average load of the plurality of processor cores within a first predetermined time.

[0021] It is understood that processor load conditions can vary, including time-based load and real-time load. To accurately determine the processor load condition, the weighted average load of multiple processor cores within the first predetermined time period is selected to determine whether the processor is in a high-load or low-load state. This method uses the weighted average load of multiple processors within the first predetermined time period to determine the current processor load, making the result more accurate and preventing the result from being affected by instantaneous high or low load.

[0022] In another possible implementation, the method further includes: after the processor core remains in the idle state for a second predetermined time, the processor turns off the power supply and / or clock of the processor core.

[0023] It is understandable that after the processor core remains in an idle state for a second predetermined time, the processor turns off the power and / or clock of the processor core, which can further control the core power consumption and deeply save energy for the computing device.

[0024] In a second aspect, the present application provides a computing device, which includes modules applied to the method of the first aspect or any possible design method of the first aspect.

[0025] In a third aspect, the present application provides a computing device comprising a memory and a processor. The memory and the processor are coupled; the memory is configured to store computer program code, which includes computer instructions. When the processor executes the computer instructions, the computing device performs the load balancing scheduling method according to the first aspect and any possible implementation thereof.

[0026] In a fourth aspect, the present application provides a computing device comprising a processor, wherein the processor executes the load balancing scheduling method of the first aspect and any possible implementation thereof.

[0027] Illustratively, the computing device may be a server, a tablet computer, a desktop, a laptop, a notebook computer, a netbook, and the like.

[0028] In a fifth aspect, the present application provides a computer-readable storage medium comprising computer instructions, wherein when the computer instructions are executed on a computing device, the computing device executes the load balancing scheduling method of the first aspect and any possible implementation thereof.

[0029] In a sixth aspect, the present application provides a computer program product comprising computer instructions, wherein when the computer instructions are executed on a computing device, the computing device is caused to execute the load balancing scheduling method of the first aspect and any possible implementation thereof.

[0030] For the specific descriptions of the second to sixth aspects and their various implementations in this application, reference can be made to the detailed descriptions in the first aspect and its various implementations; and for the beneficial effects of the second to sixth aspects and their various implementations, reference can be made to the analysis of the beneficial effects in the first aspect and its various implementations, which will not be repeated here.

[0031] These and other aspects of the present application will become more readily apparent from the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 Schematic diagram of two load balancing scenarios in a traditional method provided in an embodiment of the present application;

[0033] Figure 2A schematic diagram of two load balancing scheduling results in a traditional method provided in an embodiment of the present application;

[0034] Figure 3 A schematic diagram of a load balancing scheduling result provided in an embodiment of the present application;

[0035] Figure 4 A schematic diagram of an implementation environment involved in the load balancing scheduling method provided in an embodiment of the present application;

[0036] Figure 5 A structural diagram of a computing device provided in an embodiment of the present application;

[0037] Figure 6 A flow chart of a load balancing scheduling method provided in an embodiment of the present application;

[0038] Figure 7 A flow chart of another load balancing scheduling method provided in an embodiment of the present application;

[0039] Figure 8 A flow chart of another load balancing scheduling method provided in an embodiment of the present application;

[0040] Figure 9 A flow chart of another load balancing scheduling method provided in an embodiment of the present application;

[0041] Figure 10 A structural diagram of a processor provided in an embodiment of the present application. DETAILED DESCRIPTION

[0042] For ease of understanding, the following briefly introduces the relevant terms involved in the embodiments of this application:

[0043] (1) Load balancing: The processor adjusts the distribution of tasks in different processor cores by running a load balancing program. The purpose is to distribute tasks to different processor cores as much as possible, so as to achieve a relatively balanced load on each processor core.

[0044] (2) Busy state, idle state, low power state, deep low power state:

[0045] Based on whether there are tasks to be executed in the task queue of the processor core, the state of the core can be divided into a busy state and an idle state.

[0046] When there are tasks to be executed in the task queue of a processor core, the state of the core is a busy state. At this time, the core can be referred to as a core in a busy state or a busy processor core.

[0047] When there are no tasks to be executed in the task queue of a processor core, the state of the core is an idle state. At this time, the core can be referred to as a core in an idle state or an idle processor core.

[0048] When a processor core is idle, the processor can provide low voltage / low frequency power to the core, which means the core is in a low power consumption state. The low voltage / low frequency here refers to the power supply voltage / power supply frequency when the core is busy.

[0049] When a processor core is idle for a period of time, the processor can turn off the clock and power of the core. At this time, the core is in a deep low power state.

[0050] (3) The terms “first,” “second,” and “third” are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly specifying the number of the technical features indicated. Therefore, a feature identified as “first,” “second,” or “third” may explicitly or implicitly include one or more of the features.

[0051] Traditionally, when a processor is under low load, it distributes tasks evenly across multiple cores to achieve load balancing. However, this prevents multiple cores from entering an idle state, preventing the computing device from achieving deep energy savings.

[0052] In one example, if Figure 1 As shown, Figure 1 Schematic diagram of two load balancing scenarios in traditional methods. Figure 1 In

[15] , based on the load conditions of multiple cores, the cores can be divided into busy cores (e.g., busy CPU cores) and idle cores (e.g., idle CPU cores).

[0053] The unit that executes the load balancing scheduling algorithm in a processor is called a scheduler. A busy-state load balancing scheduler, which balances the load across busy cores, is called a busy-state load balancing scheduler, and includes a periodic balancer. This load balancing scheduler operates between busy cores, periodically monitoring their loads. If the loads on busy cores are uneven, it schedules tasks between them to achieve a balanced load across them.

[0054] The load balancing scheduler that performs load balancing on idle cores is the idle state load balancing scheduler, including nohz idle balancer and new idle balancer.

[0055] nohz idle balancer is used to load balance the idle cores under the control of the busy core. nohz is a Linux operating mode that includes on and off. When nohz is set to on, other cores have entered the idle state, and the busy core has too many tasks, exceeding the task threshold. The busy core drives the interrupt controller (GIC) through the clock interrupt sched softirq. The GIC sends an internal processor interrupt (IPI) to the idle core to wake up the idle core and trigger nohz idle balancer. This interrupt is used to request the idle core to share tasks when the number of tasks on the busy core exceeds a certain threshold. When nohz idle balancer is triggered, the tasks that can be migrated from the busy core to the idle core. When nohz = off, a timer interrupt is set on the core to periodically interrupt the core's execution process.

[0056] The new idle balancer is used to check whether other busy cores need to share tasks when all pending tasks in the task queue of any core are completed. If so, the tasks that can be migrated on the busy cores are migrated to the idle cores. If not, the cores with completed pending tasks in the task queue enter the idle state.

[0057] In one example, if Figure 2 As shown, Figure 2 Figure A in the middle is a load diagram of the core in the busy state and the idle state. Figure 2 Figure B is a diagram showing the load of the busy core in Figure A after being scheduled by the busy load balancing scheduler. Figure 2 Figure C shows the load of the busy and idle cores in Figure A after being scheduled by the idle-state load balancing scheduler. As shown in Figure B, the busy-state load balancing scheduler only balances load among busy cores. Figure C shows that the idle-state load balancing scheduler distributes the load from busy cores to idle cores, maintaining load balance across all cores.

[0058] Based on this, the present application proposes a load balancing scheduling method. When a load balancing scheduling algorithm is called, if the current load of the processor is less than or equal to a preset value, the load balancing scheduling algorithm corresponding to the preset condition is executed based on the limiting conditions for calling the load balancing scheduling algorithm, so that the idle cores remain idle. This method enables the processor to power the idle cores at low voltage / low frequency to control the core's power consumption and save energy for the computing device. Subsequently, after the core remains idle for a second predetermined time, the processor can shut down its clock and power supply to further control the core's power consumption, thus achieving deep energy saving for the computing device.

[0059] In one example, when the processor load is less than 25%, the processor is in a low-load state, and the load balancing scheduling method proposed in the embodiment of the present application is used to schedule tasks on multiple processor cores in the computing device, such as Figure 3 As shown, Figure 3 Figure A in the figure is a schematic diagram of the load of multiple cores included in the computing device. As shown in Figure A, each core has some tasks evenly distributed, and the average load of each core is less than 25%. Figure 3 As shown in Figure B, Figure B shows the load situation of each core in Figure A after the cores are scheduled by the load balancing scheduling method proposed in this application. Figure 3 As can be seen from Figure B, after the load balancing scheduling method provided in the embodiment of the present application is used to schedule tasks on multiple cores, the tasks are concentrated on the leftmost core in Figure B.

[0060] The implementation of the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0061] Please refer to Figure 4 , which shows a schematic diagram of an implementation environment involved in the load balancing scheduling method provided in an embodiment of the present application, such as Figure 4 As shown, the implementation environment may include: a front-end application 110 and a data center 120 .

[0062] The data center 120 includes at least one computing device 130 . The computing device 130 includes an operating system 140 and a processor 150 . The processor 150 includes multiple cores 151 .

[0063] By way of example, the computing device 130 may be a server, a tablet computer, a desktop, a laptop, a notebook computer, a netbook, and the like.

[0064] Exemplarily, the operating system 140 may be a Linux operating system or the like.

[0065] The front-end application 110 communicates and interacts with the operating system 140 , for example, the front-end application 110 sends a task to the operating system 140 .

[0066] The processor 150 is used to assign tasks sent by the front-end application 110 to the operating system 140 to the appropriate core 151, and schedule tasks in the task queue of the core 151, such as assigning tasks to be executed in the task queue of one core 151 to another core 151 for processing.

[0067] The core 151 is used to process various tasks issued by the front-end application 110 under the scheduling of the processor 150. The core 151 can be a CPU core. The embodiment of the present application does not limit the number of computing devices 130, processors 150 and cores 151. Figure 4 The numbers of computing devices 130 , processors 150 , and cores 151 are examples only.

[0068] Optional, please refer to Figure 5 , Figure 5 FIG2 is a schematic diagram of another computing device 200 provided in an embodiment of the present application. The computing device 200 includes a processor 201 , a memory 202 , and a network interface 203 .

[0069] The processor 201 includes one or more CPUs, which may be single-core CPUs or multi-core CPUs.

[0070] The memory 202 includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, or optical memory.

[0071] Optionally, the processor 201 implements the load balancing scheduling method provided in the embodiment of the present application by reading instructions stored in the memory 202, or the processor 201 implements the load balancing scheduling method provided in the embodiment of the present application by internally stored instructions. In the case where the processor 201 implements the method in the above embodiment by reading instructions stored in the memory 202, the memory 202 stores instructions for implementing the load balancing scheduling method provided in the embodiment of the present application.

[0072] The network interface 203 is a wired interface (port), such as a fiber distributed data interface (FDDI) or a gigabit Ethernet (GE) interface. Alternatively, the network interface 203 is a wireless interface. It should be understood that the network interface 203 includes multiple physical ports and is used to access a network. Optionally, the computing device also includes a bus 204. The processor 201, memory 202, and network interface 203 are typically interconnected via the bus 204 or by other means.

[0073] The following describes the load balancing scheduling method provided in the embodiment of the present application:

[0074] Please refer to Figure 6 , is a flow chart of a load balancing scheduling method provided in an embodiment of the present application. The method is applied to a processor of a computing device. Figure 6 As shown, the method may include S101-S106.

[0075] S101: The processor responds to a preset condition of invoking a load balancing scheduling algorithm.

[0076] The processor includes multiple processor cores; each processor core has its own task queue; at least one processor core is in a busy state; at least one processor core is in an idle state; the busy state indicates that there are tasks to be executed in the task queue of the processor core; the idle state indicates that the tasks to be executed in the task queue of the processor core have been processed.

[0077] The processor responds to the preset condition of calling the load balancing scheduling algorithm in the following manner: when a situation in the preset condition occurs in the computing device, the processor calls the load balancing scheduling algorithm corresponding to the preset condition.

[0078] The present application embodiment does not limit the specific circumstances of the preset conditions. For example, the preset conditions may include any one of conditions 1 to 3:

[0079] Condition 1: Add a new task to the processor.

[0080] The task queue of a core contains the tasks to be executed assigned to the core by the processor and the tasks being executed by the core.

[0081] The processor also has a blocking queue. This contains unfinished tasks (i.e., blocked tasks) that are suspended within the processor's cores. These unfinished tasks are removed from their corresponding core task queues and placed into the blocking queue. When a blocked task needs to be resumed, the processor removes it from the blocking queue and reassigns it to a core task queue.

[0082] Newly added tasks are tasks that need to be newly assigned to multiple cores in addition to the tasks in the task queues of the multiple cores in the processor. For example, newly added tasks include newly created tasks or newly awakened blocked tasks.

[0083] A newly created task is a task that is newly received by the operating system and does not exist in the kernel's task queue or the blocking queue. For example, a newly created task can be a task that is newly issued by a front-end application.

[0084] The newly awakened blocking task refers to a task that currently exists in the blocking queue and is ready to be reallocated to the core task queue.

[0085] In one example, when a new task is added to a Linux operating system, the processor needs to allocate a core to the new task. The processor then executes the sched_exec() process, assigning a core to the new task and running select_task_rq(), which inserts the new task into the task queue of the corresponding core.

[0086] Condition 2: The last pending task in the task queue of any processor core is completed.

[0087] Pending tasks refer to tasks waiting to be executed in the core task queue.

[0088] When the tasks in the task queue of any core are completed and are about to change from a busy state to an idle state, the core triggers the processor to call the load balancing scheduling algorithm.

[0089] In one example, when the operating system of the computing device is the Linux operating system, if the pending tasks in the task queue of any core in the computing device processor are completed and the task queue becomes empty, the core will change from a busy state to an idle state. At this time, the core triggers the processor to call idle_balance(), which is used to try to pull tasks from the task queues of other busy cores to execute on the idle core.

[0090] Condition 3: preset interval time.

[0091] The preset time period is a time period set in advance within the operating system. Every preset time period, the processor automatically calls the load balancing scheduling algorithm.

[0092] In one example, the operating system of the computing device is a Linux operating system, and the processor calls tigger_load_balance() in scheduler_tick() every preset time (such as one minute) to perform load balancing on multiple cores.

[0093] S102: The processor obtains the current load.

[0094] Optionally, the processor calculates a weighted average load of the plurality of processor cores within a first predetermined time.

[0095] For example, a better load calculation method in the Linux kernel may be the per-entity load tracking (PELT) algorithm, which calculates the weighted average of the historical load contributions of tasks in the task queue within a certain time window as the load of multiple processor cores.

[0096] The first predetermined time is a period of time in historical time, which is based on a period of time before the processor responds to calling the load balancing scheduling algorithm, for example, 1024 us.

[0097] In one example, the processor can perform multiple sampling statistics on the total load of multiple processor cores within a first predetermined time, and perform a weighted average of the load of each sampling as the current load of the processor. For example, a processor has 10 cores, and the total load of the 10 cores is counted once every minute within 5 minutes. If the total load of the 10 cores counted each time is 60%, 50%, 40%, 35%, and 25% respectively, and the loads obtained 5 times are assigned weights of 0.1, 0.3, 0.5, 0.7, and 1.0 respectively, then the weighted total load of the 10 cores within 5 minutes is:

[0098] (0.1*60%+0.3*50%+0.5*40%+0.7*35%+1.0*25%) / 5=18.1%. That is, in this case, the current load is 18.1%.

[0099] The weighted average load of the processor within the first predetermined time can prevent the instantaneous load of the processor core from affecting the result of judging the current load. It can be understood that the value farther away from the judgment time has a lower weight.

[0100] S103: The processor determines whether the current load is less than or equal to a preset value.

[0101] If yes, execute S104; if no, execute S105.

[0102] The preset value is a pre-set threshold used to determine whether the processor is under heavy or light load. When the load is less than or equal to the preset value, the processor is considered to be under light load, and when the load is greater than the preset value, the processor is considered to be under heavy load.

[0103] S104: The processor executes a load balancing scheduling algorithm corresponding to a preset condition to keep the processor cores in the idle state in the idle state, wherein the preset condition corresponds to the load balancing scheduling algorithm in a one-to-one manner.

[0104] Specifically, when the preset conditions include conditions 1 to 3 in S101 , condition 1 corresponds to algorithm 1, condition 2 corresponds to algorithm 2, and condition 3 corresponds to algorithm 3.

[0105] Algorithm 1. The processor performs load balancing among the busy processor cores.

[0106] Specifically: the processor schedules the newly added task to the task queue of the processor core that is in a busy state.

[0107] It is understandable that since the processor is in a low-load state at this time, the load of the core in the busy state is relatively low. When a new task is added to the operating system, the processor does not assign the task to the idle core, but instead evenly distributes the new task to the busy core, allowing the idle core to continue to remain idle, thereby saving power consumption for the computing device.

[0108] Algorithm 2, the processor does not perform load balancing scheduling.

[0109] The processor not performing load balancing scheduling is a specific implementation of the load balancing scheduling algorithm.

[0110] It is understandable that since the processor is in a low-load state at this time, the load of the core in the busy state is relatively low. When the last task to be executed in the task queue of any core is completed, the processor does not schedule the task in the busy core to the idle core, so that the core that has completed the last task to be executed in the task queue can enter the idle state, thereby saving power consumption for the computing device.

[0111] Algorithm 3, the processor performs load balancing among the busy processor cores.

[0112] In the load balancing algorithm corresponding to condition 3, the processor performs load balancing among the processor cores in the busy state. That is, when the load of the busy cores is unbalanced, the processor schedules their load to balance their load. When the load of the busy cores is balanced, the processor does not schedule their load to keep it balanced.

[0113] It is understandable that, because the processor is currently in a low-load state, the load on the busy cores is relatively low. Therefore, the processor does not need to wake up the idle cores to share the tasks of the busy cores. The processor only needs to maintain a balanced load on the busy cores. In this case, the idle cores can remain idle, thereby saving power for the computing device.

[0114] S105: The processor performs load balancing among all processor cores.

[0115] If the current load is greater than the preset value, it means that the processor is in a high-load state. At this time, the processor performs load balancing scheduling on all processor cores when allocating tasks to ensure that the load of each processor core remains balanced and that some cores will not be affected by excessive load, such as processing speed and other performance issues.

[0116] S106: After the processor core remains in the idle state for a second predetermined time, the processor turns off the power supply and / or clock of the processor core.

[0117] It is understandable that after the processor core remains in an idle state for a second predetermined time, the processor turns off the power and / or clock of the processor core, which can further control the core power consumption and deeply save energy for the computing device.

[0118] This application proposes a load balancing scheduling method. When a load balancing scheduling algorithm is invoked, if the processor load is less than or equal to a preset value, the load balancing scheduling algorithm corresponding to the preset conditions is executed based on the conditions for invoking the load balancing scheduling algorithm, so that idle cores remain idle. This method enables the processor to power idle cores at low voltage / low frequency to control core power consumption and save energy for the computing device. Subsequently, after the core remains idle for a second predetermined time, the processor can shut down the clock and power supply to further control core power consumption, achieving deep energy savings for the computing device.

[0119] The load balancing scheduling method provided above is described below through several specific embodiments.

[0120] Example 1:

[0121] like Figure 7 FIG. 1 is a flow chart of a load balancing scheduling method provided by an embodiment of the present application, wherein the method is applied to a processor of a computing device. Figure 7 The methods shown include:

[0122] S201: When a new task is created or a blocked task is awakened in the Linux operating system, the processor executes the sched_exec() process.

[0123] S202: The processor determines whether the current load is less than or equal to a preset value.

[0124] If yes, execute S203;

[0125] If not, execute S204.

[0126] S203: The processor selects at least one busy core for the newly created task or the blocked task to execute select_task_rq().

[0127] After executing S203, this process ends.

[0128] S204: The processor selects at least one idle core (find_idlest_CPU()) for the new task or the blocked task to run select_task_rq().

[0129] It can be understood that in S204, when there is an idle core in the processor, the idle core is preferentially selected to execute the new task or the blocked task; when there is no idle core in the processor, a core with relatively fewer tasks is selected from multiple cores to execute the new task or the blocked task.

[0130] In this method, when the processor load exceeds a preset value, the processor selects a core from among multiple cores that has no tasks or relatively few tasks to execute the newly added task. When the computing device is in a low-load state, one or more cores from among the busy cores are selected to execute the newly added task. This method allows tasks to be concentrated on some cores when the processor is under low load, allowing more cores to enter an idle state, thereby controlling core power consumption and achieving energy conservation for the computing device.

[0131] Example 2:

[0132] like Figure 8 FIG. 1 is a flow chart of a load balancing scheduling method provided by an embodiment of the present application, wherein the method is applied to a processor of a computing device. Figure 8 The methods shown include:

[0133] S301: When the last pending task in the task queue of any processor core is completed, the processor calls idle_balance() to try to pull tasks from the task queues of other busy cores so that tasks can be evenly distributed on each core.

[0134] S302: The processor determines whether the current load is less than or equal to a preset value.

[0135] If yes, execute S303;

[0136] If not, execute S304.

[0137] S303: The processor ignores idle_balance(), and causes the core whose task queue has completed the last task to be executed to enter an idle state.

[0138] After executing S303, this process ends.

[0139] S304: The processor assigns the tasks in the task queue of the busy core to the idle core.

[0140] In this method, when the current processor load is greater than a preset value, if any core has completed its last pending task and is about to enter an idle state, the processor will call a function to perform load balancing scheduling, allocating appropriate tasks from the core's task queue to the core about to enter an idle state and other idle cores, thereby maintaining load balancing across multiple cores. When the current processor load is less than or equal to a preset value, if any core has completed its last pending task and is about to enter an idle state, the processor will ignore the function call instruction, causing the core that has completed its task to enter an idle state, while the cores that are already idle will continue to remain idle, thereby controlling core power consumption and achieving energy conservation for the computing device.

[0141] like Figure 9 FIG. 1 is a flow chart of a load balancing scheduling method provided by an embodiment of the present application, wherein the method is applied to a computing device processor. Figure 9 The methods shown include:

[0142] S401: When the processor periodically triggers the load balancing process, tigger_load_balance() is called in scheduler_tick().

[0143] S402: The processor determines whether the current load is less than or equal to a preset value.

[0144] If yes, execute S403;

[0145] If not, execute S404.

[0146] S403: The processor ignores tiger_load_balance().

[0147] After executing S403, this process ends.

[0148] S404: The processor performs load balancing among all cores.

[0149] In this method, when the processor's current load exceeds a preset value, if the processor periodically triggers the load balancing process, it calls the load balancing function to perform load balancing scheduling on all cores. When the processor's current load is less than or equal to the preset value, if the processor periodically triggers the load balancing process, the processor ignores the load balancing function to schedule all cores, ensuring that tasks continue to be evenly distributed on busy cores while keeping idle cores idle. This controls core power consumption and saves energy for the computing device.

[0150] The above mainly introduces the solution provided by the embodiment of the present application from the perspective of the method. In order to realize the above functions, it includes hardware structures and / or software modules corresponding to the execution of each function. It should be easy to realize that the technical goals in this field are combined with the units and algorithm steps of each example described in the embodiments disclosed herein, and the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional technical goals can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0151] The embodiment of the present application also provides a processor 300. Figure 10 , which is a structural diagram of a processor 300 provided in an embodiment of the present application.

[0152] The processor 300 includes: an acquisition unit 310 for acquiring the current load in response to a preset condition for calling a load balancing scheduling algorithm; the processor includes multiple processor cores; the multiple processor cores each have their own task queue; at least one processor core is in a busy state; at least one processor core is in an idle state; the busy state indicates that there are tasks to be executed in the task queue of the processor core; the idle state indicates that the tasks to be executed in the task queue of the processor core have been processed; a determination unit 320 for determining that the current load is less than or equal to a preset value, and a load balancing scheduling unit 330 for executing a load balancing scheduling algorithm corresponding to the preset condition; so that the processor core in the idle state remains in an idle state; wherein the preset condition corresponds one-to-one to the load balancing scheduling algorithm. For example, in combination with Figure 6 The acquisition unit 310 is used for S101 and S102 in the method embodiment, the determination unit 320 is used for S103 in the method embodiment, and the load balancing scheduling unit 330 is used for S104 in the method embodiment.

[0153] Optionally, the preset conditions for calling the load balancing scheduling algorithm include: adding a new task; wherein the new task includes creating a new task or waking up a blocked task; or the last task to be executed in the task queue of any processor core is completed; or a preset time interval.

[0154] Optionally, when the preset condition is a new task, the determining unit 320 is specifically used to determine that the current load is less than or equal to a preset value, and the load balancing scheduling unit 330 is specifically used to perform load balancing between the processor cores in a busy state. Figure 6 The determination unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S104 in the method embodiment.

[0155] Optionally, the load balancing scheduling unit 330 is specifically configured to schedule the newly added task to the task queue of the processor core that is in a busy state. Figure 6 The load balancing scheduling unit 330 is used in S104 in the method embodiment.

[0156] Optionally, when the preset condition is that the last task to be executed in the task queue of any processor core is completed, the determination unit 320 is specifically used to determine that the current load is less than or equal to the preset value, and the load balancing scheduling unit 330 is specifically used to prevent the processor from performing load balancing scheduling. Figure 6 The determination unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S104 in the method embodiment.

[0157] Optionally, when the preset condition is a preset time interval, the determining unit 320 is specifically configured to, if it is determined that the current load is less than or equal to the preset value, the load balancing scheduling unit 330 is specifically configured to, the processor perform load balancing between the processor cores in the busy state. Figure 6 The determination unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S104 in the method embodiment.

[0158] Optionally, the determination unit 320 is further configured to, if it is determined that the current load is greater than a preset value, the load balancing scheduling unit 330 is further configured to perform load balancing among all the processor cores of the processor. Figure 6 The determination unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S105 in the method embodiment.

[0159] Optionally, the acquisition unit 310 is specifically configured to calculate the weighted average load of the plurality of processor cores within the first predetermined time. Figure 6 The acquisition unit 310 is used in S102 in the method embodiment.

[0160] Optionally, the processor further includes a power management unit 340, which is configured to shut down the power supply and / or clock of the processor core after the processor core remains in an idle state for a second predetermined time. Figure 6 The power management unit 340 is used in S106 in the method embodiment.

[0161] Of course, the processor 300 provided in the embodiment of the present application may include but is not limited to an acquisition unit 310 , a determination unit 320 , a load balancing scheduling unit 330 and a power management unit 340 .

[0162] Another embodiment of the present application provides a computing device, which may be a server, tablet computer, desktop, laptop, notebook computer, or netbook. The computing device includes a memory and a processor. The memory and processor are coupled; the memory is used to store computer program code, which includes computer instructions. When the processor executes the computer instructions, the computing device performs the steps of the load balancing scheduling method described in the above method embodiment.

[0163] Another embodiment of the present application also provides a computer-readable storage medium, which stores computer instructions. When the computer instructions are executed on a computing device, the computing device executes each step executed by the computing device in the load balancing scheduling method process shown in the above method embodiment.

[0164] Another embodiment of the present application provides a chip system for use in a computing device. The chip system includes one or more interface circuits and one or more processors. The interface circuits and processors are interconnected via circuits. The interface circuits are configured to receive signals from the computing device's memory and send signals to the processors, the signals including computer instructions stored in the memory. When the computing device processor executes the computer instructions, the computing device performs the steps performed by the computing device in the load balancing scheduling method described in the above method embodiment.

[0165] In another embodiment of the present application, a computer program product is also provided. The computer program product includes computer instructions. When the computer instructions are executed on a computing device, the computing device executes each step executed by the computing device in the load balancing scheduling method process shown in the above method embodiment.

[0166] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer execution instructions are loaded and executed on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website, computer, server or data center to another website, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more media that can be integrated. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (eg, a solid state disk (SSD)).

[0167] The above is only a specific embodiment of the present application. Those skilled in the art may conceive of changes or substitutions based on the specific embodiment provided in this application, and all such changes or substitutions shall fall within the scope of protection of this application.

Claims

1. A load balancing scheduling method, characterized in that: The method comprises: The processor obtains a current load in response to a preset condition for invoking a load balancing scheduling algorithm; wherein the processor includes multiple processor cores; the multiple processor cores each have a respective task queue; multiple processor cores are in a busy state; at least one processor core is in an idle state; the busy state indicates that there are pending tasks in the task queue of the processor core; and the idle state indicates that pending tasks in the task queue of the processor core have been processed. The processor determines that the current load is less than or equal to a preset value, and executes the load balancing scheduling algorithm corresponding to the preset condition to balance the load among the busy processor cores and keep the idle processor cores in the idle state; wherein the preset condition corresponds to the load balancing scheduling algorithm one by one; The preset conditions include: Adding a new task; wherein the new task includes creating a new task or waking up a blocked task; or The last pending task in the task queue of any processor core is completed; or Interval preset time; When the preset condition is that the last task to be executed in the task queue of any processor core is completed, the processor determines whether the current load is less than or equal to the preset value. If it is determined that the current load is less than or equal to the preset value, the processor does not perform load balancing scheduling.

2. The method according to claim 1, characterized in that When the preset condition is a newly added task, the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to the preset condition, including: It is determined that the current load is less than or equal to the preset value, and the processor performs load balancing among the processor cores in the busy state.

3. The method according to claim 2, characterized in that The processor performs load balancing among the processor cores in the busy state, including: The processor schedules the newly added task to the task queue of the processor core in the busy state.

4. The method according to claim 1, wherein When the preset condition is the preset time interval, the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to the preset condition, including: When it is determined that the current load is less than or equal to the preset value, the processor performs load balancing among the processor cores in the busy state.

5. The method according to any one of claims 1 to 4, characterized in that The method further comprises: If the current load is greater than the preset value, load balancing is performed among all processor cores of the processor.

6. The method according to any one of claims 1 to 4, characterized in that The obtaining of the current load includes: The weighted average loads of the plurality of processor cores within a first predetermined time are calculated.

7. The method according to any one of claims 1 to 4, characterized in that The method further includes: after the processor core remains in the idle state for a second predetermined time, the processor turns off the power supply and / or clock of the processor core.

8. A computing device, characterized in that The method comprises a memory and a processor; the memory and the processor are coupled; the memory is used to store computer program code, and the computer program code includes computer instructions; wherein, when the processor calls the program instructions to execute the method according to any one of claims 1 to 7.

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