Ferroelectric switching device, method of preparation, method of control and three-dimensional memory

Abstract

A ferroelectric switching device can apply a voltage on a ferroelectric layer through a first electrode and a second electrode to generate an in-plane electric field in the ferroelectric layer, change the direction of the in-plane electric field by changing the direction of the voltage, and control the first crack and the second crack to separate alternatively. The electric connection and electric insulation of the first conductive layer and the second conductive layer are realized by the closing and separating of the first crack and the second crack, so as to realize the function of the ferroelectric switching device. The ferroelectric switching device has higher speed, lower energy consumption and smaller chip area, and the manufacturing process is simple, compatible with Fe-NAND process, low in cost and high in economic benefit.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of integrated circuits, and in particular to a ferroelectric switching device, a preparation method, a control method and a three-dimensional memory. BACKGROUND

[0002] With the development of microelectronic technology, the feature size of transistors on integrated circuits is approaching the physical limit. If the device size is further reduced, there will be a serious leakage problem. Because of the mechanical "on" and "off" characteristics, the function device based on electro-mechanical coupling effectively avoids the leakage problem in the "off" state. At the same time, compared with traditional semiconductor devices, micro-electro-mechanical devices also have the advantages of large on-off ratio, low power consumption, simple structure and process, etc., which has great development potential and application value in developing high-density, low-power, high-stability memory, transistors and logic devices. SUMMARY

[0003] The technical problem to be solved by the embodiments of the present disclosure is to provide a ferroelectric switching device, a preparation method, a control method and a three-dimensional memory.

[0004] The embodiments of the present disclosure provide a ferroelectric switching device, which comprises: a ferroelectric layer; a first electrode and a second electrode, which are arranged on the ferroelectric layer and are independent of each other along a first direction; a first conductive layer and a second conductive layer, which are respectively arranged on both sides of the first electrode and the second electrode along a second direction intersecting the first direction; a first signal delivery end and a second signal delivery end connected to both ends of the first conductive layer; a third signal delivery end and a fourth signal delivery end connected to both ends of the second conductive layer; a fifth signal delivery end connected to the middle part of the first conductive layer; a sixth signal delivery end connected to the middle part of the second conductive layer; a first crack extending from the ferroelectric layer along a direction perpendicular to the ferroelectric layer and at least penetrating the first conductive layer between the first signal delivery end and the fifth signal delivery end, the second conductive layer between the third signal delivery end and the sixth signal delivery end, the first conductive layer being divided into two parts independent of each other by the first crack, and the second conductive layer being divided into two parts independent of each other by the first crack; and a second crack extending from the ferroelectric layer along a direction perpendicular to the ferroelectric layer and at least penetrating the first conductive layer between the fifth signal delivery end and the second signal delivery end, the second conductive layer between the sixth signal delivery end and the fourth signal delivery end, the first conductive layer being divided into two parts independent of each other by the second crack, and the second conductive layer being divided into two parts independent of each other by the second crack.

[0005] In an embodiment, the first crack penetrates or does not penetrate the ferroelectric layer, and / or the second crack penetrates or does not penetrate the ferroelectric layer.

[0006] In an embodiment, the first electrode comprises a first protrusion, a width of the first protrusion is minimum in the second direction, the first crack is located in an overlapping area of the first protrusion and the first conductive layer; the second electrode comprises a second protrusion, a width of the second protrusion is minimum in the second direction, the second crack is located in an overlapping area of the second protrusion and the first conductive layer.

[0007] In an embodiment, the first protrusion is arranged at one end of the first electrode facing the second electrode, and the second protrusion is arranged at one end of the second electrode facing the first electrode.

[0008] In an embodiment, the first electrode further comprises a first bearing area connected with the first protrusion, and a first conductive terminal is arranged on the first bearing area; the second electrode further comprises a second bearing area connected with the second protrusion, and a second conductive terminal is arranged on the second bearing area.

[0009] In an embodiment, the first conductive layer comprises a first body, a second body, a fifth body, a first bridge area connecting the first body and the fifth body, and a second bridge area connecting the fifth body and the second body; the second conductive layer comprises a third body, a fourth body, a sixth body, a third bridge area connecting the third body and the sixth body, and a fourth bridge area connecting the sixth body and the third body; the first crack penetrates through the first bridge area and the third bridge area; and the second crack penetrates through the second bridge area and the fourth bridge area.

[0010] In an embodiment, in the second direction, a width of the first bridge area and the second bridge area is smaller than a width of the first body, the second body and the fifth body; and / or, a width of the third bridge area and the fourth bridge area is smaller than a width of the third body, the fourth body and the sixth body.

[0011] In an embodiment, the first signal conveying end is arranged on the first body, the second signal conveying end is arranged on the second body, the third signal conveying end is arranged on the third body, the fourth signal conveying end is arranged on the fourth body, the fifth signal conveying end is arranged on the fifth body, and the sixth signal conveying end is arranged on the sixth body.

[0012] In an embodiment, the first conductive layer and the second conductive layer are arranged in a central symmetry with the first electrode and the second electrode as the center.

[0013] The embodiment of the present disclosure further provides a preparation method of a ferroelectric switching device, which comprises the following steps: providing a substrate; sequentially forming a ferroelectric layer, a first electrode, a second electrode, a first conductive layer, a second conductive layer, a first signal transmission end, a second signal transmission end, a third signal transmission end, a fourth signal transmission end, a fifth signal transmission end and a sixth signal transmission end on the surface of the substrate, the first conductive layer and the second conductive layer are respectively arranged on the two sides of the first electrode and the second electrode in a second direction, the first signal transmission end and the second signal transmission end are connected with the two ends of the first conductive layer; the third signal transmission end and the fourth signal transmission end are connected with the two ends of the second conductive layer; the fifth signal transmission end is connected with the middle part of the first conductive layer, and the sixth signal transmission end is connected with the middle part of the second conductive layer; forming a first crack and a second crack, the first crack extends from the ferroelectric layer in a direction perpendicular to the ferroelectric layer and at least penetrates the first conductive layer between the first signal transmission end and the fifth signal transmission end, the second conductive layer between the third signal transmission end and the sixth signal transmission end, the first conductive layer is divided into two parts independent of each other by the first crack, and the second conductive layer is divided into two parts independent of each other by the first crack; the second crack extends from the ferroelectric layer in a direction perpendicular to the ferroelectric layer and at least penetrates the first conductive layer between the fifth signal transmission end and the second signal transmission end, the second conductive layer between the sixth signal transmission end and the fourth signal transmission end, the first conductive layer is divided into two parts independent of each other by the second crack, and the second conductive layer is divided into two parts independent of each other by the second crack.

[0014] In an embodiment, the first crack does not penetrate or penetrates the ferroelectric layer, and / or the second crack penetrates or does not penetrate the ferroelectric layer.

[0015] In an embodiment, the method for forming the first crack and the second crack comprises the following steps: applying a polarization voltage to the ferroelectric layer, so that the polarization direction of the ferroelectric domain of the ferroelectric layer is the same as the direction of the polarization voltage, to form the set ferroelectric domain polarization direction; applying a first flipping voltage to the ferroelectric layer through the first electrode and the second electrode, to form the first crack; applying a second flipping voltage to the ferroelectric layer through the first electrode and the second electrode, to form the second crack, the polarity of the second flipping voltage is opposite to that of the first flipping voltage.

[0016] The embodiment of the present disclosure further provides a control method of the ferroelectric switching device, comprising: applying a first voltage to the ferroelectric layer through the first electrode and the second electrode, controlling the separation of the first crack and the closure of the second crack, realizing the electrical insulation of the first signal transmission end and the fifth signal transmission end, the electrical insulation of the third signal transmission end and the sixth signal transmission end, the electrical conduction of the fifth signal transmission end and the second signal transmission end, and the electrical conduction of the sixth signal transmission end and the fourth signal transmission end; applying a second voltage to the ferroelectric layer through the first electrode and the second electrode, controlling the closure of the first crack and the separation of the second crack, realizing the electrical conduction of the first signal transmission end and the fifth signal transmission end, the electrical conduction of the third signal transmission end and the sixth signal transmission end, the electrical insulation of the fifth signal transmission end and the second signal transmission end, and the electrical insulation of the sixth signal transmission end and the fourth signal transmission end, wherein the first voltage and the second voltage are opposite in polarity.

[0017] In an embodiment, the first voltage or the second voltage is applied to the ferroelectric layer through the first electrode and the second electrode under the control of an input signal, and the logic circuit function is realized by setting the electrical levels of the first signal transmission end, the second signal transmission end, the third signal transmission end and the fourth signal transmission end.

[0018] The embodiment of the present disclosure further provides a three-dimensional memory comprising the ferroelectric switching device

[0019] The ferroelectric switching device provided by the embodiment of the present disclosure can apply a voltage to the ferroelectric layer through the first electrode and the second electrode, so as to generate an in-plane electric field in the ferroelectric layer, change the direction of the in-plane electric field by changing the direction of the voltage, control the separation of the first crack and the second crack, and realize the electrical connection and electrical insulation of the first conductive layer and the second conductive layer through the closure and separation of the first crack and the second crack, so as to realize the function of the ferroelectric switching device. Compared with the MOSFET complementary switching device, the ferroelectric switching device has higher speed, lower energy consumption and smaller chip area, and the manufacturing process is simple, compatible with the Fe-NAND process, low in cost and high in economic benefit. In addition, the ferroelectric switching device based on ferroelectric-crack has a sudden switching behavior and a high ON / OFF current ratio. In addition, the first conductive layer and the second conductive layer serve as a conductive channel, and at the first crack and the second crack, the contact area of the metal contact interface (fracture surface) of the two parts of the first conductive layer and the second conductive layer is large, so that the contact resistance is low and the signal transmission speed is fast. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 and Figure 2 is a top view schematic diagram of the ferroelectric complementary switching device provided by the embodiment of the present disclosure, whereinFigure 1 is a schematic diagram of the first crack A1 separating, the second crack A2 closing, Figure 2 is a schematic diagram of the first crack A1 closing, the second crack A2 separating;

[0021] Figure 3 is a schematic diagram of the cross section along the line B-B' shown in Figure 1 ;

[0022] Figure 4 is a schematic diagram of the cross section along the line C-C' shown in Figure 1 ;

[0023] Figure 5 is a schematic diagram of the cross section along the line D-D' shown in Figure 1 ;

[0024] Figure 6 is a schematic diagram of the cross section along the line E-E' shown in Figure 1 ;

[0025] Figure 7 is a schematic diagram of the cross section along the line F-F' shown in Figure 1 ;

[0026] Figure 8 is a schematic diagram of the cross section along the line C-C' shown in Figure 2 ;

[0027] Figure 9 is a schematic diagram of the cross section along the line D-D' shown in Figure 2 ;

[0028] Figure 10 is a schematic diagram of the cross section along the line E-E' shown in Figure 2 ;

[0029] Figure 11A is a schematic diagram of a triangular cyclic voltage;

[0030] Figure 11B is a schematic diagram of a pulse cyclic voltage;

[0031] Figure 12 is a schematic diagram of a logic circuit constituted by the ferroelectric switching device provided in an embodiment of the present disclosure;

[0032] Figure 13A is a truth table for realizing a buffer function by using the logic circuit shown in Figure 12 ;

[0033] Figure 13B is a truth table for realizing a NOT gate function by using the logic circuit shown in Figure 12 ;

[0034] Figure 13C is a truth table for realizing an AND gate function by using the logic circuit shown in Figure 12The truth table for the logic circuit shown implements the AND gate function.

[0035] Figure 14 This is a schematic diagram of the steps in the fabrication method of the ferroelectric switching device provided in the embodiments of this disclosure;

[0036] Figures 15A-15D This is a schematic diagram of the device structure formed by the main steps of the fabrication method of the ferroelectric switching device provided in the embodiments of the present invention. Detailed Implementation

[0037] To make the objectives, technical means, and effects of this disclosure clearer, the embodiments will be further described below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are merely some, not all, of the embodiments of this disclosure, and are not intended to limit this disclosure. All other specific embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.

[0038] Figure 1 and Figure 2 This is a top view schematic diagram of the ferroelectric complementary switching device provided in the embodiments of this disclosure. Figure 3 It is along Figure 1 A schematic diagram of the cross-section of line B-B' shown. Figure 4 It is along Figure 1 A schematic diagram of the cross-section of line C-C' shown. Figure 5 It is along Figure 1 A schematic diagram of the cross-section of line D-D' shown. Figure 6 It is along Figure 1 A schematic diagram of the cross section of line E-E'. Figure 7 It is along Figure 1 A schematic diagram of the cross section of line F-F'. Figure 8 It is along Figure 2 A schematic diagram of the cross-section of line C-C' shown. Figure 9 It is along Figure 2 A schematic diagram of the cross-section of line D-D' shown. Figure 10 It is along Figure 2 A schematic diagram of the cross-section of line E-E', where, Figure 1 This is a schematic diagram showing the separation of the first crack A1 and the closure of the second crack A2. Figure 2 This is a schematic diagram showing the closure of the first crack A1 and the separation of the second crack A2.

[0039] Please see Figures 1-10 The ferroelectric switching device includes a ferroelectric layer 10, a first electrode 20, a second electrode 30, a first conductive layer 40, a second conductive layer 50, a first signal transmission terminal 80, a second signal transmission terminal 81, a third signal transmission terminal 90, a fourth signal transmission terminal 91, a fifth signal transmission terminal 100, and a sixth signal transmission terminal 101.

[0040] The first electrode 20 and the second electrode 30 are disposed on the ferroelectric layer 10, along a first direction (e.g., Figure 1 The first electrode 20 and the second electrode 30 are arranged independently in the Y direction. The first conductive layer 40 and the second conductive layer 50 are used to apply a voltage to the ferroelectric layer 10. Figure 1 The electrodes are respectively disposed on both sides of the first electrode 20 and the second electrode 30 in the X direction, and the second direction intersects with the first direction.

[0041] The first signal transmission terminal 80 and the second signal transmission terminal 81 are connected to both ends of the first conductive layer 40. The third signal transmission terminal 90 and the fourth signal transmission terminal 91 are connected to both ends of the second conductive layer 50. The fifth signal transmission terminal 100 is connected to the middle of the first conductive layer 40, and the sixth signal transmission terminal 101 is connected to the middle of the second conductive layer 50.

[0042] The first crack A1 originates from the ferroelectric layer 10 along a direction perpendicular to the ferroelectric layer 10 (e.g., Figure 4 The conductive layer 40 extends (in the Z direction) and at least penetrates the first conductive layer 40 between the first signal transmission end 80 and the fifth signal transmission end 100, and the second conductive layer 50 between the third signal transmission end 90 and the sixth signal transmission end 101. The first conductive layer 40 is separated into two independent parts by the first crack A1, and the second conductive layer 50 is separated into two independent parts by the first crack A1.

[0043] The second crack A2 originates from the ferroelectric layer 10 along a direction perpendicular to the ferroelectric layer 10 (e.g., Figure 6 The first conductive layer 40 (in the Z direction) extends and penetrates at least through the first conductive layer 40 between the fifth signal transmission end 100 and the second signal transmission end 81, and the second conductive layer 50 between the sixth signal transmission end 101 and the fourth signal transmission end 91. The first conductive layer 40 is separated into two independent parts by the second crack A2, and the second conductive layer 50 is separated into two independent parts by the second crack A2.

[0044] Specifically, changing the direction of the voltage applied to the ferroelectric layer 10 allows for selective separation of the first crack A1 and the second crack A2. Selective separation of the first crack A1 and the second crack A2 means that at any given time, neither the first crack A1 nor the second crack A2 can separate simultaneously; only one can separate. Similarly, at any given time, neither the first crack A1 nor the second crack A2 can close simultaneously; only one can close.

[0045] The working process of the ferroelectric switching device provided in this embodiment is as follows:

[0046] Referring to Figure 1 When a first voltage U1 is applied on the first electrode 20 and the second electrode 30, the first crack Al is separated, the first conductive layer 40 between the first signal delivery end 80 and the fifth signal delivery end 100 is divided into two parts insulated from each other, the second conductive layer 50 between the third signal delivery end 90 and the sixth signal delivery end 101 is divided into two parts insulated from each other, the first signal delivery end 80 and the fifth signal delivery end 100 are electrically insulated, the third signal delivery end 90 and the sixth signal delivery end 101 are electrically insulated; the second crack A2 is closed, the two parts of the first conductive layer 40 between the fifth signal delivery end 100 and the second signal delivery end 81 are in contact, the fifth signal delivery end 100 and the second signal delivery end 81 are electrically conductive, the two parts of the second conductive layer 50 between the sixth signal delivery end 101 and the fourth signal delivery end 91 are in contact, the sixth signal delivery end 101 and the fourth signal delivery end 91 are electrically conductive.

[0047] Referring to Figure 2 When a second voltage U2 is applied on the first electrode 20 and the second electrode 30, the first crack Al is closed, the two parts of the first conductive layer 40 between the first signal delivery end 80 and the fifth signal delivery end 100 are in contact, the two parts of the second conductive layer 50 between the third signal delivery end 90 and the sixth signal delivery end 101 are in contact, the first signal delivery end 80 and the fifth signal delivery end 100 are electrically conductive, the third signal delivery end 90 and the sixth signal delivery end 101 are electrically conductive; the second crack A2 is separated, the first conductive layer 40 between the fifth signal delivery end 100 and the second signal delivery end 81 is divided into two parts insulated from each other, the second conductive layer 50 between the sixth signal delivery end 101 and the fourth signal delivery end 91 is divided into two parts insulated from each other, the fifth signal delivery end 100 and the second signal delivery end 81 are electrically insulated, the sixth signal delivery end 101 and the fourth signal delivery end 91 are electrically insulated.

[0048] Wherein, the first voltage U1 and the second voltage U2 are opposite in polarity. For example, in some embodiments, the first voltage U1 is a positive voltage from the first electrode 20 to the second electrode 30 through the ferroelectric layer 10, and the second voltage U2 is a negative voltage from the first electrode 20 to the second electrode 30 through the ferroelectric layer 10; in other embodiments, the first voltage U1 is a negative voltage from the first electrode 20 to the second electrode 30 through the ferroelectric layer 10, and the second voltage U2 is a positive voltage from the first electrode 20 to the second electrode 30 through the ferroelectric layer 10.

[0049] The first conductive layer 40 and the second conductive layer 50 of the ferroelectric switching device provided in this embodiment can both be divided into two independent parts by the first crack A1 and the second crack A2. By changing the direction of the voltage applied to the ferroelectric layer 10, the separation of the first crack A1 and the second crack A2 can be controlled, thereby realizing the logic function of the ferroelectric switching device. Compared with metal-oxide-semiconductor field-effect transistor (MOSFET) switches, the ferroelectric switching device provided in this embodiment has higher speed, lower power consumption, and smaller chip area. It also has a simple manufacturing process, is compatible with Fe-NAND flash memory technology, has low cost, and high economic benefits. Furthermore, the ferroelectric switching device based on ferroelectric cracks has abrupt switching behavior and a high ON / OFF current ratio. The first conductive layer 40 and the second conductive layer 50 serve as conductive channels. At the first crack A1 and the second crack A2, the metal contact interface (fracture surface) of the two separated parts of the first conductive layer 40 and the second conductive layer 50 has a large contact area, resulting in low contact resistance and fast signal transmission speed.

[0050] In one embodiment of this disclosure, the first crack A1 may or may not penetrate the ferroelectric layer 10, and / or the second crack A2 may or may not penetrate the ferroelectric layer 10. Specifically, at least one of the first crack A1 and the second crack A2 may penetrate the ferroelectric layer 10, wherein the direction of penetration may include the Z direction or the Y direction. In some embodiments of this disclosure, neither the first crack A1 nor the second crack A2 may penetrate the ferroelectric layer 10, and the direction of penetration may include the Z direction or the Y direction. In particular, neither the first crack A1 nor the second crack A2 penetrates the ferroelectric layer 10 in the Y direction.

[0051] In the direction perpendicular to the ferroelectric layer 10 (e.g.) Figure 4 In the Z-direction, the first electrode 20 and the second electrode 30 are located above the ferroelectric layer 10, that is, the first electrode 20 and the second electrode 30 are disposed on the upper surface of the ferroelectric layer 10. The first electrode 20 and the second electrode 30 can be metal electrodes, such as Pt, Au, Cu, or Ag. In this embodiment, the ferroelectric layer 10 is disposed on a substrate 1000, the first electrode 20 and the second electrode 30 are disposed on the upper surface of the ferroelectric layer 10, and the substrate 1000 is used to support the ferroelectric switching device.

[0052] The first electrode 20 and the second electrode 30 are independent of each other, meaning that the first electrode 20 and the second electrode 30 are electrically insulated from each other. In one embodiment of this disclosure, the first electrode 20 and the second electrode 30 are along a first direction (e.g., Figure 1 The first electrode 20 and the second electrode 30 are disposed on the surface of the ferroelectric layer 10 in the Y direction, and there is a gap between the first electrode 20 and the second electrode 30, that is, the first electrode 20 and the second electrode 30 are not connected.

[0053] Furthermore, the first electrode 20 includes a first protrusion 21 in the second direction (e.g., Figure 1 In the X-direction, the first protrusion 21 is the region with the smallest width of the first electrode 20. For example, in this embodiment, the first electrode 20 further includes a first bearing region 22 connected to the first protrusion 21, in the second direction (e.g., in the X direction). Figure 1 In the X direction, the width W22 of the first bearing area 22 is greater than the width W21 of the first protrusion 21. Since the first protrusion 21 is the region with the smallest width of the first electrode 20, the electric field strength in the region where the first protrusion 21 is located is the strongest when a potential is applied to the first electrode 20. Therefore, the first crack A1 is located in the region corresponding to the first protrusion 21.

[0054] Furthermore, the second electrode 30 includes a second protrusion 31 in the second direction (e.g., Figure 1 In the X-direction, the second protrusion 31 is the region with the smallest width of the second electrode 30. For example, in this embodiment, the second electrode 30 further includes a second bearing region 32 connected to the second protrusion 31, in the second direction (e.g., in the X-direction). Figure 1 In the X direction, the width W32 of the second bearing area 32 is greater than the width W21 of the second protrusion 31. Since the second protrusion 31 is the region with the smallest width of the second electrode 30, the electric field strength in the region where the second protrusion 31 is located is the strongest when a potential is applied to the second electrode 30, and therefore the second crack A2 is located in the region corresponding to the second protrusion 31.

[0055] Further, in some embodiments, a first conductive terminal 23 is provided on the first carrier region 22, and the first conductive terminal 23 is connected with a voltage process circuit, and the voltage process circuit applies a potential to the first electrode 20 through the first conductive terminal 23. A second conductive terminal 33 is provided on the second carrier region 32, and the second conductive terminal 33 is connected with the voltage process circuit, and the voltage process circuit applies a potential to the second electrode 30 through the second conductive terminal 33. In some other embodiments of the present disclosure, the first conductive terminal 23 and the second conductive terminal 33 can not be provided, and the voltage process circuit is directly connected to the surfaces of the first electrode 20 and the second electrode 30.

[0056] Further, the first protruding portion 21 is provided at one end of the first electrode 20 facing the second electrode 30, and the second protruding portion 31 is provided at one end of the second electrode 30 facing the first electrode 20. That is, the first protruding portion 21 and the second protruding portion 31 are provided adjacently, so that the electric field intensity of the corresponding regions of the first protruding portion 21 and the second protruding portion 31 can be further improved, and the controllability of the regions where the first crack A1 and the second crack A2 exist can be further realized.

[0057] Further, the materials of the first electrode 20 and the second electrode 30 can be intermetallic alloy materials, such as MnPt or FePt. The ductility of the intermetallic alloy materials is small, and the first crack A1 and the second crack A2 can penetrate the first electrode 20 and the second electrode 30.

[0058] In some embodiments, the first conductive layer 40 includes a first body 41, a second body 42, a fifth body 43, a first bridge region 44 connecting the first body 41 and the fifth body 43, and a second bridge region 45 connecting the fifth body 43 and the second body 42. The second conductive layer 50 includes a third body 51, a fourth body 52, a sixth body 53, a third bridge region 54 connecting the third body 51 and the sixth body 53, and a fourth bridge region 55 connecting the sixth body 53 and the third body 51.

[0059] In the second direction (e.g., the X direction), Figure 1 The first bridge region 44 and the third bridge region 54 are respectively provided on both sides of the first protruding portion 21 in the second direction (e.g., the X direction), and the first crack A1 penetrates the first bridge region 44 and the third bridge region 54, thereby separating the first bridge region 44 into two parts isolated from each other and separating the third bridge region 54 into two parts isolated from each other.

[0060] In the second direction (e.g., the X direction), Figure 1In the middle X direction, the second bridge region 45 and the fourth bridge region 55 are respectively arranged on both sides of the second protruding portion 31, and the second crack A2 penetrates the second bridge region 45 and the fourth bridge region 55, thereby separating the second bridge region 45 into two parts isolated from each other and separating the fourth bridge region 55 into two parts isolated from each other.

[0061] In some embodiments, the first signal delivery end 80 is arranged on the first body 41, the second signal delivery end 81 is arranged on the second body 42, the third signal delivery end 90 is arranged on the third body 51, the fourth signal delivery end 91 is arranged on the fourth body 52, the fifth signal delivery end 100 is arranged on the fifth body 43, and the sixth signal delivery end 101 is arranged on the sixth body 53.

[0062] When the first crack Al is separated and the second crack A2 is closed, the first signal delivery end 80 is electrically insulated from the fifth signal delivery end 100, the third signal delivery end 90 is electrically insulated from the sixth signal delivery end 101, the fifth signal delivery end 100 is electrically connected to the second signal delivery end 81, and the sixth signal delivery end 101 is electrically connected to the fourth signal delivery end 91.

[0063] When the first crack Al is separated and the second crack A2 is closed, the first signal delivery end 80 is electrically insulated from the fifth signal delivery end 100, the third signal delivery end 90 is electrically insulated from the sixth signal delivery end 101, the fifth signal delivery end 100 is electrically connected to the second signal delivery end 81, and the sixth signal delivery end 101 is electrically connected to the fourth signal delivery end 91.

[0064] In some embodiments, in the second direction (e.g., the Y direction), the first bridge region 44 and the second bridge region 45 are arranged on both sides of the first body 41, and the first crack Al penetrates the first bridge region 44 and the second bridge region 45, thereby separating the first bridge region 44 into two parts isolated from each other and separating the second bridge region 45 into two parts isolated from each other. Figure 1 In the middle X direction, the width of the first bridge region 44 and the second bridge region 45 is smaller than the width of the first body 41, the second body 42, and the fifth body 45. For example, the width W44 of the first bridge region 44 is smaller than the width W41 of the first body 41, which on the one hand provides good connection and support for the first signal delivery end 80, the second signal delivery end 81, and the fifth signal delivery end 100, and on the other hand provides a narrower first bridge region 44 and a second bridge region 45, so that the first crack Al can completely penetrate the first bridge region 44 and the second crack A2 can completely penetrate the second bridge region 45.

[0065] In some embodiments, in the second direction (e.g., the Y direction), the first bridge region 44 and the second bridge region 45 are arranged on both sides of the first body 41, and the first crack Al penetrates the first bridge region 44 and the second bridge region 45, thereby separating the first bridge region 44 into two parts isolated from each other and separating the second bridge region 45 into two parts isolated from each other. Figure 1In the third bridge region 54 and the fourth bridge region 55, the width is smaller than the width of the third main body 51, the fourth main body 52 and the sixth main body 53. For example, the width W54 of the third bridge region 54 is smaller than the width W51 of the third main body 51, which on one hand provides good connection and support for the third signal transmission end 90, the fourth signal transmission end 91 and the sixth signal transmission end 101, and on the other hand provides a narrower third bridge region 54 and the fourth bridge region 55, so that the first crack Al can completely penetrate the third bridge region 54, and the second crack A2 can completely penetrate the fourth bridge region 55.

[0066] In some embodiments, the first conductive layer 40 and the second conductive layer 50 are symmetrically arranged with the first electrode 20 and the second electrode 30 as the center. Specifically, the first main body 41 and the third main body 51, the second main body 42 and the fourth main body 52, the fifth main body 43 and the sixth main body 53, the first bridge region 44 and the third bridge region 54, and the second bridge region 45 and the fourth bridge region 55 are symmetrically arranged with the first electrode 20 and the second electrode 30 as the center, respectively.

[0067] Further, the material of the first conductive layer 40 and the second conductive layer 50 can be an intermetallic alloy material, such as MnPt or FePt. The intermetallic alloy material has small ductility, so that when the ferroelectric layer 10 forms the first crack Al and the second crack A2, the first crack Al and the second crack A2 can extend and penetrate the first conductive layer 40 and the second conductive layer 50.

[0068] Further, in the present embodiment, the materials of the first conductive layer 40 and the second conductive layer 50 are the same, so that the ductility of the first conductive layer 40 and the second conductive layer 50 is the same, which facilitates the selection of an appropriate voltage to further ensure that the first crack Al and the second crack A2 can penetrate the first conductive layer 40 and the second conductive layer 50. In other embodiments of the present disclosure, the materials of the first conductive layer 40 and the second conductive layer 50 can also be different but have similar ductility, so as to further avoid the situation that the first crack Al and the second crack A2 do not penetrate at least one of the conductive layers.

[0069] In this embodiment, the first signal transmission terminal 80 serves as the first input terminal of the electrical signal of the ferroelectric switching device, and the fifth signal transmission terminal 100 serves as the first output terminal of the electrical signal of the ferroelectric switching device. In another embodiment, the first signal transmission terminal 80 serves as the first output terminal of the electrical signal of the ferroelectric switching device, and the fifth signal transmission terminal 100 serves as the first input terminal of the electrical signal of the ferroelectric switching device. The first signal transmission terminal 80 and the fifth signal transmission terminal 100 are along a first direction (e.g., Figure 1 Arranged in the Y direction. The first signal transmission terminal 80 and the fifth signal transmission terminal 100 are independent of each other, and there is no direct electrical connection between them.

[0070] In this embodiment, the third signal transmission terminal 90 serves as the second input terminal of the electrical signal of the ferroelectric switching device, and the sixth signal transmission terminal 101 serves as the second output terminal of the electrical signal of the ferroelectric switching device. In another embodiment, the third signal transmission terminal 90 serves as the second output terminal of the electrical signal of the ferroelectric switching device, and the sixth signal transmission terminal 101 serves as the second input terminal of the electrical signal of the ferroelectric switching device. The third signal transmission terminal 90 and the sixth signal transmission terminal 101 are along a first direction (e.g., Figure 1 Arranged in the Y direction. The third signal transmission terminal 90 and the sixth signal transmission terminal 101 are independent of each other and there is no direct electrical connection between them.

[0071] In this embodiment, the second signal transmission terminal 81 serves as the third input terminal for the electrical signal of the ferroelectric switching device, and the fifth signal transmission terminal 100 serves as the common output terminal for the electrical signals of the first signal transmission terminal 80 and the second signal transmission terminal 81. The first signal transmission terminal 80, the fifth signal transmission terminal 100, and the second signal transmission terminal 81 are connected along a first direction (e.g., ...). Figure 1 The signal transmission terminals are arranged in the Y direction, and the first signal transmission terminal 80, the fifth signal transmission terminal 100, and the second signal transmission terminal 81 are independent of each other and there is no direct electrical connection between them.

[0072] In this embodiment, the fourth signal transmission terminal 91 serves as the fourth input terminal for the electrical signal of the ferroelectric switching device, and the sixth signal transmission terminal 101 serves as the common output terminal for the electrical signals of the third signal transmission terminal 90 and the fourth signal transmission terminal 91. The third signal transmission terminal 90, the sixth signal transmission terminal 101, and the fourth signal transmission terminal 91 are connected along a first direction (e.g., Figure 1 The signal transmission terminals are arranged in the Y direction, and the third signal transmission terminal 90, the sixth signal transmission terminal 101 and the fourth signal transmission terminal 91 are independent of each other and there is no direct electrical connection between them.

[0073] When the first crack Al is closed and the second crack A2 is separated, the electrical signal required to be transmitted by the ferroelectric switching device is input through the first signal transmission end 80 and the third signal transmission end 90, conducted through the first conductive layer 40 and the second conductive layer 50, and then output through the fifth signal transmission end 100 and the sixth signal transmission end 101. When the first crack Al is separated and the second crack A2 is closed, the electrical signal required to be transmitted by the ferroelectric switching device is input through the second signal transmission end 81 and the fourth signal transmission end 91, conducted through the first conductive layer 40 and the second conductive layer 50, and then output through the fifth signal transmission end 100 and the sixth signal transmission end 101.

[0074] Further, the first signal transmission end 80 and the second signal transmission end 81, the third signal transmission end 90 and the fourth signal transmission end 91, the fifth signal transmission end 100 and the sixth signal transmission end 101 can be metal terminals, and the materials thereof include but are not limited to Pt, Au, Cu or Ag, etc. In the embodiment, the materials of the first signal transmission end 80 and the second signal transmission end 81, the third signal transmission end 90 and the fourth signal transmission end 91, the fifth signal transmission end 100 and the sixth signal transmission end 101 are the same as the materials of the first conductive terminal 23 and the second conductive terminal 33.

[0075] The embodiments of the present disclosure also provide a control method of the ferroelectric switching device. Please refer to Figure 1 and Figure 2 , the control method comprises: applying a first voltage U1 to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30, controlling the separation of the first crack Al and the closure of the second crack A2, realizing the electrical insulation of the first signal transmission end 80 and the fifth signal transmission end 100, the electrical insulation of the third signal transmission end 90 and the sixth signal transmission end 101, the electrical conduction of the fifth signal transmission end 100 and the second signal transmission end 81, and the electrical conduction of the sixth signal transmission end 101 and the fourth signal transmission end 91; applying a second voltage U2 to the ferroelectric layer through the first electrode 20 and the second electrode 30, controlling the closure of the first crack Al and the separation of the second crack A2, realizing the electrical conduction of the first signal transmission end 80 and the fifth signal transmission end 100, the electrical conduction of the third signal transmission end 90 and the sixth signal transmission end 101, the electrical insulation of the fifth signal transmission end 100 and the second signal transmission end 81, and the electrical insulation of the sixth signal transmission end 101 and the fourth signal transmission end 91, wherein the first voltage U1 and the second voltage U2 are opposite in polarity.

[0076] In this embodiment, the first voltage U1 and the second voltage U2 have opposite polarities; that is, the first voltage U1 is a positive voltage and the second voltage U2 is a negative voltage, or the first voltage U1 is a negative voltage and the second voltage U2 is a positive voltage. For example, in this embodiment, the first voltage U1 is a positive voltage in the direction from the first electrode 20 to the second electrode 30, and the second voltage U2 is a negative voltage in the same direction. In other embodiments, the first voltage U1 is a negative voltage in the same direction, and the second voltage U2 is a positive voltage in the same direction.

[0077] For the ferroelectric layer 10, its ferroelectric domains have polarization directions. When the direction of the electric field formed by the voltage applied to the ferroelectric layer 10 is opposite to the polarization direction of the ferroelectric domains, the ferroelectric domains in the ferroelectric layer 10 will flip. Due to the pinning effect of defects and dopants in the ferroelectric layer 10 on the domain walls, stress will be generated on the ferroelectric domain walls. Cracks will separate at the stress concentration points. When the direction of the electric field formed by the voltage applied to the ferroelectric layer 10 is the same as the polarization direction of the ferroelectric domains, the stress will dissipate and the cracks will close. Therefore, in this embodiment, the ferroelectric switching device applies a voltage to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30. The voltage forms an in-plane electric field within the ferroelectric layer 10. Below the first electrode 20 and below the second electrode 30, the directions of the electric field components along the direction perpendicular to the ferroelectric layer 10 are exactly opposite, and the polarization direction of the ferroelectric domains in the ferroelectric layer 10 is the same as the direction of one of the electric field components. This causes the cracks in the ferroelectric layer region where the direction of the electric field component is opposite to the polarization direction of the ferroelectric domains to separate, while the cracks in the ferroelectric layer region where the direction of the electric field component is the same as the polarization direction of the ferroelectric domains to close. Therefore, in this embodiment, by changing the polarity of the voltage applied to the ferroelectric layer, the cracks in different regions of the ferroelectric layer can be selectively separated, thereby realizing the function of the ferroelectric switching device.

[0078] For example, such as Figure 5 As shown, the polarization direction D of the ferroelectric domains in the ferroelectric layer 10 points towards the upper surface of the ferroelectric layer 10. When a first voltage U1 is applied to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30, the in-plane electric field E1 formed by the first voltage U1 in the ferroelectric layer 10 in the Z direction below the first electrode 20, specifically below the first protrusion 21, has an electric field component E1 in the Z direction. Z1 Pointing to the lower surface of the ferroelectric layer 10, below the second electrode 30, specifically below the second protrusion 31, the in-plane electric field E1 in the Z direction is the electric field component E1. Z2 The electric field component E1 points towards the upper surface of the ferroelectric layer 10. Z1 The direction is opposite to the polarization direction of the ferroelectric domains in ferroelectric layer 10, and the electric field component E1 Z2If the direction is the same as the polarization direction D of the ferroelectric domains of the ferroelectric layer 10, then the first crack A1 changes from a closed state to a separated state, and the second crack A2 changes from a separated state to a closed state.

[0079] For example, such as Figure 9 As shown, the polarization direction of the ferroelectric domains in the ferroelectric layer 10 points towards the upper surface of the ferroelectric layer 10. When the voltage applied to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30 changes from the first voltage U1 to the second voltage U2 with opposite polarity, the in-plane electric field E2 formed by the second voltage U2 in the ferroelectric layer 10 below the first electrode 20, specifically below the first protrusion 21, has an electric field component E2 in the Z direction. Z1 Pointing to the upper surface of the ferroelectric layer 10, below the second electrode 30, specifically below the second protrusion 31, the in-plane electric field E2 in the Z direction is the electric field component E2. Z2 The electric field component E2 points towards the lower surface of ferroelectric layer 10. Z1 The direction is the same as the polarization direction D of the ferroelectric domains of ferroelectric layer 10, and the electric field component E2 Z2 If the direction of the crack A1 is opposite to the polarization direction D of the ferroelectric domains of the ferroelectric layer 10, then the first crack A1 changes from a separated state to a closed state, and the second crack A2 changes from a closed state to a separated state.

[0080] It is understood that in other embodiments of this disclosure, the polarization direction of the ferroelectric domains of the ferroelectric layer 10 may also point to the lower surface of the ferroelectric layer 10, in which case the separation state and the closure state of the first crack A1 and the second crack A2 are interchanged.

[0081] It should be noted that after a crack is generated in the region corresponding to the first electrode 20 or the second electrode 30, the ferroelectric layer 10 will not generate a second crack in the corresponding region due to stress release. Therefore, there will be no situation where multiple cracks are generated in the region corresponding to the same electrode.

[0082] In some embodiments, a cyclic voltage can be applied to the ferroelectric layer 10 via the first electrode 20 and the second electrode 30 to control the separation and closure of the first crack and the second crack, for example, a triangular cyclic voltage and a pulse voltage. Figure 11A This is a schematic diagram of a triangular cyclic voltage, where the forward voltage of the triangular cyclic voltage reaches a certain value, for example, the peak value U. 峰 Ferroelectric domains flip, generating stress. The first crack A1 separates, and the second crack A2 closes. When the negative voltage of the triangular cyclic voltage reaches a certain value, such as the valley value U... 谷 The ferroelectric domains are flipped again, the first crack A1 closes, and the second crack A2 separates. Figure 11B This is a schematic diagram of a pulsed cyclic voltage, which represents a periodic commutation pulse. When the positive pulse voltage U... 正When the value is reached, the ferroelectric domain is flipped, stress is generated, the first crack Al is separated, and the second crack A2 is closed. When the negative pulse voltage U 负 When the value is reached, the ferroelectric domain is flipped again, the first crack Al is closed, and the second crack A2 is separated.

[0083] The ferroelectric switching device control method provided by the embodiments of the present disclosure realizes the function of the ferroelectric switching device by the alternative separation of the first crack and the second crack, has higher speed, lower energy consumption, and smaller chip area than the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) complementary switch, and has simple manufacturing process, is compatible with the Fe-NAND flash process, has low cost, and has great economic benefits. In addition, the ferroelectric switching device based on the ferroelectric-nano crack has a sudden switching behavior and a high ON / OFF current ratio. In addition, the first conductive layer 40 and the second conductive layer 50 are full layers as conductive channels, and at the first crack Al and the second crack A2, the contact area of the metal contact interface (fracture surface) of the two separated parts of the first conductive layer 40 and the second conductive layer 50 is large, so that the contact resistance is low and the signal transmission speed is fast.

[0084] Further, under the control of the input signal, a first voltage or a second voltage is applied to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30, and the logic circuit function is realized by setting the levels of the first signal transmission end 80, the second signal transmission end 81, the third signal transmission end 90, and the fourth signal transmission end 91.

[0085] For example, Figure 12 is a schematic diagram of a logic circuit composed of the ferroelectric switching device provided by an embodiment of the present disclosure. Please refer to Figure 1 The level corresponding to the voltage applied to the first electrode 20 and the second electrode 30 is taken as an input signal, input from the input end IN, the fifth signal transmission end 100 is taken as a first output end OUT1, the sixth signal transmission end 101 is taken as a second output end OUT2, the first signal transmission end 80 is taken as a first control signal input end D1, the third signal transmission end 90 is taken as a second control signal input end D2, the second signal transmission end 81 is taken as a third control signal input end D3, and the fourth signal transmission end 91 is taken as a fourth control signal input end D4. The logic circuit function can be realized by setting the levels of the first control signal input end D1, the second control signal input end D2, the third control signal input end D3, and the fourth control signal input end D4.

[0086] The voltage supply circuit is controlled by the input signal required to be input to the logic circuit to apply the first voltage and the second voltage on the first electrode 20 and the second electrode 30, to realize the alternative separation of the first crack and the second crack, thereby realizing the function of the logic circuit. For example, when the input signal required to be input to the logic circuit is low, the voltage supply circuit is controlled by the input signal required to be input to the logic circuit to apply the first voltage on the first electrode 20 and the second electrode 30, when the input signal required to be input to the logic circuit is high, the voltage supply circuit is controlled by the input signal required to be input to the logic circuit to apply the second voltage on the first electrode 20 and the second electrode 30, to realize the alternative separation of the first crack and the second crack; or, when the input signal required to be input to the logic circuit is high, the voltage supply circuit is controlled by the input signal required to be input to the logic circuit to apply the first voltage on the first electrode 20 and the second electrode 30, when the input signal required to be input to the logic circuit is low, the voltage supply circuit is controlled by the input signal required to be input to the logic circuit to apply the second voltage on the first electrode 20 and the second electrode 30, to realize the alternative separation of the first crack and the second crack.

[0087] Figure 13A is realized by using Figure 12 The truth table of the AND / OR logic circuit function is shown in Table 1. Figure 12 and Fig. 13A, the first signal delivery end is connected with low level, the third signal delivery end is connected with low level, the second signal delivery end and the fourth signal input end input the same control signal B, that is, the truth value of the first control signal input end D1 input signal is "0", the truth value of the second control signal input end D2 input signal is "0", the truth value of the third control signal input end D3 and the fourth control signal input end D4 input signal is the truth value of the control signal B, to realize the AND / OR logic circuit function.

[0088] When the input signal to the logic circuit is low, its truth value is "0", the voltage supply circuit applies the first voltage on the first electrode 20 and the second electrode 30, the first crack closes, the second crack separates, the input signal truth value of the input end IN is "0", the first signal delivery end and the fifth signal delivery end are turned on, the third signal delivery end and the sixth signal delivery end are turned on, no matter whether the control signal B is low or high, i.e. its truth value is "0" or "1", the truth value of the output signal of the first output end OUT1 is "0", and the truth value of the output signal of the second output end OUT2 is "0". When the input signal to the logic circuit is high, its truth value is "1", the voltage supply circuit applies the second voltage on the first electrode 20 and the second electrode 30, the first crack separates, the second crack closes, the input signal truth value of the input end IN is "1", the fifth signal delivery end and the second signal delivery end are turned on, the sixth signal delivery end and the fourth signal delivery end are turned on, when the control signal B is low, its truth value is "0", the truth value of the output signal of the first output end OUT1 is "0", and the truth value of the output signal of the second output end OUT2 is "0"; when the control signal B is high, its truth value is "1", the truth value of the output signal of the first output end OUT1 is "1", and the truth value of the output signal of the second output end OUT2 is "1".

[0089] Figure 13B is realized by using Figure 12 the truth table of the logic circuit realizing the AND / OR logic circuit function, please refer to Figure 12 and FIG. 13B, the first signal delivery end is connected with low voltage, the third signal delivery end is connected with the control signal B, the second signal delivery end is connected with the control signal B, and the fourth signal delivery end is connected with high voltage, i.e. the truth value of the first control signal input end D1 input signal is "0", the truth value of the fourth control signal input end D4 input signal is "1", and the truth values of the second control signal input end D2 and the third control signal input end D3 input signals are the truth value of the control signal B, realizing the AND / OR logic circuit function.

[0090] When the input signal required to be inputted to the logic circuit is low, its truth value is "0", the voltage supply circuit applies the first voltage on the first electrode 20 and the second electrode 30, the first crack closes, the second crack separates, the input signal truth value of the input end IN is "0", the first signal delivery end and the fifth signal delivery end are turned on, the third signal delivery end and the sixth signal delivery end are turned on, when the control signal B is low, its truth value is "0", the truth value of the output signal of the first output end OUT1 is "0", the truth value of the output signal of the second output end OUT2 is "0"; when the control signal B is high, its truth value is "1", the truth value of the output signal of the first output end OUT1 is "0", the truth value of the output signal of the second output end OUT2 is "1". When the input signal required to be inputted to the logic circuit is high, its truth value is "1", the voltage supply circuit applies the second voltage on the first electrode 20 and the second electrode 30, the first crack separates, the second crack closes, the input signal truth value of the input end IN is "1", the fifth signal delivery end and the second signal delivery end are turned on, the sixth signal delivery end and the fourth signal delivery end are turned on, when the control signal B is low, its truth value is "0", the truth value of the output signal of the first output end OUT1 is "0", the truth value of the output signal of the second output end OUT2 is "1"; when the control signal B is high, its truth value is "1", the truth value of the output signal of the first output end OUT1 is "1", the truth value of the output signal of the second output end OUT2 is "1".

[0091] Figure 13C is realized by using Figure 12 the truth table of the logic circuit realizing the AND / NOR logic circuit function, please refer to Figure 12 and Fig. 13C, the first signal delivery end is connected with low level, the third signal delivery end is connected with high level, the second signal delivery end is connected with the control signal B, the fourth signal delivery end is connected with low level, that is, the truth value of the first control signal input end D1 input signal is "0", the truth value of the second control signal input end D2 input signal is "1", the truth value of the third control signal input end D3 input signal is the truth value of the control signal B, the truth value of the fourth control signal input end D4 input signal is "0", the AND / NOR logic circuit function is realized.

[0092] When the input signal required to be input to the logic circuit is low, and the truth value thereof is "0", the voltage supply circuit applies a first voltage on the first electrode 20 and the second electrode 30, the first crack is closed, the second crack is separated, the input signal of the input end IN has the truth value "0", the first signal transmission end and the fifth signal transmission end are turned on, the third signal transmission end and the sixth signal transmission end are turned on, when the control signal B is low, the truth value thereof is "0", the first output end OUT1 outputs the signal with the truth value "0", and the second output end OUT2 outputs the signal with the truth value "1"; when the control signal B is high, the truth value thereof is "1", the first output end OUT1 outputs the signal with the truth value "0", and the second output end OUT2 outputs the signal with the truth value "1". When the input signal required to be input to the logic circuit is high, and the truth value thereof is "1", the voltage supply circuit applies a second voltage on the first electrode 20 and the second electrode 30, the first crack is separated, the second crack is closed, the input signal of the input end IN has the truth value "1", the fifth signal transmission end and the second signal transmission end are turned on, the sixth signal transmission end and the fourth signal transmission end are turned on, when the control signal B is low, the truth value thereof is "0", the first output end OUT1 outputs the signal with the truth value "0", and the second output end OUT2 outputs the signal with the truth value "0"; when the control signal B is high, the truth value thereof is "1", the first output end OUT1 outputs the signal with the truth value "1", and the second output end OUT2 outputs the signal with the truth value "0".

[0093] The disclosure embodiments further provide a preparation method of the ferroelectric switching device. Figure 14 is a schematic diagram of the steps of the preparation method of the ferroelectric switching device provided by the disclosure, please refer to Figure 14The preparation method comprises the following steps: S501, providing a substrate; S502, sequentially forming a ferroelectric layer, a first electrode, a second electrode, a first conductive layer, a second conductive layer, a first signal conveying terminal, a second signal conveying terminal, a third signal conveying terminal, a fourth signal conveying terminal, a fifth signal conveying terminal, and a sixth signal conveying terminal on the surface of the substrate, wherein the first conductive layer and the second conductive layer are respectively arranged on the two sides of the first electrode and the second electrode in a second direction, the first signal conveying terminal and the second signal conveying terminal are connected with the two ends of the first conductive layer, the third signal conveying terminal and the fourth signal conveying terminal are connected with the two ends of the second conductive layer, the fifth signal conveying terminal is connected with the middle part of the first conductive layer, and the sixth signal conveying terminal is connected with the middle part of the second conductive layer; S503, forming a first crack and a second crack, wherein the first crack extends from the ferroelectric layer in a direction perpendicular to the ferroelectric layer and at least penetrates the first conductive layer between the first signal conveying terminal and the fifth signal conveying terminal, the second conductive layer between the third signal conveying terminal and the sixth signal conveying terminal, the first conductive layer is divided into two parts independent of each other by the first crack, and the second conductive layer is divided into two parts independent of each other by the first crack; the second crack extends from the ferroelectric layer in a direction perpendicular to the ferroelectric layer and at least penetrates the first conductive layer between the fifth signal conveying terminal and the second signal conveying terminal, the second conductive layer between the sixth signal conveying terminal and the fourth signal conveying terminal, the first conductive layer is divided into two parts independent of each other by the second crack, and the second conductive layer is divided into two parts independent of each other by the second crack.

[0094] Figures 15A-15D is a device structure schematic diagram formed by the main steps of the preparation method of the ferroelectric switching device provided in the embodiment of the present application.

[0095] Please refer to steps S501 and Figure 15A , a substrate 1000 is provided.

[0096] The substrate 1000 can be a Si substrate, a Ge substrate, a SiGe substrate, an SOI (Silicon On Insulator) substrate, or a GOI (Germanium On Insulator) substrate, etc. In the embodiment, the substrate 1000 is preferably a Si substrate, which is used to support the device structure thereon.

[0097] Please refer to steps S502 and Figure 15BThe ferroelectric layer 10, the first electrode 20, the second electrode 30, the first conductive layer 40, the second conductive layer 50, the first signal transmission end 80 and the second signal transmission end 81, the third signal transmission end 90 and the fourth signal transmission end 91, the fifth signal transmission end 100 and the sixth signal transmission end 101 are sequentially formed on the surface of the substrate 1000.

[0098] In an embodiment, a layer of ferroelectric material is formed on the surface of the substrate 1000 by chemical vapor deposition, atomic layer deposition, pulsed laser deposition, molecular beam epitaxy, etc., and the layer of ferroelectric material is patterned by photolithography and etching to form the ferroelectric layer 10. In this embodiment, the material of the ferroelectric layer 10 includes HfZrOx, where Ox represents an oxide with varying stoichiometry, which can be suitable for hafnium-based complementary metal oxide semiconductor (CMOS) compatible ferroelectric NAND (Fe-NAND) flash memory to simplify the manufacturing process. In other embodiments of the present disclosure, the material of the ferroelectric layer 10 can also include one or more of lead magnesium niobate-lead titanate (PMN-PT), lead zirconate titanate (PZT), lead indium niobate-lead titanate (PIN-PT), or lead magnesium niobate-lead zirconate titanate-lead titanate (PMN-PZT-PT), BaTiO3 (BTO).

[0099] In an embodiment, a layer of electrode material is formed on the surface of the ferroelectric layer 10 by chemical vapor deposition, atomic layer deposition, pulsed laser deposition, molecular beam epitaxy, etc., and the layer of electrode material is patterned by photolithography and etching to form the first electrode 20 and the second electrode 30. The material of the first electrode 20 and the second electrode 30 can be an intermetallic alloy material, such as MnPt or FePt. In this embodiment, the first conductive layer 40 and the second conductive layer 50 are formed at the same time as the first electrode 20 and the second electrode 30 to save processes. In other embodiments, the first conductive layer 40 and the second conductive layer 50 can be formed after the first electrode 20 and the second electrode 30 are formed.

[0100] The signal transmission material layer can be formed on the first conductive layer 40 and the second conductive layer 50 by chemical vapor deposition, atomic layer deposition, pulsed laser deposition, molecular beam epitaxy and other processes, and the signal transmission material layer is patterned by photolithography and etching to form the first signal transmission end 80 and the second signal transmission end 81, the third signal transmission end 90 and the fourth signal transmission end 91, and the fifth signal transmission end 100 and the sixth signal transmission end 101. At the same time of forming the first signal transmission end 80 and the second signal transmission end 81, the third signal transmission end 90 and the fourth signal transmission end 91, and the fifth signal transmission end 100 and the sixth signal transmission end 101, the first conductive terminal 23 is formed on the first electrode 20, and the second conductive terminal 33 is formed on the second electrode 30.

[0101] Please refer to steps S502, Figure 15C and Figure 15D , the first crack A1 and the second crack A2 are formed.

[0102] The first crack A1 extends from the ferroelectric layer 10 in a direction perpendicular to the ferroelectric layer 10 (such as the Z direction in the figure) and penetrates the first conductive layer 40 between the first signal transmission end 80 and the fifth signal transmission end 100, and the second conductive layer 50 between the third signal transmission end 90 and the sixth signal transmission end 101. The first conductive layer 40 is divided into two independent parts by the first crack A1, and the first signal transmission end 80 and the fifth signal transmission end 100 are respectively arranged on the two independent parts of the first conductive layer 40 divided by the first crack A1. The second conductive layer 50 is divided into two independent parts by the first crack A1, and the third signal transmission end 90 and the sixth signal transmission end 101 are respectively arranged on the two independent parts of the second conductive layer 50 divided by the first crack A1.

[0103] The second crack A2 extends from the ferroelectric layer 10 in a direction perpendicular to the ferroelectric layer 10 (such as the Z direction in the figure) and penetrates the first conductive layer 40 between the fifth signal transmission end 100 and the second signal transmission end 81, and the second conductive layer 50 between the sixth signal transmission end 101 and the fourth signal transmission end 91. The first conductive layer 40 is divided into two independent parts by the second crack A2, and the fifth signal transmission end 100 and the second signal transmission end 81 are respectively arranged on the two independent parts of the first conductive layer 40 divided by the second crack A2. The second conductive layer 50 is divided into two independent parts by the second crack A2, and the sixth signal transmission end 101 and the fourth signal transmission end 91 are respectively arranged on the two independent parts of the second conductive layer 50 divided by the second crack A2.

[0104] In an embodiment of the present disclosure, the first crack Al does not penetrate or penetrates the ferroelectric layer, and / or the second crack A2 penetrates or does not penetrate the ferroelectric layer. Specifically, at least one of the first crack Al and the second crack A2 can penetrate the ferroelectric layer 10, wherein the penetration direction can include the Z direction or the Y direction. In some embodiments of the present disclosure, the first crack Al and the second crack A2 can both not penetrate the ferroelectric layer 10, and the penetration direction can include the Z direction or the Y direction, and in particular, the first crack Al and the second crack A2 both do not penetrate the ferroelectric layer 10 in the Y direction.

[0105] For the ferroelectric layer 10, the ferroelectric domains have a polarization direction. When the direction of the electric field formed by the voltage applied to the ferroelectric layer 10 is opposite to the polarization direction of the ferroelectric domains, the ferroelectric domains in the ferroelectric layer 10 will flip. Due to the pinning effect of defects and dopants in the ferroelectric layer 10 on the domain wall, stress will be generated at the ferroelectric domain wall, and cracks will be formed at the stress concentration. Therefore, the present disclosure also provides a method for forming the cracks. The method comprises:

[0106] A polarization voltage is applied to the ferroelectric layer 10, so that the polarization direction of the ferroelectric domains of the ferroelectric layer is the same as the direction of the polarization voltage, thereby forming the set ferroelectric domain polarization direction D. The polarization voltage forms a vertical electric field in the ferroelectric layer 10, so as to form the ferroelectric domain polarization direction D in the same direction in the ferroelectric layer.

[0107] For the ferroelectric layer 10, when no polarization voltage is applied, i.e. no external electric field is applied, the ferroelectric domains are distributed randomly in the ferroelectric layer 10. When the polarization voltage is applied, i.e. the external electric field is applied, the ferroelectric domains along the electric field direction grow, the ferroelectric domains opposite to the electric field direction disappear, and the ferroelectric domains distributed in other directions turn to the electric field direction, and finally the ferroelectric domains consistent with the electric field direction are formed, i.e. the set ferroelectric domain polarization direction is formed. In some embodiments, the electric field strength formed by the polarization voltage is greater than the coercive field of the ferroelectric domains, so as to further ensure that the ferroelectric domains with the polarization direction consistent with the electric field direction can be formed.

[0108] Referring to Figure 15C , a first flipping voltage U11 is applied to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30, thereby forming the first crack Al. Referring to Figure 15D , a second flipping voltage U22 is applied to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30, thereby forming the second crack A2, and the second flipping voltage U11 is opposite in polarity to the first flipping voltage U22.

[0109] In an embodiment of the present disclosure, please continue to refer to Figure 15C and Figure 5, a first flipping voltage U11 is applied to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30, and the first flipping voltage U11 forms an in-plane electric field E1 in the ferroelectric layer 10. Under the first electrode 20 and the second electrode 30, the directions of the electric field components of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 are just opposite, for example, the direction of the electric field component E1 Z1 of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 under the first electrode 20 is opposite to the direction of the electric field component E1 Z2 of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 under the second electrode 30. The polarization direction of the ferroelectric domain in the ferroelectric layer 10 is the same as the direction of one of the electric field components and opposite to the direction of the other electric field component, for example, the polarization direction of the ferroelectric domain in the ferroelectric layer 10 (in the same direction as the Z direction in the figure) is the same as the direction of the electric field component E1 Z2 of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 under the second electrode 30 and opposite to the direction of the electric field component E1 Z1 of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 under the first electrode 20. Then, under the first electrode 20, the ferroelectric domain in the ferroelectric layer 10 flips and stress is generated at the ferroelectric domain wall, and then the first crack A1 is formed at the stress concentration. For the first electrode 20, the area corresponding to the first protruding portion 21 is the area with the strongest electric field intensity, and then the first crack A1 appears in the area corresponding to the first protruding portion 21.

[0110] Please continue to refer to Figure 15D and Figure 9 In the embodiment of the present disclosure, a second flipping voltage U22 is applied to the ferroelectric layer 10 through the first electrode 20 and the second electrode 30, and the second flipping voltage U22 forms an in-plane electric field in the ferroelectric layer 10. Under the first electrode 20 and the second electrode 30, the directions of the electric field components of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 are just opposite, for example, the direction of the electric field component E2 Z1 of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 under the first electrode 20 is opposite to the direction of the electric field component E2 Z2 of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 under the second electrode 30. The polarization direction of the ferroelectric domain in the ferroelectric layer 10 is the same as the direction of one of the electric field components and opposite to the direction of the other electric field component, for example, the polarization direction of the ferroelectric domain in the ferroelectric layer 10 (in the same direction as the Z direction in the figure) is the same as the direction of the electric field component E2 Z1 of the in-plane electric field along the direction perpendicular to the ferroelectric layer 10 under the first electrode 20 and opposite to the direction of the electric field component E2 Z2If the direction of the electric field is opposite, the ferroelectric domains in the ferroelectric layer 10 under the second electrode 30 will be flipped, stress will be generated at the ferroelectric domain wall, and a second crack A2 will be formed at the stress concentration. For the second electrode 30, the area with the strongest electric field intensity is the area corresponding to the second protruding part 31, and thus the second crack A2 appears in the area corresponding to the second protruding part 31. After the voltage is changed, the stress in the ferroelectric layer under the first electrode 20 is affected by the change in the direction of the electric field, and the first crack A1 formed is closed.

[0111] In the above example, the polarization direction D of the ferroelectric domains of the ferroelectric layer 10 points to the lower surface of the ferroelectric layer 10. It can be understood that in other embodiments of the present disclosure, the polarization direction D of the ferroelectric domains of the ferroelectric layer 10 can also point to the lower surface of the ferroelectric layer 10, and the formation order of the first crack A1 and the second crack A2 is interchanged.

[0112] The preparation method provided by the embodiments of the present disclosure can prepare a ferroelectric switching device with complementary switching functions, and the manufacturing process is simple, compatible with the Fe-NAND process, low in cost, and high in economic benefit.

[0113] The embodiments of the present disclosure also provide a three-dimensional memory. The three-dimensional memory includes the ferroelectric switching device as described above. The ferroelectric switching device can be used in a logic circuit in the three-dimensional memory. For the application of the ferroelectric switching device in the three-dimensional memory, please refer to Figure 12 Figures 13A-13C .

[0114] The three-dimensional memory includes a storage array (Array) region and a peripheral circuit (Periphery) region. The storage array region is used to store information, and the peripheral circuit region can be located above or below the storage array region, or can be located around the storage array region. The peripheral circuit region is used to control the corresponding storage array region. The ferroelectric switching device can be arranged in the peripheral circuit region.

[0115] The ferroelectric switching device can also be applied to other microelectronic devices, such as a non-volatile flash memory (NorFlash), etc., and the specific limitation is not made.

[0116] The above only describes the preferred embodiments of the present disclosure, and it should be noted that those skilled in the art can make several improvements and refinements without departing from the principles of the present disclosure, and these improvements and refinements should also be considered as the protection scope of the present disclosure.​

Claims

1. A ferroelectric switching device, characterized by, The application relates to a ferroelectric memory device, comprising: a ferroelectric layer; a first electrode and a second electrode arranged on the ferroelectric layer, and arranged along a first direction and independent of each other; a first conductive layer and a second conductive layer arranged on both sides of the first electrode and the second electrode along a second direction intersecting the first direction; a first signal transmission end and a second signal transmission end connected to both ends of the first conductive layer; a third signal transmission end and a fourth signal transmission end connected to both ends of the second conductive layer; a fifth signal transmission end connected to the middle of the first conductive layer; a sixth signal transmission end connected to the middle of the second conductive layer; a first crack extending from the ferroelectric layer along a direction perpendicular to the ferroelectric layer and at least penetrating the first conductive layer between the first signal transmission end and the fifth signal transmission end and the second conductive layer between the third signal transmission end and the sixth signal transmission end, the first conductive layer being divided into two parts independent of each other by the first crack, and the second conductive layer being divided into two parts independent of each other by the first crack; and a second crack extending from the ferroelectric layer along a direction perpendicular to the ferroelectric layer and at least penetrating the first conductive layer between the fifth signal transmission end and the second signal transmission end and the second conductive layer between the sixth signal transmission end and the fourth signal transmission end, the first conductive layer being divided into two parts independent of each other by the second crack, and the second conductive layer being divided into two parts independent of each other by the second crack. The first crack penetrates or does not penetrate the ferroelectric layer, and / or the second crack penetrates or does not penetrate the ferroelectric layer. The first electrode comprises a first protruding part, which is the area with the smallest width of the first electrode along the second direction, and the first crack is located in the overlapping area of the first protruding part and the first conductive layer; and the second electrode comprises a second protruding part, which is the area with the smallest width of the second electrode along the second direction, and the second crack is located in the overlapping area of the second protruding part and the first conductive layer. The first protruding part is arranged at one end of the first electrode facing the second electrode, and the second protruding part is arranged at one end of the second electrode facing the first electrode. The first electrode further comprises a first bearing area connected to the first protruding part, and a first conductive terminal is arranged on the first bearing area; and the second electrode further comprises a second bearing area connected to the second protruding part, and a second conductive terminal is arranged on the second bearing area. The first conductive layer comprises a first main body, a second main body, a fifth main body, a first bridge area connecting the first main body and the fifth main body, and a second bridge area connecting the fifth main body and the second main body; and the second conductive layer comprises a third main body, a fourth main body, a sixth main body, a third bridge area connecting the third main body and the sixth main body, and a fourth bridge area connecting the sixth main body and the third main body, the first crack penetrates the first bridge area and the third bridge area, and the second crack penetrates the second bridge area and the fourth bridge area. ​ ​ ​ ​ 2. The ferroelectric switching device of claim 1, wherein, ​ 3. The ferroelectric switching device of claim 1, wherein, ​ 4. The ferroelectric switching device of claim 3, wherein, ​ 5. The ferroelectric switching device of claim 4, wherein, ​ 6. The ferroelectric switching device of claim 3, wherein, ​ 7. The ferroelectric switching device of claim 6, wherein, In the second direction, the width of the first bridge region and the second bridge region is less than the width of the first body, the second body and the fifth body; and / or, the width of the third bridge region and the fourth bridge region is less than the width of the third body, the fourth body and the sixth body.

8. The ferroelectric switching device of claim 6, wherein, The first signal delivery end is arranged on the first body, the second signal delivery end is arranged on the second body, the third signal delivery end is arranged on the third body, the fourth signal delivery end is arranged on the fourth body, the fifth signal delivery end is arranged on the fifth body, and the sixth signal delivery end is arranged on the sixth body.

9. The ferroelectric switching device of claim 1, wherein, The first conductive layer and the second conductive layer are arranged symmetrically with the first electrode and the second electrode as the center.

10. A method of fabricating a ferroelectric switching device, characterized by, Comprising: providing a substrate; forming, on the surface of the substrate, a ferroelectric layer, a first electrode, a second electrode, a first conductive layer, a second conductive layer, a first signal delivery end, a second signal delivery end, a third signal delivery end, a fourth signal delivery end, a fifth signal delivery end and a sixth signal delivery end in sequence, the first conductive layer and the second conductive layer being arranged on both sides of the first electrode and the second electrode in a second direction, the first signal delivery end and the second signal delivery end being connected to both ends of the first conductive layer; the third signal delivery end and the fourth signal delivery end being connected to both ends of the second conductive layer; the fifth signal delivery end being connected to the middle part of the first conductive layer, and the sixth signal delivery end being connected to the middle part of the second conductive layer; forming a first crack and a second crack, the first crack extending from the ferroelectric layer in a direction perpendicular to the ferroelectric layer and at least through the first conductive layer between the first signal delivery end and the fifth signal delivery end, the second conductive layer between the third signal delivery end and the sixth signal delivery end, the first conductive layer being divided into two independent parts by the first crack, and the second conductive layer being divided into two independent parts by the first crack; the second crack extending from the ferroelectric layer in a direction perpendicular to the ferroelectric layer and at least through the first conductive layer between the fifth signal delivery end and the second signal delivery end, the second conductive layer between the sixth signal delivery end and the fourth signal delivery end, the first conductive layer being divided into two independent parts by the second crack, and the second conductive layer being divided into two independent parts by the second crack.

11. The method of claim 10, wherein the ferroelectric switching device is a ferroelectric transistor. The first crack does not pass through or passes through the ferroelectric layer, and / or the second crack passes through or does not pass through the ferroelectric layer.

12. The method of claim 10, wherein the ferroelectric switching device is a ferroelectric transistor. The method for forming the first crack and the second crack comprises: applying a polarization voltage to the ferroelectric layer, so that the polarization direction of the ferroelectric domain of the ferroelectric layer is the same as the direction of the polarization voltage, to form the set polarization direction of the ferroelectric domain; applying a first flipping voltage to the ferroelectric layer through the first electrode and the second electrode to form the first crack; A second flipping voltage is applied to the ferroelectric layer through the first electrode and the second electrode to form the second crack, the second flipping voltage being opposite in polarity to the first flipping voltage.

13. A method of controlling a ferroelectric switching device as claimed in any one of claims 1 to 9, characterized in that The ferroelectric switching device comprises: A first voltage is applied to the ferroelectric layer through the first electrode and the second electrode to control the separation of the first crack and the closure of the second crack, so as to realize electrical insulation between the first signal transmission end and the fifth signal transmission end, electrical insulation between the third signal transmission end and the sixth signal transmission end, electrical conduction between the fifth signal transmission end and the second signal transmission end, and electrical conduction between the sixth signal transmission end and the fourth signal transmission end; and a second voltage is applied to the ferroelectric layer through the first electrode and the second electrode to control the closure of the first crack and the separation of the second crack, so as to realize electrical conduction between the first signal transmission end and the fifth signal transmission end, electrical conduction between the third signal transmission end and the sixth signal transmission end, electrical insulation between the fifth signal transmission end and the second signal transmission end, and electrical insulation between the sixth signal transmission end and the fourth signal transmission end, wherein the first voltage and the second voltage are opposite in polarity.

14. The method of controlling a ferroelectric switching device according to claim 13, wherein, The first voltage or the second voltage is applied to the ferroelectric layer through the first electrode and the second electrode under the control of an input signal, and the logic circuit function is realized by setting the electrical levels of the first signal transmission end, the second signal transmission end, the third signal transmission end and the fourth signal transmission end.

15. A three-dimensional memory, comprising: The ferroelectric switching device comprises any one of claims 1-9.

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