Semiconductor device

By optimizing the design of the field plate electrodes and insulation regions, the problem of increased output charge in MOSFET devices when the withstand voltage is increased was solved, achieving a balance between high withstand voltage and low output charge, thus improving the performance of semiconductor devices.

CN115411094BActive Publication Date: 2025-12-12KK TOSHIBA
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Patent Information

Application Number
CN202210137348.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2021-05-27
Filing Date
2022-02-15
Publication Date
2025-12-12
Estimated Expiration
2042-02-15

AI Technical Summary

Technical Problem

Existing MOSFET devices increase output charge while improving voltage withstand capability, making it difficult to balance high voltage withstand capability with low output charge.

Method used

The field plate electrode design employs a specific structure, including multiple parts of the field plate electrode and the insulating region. By optimizing the electrode width and the thickness distribution of the insulating film, the electric field is dispersed and the capacitance is reduced, achieving high withstand voltage and low output charge.

Benefits of technology

This achieves a significant reduction in output charge and switching losses while maintaining high withstand voltage, thereby improving the performance of semiconductor devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The semiconductor device of one embodiment has a first electrode, a second electrode, a semiconductor layer including a first semiconductor region, a second semiconductor region, and a third semiconductor region, a third electrode, a first insulating region, a second insulating region, a fourth electrode having a plurality of portions which are continuous in a first direction and include a first portion, a second portion, and a third portion, a width of the first portion in a second direction is a first width, the second portion is positioned on the second electrode side of the first portion in the first direction, a width of the second portion in the second direction is a second width smaller than the first width, the third portion is adjacent to the second portion, is positioned on the second electrode side of the second portion in the first direction, and a width of the third portion in the second direction is a third width larger than the second width, and a third insulating region.
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Description

[0001] Cross Reference to Related Applications

[0002] This application is based on Japanese Application No. 2021-088891 filed May 27, 2021, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] Embodiments relate to a semiconductor device. BACKGROUND

[0004] There is a semiconductor device such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) having a field plate structure in which a field plate electrode is provided under a gate electrode.

[0005] By providing the field plate electrode, the electric field intensity in the drift region of the MOSFET can be moderated. Thus, the breakdown voltage (hereinafter, simply referred to as the voltage) between the drain and the source of the MOSFET is increased. In addition, along with the increase in the voltage, the impurity concentration of the drift region can be set to be higher, and the on-resistance of the MOSFET can be reduced. That is, according to the MOSFET of the field plate structure, the increase in the voltage and the reduction in the on-resistance in the MOSFET can be achieved.

[0006] However, since a capacitance is generated between the field plate electrode and the semiconductor layer, the output charge amount and the switching loss of the MOSFET increase. In the semiconductor device such as the MOSFET, the increase in the voltage and the reduction in the output charge amount are required. SUMMARY

[0007] An object to be solved by the embodiments is to provide a semiconductor device that achieves both a high voltage and a low output charge amount.

[0008] An embodiment provides a semiconductor device having:

[0009] a first electrode;

[0010] a second electrode;

[0011] a semiconductor layer including: a first semiconductor region of a first conductivity type, which is located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode, and which is electrically connected to the second electrode; a second semiconductor region of a second conductivity type, which is located between the first electrode and the first semiconductor region in the first direction, and which is in contact with the first semiconductor region; and a third semiconductor region of the first conductivity type, which is located between the first electrode and the second semiconductor region in the first direction, and which is in contact with the second semiconductor region;

[0012] a third electrode between the first electrode and the first semiconductor region in the first direction, facing the second semiconductor region in a second direction intersecting the first direction;

[0013] a first insulating region between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region;

[0014] a second insulating region between the third electrode and the first electrode;

[0015] a fourth electrode having a plurality of portions including a first portion, a second portion, and a third portion, which are continuous in the first direction, between the third electrode and the first semiconductor region in the first direction, a width of the first portion in the second direction being a first width, the second portion being adjacent to the first portion and being located on the second electrode side of the first portion in the first direction, a width of the second portion in the second direction being a second width smaller than the first width, the third portion being adjacent to the second portion and being located on the second electrode side of the second portion in the first direction, a width of the third portion in the second direction being a third width larger than the second width; and

[0016] a third insulating region between the fourth electrode and the first semiconductor region.

[0017] Further, an embodiment provides a semiconductor device having:

[0018] a first electrode;

[0019] a second electrode;

[0020] a first semiconductor region of a first conductivity type on the second electrode;

[0021] a second semiconductor region of a second conductivity type selectively above the first semiconductor region;

[0022] a third semiconductor region of the first conductivity type selectively above the second semiconductor region;

[0023] a third electrode on the first semiconductor region;

[0024] a first insulating region separating the third electrode from the first semiconductor region, the second semiconductor region, and the third semiconductor region;

[0025] A fourth electrode, comprising a plurality of portions including a first portion, a second portion, and a third portion continuously arranged in a first direction from the first electrode toward the second electrode, is disposed in the first semiconductor region closer to the second electrode than the third electrode; and

[0026] The second insulating region is disposed between the fourth electrode and the first semiconductor region. The thickness of the portion sandwiched between the second portion and the first semiconductor region in the second direction is greater than the thickness of the portion sandwiched between the first portion and the first semiconductor region in the second direction and the thickness of the portion sandwiched between the third portion and the first semiconductor region in the second direction. Attached Figure Description

[0027] Figure 1 This is a cross-sectional view of the semiconductor device according to the embodiment, and is Figure 2 A cross-sectional view of line B-B'.

[0028] Figure 2 This is a top view of the semiconductor device according to the embodiment, and is Figure 1 A top view of line A-A'.

[0029] Figure 3 It is a cross-sectional view showing the corners, thickness, width, and length of the semiconductor device in the embodiment.

[0030] Figure 4 This is a cross-sectional view of a semiconductor device for reference.

[0031] Figure 5 (A) is the withstand voltage V of the semiconductor device. B The graph is obtained by plotting the simulation results of (V). Figure 5 (B) is the output charge Q of the semiconductor device. OSS / A(nC / mm 2 The chart is obtained by plotting the simulation results.

[0032] Figure 6 This is a cross-sectional view of the semiconductor device in the first modified example.

[0033] Figure 7 This is a cross-sectional view of the semiconductor device in the second variation.

[0034] Figure 8 This is a cross-sectional view of the semiconductor device in the third variation.

[0035] Figure 9 This is a cross-sectional view of the semiconductor device in the fourth variation.

[0036] Explanation of reference numerals in the attached figures

[0037] 1 semiconductor device 10 drain electrode (second electrode) 11 source electrode (first electrode) 11c connection region 21 drain region (first semiconductor region) 22 drift region (first semiconductor region) 30 base region (second semiconductor region) 40 source region (third semiconductor region) 50 gate electrode (third electrode) 51 field plate electrode (fourth electrode) 52 gate insulating film (first insulating region) 53 insulating film (fourth insulating region) 54 field plate insulating film (third insulating region) 55 interlayer insulating film (second insulating region) 61 portion 62 portion 63 portion (fifth portion) 64 portion (fourth portion) 65 portion (first portion) 66 portion (second portion) 67 portion (third portion) 68 portion (sixth portion) C0 to C8 corner L1 to L8 length T1 to T8 thickness W1 to W8 width DETAILED DESCRIPTION

[0038] Hereinafter, the embodiments will be described with reference to the drawings. In the following description, the same parts are denoted by the same reference numerals, and the description of parts described once is appropriately omitted. In addition, in the embodiments, the impurity concentration of the n-type (first conductive type) is represented in the order of n+ type, n type, unless otherwise specified.

[0039] Based on Figures 1-2 The configuration of the semiconductor device 1 of the embodiment will be described. Figure 1 is a main partial cross-sectional view of the semiconductor device of the first embodiment, and is a cross-sectional view of the B-B' line of Figure 2 Figure 2 is a plan view of the semiconductor device of the first embodiment, and is a plan view of the A-A' line of Figure 1

[0040] The semiconductor device 1 of the first embodiment is, for example, a MOSFET of a top and bottom electrode structure. The semiconductor device 1 has a first semiconductor region 20 (hereinafter, for example, a drain region 21 and a drift region 22), a second semiconductor region 30 (hereinafter, for example, a base region 30), a third semiconductor region 40 (hereinafter, for example, a source region 40), a second electrode 10 (hereinafter, for example, a drain electrode 10), a first electrode 11 (hereinafter, for example, a source electrode 11), a first insulating region 52 (hereinafter, for example, a gate insulating film 52), a second insulating region 55 (hereinafter, for example, an interlayer insulating film 55), a third insulating region 54 (hereinafter, for example, a field plate insulating film 54), a fourth insulating region 53 (hereinafter, for example, an insulating film 53), a third electrode 50 (hereinafter, for example, a gate electrode 50), a fourth electrode 51 (hereinafter, for example, a field plate electrode 51), and a connection region 11c.

[0041] ​​Here, a direction from the drain electrode 10 toward the source electrode 11 is set as a Z direction, a direction intersecting the Z direction is set as a Y direction, and a direction intersecting the Y direction and the Z direction is set as an X direction. The directions intersecting means that the directions are not parallel, for example, the directions are orthogonal.

[0042] The drain electrode 10 and the source electrode 11 extend along the X direction and the Y direction. The material of the drain electrode 10 and the material of the source electrode 11 are, for example, a metal containing at least one selected from the group of aluminum (Al), titanium (Ti), nickel (Ni), tungsten (W), gold (Au), and the like.

[0043] The semiconductor layer 15 is located between the drain electrode 10 and the source electrode 11 in the Z direction. The semiconductor layer 15 extends along the X direction and the Y direction. The semiconductor layer 15 contains a drift region 22, a drain region 21, a base region 30, and a source region 40. The main component of the semiconductor layer 15 is, for example, silicon (Si), silicon carbide (SiC), gallium nitride (GaN), or the like.

[0044] The semiconductor layer 15 contains semiconductor regions of a first conductive type and a second conductive type. For example, the first conductive type is n-type, and the second conductive type is p-type. In an embodiment, the first conductive type can be p-type and the second conductive type can be n-type. Hereinafter, it is assumed that the first conductive type is n-type and the second conductive type is p-type.

[0045] As an impurity element of the n-type conductive type contained in the semiconductor layer 15, for example, phosphorus (P), arsenic (As), or the like can be applied. As an impurity element of the p-type conductive type contained in the semiconductor layer 15, for example, boron (B) or the like can be applied.

[0046] The drain region 21 of the first conductive type (n+ type) is provided on the drain electrode 10. The drain region 21 is located between the drain electrode 10 and the source electrode 11 in the Z direction. The drain region 21 extends along the X direction and the Y direction. The drain region 21 is electrically connected to the drain electrode 10.

[0047] The drift region 22 of the first conductive type (n type) is provided on the drain region 21. The drift region 22 is located between the drain region 21 and the source electrode 11 in the Z direction. The drift region 22 has a first drift portion 23 and a second drift portion 24. The first drift portion 23 extends along the X direction and the Y direction. A plurality of second drift portions 24 are provided at intervals along the X direction. The second drift portion 24 extends along the Y direction. The second drift portion 24 extends from the first drift portion 23 toward the source electrode 11 side in the Z direction.

[0048] The base regions 30 of the second conductivity type (p-type) are selectively provided over the second drift portions 24. The plurality of base regions 30 are arranged at intervals in the X direction. The base regions 30 extend in the Y direction. The base regions 30 are located between the drift regions 22 and the source electrode 11 in the Z direction. The base regions 30 are connected to the source electrode 11 via the connection regions 11c described later.

[0049] The source regions 40 of the first conductivity type (n-type) are selectively provided over the base regions 30. The plurality of source regions 40 are arranged at intervals in the X direction. The base regions 30 extend in the Y direction. The source regions 40 are located between the base regions 30 and the source electrode 11 in the Z direction. The source regions 40 are connected to the source electrode 11 via the connection regions 11c described later.

[0050] The gate electrodes 50 are located between the first drift portions 23 and the source electrode 11 in the Z direction. The gate electrodes 50 face the second drift regions 24, the base regions 30, and the source regions 40 across the gate insulating films 52 in the X direction. The gate electrodes 50 are located between the adjacent second drift regions 24 in the X direction. The gate electrodes 50 extend in the Y direction. The gate electrodes 50 are provided in trenches extending from the source electrode 11 side to the drain electrode 10 side in the Z direction. In addition, the plurality of gate electrodes 50 are arranged at intervals periodically in the X direction. The material of the gate electrodes 50 contains, for example, polysilicon.

[0051] The field plate electrodes 51 are located on the drain electrode 10 side than the gate electrodes 50 in the Z direction. The field plate electrodes 51 face the drift regions 22 across the field plate insulating films 54 in the X direction and the Z direction. The field plate electrodes 51 are arranged at intervals periodically in the X direction, for example. The field plate electrodes 51 are located between the adjacent second drift portions 24 in the X direction. The field plate electrodes 51 extend in the Y direction. The field plate electrodes 51 are provided in trenches extending from the source electrode 11 side to the drain electrode 10 side in the Z direction. The field plate electrodes 51 are arranged in the Z direction with the gate electrodes 50. The detailed shape of the field plate electrodes 51 is described later.

[0052] The insulating regions 59 contain the gate insulating films 52, the insulating films 53, the field plate insulating films 54, and the interlayer insulating film 55. The insulating regions 59 can be formed integrally of the same material or can be formed of different materials. The insulating regions 59 contain, for example, insulating materials such as silicon oxide and silicon nitride.

[0053] The field plate insulating films 54 are located between the field plate electrodes 51 and the first drift portions 23 and the second drift portions 24, and electrically separate the field plate electrodes 51 from the drift regions 22. The field plate insulating films 54 cover the field plate electrodes 51. The field plate insulating films 54 extend in the Z direction.

[0054] An insulating film 53 is located between the field plate electrode 51 and the gate electrode 50. The insulating film 53 electrically separates the field plate electrode 51 from the gate electrode 50.

[0055] The gate insulating film 52 is located in the X direction between the gate electrode 50 and the drift region 22, the base region 30, and the source region 40. The gate insulating film 52 electrically separates the gate electrode 50 from the drift region 22, the base region 30, and the source region 40.

[0056] The interlayer insulating film 55 is located in the Z direction between the gate electrode 50, the gate insulating film 52, and the source region 40 and the source electrode 11. The interlayer insulating film 55 electrically separates the gate electrode 50 from the source electrode 11.

[0057] The connection region 11c is disposed through the interlayer insulating film 55 in the Z direction. The connection region 11c electrically connects the source region 40 and the base region 30 to the source electrode 11. The source electrode 11 may include the connection region 11c. The connection region 11c may be made of the same material as the source electrode 11 and formed as part of the source electrode 11. The connection region 11c may also be made of a different material than the source electrode 11.

[0058] Next, use Figure 3 The detailed shape of the field plate electrode 51 is described below. Figure 3 It is a cross-sectional view showing the positions of the corners, thickness, width, and length of the semiconductor device in the embodiment. Figure 3 It means and Figure 1 A cross-sectional view of the same extent, but some of the shading lines and symbols have been removed to improve visibility.

[0059] The field plate electrode 51 has three or more consecutive portions in the Z direction. In the semiconductor device 1 of the embodiment, the field plate electrode 51 has eight portions, namely portions 61 to 68. The width of portions 61 to 68 is different from the width of adjacent portions in the Z direction. Here, width refers to the length in the X direction.

[0060] The field plate electrode 51 has corners C0 to C8 that protrude toward the insulating region 54. When the shape of the corners is rounded, the intersection of the boundary line between the portion 61 to 68 extending in the Z direction and the field plate insulating film 52, and the boundary line between the portion 61 to 68 extending in the X direction and the field plate insulating film 52 can also be used as the corners.

[0061] Parts 61 to 68 each have widths W1 to W8 in the X direction. For example... Figure 3As shown, in the case where the portions 61 to 68 extend in the Z direction, the length in the X direction of an arbitrary portion in the Z direction can also be taken as the width. In the case where the portions 61 to 68 extend obliquely with respect to the Z direction, the length in the X direction in the central portion in the Z direction of each portion can also be taken as the width. Alternatively, the length in the X direction in the corner portions C0 to C8 of the portions 61 to 65, 67, 68 can also be taken as the width.

[0062] The portions 61 to 68 each have a length L1 to L8 in the Z direction.

[0063] The distance in the X direction of the portions 61 to 68 from the drift region 22, in other words, the thickness of the field plate insulating film 52 sandwiched by the portions 61 to 68 and the drift region 22, is a thickness T1 to T8, respectively.

[0064] The portion 61 is located on the source electrode 11 side in the Z direction among the plurality of portions included in the field plate electrode 51. The portion 61 has the largest width, in other words, a width W1, in the X direction among the plurality of portions included in the field plate electrode 51. The portion 61 has corner portions C0, C1.

[0065] The portion 62 is adjacent to the portion 61 and is located on the drain electrode 10 side in the Z direction than the portion 61. The width W2 of the portion 62 in the X direction is smaller than the width W1 of the portion 61. The portion 62 has a corner portion C2.

[0066] The portion 63 is adjacent to the portion 62 and is located on the drain electrode 10 side in the Z direction than the portion 62. The width W3 of the portion 63 in the X direction is smaller than the width W2 of the portion 62. The portion 63 has a corner portion C3. The portion 63, for example, corresponds to a fifth portion.

[0067] The portion 64 is adjacent to the portion 63 and is located on the drain electrode 10 side in the Z direction than the portion 63. The width W4 of the portion 64 in the X direction is smaller than the width W3 of the portion 63. The portion 64 has a corner portion C4. The portion 64, for example, corresponds to a fourth portion.

[0068] The portion 65 is adjacent to the portion 64 and is located on the drain electrode 10 side in the Z direction than the portion 64. The width W5 of the portion 65 in the X direction is smaller than the width W4 of the portion 64. The portion 65 has a corner portion C5. The portion 65, for example, corresponds to a first portion.

[0069] The portion 66 is adjacent to the portion 65 and is located on the drain electrode 10 side in the Z direction than the portion 65. The width W6 of the portion 66 in the X direction is smaller than the width W5 of the portion 65. The portion 66 does not include a corner portion. The portion 66, for example, corresponds to a second portion.

[0070] The portion 67 is adjacent to the portion 66 and is located on the drain electrode 10 side in the Z direction than the portion 66. The width W7 of the portion 67 in the X direction is larger than the width W6 of the portion 66. The portion 67 has the corners C6, C7. The portion 67 corresponds to, for example, a third portion.

[0071] The portion 68 is adjacent to the portion 67 and is located on the drain electrode 10 side in the Z direction than the portion 67. The portion 68 is located on the drain electrode 10 side in the Z direction among the plurality of portions included in the field plate electrode 51. The width W8 of the portion 68 in the X direction is smaller than the width W7 of the portion 67. The portion 68 has the corner C8. The portion 68 corresponds to, for example, a sixth portion.

[0072] The field plate electrode 51 satisfies the following relationships with respect to the widths W1 to W8 of the portions 61 to 68. W8 < W7 < W6 < W7 < W8 < W6 < W5 < W4 < W3 < W2 < W1

[0073] The field plate insulating film 52 extends in the Z direction, and thus the thicknesses T1 to T8 of the portions adjacent to the portions 61 to 68 having the larger widths W1 to W8 are small. The thicknesses satisfy the following relationships. T7 < T8 < T7 < T6 < T1 < T2 < T3 < T4 < T5 < T6 < T8

[0074] The field plate electrode 51 (Statement 1) "increases in width W1 to W5, W7, W8 of the portions 61 to 65, 67, 68 other than the portion 66 as it goes in the Z direction from the drain electrode 10 side toward the source electrode 11".

[0075] The (Statement 1) can be stated in other words as (Statement 2) "the portions 67, 65 to 61 of the plurality of portions 68 to 61 of the field plate electrode 51 having a width larger than at least one of the portions adjacent in the Z direction increase in width (W7 < W5 < W4 < W3 < W2 < W1) as it goes in the Z direction from the drain electrode 10 side toward the source electrode 11".

[0076] Further, the (Statement 1) can be stated in other words as (Statement 3) "the widths of the corners C8 to C0 of the field plate electrode 51 monotonously increase (W8 < W7 < W5 < W4 < W3 < W2 < W1) as it goes from the drain electrode 11 side toward the source electrode (Z direction)". The monotonously increase in width means that the width does not decrease but increases, and includes the case where the width in the corners C6, C7 is the same W7.

[0077] If we change the wording from the perspective of the thickness of the field plate insulating film 54, then (Statement 1) can also be expressed as (Statement 4): "As the distance from the drain electrode 10 to the source electrode 11 (Z direction), the thickness of the field plate insulating film 54 in the X direction at the positions where the corners C8 to C0 of the field plate electrode 51 are in contact decreases monotonically (T8 > T7 > T5 > T4 > T3 > T2 > T1)." Monotonically decreasing thickness means that the thickness does not increase but decreases, including the portion that is in contact with the corners C6 and C7, where the thickness is the same at T7.

[0078] If we focus on a portion of the field plate electrode 51, then portion 66 and several portions 61 to 65 located in the Z direction closer to the source electrode 11 than portion 66 gradually increase in width in the Z direction as they move from the drain electrode 10 side toward the source electrode 11 side. Similarly, several portions 67 and 68 located in the Z direction closer to the drain electrode 10 than portion 66 gradually increase in width in the Z direction as they move from the drain electrode 10 side toward the source electrode 11 side.

[0079] The operation of semiconductor device 1 will be explained. Semiconductor device 1 operates by means of... Figures 1-3 The power supply and drive devices (not shown) operate by applying potentials to the drain electrode 10, source electrode 11, and gate electrode 50. Hereinafter, the potential applied to the source electrode 11 will be set as a reference (0V). A potential of 0V is applied to the source electrode 11, and, for example, 50V is applied to the drain electrode 10 when it is off. During switching, due to the parasitic inductance within the power supply device, the voltage across the MOSFET increases instantaneously, therefore, for example, 100V is applied to the drain electrode 10.

[0080] When the semiconductor device 1 is turned on, the gate electrode 50 is applied a potential higher than the threshold potential (Vth). This forms a channel in the base region 30, and current flows from the drain electrode 10 through the drain region 21, the drift region 22, the base region 30, and the source region 40 to the source electrode 11.

[0081] When semiconductor device 1 is off, a potential lower than the threshold potential (Vth) is applied to gate electrode 50. No channel is formed in base region 30, and no current flows between source electrode 11 and drain electrode 10.

[0082] The case where semiconductor device 1 can achieve high withstand voltage and low on-resistance will be explained.

[0083] When the semiconductor device 1 is off, the semiconductor region between the adjacent field plate electrodes 51, particularly the drift region 22, generates an electric field caused by the source-gate voltage. Concentration of the electric field is one factor of the breakdown of the semiconductor layer 15. Since a potential difference is generated between the drift region 22 and the base region 30, a strong electric field is generated particularly at the interface of the drift region 22 and the base region 30. The field plate electrodes 51 extending from the source electrode 11 side toward the drain electrode 10 improve the withstand voltage of the semiconductor device 1 by dispersing the electric field applied to the drift region 22 and forming a depletion layer in the drift region 22.

[0084] The field plate electrodes 51 have corners C0 to C8 protruding toward the insulating region 54, and thus the electric field is concentrated around the corners C1 to C9. In other words, in the corners C1 to C8 where the width of the field plate electrodes 51 is large, the (virtual) equipotential lines extending along the field plate electrodes 51 are locally dense. The dense equipotential lines are drawn from the field plate insulating film 54 toward the drift region 22 away from the field plate electrodes 51, and thus the electric field is dispersed as a whole from the field plate electrodes 51.

[0085] "Among the portions 61 to 65, 67, 68 of the portion 66, the widths W1 to W5, W7, W8 are large as the distance from the drain electrode 10 side toward the source electrode 11 in the Z direction", and thus the electric field is efficiently dispersed, and thus the semiconductor device 1 can achieve a higher withstand voltage. Further, the semiconductor device 1 can secure the withstand voltage even if the amount of impurities contained in the drift region 22 is increased, and thus can reduce the on-resistance.

[0086] A case where the semiconductor device 1 can achieve a lower output charge amount is described.

[0087] "The field plate electrodes 51 have the portion 66 having a smaller width than the widths of the two portions (portions 65, 67) adjacent in the Z direction (W5 > W6, W7 > W6)". The portion 66 of the field plate electrodes 51 does not have a corner, and thus the distance from the n-drift region 22 in the X direction is large, and thus the capacitance in the portion 66 can be reduced. Thus, the semiconductor device 1 can suppress the output charge amount, and thus can reduce the switching loss.

[0088] The configuration of the semiconductor device 4 of the reference example is described.

[0089] Figure 4 is a cross-sectional view of the semiconductor device 4 of the reference example. The width W6' of the portion 66 of the semiconductor device 4 of the reference example is different from that of the semiconductor device 1. The thickness of the field plate insulating film 54 of the semiconductor device 4 of the reference example adjacent to the portion 66 is T6'.

[0090] In the reference example, the plurality of portions 68 to 61 of the field plate electrode 51 have widths that increase as they go from the drain electrode 10 side toward the source electrode 11 (Z direction) (W8 < W7 < W6' < W5 < W4 < W3 < W2 < W1). In the reference example, the corner portion C6 is included in the portion 66. The semiconductor device 4 of the reference example is configured to satisfy the aforementioned (Statement 1), (Statement 2), and (Statement 3). In the reference example, "the field plate electrode 51 does not have a portion whose width is smaller than the widths of two portions adjacent in the Z direction".

[0091] The withstand voltage and the output charge amount of the semiconductor device 1 were compared with those of the reference example.

[0092] The withstand voltage and the output charge amount of the semiconductor devices 1 and 4 were simulated under the following conditions. W1 = 1.400 (nm), W2 = 1.301 (nm), W3 = 1.188 (nm), W4 = 0.909 (nm), W5 = 0.550 (nm), W6 = 0.314 (nm), W6' = 0.480 (nm), W7 = 0.400 (nm), W8 = 0.358 (nm). L1 = 0.438 (nm), L2 = 0.358 (nm), L3 = 0.410 (nm), L4 = 0.398 (nm), L5 = 0.523 (nm), L6 = 0.475 (nm), L7 = 0.516 (nm), L8 = 0.478 (nm). T1 = 0.089 (nm), T2 = 0.139 (nm), T3 = 0.195 (nm), T4 = 0.335 (nm), T5 = 0.515 (nm), T6 = 0.632 (nm), T6' = 0.549 (nm), T7 = 0.589 (nm), T8 = 0.610 (nm).

[0093] In the simulation, the potential of the drain electrode 10 was increased from 0 V to +50 V in a state where 0 V was applied to the source electrode 11 and the gate electrode 50, and the electrostatic capacitance between the source and the drain when the potential was oscillated at a frequency of 1 MHz was calculated. The output charge amount was calculated from the total amount of charge per unit area accumulated between the source and the drain.

[0094] Figure 5 (A) of FIG. 10 is a graph in which the results of the simulation of the withstand voltage V B (V) of the semiconductor device 1 (embodiment) and the semiconductor device 4 (reference example) are plotted. Figure 5 (B) of FIG. 10 is a graph in which the results of the simulation of the output charge amount Q OSS / A (nC / mm 2 ) of the semiconductor device 1 (embodiment) and the semiconductor device 4 (reference example) are plotted.

[0095] The withstand voltage V of the semiconductor device 1 of the embodiment was 110.0 (V), showing approximately the same value as the withstand voltage of the semiconductor device 4 of the reference example, 110.1 (V). The semiconductor device 1 obtained a result showing a higher withstand voltage, not inferior, compared to the semiconductor device 4 which satisfies the configurations of (Statement 1), (Statement 2), and (Statement 3) identically to the semiconductor device 1. The output charge amount of the semiconductor device 1 of the embodiment was 11.36 (nC / mm 2 ), obtaining a result lower than the output charge amount of the semiconductor device 4 of the reference example, 11.42 (nC / mm 2 ).

[0096] Thus, the semiconductor device 1 of the embodiment can achieve both a higher withstand voltage and a lower output charge amount.

[0097] A modification of the embodiment will be described.

[0098] Figure 6 is a cross-sectional view of a semiconductor device of a first modification example. Regarding the semiconductor device 6 of the first modification example, the field plate electrode 51 is electrically separated from the source electrode 11, and the field plate electrode 51 is electrically connected to the gate electrode 50.

[0099] Figure 7 is a cross-sectional view of a semiconductor device of a second modification example. Although the number of the portions possessed by the field plate electrode 51 and the number of the widths thereof are explained as an example of 8 in the embodiment, the number can be more than 3. Although the portion whose width is smaller than the widths of the portions adjacent in the Z direction is explained as an example of the portion 66 in the embodiment, the portion can not be the portion 66 as long as the portion is not the portion located at the most end portion in the Z direction. For example, as shown in the semiconductor device 7 of the second modification example, Figure 7 the number of the portions possessed by the field plate electrode 51 and the number of the widths thereof are 7, and the width W4 of the portion 64 is W4' < W5 and W4' < W3. In addition, regarding the field plate electrode 51 of the semiconductor device 7, the width W4 of the portion 64, which is closer to the portion 66 than the field plate electrode 51 to the n-drift region 22, becomes smaller, and the output charge amount becomes smaller. In the modification example 2, the portion 61 corresponds to the fifth portion, the portion 62 corresponds to the fourth portion, the portion 63 corresponds to the first portion, the portion 64 corresponds to the second portion, the portion 65 corresponds to the third portion, the portion 66 corresponds to the sixth portion, and the portion 67 corresponds to the seventh portion.

[0100] Figure 8 is a cross-sectional view of a semiconductor device of a third modification example. The portion of the field plate electrode 51 whose width is smaller than the widths of the two portions adjacent in the Z direction is not limited to only the portion 66. For example, as shown in the semiconductor device 8 of the third modification example, Figure 8As shown in the third modified example of the semiconductor device 8, the field plate electrode 51 has portions 64 and 66 whose widths are smaller than the widths of the adjacent portions in the Z direction. Compared with the semiconductor device 1 of the first embodiment, the modified example of the semiconductor device 8 has a smaller width of the larger portion, thus enabling a lower output charge. In addition, compared with the semiconductor device 1, the number of corners maintaining the withstand voltage remains unchanged, and the semiconductor device 8 can also achieve a higher withstand voltage.

[0101] Figure 9 This is a cross-sectional view of the semiconductor device of the fourth modification. The width and length of the field electrode 51 of the semiconductor device 9 of the fourth modification satisfy the following relationship: (W1 / L1) / (W2 / L2)>2.5

[0102] By satisfying this relationship, portion 61 becomes a shape that protrudes significantly from the other portions 62-68, thus enhancing the dispersion effect of the electric field. By utilizing portion 61, which is close to the boundary between the drift region 22, which generates a stronger electric field, and the base region 30, the dispersion effect of the electric field is enhanced, enabling the semiconductor device 9 to achieve a higher withstand voltage.

[0103] Regarding the semiconductor device of the above-described embodiment, the second drift portion 24, base region 30, source region 40, gate electrode 50, etc., are described as having a stripe shape extending along the Y direction, but the gate electrode 50 may also have a grid shape or a dot shape.

[0104] In addition, in the semiconductor device of the above-described embodiment, the field plate electrode 51 may also be electrically connected to the source electrode 11.

[0105] In the above embodiment, the preferred p-type carrier concentration in the base region 30 is 1.0 × 10⁻⁶. 17 / cm 3 Above 1.0×10 18 / cm 3 The preferred n-type carrier concentration in source region 40 is 1.0 × 10⁻⁶. 18 / cm 3 Above 1.0×10 20 / cm 3 The preferred n-type carrier concentration in the drain region 21 is 1.0 × 10⁻⁶. 18 / cm 3 Above 1.0×10 20 / cm 3 The concentration of impurities in a semiconductor region can be substantially the same as the concentration of charge carriers in the semiconductor region.

[0106] In the embodiment, information relating to the shape and the like of the semiconductor region is obtained, for example, by electron microscope observation and the like. Information relating to the impurity concentration in the semiconductor region is obtained, for example, by EDX (Energy Dispersive X-ray Spectroscopy), or SIMS (Secondary Ion Mass Spectrometry), and the like. Information relating to the carrier concentration in the semiconductor region is obtained, for example, by SCM (Scanning Capacitance Microscopy), and the like.

[0107] The above embodiment and its modification can be appropriately combined to be implemented. According to the above-described embodiment and its modification, a semiconductor device that achieves both a high withstand voltage and a low output charge amount can be provided.

[0108] Although several embodiments of the present application have been described, these embodiments are presented by way of example only, and are not intended to limit the scope of the application. The embodiments can be implemented in other various ways, and various omissions, substitutions, and changes can be made without departing from the spirit of the application. The embodiments, modifications thereof, are included in the scope, spirit of the description, and likewise included in the scope of the application recited in the claims and equivalents thereof.

Claims

1. A semiconductor device, characterized in that, have: First electrode; Second electrode; A semiconductor layer includes: a first semiconductor region of a first conductivity type, located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode, and electrically connected to the second electrode; and a second semiconductor region of a second conductivity type, located between the first electrode and the first semiconductor region in the first direction, and connected to the first semiconductor region. And the third semiconductor region of the first conductivity type is located between the first electrode and the second semiconductor region in the first direction, and is connected to the second semiconductor region; The third electrode is located between the first electrode and the first semiconductor region in the first direction, and faces the second semiconductor region in a second direction that intersects the first direction. A first insulating region is located between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region; The second insulating region is located between the third electrode and the first electrode; The fourth electrode has three or more portions that are continuous in the first direction, including a first portion, a second portion and a third portion. It is located between the third electrode and the first semiconductor region in the first direction. The width of the first portion in the second direction is a first width. The second portion is adjacent to the first portion and is located on the side of the second electrode closer to the first portion than the first portion in the first direction. Its width in the second direction is a second width that is smaller than the first width. The third portion is adjacent to the second portion and is located on the side of the second electrode closer to the second portion than the second portion in the first direction. Its width in the second direction is a third width that is larger than the second width. as well as The third insulating region is located between the fourth electrode and the first semiconductor region. The plurality of portions of the fourth electrode includes a fourth portion that is adjacent to the first portion, is located on the side of the first electrode closer to the first portion than the first portion in the first direction, and has a width in the second direction that is a fourth width greater than the first width. The plurality of portions of the fourth electrode include a fifth portion that is adjacent to the fourth portion and is located on the side of the first electrode closer to the fourth portion than the fourth portion in the first direction, and the width in the second direction is a fifth width that is greater than the width of the fourth portion.

2. A semiconductor device, characterized in that, have: First electrode; Second electrode; A semiconductor layer includes: a first semiconductor region of a first conductivity type, located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode, and electrically connected to the second electrode; and a second semiconductor region of a second conductivity type, located between the first electrode and the first semiconductor region in the first direction, and connected to the first semiconductor region. And the third semiconductor region of the first conductivity type is located between the first electrode and the second semiconductor region in the first direction, and is connected to the second semiconductor region; The third electrode is located between the first electrode and the first semiconductor region in the first direction, and faces the second semiconductor region in a second direction that intersects the first direction. A first insulating region is located between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region; The second insulating region is located between the third electrode and the first electrode; The fourth electrode has three or more portions that are continuous in the first direction, including a first portion, a second portion and a third portion. It is located between the third electrode and the first semiconductor region in the first direction. The width of the first portion in the second direction is a first width. The second portion is adjacent to the first portion and is located on the side of the second electrode closer to the first portion than the first portion in the first direction. Its width in the second direction is a second width that is smaller than the first width. The third portion is adjacent to the second portion and is located on the side of the second electrode closer to the second portion than the second portion in the first direction. Its width in the second direction is a third width that is larger than the second width. as well as The third insulating region is located between the fourth electrode and the first semiconductor region. The first width is greater than the third width.

3. A semiconductor device, characterized in that, have: First electrode; Second electrode; A semiconductor layer includes: a first semiconductor region of a first conductivity type, located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode, and electrically connected to the second electrode; and a second semiconductor region of a second conductivity type, located between the first electrode and the first semiconductor region in the first direction, and connected to the first semiconductor region. And the third semiconductor region of the first conductivity type is located between the first electrode and the second semiconductor region in the first direction, and is connected to the second semiconductor region; The third electrode is located between the first electrode and the first semiconductor region in the first direction, and faces the second semiconductor region in a second direction that intersects the first direction. A first insulating region is located between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region; The second insulating region is located between the third electrode and the first electrode; The fourth electrode has three or more portions that are continuous in the first direction, including a first portion, a second portion and a third portion. It is located between the third electrode and the first semiconductor region in the first direction. The width of the first portion in the second direction is a first width. The second portion is adjacent to the first portion and is located on the side of the second electrode closer to the first portion than the first portion in the first direction. Its width in the second direction is a second width that is smaller than the first width. The third portion is adjacent to the second portion and is located on the side of the second electrode closer to the second portion than the second portion in the first direction. Its width in the second direction is a third width that is larger than the second width. as well as The third insulating region is located between the fourth electrode and the first semiconductor region. The plurality of portions other than the second portion increase in width in the second direction as they move from the second electrode side toward the first electrode side in the first direction.

4. A semiconductor device, characterized in that, have: First electrode; Second electrode; A semiconductor layer includes: a first semiconductor region of a first conductivity type, located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode, and electrically connected to the second electrode; and a second semiconductor region of a second conductivity type, located between the first electrode and the first semiconductor region in the first direction, and connected to the first semiconductor region. And the third semiconductor region of the first conductivity type is located between the first electrode and the second semiconductor region in the first direction, and is connected to the second semiconductor region; The third electrode is located between the first electrode and the first semiconductor region in the first direction, and faces the second semiconductor region in a second direction that intersects the first direction. A first insulating region is located between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region; The second insulating region is located between the third electrode and the first electrode; The fourth electrode has three or more portions that are continuous in the first direction, including a first portion, a second portion and a third portion. It is located between the third electrode and the first semiconductor region in the first direction. The width of the first portion in the second direction is a first width. The second portion is adjacent to the first portion and is located on the side of the second electrode closer to the first portion than the first portion in the first direction. Its width in the second direction is a second width that is smaller than the first width. The third portion is adjacent to the second portion and is located on the side of the second electrode closer to the second portion than the second portion in the first direction. Its width in the second direction is a third width that is larger than the second width. as well as The third insulating region is located between the fourth electrode and the first semiconductor region. The portion of the plurality of portions located closest to the first electrode in the first direction has a length L1 in the first direction and a width W1 in the second direction. The portion of the plurality of portions adjacent to the portion located closest to the first electrode has a length L2 in a first direction and a width W2 in a second direction. The relationship satisfies (W1 / L1) / (W2 / L2) > 2.5 and W1 > W2.

5. The semiconductor device according to any one of claims 1 to 4, characterized in that, The plurality of portions of the fourth electrode further include a sixth portion, which is adjacent to the third portion and located on the side of the second electrode closer to the third portion than the third portion in the first direction, and the width in the second direction is a sixth width that is smaller than the width of the third portion.

6. A semiconductor device, characterized in that, have: First electrode; Second electrode; A semiconductor layer includes: a first semiconductor region of a first conductivity type, located between the first electrode and the second electrode in a first direction from the second electrode toward the first electrode, and electrically connected to the second electrode; and a second semiconductor region of a second conductivity type, located between the first electrode and the first semiconductor region in the first direction, and connected to the first semiconductor region. And the third semiconductor region of the first conductivity type is located between the first electrode and the second semiconductor region in the first direction, and is connected to the second semiconductor region; The third electrode is located between the first electrode and the first semiconductor region in the first direction, and faces the second semiconductor region in a second direction that intersects the first direction. A first insulating region is located between the third electrode and the first semiconductor region, the second semiconductor region, and the third semiconductor region; The second insulating region is located between the third electrode and the first electrode; The fourth electrode has three or more portions that are continuous in the first direction, including a first portion, a second portion and a third portion. It is located between the third electrode and the first semiconductor region in the first direction. The width of the first portion in the second direction is a first width. The second portion is adjacent to the first portion and is located on the side of the second electrode closer to the first portion than the first portion in the first direction. Its width in the second direction is a second width that is smaller than the first width. The third portion is adjacent to the second portion and is located on the side of the second electrode closer to the second portion than the second portion in the first direction. Its width in the second direction is a third width that is larger than the second width. as well as The third insulating region is located between the fourth electrode and the first semiconductor region. The plurality of portions of the fourth electrode further include a sixth portion, which is adjacent to the third portion and located in the first direction on the side closer to the second electrode than the third portion, and the width in the second direction is a sixth width that is smaller than the width of the third portion. The plurality of portions of the fourth electrode further include a seventh portion, which is adjacent to the sixth portion and located on the side of the second electrode closer to the sixth portion than the sixth portion in the first direction, and the width in the second direction is a seventh width that is smaller than the width of the sixth portion.

7. The semiconductor device according to any one of claims 1 to 6, characterized in that, The fourth electrode is electrically connected to the third electrode.

8. The semiconductor device according to any one of claims 1 to 7, characterized in that, The plurality of portions includes two or more portions that are smaller in width in the second direction than the two sides of the portions adjacent to each other in the first direction.

Citation Information

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