Amplifier capable of testing broadband and amplifier testing method

Abstract

The present invention relates to the field of nuclear radiation detection, and in particular to an amplifier capable of testing broadband and an amplifier testing method. The present invention comprises a current pulse generating module and an amplifying module, wherein the current pulse generating module is connected to the amplifying module, and the current pulse generating module can generate a current pulse signal to simulate the signal generated by a semiconductor detector; the current pulse generating module comprises a voltage divider circuit and a coupling circuit, wherein the output end of the voltage divider circuit is connected to the input end of the coupling circuit, the output end of the coupling circuit is connected to the amplifying module, and the input end of the voltage divider circuit is connected to a pulse signal generator to input a pulse voltage signal. The present invention is designed to add a current pulse generating module to generate a pulse current to simulate the signal generated by the semiconductor detector, thereby performing real-time testing on a broadband preamplifier circuit, and avoiding the need to redesign a special test circuit board.

Description

Technical Field

[0001] The invention relates to the field of nuclear radiation detection, and in particular to an amplifier capable of testing a broadband and an amplifier testing method. Background Art

[0002] In the nuclear radiation detection system, the output signal of the semiconductor detector is essentially a weak current pulse signal, so the noise and interference at the input of the corresponding preamplifier will affect the measurement of the detector output signal.

[0003] In order to effectively evaluate the actual performance of the preamplifier, it is usually necessary to use a special test circuit board, which will increase the actual volume of the detector and is not conducive to miniaturization. The common test method is to test the preamplifier circuit by using a pulse voltage signal with a test capacitor input, but this method cannot directly simulate the current pulse width information of the actual signal and cannot directly reflect the measurement bandwidth range of the preamplifier.

[0004] In addition, when selecting the core op amp chip of the preamplifier circuit, the op amp chip is usually required to have sufficient gain, large bandwidth, and as little current noise as possible. In order to meet these performance requirements, at present, most low-noise semiconductor preamplifier circuits use junction field effect transistors and high-speed operation chips at the input end to form the preamplifier circuit. Such a structure can simultaneously utilize the low input noise and high transconductance characteristics of the junction field effect transistor and the high gain and bandwidth characteristics of the high-speed operational amplifier, but the use of junction field effect transistors will increase the volume of the detector circuit. Summary of the invention

[0005] The present invention provides a broadband testable amplifier and an amplifier testing method, which solves at least one technical problem existing in the prior art.

[0006] A technical solution provided by the present invention is as follows: an amplifier capable of testing broadband, comprising a current pulse generating module and an amplifying module, wherein the current pulse generating module is connected to the amplifying module, and the current pulse generating module is capable of generating a current pulse signal to simulate a signal generated by a semiconductor detector;

[0007] The current pulse generating module comprises a voltage divider circuit and a coupling circuit, the output end of the voltage divider circuit is connected to the input end of the coupling circuit, the output end of the coupling circuit is connected to the amplification module, the input end of the voltage divider circuit inputs a pulse voltage signal, and the input end of the voltage divider circuit is connected to a pulse signal generator.

[0008] Furthermore, the voltage divider circuit includes a first voltage divider resistor and a second voltage divider resistor, one end of the first voltage divider resistor is connected to one end of the second voltage divider resistor, the other end of the first voltage divider resistor inputs a pulse voltage signal, and the other end of the second voltage divider resistor is connected to a signal ground.

[0009] Furthermore, the coupling circuit includes a precision resistor and a coupling capacitor, one end of the precision resistor is connected to the output end of the voltage divider circuit, the other end of the precision resistor is connected to one end of the coupling capacitor, and the other end of the coupling capacitor is connected to the input end of the amplification module.

[0010] Further, the amplification module includes a preamplifier circuit, a pole-zero cancellation circuit and a filter shaping circuit, the input end of the preamplifier circuit is connected to the output end of the current pulse generation module, the input end of the pole-zero cancellation circuit is connected to the output end of the preamplifier circuit, and the input end of the filter shaping circuit is connected to the output end of the pole-zero cancellation circuit;

[0011] The preamplifier circuit can amplify the current pulse signal once;

[0012] The pole-zero cancellation circuit can perform baseline restoration on the amplified current pulse signal;

[0013] The filtering and shaping circuit can perform secondary amplification and filtering on the current pulse signal after the baseline is restored.

[0014] Furthermore, the preamplifier circuit includes a first amplifier, a discharge resistor and an integral capacitor, the negative input terminal of the first amplifier is respectively connected to one end of the discharge resistor and one end of the integral capacitor, the other end of the discharge resistor and the other end of the integral capacitor are both connected to the output terminal of the first amplifier, and the positive input terminal of the first amplifier is connected to the signal ground.

[0015] Furthermore, the pole-zero cancellation circuit includes a first resistor and a first capacitor, one end of the first resistor is connected to one end of the first capacitor, the other end of the first resistor is connected to the other end of the first capacitor, one end of the first capacitor is connected to the output end of the preamplifier circuit, and the other end of the first capacitor is connected to the input end of the filter shaping circuit.

[0016] Furthermore, the filtering shaping circuit includes a second amplifier, a third amplifier, a second resistor, a third resistor, a second capacitor, a fourth resistor and a fifth resistor, the positive input terminal of the second amplifier is connected to one end of the third resistor, the negative input terminal of the second amplifier is respectively connected to one end of the second resistor and one end of the second capacitor, the other end of the second resistor and the other end of the second capacitor are both connected to the output terminal of the second amplifier, the positive input terminal of the third amplifier is connected to the output terminal of the second amplifier, the negative input terminal of the third amplifier is respectively connected to one end of the fourth resistor and one end of the fifth resistor, the other end of the fourth resistor is connected to the signal ground, and the other end of the fifth resistor is connected to the output terminal of the third amplifier.

[0017] Furthermore, the first amplifier, the second amplifier and the third amplifier all use AD8066 chips.

[0018] Another technical solution of the present invention provides an amplifier testing method, which is applied to any of the above-mentioned testable broadband amplifiers, comprising:

[0019] S10: obtaining the charge of the ray, and adjusting the pulse voltage and pulse width of the pulse signal emitted by the pulse signal generator so that the charge of the signal output by the current pulse generating module is equal to the charge of the ray;

[0020] S20: adjusting the pulse width of the pulse signal emitted by the pulse signal generator to generate pulse signals with different pulse widths for testing respectively;

[0021] S30: Inputting pulse signals with the same charge amount and different pulse widths into the amplifier, and recording the voltage amplitude and waveform pulse width of the amplifier output waveform respectively.

[0022] Furthermore, the step S10 further comprises: within the test energy range, calculating the input charge amount carried by the ray according to the formula,

[0023]

[0024] Where E is the energy of the input signal, w e is the average ionization energy required to generate an electron-hole pair, e - is the charge of an electron.

[0025] Beneficial effects of the present invention: The present invention is designed to add a current pulse generation module to generate a current pulse signal to simulate the signal generated by the semiconductor detector, thereby performing real-time testing on the broadband preamplifier circuit, avoiding the need to redesign a special test circuit board. At the same time, the current pulse width information of the actual signal can be directly simulated and tested. The amplifier module of the present invention directly adopts a dual-channel broadband low-noise amplifier chip design, realizes the integrated design of the amplifier circuit and the filter shaping circuit, simplifies the circuit structure, facilitates miniaturization design, and also meets the high-gain broadband and low-noise measurement requirements of the detector. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a structural block diagram of the present invention.

[0027] Figure 2 This is a schematic diagram of a current pulse generating module of the present invention.

[0028] Figure 3 It is a schematic diagram of the amplification module of the present invention.

[0029] Figure 4 This is the background waveform of the amplifier of the present invention.

[0030] Figure 5 Simulation for the present invention 241 Am and 137 Cs output waveform.

[0031] Figure 6 It is a fitting diagram of the broadband test results of the present invention.

[0032] Figure 7 It is a flow chart of the present invention. DETAILED DESCRIPTION

[0033] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. The described embodiment is only a part of the embodiment of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work should fall within the scope of protection of the present invention.

[0034] In an embodiment of the present invention, Figure 1 is a structural block diagram of a broadband testable amplifier structure provided according to the present invention, Figure 2 This is a schematic diagram of the decoupling strand provided by the current pulse generation module. Figure 3 It is a structural diagram provided by the amplification module. Figure 1As shown, the present invention specifically includes two parts, a current pulse generating module 1 and an amplifying module 2. The output end of the current pulse generating module 1 is connected to the input end of the amplifying module 2. The current pulse generating module 1 can generate a current pulse signal according to the pulse voltage signal emitted by the pulse signal generator 3 to simulate the signal generated by the semiconductor detector.

[0035] Specifically, Figure 2 As shown, the current pulse generating module 1 includes a voltage divider circuit and a coupling circuit, the output end of the voltage divider circuit is connected to the input end of the coupling circuit, the output end of the coupling circuit is connected to the amplifying module 2, and the input end of the voltage divider circuit is connected to the pulse signal generator 3 to input a pulse voltage signal. The voltage divider circuit is used to reduce the pulse voltage signal emitted by the pulse signal generator 3 so that the voltage of the pulse voltage signal is equal to the signal generated by the semiconductor detector. The coupling circuit is used to couple the voltage divider circuit with the amplifying module 2 to improve the connection stability.

[0036] In one embodiment of the present invention, the voltage divider circuit includes a first voltage divider resistor R1 and a second voltage divider resistor R2, one end of the first voltage divider resistor R1 is connected to one end of the second voltage divider resistor R2, the other end of the first voltage divider resistor R1 inputs a pulse voltage signal, and the other end of the second voltage divider resistor R2 is connected to a signal ground.

[0037] In one embodiment of the present invention, the coupling circuit includes a precision resistor R3 and a coupling capacitor C1, one end of the precision resistor R3 is connected to the output end of the voltage divider circuit, the other end of the precision resistor R3 is connected to one end of the coupling capacitor C1, and the other end of the coupling capacitor C1 is connected to the input end of the amplification module 2. After the pulse voltage signal generated by the pulse signal generator 3, the current pulse generation module 1 is connected to the voltage divider circuit and the precision resistor in sequence, and then connected to the signal input end of the amplification module 2 through the AC coupling capacitor, so as to directly simulate the current pulse signal generated by the semiconductor detector.

[0038] In one embodiment of the present invention, Figure 3 As shown, the amplification module 2 includes a preamplifier circuit, a pole-zero cancellation circuit and a filter shaping circuit, the input end of the preamplifier circuit is connected to the output end of the current pulse generating module 1, the input end of the pole-zero cancellation circuit is connected to the output end of the preamplifier circuit, and the input end of the filter shaping circuit is connected to the output end of the pole-zero cancellation circuit; the preamplifier circuit can amplify the current pulse signal once; the pole-zero cancellation circuit can restore the baseline of the amplified current pulse signal; the filter shaping circuit can perform secondary amplification and filtering on the current pulse signal after the baseline is restored.

[0039] Specifically, the preamplifier circuit includes a first amplifier A1, a bleeder resistor Rf and an integral capacitor Cf, the negative input end of the first amplifier A1 is connected to one end of the bleeder resistor Rf and one end of the integral capacitor Cf respectively, the other end of the bleeder resistor Rf and the other end of the integral capacitor Cf are both connected to the output end of the first amplifier A1, and the positive input end of the first amplifier A1 is connected to the signal ground. The positive input end of the preamplifier circuit is grounded, and the output end is connected to the filter shaping circuit. The preamplifier circuit is composed of the first amplifier A1, the integral capacitor Cf and the bleeder resistor Rf, and can preliminarily amplify the input signal.

[0040] The pole-zero cancellation circuit includes a first resistor Rp and a first capacitor C0, one end of the first resistor Rp is connected to one end of the first capacitor C0, the other end of the first resistor Rp is connected to the other end of the first capacitor C0, one end of the first capacitor C0 is connected to the output end of the preamplifier circuit, and the other end of the first capacitor C0 is connected to the input end of the filter shaping circuit. The pole-zero cancellation circuit is composed of the first resistor Rp and the first capacitor C0, and is used to restore the output signal baseline.

[0041] The filter shaping circuit includes a second amplifier A2, a third amplifier A3, a second resistor RS, a third resistor R0, a second capacitor CS, a fourth resistor R4 and a fifth resistor R5, the positive input end of the second amplifier A2 is connected to one end of the third resistor R0, the negative input end of the second amplifier A2 is respectively connected to one end of the second resistor RS and one end of the second capacitor CS, the other end of the second resistor RS and the other end of the second capacitor CS are both connected to the output end of the second amplifier A2, the positive input end of the third amplifier A3 is connected to the output end of the second amplifier A2, the negative input end of the third amplifier A3 is respectively connected to one end of the fourth resistor R4 and one end of the fifth resistor R5, the other end of the fourth resistor R4 is connected to the signal ground, and the other end of the fifth resistor R5 is connected to the output end of the third amplifier A3. The filter shaping circuit is used to suppress noise and stabilize the waveform, and at the same time, perform secondary amplification on the signal.

[0042] The first amplifier A1, the second amplifier A2 and the third amplifier A3 all use AD8066 chips. The first amplifier A1 and the second amplifier A2 use dual-channel chips AD8066, so that the preamplification circuit and the filter shaping circuit are integrated.

[0043] In another technical solution of the present invention, there is provided an amplifier testing method, which is applied to any of the above-mentioned amplifiers capable of testing a wide bandwidth. Figure 7 It is a flow chart provided according to the process of the present invention.

[0044] S10: Obtain the ray charge amount of the ray, and adjust the pulse voltage and pulse width of the pulse signal emitted by the pulse signal generator 3 so that the charge amount of the signal output by the current pulse generating module 1 is equal to the ray charge amount.

[0045] Specifically include:

[0046] S101: Determine the ray charge amount of the ray.

[0047] Within the test energy range, the input charge carried by the rays converted according to Formula 1 is:

[0048]

[0049] Where E is the energy of the input signal, w e is the average ionization energy required to generate an electron-hole pair, e - is the charge of an electron.

[0050] S102: Determine the charge amount of the test input.

[0051] According to formula 2, a set of charge quantities is determined by adjusting the parameters of the signal generator, and the obtained set of charge quantities is made the same as the set of charge quantities obtained in step 1.

[0052]

[0053] Among them, V test is the voltage pulse amplitude of the signal generator, R3 is a precision resistor, R1 and R2 are voltage divider resistors, t w is the voltage pulse width of the signal generator.

[0054] S20: adjusting the pulse width of the pulse signal emitted by the pulse signal generator 3 to generate pulse signals with different pulse widths for testing respectively;

[0055] Under the same set of input charge, adjust the voltage pulse amplitude of the signal generator to respectively w Test signal for circuit testing.

[0056] S30: Inputting pulse signals with the same charge amount and different pulse widths into the amplifier, and recording the voltage amplitude and waveform pulse width of the amplifier output waveform respectively.

[0057] After determining the voltage pulse amplitude and pulse width of the signal generator, the output voltage signal of the pulse generator is converted into a current pulse signal after passing through the precision resistor R3, and connected to the reverse input terminal of the preamplifier circuit. Under the same set of input charge, adjust the voltage pulse amplitude of the signal generator to perform circuit tests on test signals with different pulse widths tw, and use an oscilloscope to observe and record the output waveform voltage amplitude and waveform pulse width of the preamplifier circuit and the filter shaping circuit.

[0058] The output signal of the semiconductor detector can be regarded as a weak current pulse signal i with a maximum width of tw. The charge Qi it carries can be expressed by the formula:

[0059]

[0060] The magnitude of the charge Qi is proportional to the energy lost by the incident particle. Therefore, the energy of the incident particle can be expressed by the magnitude of the charge Qi. Taking the Si-PIN detector as an example, when measuring its output signal, it is necessary to analyze the range of the charge Qi carried by its output and the signal current pulse width tw. Considering that the Si-PIN semiconductor detector is mainly used for gamma-ray detection at room temperature, the charge Qi carried by the gamma-ray energy input range of 10keV to 2MeV can be obtained according to Formula 1.

[0061]

[0062] Where E is the energy of the input signal / eV, we is the average ionization energy / eV required to generate electron-hole pairs, and e- is the charge of an electron.

[0063] Considering that the average ionization energy of a silicon semiconductor detector is 3.62 eV, it can be seen from Formula 1 that the input charge range of the silicon semiconductor detector circuit signal is approximately between 0.5 fC and 88 fC.

[0064] The signal current pulse width tw is mainly determined by the charge collection time of the silicon semiconductor detector receiving the signal, that is, the rise time of the input signal. The charge collection time of electrons and holes is expressed by Formula 3 and Formula 4 respectively.

[0065]

[0066]

[0067] Among them, x represents the distance from the n+ electrode to the absorption point, w represents the thickness of the detector depletion layer, μn is the mobility of electrons, μp is the mobility of holes, and Eg is the electric field strength.

[0068] For silicon semiconductor detectors, when the electric field strength is strong enough, the rate of electron-hole pairs after saturation is 107cm / s. The depletion layer thickness of the Si-PIN semiconductor detector used in this embodiment is 300um, and its saturation collection time tmax can be obtained to be 3ns. Considering the low power consumption requirement of the detection system, the reverse bias voltage of the detector is relatively low, resulting in the actual collection time tmax being approximately within tens to hundreds of ns. At the same time, for the charge input range of the silicon semiconductor detector circuit signal, taking tw as 30ns as an example, formula 5 can be used to obtain that the average current ip within the signal collection time ranges from approximately 14.4nA to 4.27μA.

[0069]

[0070] According to the above, when the present invention is specifically implemented for measurement, the actual charge collection time tmax is approximately in the range of tens to hundreds of ns. Taking tw as 30ns as an example, when the average current ip in the collection time ranges from 14.4nA to 4.27μA of the input signal, the selected amplifier bandwidth should be greater than 33MHz. At the same time, in order to reduce the interference of the amplifier current noise, the current noise of the selected operational amplifier should be in the pA level. After comprehensive consideration, the present invention chooses to directly use the high-speed, low-noise dual-channel operational amplifier chip AD8066 to form a preamplifier circuit. The chip input end adopts JFET input, the input bias current is only 2pA, the input offset voltage is only 400μV, and the gain bandwidth reaches 145MHz, which simplifies the circuit structure and also meets the high-gain broadband and low-noise measurement requirements of Si-PIN semiconductor detectors.

[0071] Next, for circuit consistency, the filter shaping circuit uses AD8066 as the core operational amplifier chip, and the dual-channel design of the chip is used to integrate the first-stage amplifier circuit and the filter shaping circuit into one, further reducing the size of the detection device.

[0072] Next, the present invention is based on Figure 2 The circuit shown in the figure directly simulates the input of the pulse current signal. Combining Formula 1 and Formula 2, the input of 59.5keV γ-ray from 241Am source and 662keV γ-ray from 137Cs source are simulated and tested respectively, and then the waveform of the output voltage Vout of the secondary amplifier circuit is observed using an oscilloscope.

[0073]

[0074] Figure 4 is the background waveform of the amplifier of the present invention, such as Figure 5As shown in the figure, the background noise of the broadband preamplifier and the output waveform of the secondary amplifier circuit of the 241Am source and the 137Cs source in this embodiment are shown in the figure. Under room temperature working environment, the root mean square of the background noise of the test circuit is about 3.35mV, and its electronic equivalent noise charge is about 0.15fC. Figure 6 It is shown that the waveform shaping time of the output waveform of the simulated test Am source and Cs source is about 2.5 μs. Therefore, the testable broadband semiconductor detection circuit of the present invention has low noise and fast response.

[0075] Next, according to the input charge range of the silicon semiconductor detector obtained by formula 2, a group of input charge amounts are selected. In this example, they are 0.5fC, 1fC, 3fC, 5fC, 10fC, 20fC, 50fC, 70fC and 100fC.

[0076] Next, according to the saturation collection time of the Si-PIN semiconductor detector used, under the same set of input charge amounts, the voltage pulse amplitude of the signal generator is adjusted to test the test signals with pulse widths of 10 ns, 30 ns, and 100 ns, respectively.

[0077] The test data fitting results obtained are as follows Figure 6 In the input charge range of 0.5-100fC, the test pulse width signals of 10ns, 30ns, and 100ns show a high linear fit of 0.999, and the amplification gain is stable, about 24V / pC, indicating that the testable circuit can directly test signals with different current pulse widths, and the time response speed of the tested broadband preamplifier circuit can reach 10ns.

[0078] In summary, the testable broadband preamplifier circuit and test method of the present invention provide a practical technical solution. The preamplifier circuit adopts the dual-channel broadband low-noise amplifier AD8066 design, which simplifies the circuit structure and realizes the narrow space design. At the same time, the addition of the testable circuit enables the broadband preamplifier circuit to directly simulate the test current pulse width information. After the circuit bandwidth test, it was found that the time response speed of the preamplifier circuit can reach 10ns, and within the input charge range of 0.5-100fC, it has a high gain stability and has good application prospects.

[0079] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

[0080] Finally, it should be noted that the above specific implementation methods are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to examples, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A broadband testable amplifier, characterized in that: It comprises a current pulse generating module (1) and an amplifying module (2), wherein the current pulse generating module (1) is connected to the amplifying module (2), and the current pulse generating module (1) is capable of generating a current pulse signal to simulate a signal generated by a semiconductor detector; The current pulse generating module (1) comprises a voltage divider circuit and a coupling circuit, the output end of the voltage divider circuit is connected to the input end of the coupling circuit, the output end of the coupling circuit is connected to the amplifying module (2), and the input end of the voltage divider circuit is connected to a pulse signal generator (3) to input a pulse voltage signal; The amplification module (2) comprises a preamplification circuit, a pole-zero cancellation circuit and a filtering shaping circuit; The preamplifier circuit can amplify the current pulse signal once; The pole-zero cancellation circuit can perform baseline restoration on the amplified current pulse signal; The filtering and shaping circuit can perform secondary amplification and filtering on the current pulse signal after the baseline is restored; The preamplifier circuit comprises a first amplifier (A1), a bleeder resistor (Rf) and an integral capacitor (Cf); The pole-zero cancellation circuit includes a first resistor (Rp) and a first capacitor (C0); The filtering shaping circuit comprises a second amplifier (A2), a third amplifier (A3), a second resistor (RS), a third resistor (R0), a second capacitor (CS), a fourth resistor (R4) and a fifth resistor (R5); The first amplifier (A1), the second amplifier (A2) and the third amplifier (A3) all use AD8066 chips.

2. The broadband testable amplifier according to claim 1, characterized in that: The voltage divider circuit comprises a first voltage divider resistor (R1) and a second voltage divider resistor (R2), one end of the first voltage divider resistor (R1) is connected to one end of the second voltage divider resistor (R2), the other end of the first voltage divider resistor (R1) is input with a pulse voltage signal, and the other end of the second voltage divider resistor (R2) is connected to a signal ground.

3. The broadband testable amplifier according to claim 1, characterized in that: The coupling circuit comprises a precision resistor (R3) and a coupling capacitor (C1), one end of the precision resistor (R3) is connected to the output end of the voltage divider circuit, the other end of the precision resistor (R3) is connected to one end of the coupling capacitor (C1), and the other end of the coupling capacitor (C1) is connected to the input end of the amplification module (2).

4. The broadband testable amplifier according to claim 1, characterized in that: The input end of the preamplifier circuit is connected to the output end of the current pulse generation module (1), the input end of the pole-zero cancellation circuit is connected to the output end of the preamplifier circuit, and the input end of the filter shaping circuit is connected to the output end of the pole-zero cancellation circuit.

5. The broadband testable amplifier as claimed in claim 4, characterized in that: The negative input terminal of the first amplifier (A1) is respectively connected to one end of the discharge resistor (Rf) and one end of the integration capacitor (Cf), the other end of the discharge resistor (Rf) and the other end of the integration capacitor (Cf) are both connected to the output terminal of the first amplifier (A1), and the positive input terminal of the first amplifier (A1) is connected to a signal ground.

6. The broadband testable amplifier according to claim 4, characterized in that: One end of the first resistor (Rp) is connected to one end of the first capacitor (C0), the other end of the first resistor (Rp) is connected to the other end of the first capacitor (C0), one end of the first capacitor (C0) is connected to the output end of the preamplifier circuit, and the other end of the first capacitor (C0) is connected to the input end of the filter shaping circuit.

7. The broadband testable amplifier according to claim 5, characterized in that: The positive input end of the second amplifier (A2) is connected to one end of the third resistor (R0), the negative input end of the second amplifier (A2) is respectively connected to one end of the second resistor (RS) and one end of the second capacitor (CS), the other end of the second resistor (RS) and the other end of the second capacitor (CS) are both connected to the output end of the second amplifier (A2), the positive input end of the third amplifier (A3) is connected to the output end of the second amplifier (A2), the negative input end of the third amplifier (A3) is respectively connected to one end of the fourth resistor (R4) and one end of the fifth resistor (R5), the other end of the fourth resistor (R4) is connected to the signal ground, and the other end of the fifth resistor (R5) is connected to the output end of the third amplifier (A3).

8. An amplifier testing method, applied to the broadband testable amplifier according to any one of claims 1 to 7, characterized in that: include: S10: obtaining the charge of the ray, and adjusting the pulse voltage and pulse width of the pulse signal emitted by the pulse signal generator (3) so that the charge of the signal output by the current pulse generating module (1) is equal to the charge of the ray; S20: adjusting the pulse width of the pulse signal emitted by the pulse signal generator (3) to generate pulse signals with different pulse widths for testing respectively; S30: Inputting pulse signals with the same charge amount and different pulse widths into the amplifier, and recording the voltage amplitude and waveform pulse width of the amplifier output waveform respectively.

9. The amplifier testing method according to claim 8, characterized in that: The step S10 further includes: within the test energy range, calculating the input charge amount carried by the ray according to the formula, , Where E is the energy of the input signal, w e is the average ionization energy required to generate an electron-hole pair, e - is the charge of an electron.

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