Direct memory access control device, data transfer method and data transfer system

Abstract

The application relates to the field of integrated circuits, and relates to a direct memory access control device, a data transmission method and a data transmission system. The direct memory access control device comprises a direct memory access controller and a microcontroller. The direct memory access controller is connected with a system bus, and the system bus is also connected with a host controller. The microcontroller is used for controlling the direct memory access controller to perform data transmission according to an operation instruction configured by the host controller to replace the host controller when data transmission needs to be performed by using the direct memory access controller. Thus, the microcontroller can replace the host controller to control the direct memory access controller, the problem that the host controller needs to be frequently involved in the data transmission process of the direct memory access controller is solved, and the working efficiency of the system is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuits, and in particular to a direct memory access control device, a data transmission method and a data transmission system. BACKGROUND

[0002] A direct memory access (DMA) controller is an interface circuit allowing different speed hardware devices to communicate with each other without relying on a large number of interrupt loads of a main controller. In the process of data transmission by the DMA controller, the main controller does not need to directly control data transmission, so that the main controller can process other processes and the data transmission process can operate in parallel. Therefore, data transmission by the DMA controller can improve the performance of the entire system.

[0003] However, in the process of data transmission by the DMA controller, the DMA controller has a high demand for the main controller, for example, the main controller often needs to update a descriptor table, which reduces the efficiency of the main controller and further reduces the working efficiency of the system. In addition, for functions that the DMA controller cannot implement, the control right of a system bus needs to be transferred to the main controller, and after the main controller completes these functions, the control right of the system bus is transferred to the DMA controller. There is a problem of repeatedly transferring the control right of the system bus to the main controller, and the main controller often needs to participate, which also reduces the working efficiency of the system.

[0004] Therefore, how to improve the working efficiency of the system has become a problem to be solved. SUMMARY

[0005] The present application provides a direct memory access control device, a data transmission method and a data transmission system. By controlling the direct memory access controller to perform data transmission according to the operation instruction configured by the main controller by the microcontroller, the microcontroller can replace the main controller to control the direct memory access controller, solve the problem that the main controller often needs to participate in the process of data transmission by the direct memory access controller, and improve the working efficiency of the system.

[0006] In a first aspect, the present application provides a direct memory access control device, which comprises a direct memory access controller and a microcontroller. The direct memory access controller is connected with a system bus, and the system bus is also connected with a main controller.

[0007] The microcontroller is configured to control the direct memory access controller to perform data transmission according to the operation instruction configured by the main controller when data transmission by the direct memory access controller is needed, so as to replace the main controller.

[0008] In a second aspect, the application further provides a data transmission method applied to the DMA control device, and the method comprises the following steps:

[0009] When data transmission is needed by using the DMA controller, the microcontroller acquires the operation instruction configured by the host controller;

[0010] The microcontroller controls the DMA controller to perform data transmission according to the operation instruction configured by the host controller.

[0011] In a third aspect, the application further provides a data transmission system, which comprises the host controller and the DMA control device, and the host controller is integrated on the DMA control device, or the host controller is arranged outside the DMA control device.

[0012] The application discloses a DMA control device, a data transmission method and a data transmission system. The DMA control device comprises a DMA controller and a microcontroller. The DMA controller is connected with a system bus, and the system bus is further connected with a host controller. The microcontroller is configured to control the DMA controller to perform data transmission according to an operation instruction configured by the host controller when data transmission is needed by using the DMA controller, so as to replace the host controller. According to the application, the microcontroller can replace the host controller to control the DMA controller, the problem that the host controller needs to participate in the data transmission of the DMA controller is solved, the resources of the host controller are not occupied, and the working efficiency of the system is improved. BRIEF DESCRIPTION OF DRAWINGS

[0013] In order to more clearly illustrate the technical solutions of the embodiments of the application, the following will briefly introduce the drawings needed in the embodiment description. Obviously, the drawings in the following description are some embodiments of the application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0014] Figure 1 FIG. 1 is a schematic diagram of a data transmission system provided by an embodiment of the application;

[0015] Figure 2 FIG. 2 is a schematic diagram of another data transmission system provided by an embodiment of the application;

[0016] Figure 3 FIG. 3 is a structural schematic diagram of another data transmission system provided by an embodiment of the application;

[0017] Figure 4 is a structural schematic diagram of another data transmission system provided by an embodiment of the present application;

[0018] Figure 5 is a structural schematic diagram of another data transmission system provided by an embodiment of the present application;

[0019] Figure 6 is a structural schematic diagram of another data transmission system provided by an embodiment of the present application;

[0020] Figure 7 is a schematic flowchart of a data transmission method provided by an embodiment of the present application;

[0021] Figure 8 is a schematic flowchart of a sub-step of data transmission provided by an embodiment of the present application;

[0022] Figure 9 is a schematic flowchart of another data transmission method provided by an embodiment of the present application;

[0023] Figure 10 is a schematic flowchart of another data transmission method provided by an embodiment of the present application. DETAILED DESCRIPTION

[0024] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0025] The flowcharts shown in the drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor do they have to be executed in the order described. For example, some operations / steps can be further divided, combined or partially merged, so the actual execution order may be changed according to the actual situation.

[0026] It should be understood that the terms used in the present application specification are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in the present application specification and the appended claims, unless otherwise clearly indicated by the context, the singular forms "a", "an" and "the" are intended to include the plural forms.

[0027] It should also be understood that the term "and / or" used in the present application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0028] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0029] This application provides a direct memory access control device, a data transmission method, and a data transmission system. The data transmission method is applied to the direct memory access control device, which includes a direct memory access controller and a microcontroller. In this application embodiment, by having the microcontroller control the direct memory access controller to perform data transmission according to operation instructions configured by the main controller, the microcontroller can replace the main controller in controlling the direct memory access controller. This solves the problem that the main controller often needs to participate in the data transmission process of the direct memory access controller, thus improving the system's efficiency.

[0030] For example, the main controller may include, but is not limited to, a Central Processing Unit (CPU), a Digital Signal Processor (DSP), an ARM (Advanced RISC Machine) processor, an Application Specific Integrated Circuit (ASIC), and a Field-Programmable Gate Array (FPGA), etc. In this embodiment, the main controller controls the Direct Memory Access Controller (DMI) to transfer pre-configured operation instructions from the main controller to the first memory of the microcontroller, and starts the microcontroller. The microcontroller then controls the DMI to perform data transmission according to the operation instructions, thus enabling the microcontroller to control the DMI to transmit data instead of the main controller.

[0031] It should be noted that a microcontroller can be a microprocessor built into a direct memory access controller. Its functions are similar to those of the main controller, with instruction capabilities, strong scalability, and the ability to replace the main controller in performing functions that a direct memory access controller cannot. At the same time, a microcontroller consumes very few resources and can run at a high frequency.

[0032] Please see Figure 1 , Figure 1 This is a schematic diagram of a data transmission system 10 provided in an embodiment of this application. Figure 1 As shown, the data transmission system 10 includes a main controller 11 and a direct memory access control device 12. Both the main controller 11 and the direct memory access control device 12 are connected to the system bus. The direct memory access control device 12 includes a direct memory access controller 120 and a microcontroller 121.

[0033] Exemplarily, the system bus can include, but is not limited to, an Advanced System Bus (ASB), an Advanced Peripheral Bus (APB), an Advanced High-performance Bus (AHB), an Advanced Trace Bus (ATB), and the like.

[0034] Exemplarily, the data transmission system 10 can be a System on a Chip (SoC) system, a System in a Package (SiP) system, or other types of systems, such as a heterogeneous system based on a Field Programmable Gate Array (FPGA). In the embodiments of the present application, the data transmission system 10 is taken as an example of a system on a chip to illustrate how to transmit data.

[0035] Specifically, the microcontroller 121 is configured to control the DMA controller 120 to transmit data according to the operation instruction configured by the host controller 11, so as to replace the host controller 11 when data transmission is required.

[0036] Exemplarily, the host controller 11 can be integrated on the DMA control device 12, or the host controller 11 can be arranged outside the DMA control device 12.

[0037] Please refer to Figure 2 , Figure 2 is another schematic diagram of a data transmission system 10 provided by the embodiments of the present application. As shown in Figure 2 , the microcontroller 121 includes a first memory 1210, which is configured to store the operation instruction configured by the host controller 11.

[0038] The operation instruction includes an operation instruction configured by the host controller 11 in advance and saved in a memory corresponding to the host controller 11, such as the second memory 13, which can be called and executed by the microcontroller 12. Of course, the operation instruction can also be saved in the first memory 1210 of the microcontroller 12 in advance, and the microcontroller 12 can directly read and execute the operation instruction in the first memory 1210 after starting, so as to save the system resources without the need of the DMA controller 120 to transfer the operation instruction in the second memory 13 to the first memory 1210.

[0039] In this embodiment, the operation instructions include at least a first instruction. For example, the first instruction may be a data transfer instruction, used to control the direct memory access controller 120 to perform data transfer.

[0040] In some embodiments, the microcontroller 121 is configured to read from and execute a first instruction from the first memory 1210 to control the direct memory access controller 120 to perform data transfer.

[0041] By reading and executing the first instruction from the first memory 1210 by the microcontroller 121, the microcontroller 121 can replace the main controller 11 to control the direct memory access controller 120 to transmit data, without occupying the resources of the main controller 11, thus improving the system's working efficiency.

[0042] In this embodiment, the operation instruction may further include a second instruction, which is an instruction that does not operate the direct memory access controller 120. For example, the second instruction may include one or more of a wait instruction, a query instruction, a pointer jump instruction, an access instruction, and a stop instruction.

[0043] In some embodiments, the microcontroller 121 is used to execute a second instruction to perform the operation corresponding to the second instruction in place of the main controller 11.

[0044] For example, the microcontroller 121 is used to execute the second instruction, which can acquire control of the system bus and complete the operation corresponding to the second instruction by calling the system bus.

[0045] By having the microcontroller 121 execute the second instruction to replace the main controller 11 in completing the operation corresponding to the second instruction, the microcontroller 121 can acquire control of the system bus to complete the operation corresponding to the second instruction during data transmission by the direct memory access controller 120. This eliminates the need to repeatedly transfer control of the system bus to the main controller 11, thus solving the problem of low system efficiency caused by repeatedly transferring control of the system bus to the main controller 11.

[0046] like Figure 2 As shown, the memory access control device 12 also includes a second memory 13, which is connected to the system bus and is used to store operation instructions.

[0047] In some embodiments, the direct memory access controller 120 is further configured to transfer operation instructions to the first memory 1210.

[0048] In the embodiment of the present application, the direct memory access controller 120 can be connected with the host controller 11 through the system bus, and the host controller 11 can control the direct memory access controller 120 to carry the operation instruction in the second memory 13 to the first memory 1210.

[0049] As shown in Figure 2 , the second memory 13 can be arranged outside the direct memory access control device 12, and it can be understood that the second memory 13 can also be arranged in the direct memory access control device 12.

[0050] In the embodiment of the present application, by carrying the operation instruction in the second memory 13 to the first memory 1210 in the microcontroller 121 by the direct memory access controller 120, the microcontroller 121 executes the operation instruction, and the data transmission by the direct memory access controller 120 controlled by the microcontroller 121 instead of the host controller 11 can be realized, the problem that the host controller 11 often needs to participate in the data transmission process of the direct memory access controller 120 is solved, the resources of the host controller 11 are not occupied, and the working efficiency of the system is improved.

[0051] Please refer to Figure 3 , Figure 3 is another schematic diagram of the data transmission system 10 provided by the embodiment of the present application. As shown in Figure 3 , the second memory 13 can be integrated on the direct memory access control device 12. Of course, the host controller 11 can also be integrated on the direct memory access control device 12.

[0052] In an embodiment, as shown in Figure 3 , the direct memory access control device 12 further comprises a format conversion module 122, and the format conversion module 122 is used for performing format conversion on the operation instruction to obtain target data, and the data format of the target data matches the data format required by the first memory 1210.

[0053] The format conversion module 122 can be a separate module in the direct memory access control device 12, can be integrated on the direct memory access controller 120, and of course, can also be integrated on the microcontroller 121.

[0054] For example, the format conversion module 122 is a separate module, when the direct memory access controller 120 carries the operation instruction to the first memory 1210 of the microcontroller 121, the direct memory access controller 120 first sends the operation instruction to the format conversion module 122, the format conversion module 122 performs format conversion on the operation instruction to obtain target data, and the format conversion module 122 carries the target data to the first memory 1210 of the microcontroller 121.

[0055] The format conversion module 122 is an example of a module integrated in the microcontroller 121. The direct memory access controller 120 can carry operation instructions to the microcontroller 121. The format conversion module 122 in the microcontroller 121 can convert the operation instructions to obtain target data, and then carry the target data to the first memory 1210.

[0056] For example, the format of the target data can be a string format, an array format, a json format, or the like.

[0057] By setting the format conversion module 122, the operation instructions can be converted by the format conversion module 122 to obtain target data, ensuring that the data format of the target data matches the data format required by the first memory 1210, and avoiding the situation that the microcontroller 121 cannot recognize the data in the first memory 1210.

[0058] In an embodiment, as shown in Figure 4 The direct memory access control device 12 further includes an arbiter 123. The microcontroller 121 is connected to the system bus through the arbiter 123, and the host controller 11 is connected to the system bus through the arbiter 123. The direct memory access control device 12 includes a first control path for controlling the direct memory access controller 120 and a second control path for controlling the direct memory access controller 120. The first control path is that the microcontroller 121 accesses the direct memory access controller 120 through the arbiter 123 and the system bus. The second control path is that the host controller 11 accesses the direct memory access controller 120 through the arbiter 123 and the system bus.

[0059] In the embodiment, the arbiter 123 is configured to prioritize the instructions of the host controller 11 when the instructions sent by the host controller 11 and the microcontroller 121 are received at the same time.

[0060] For example, when the arbiter 123 receives the instructions sent by the host controller 11 and the microcontroller 121 at the same time, the arbiter 123 can prioritize the instructions of the host controller 11 and then process the instructions of the microcontroller 121.

[0061] By setting the arbiter 123 to prioritize the instructions of the host controller 11, the host controller 11 can access at any time during the data transmission controlled by the microcontroller 121 and the direct memory access controller 120, and the working efficiency of the host controller 11 can be ensured.

[0062] In an embodiment, as shown in Figure 5As shown, an external device 14 is also connected to the system bus, and the main controller 11 and the microcontroller 121 can access the external device 14 through the system bus; the direct memory access controller 120 can perform data transmission with the external device 14 through the system bus, for example, the direct memory access controller 120 can transmit data in the memory inside the system on chip to the external device 14 through the system bus, or transmit data stored by the external device 14 to the memory inside the system on chip through the system bus. The memory inside the system on chip can be the first memory 1210 and the second memory 13 described above, or other memories, which are not limited here.

[0063] In the embodiment of the present application, as shown in Figures 1-5 The main controller 11 can send a start instruction to the direct memory access controller 120 through the system bus to start the direct memory access controller 120; after the direct memory access controller 120 is started, the main controller 11 can send an instruction transfer request to the direct memory access controller 120 through the system bus to make the direct memory access controller 120 transfer the operation instruction in the second memory 13 to the first memory 1210 of the microcontroller 121 according to the instruction transfer request. The instruction transfer request is used to instruct the direct memory access controller 120 to transfer the operation instruction in the second memory 13.

[0064] By sending the instruction transfer request from the main controller 11 to the direct memory access controller 120, the instruction executed by the microcontroller 121 instead of the main controller 11 can be pre-transferred to the first memory 1210 of the microcontroller 121.

[0065] For example, when the direct memory access controller 120 receives the instruction transfer request sent by the main controller 11, the direct memory access controller 120 sends a first bus occupation request to the main controller 11 according to the instruction transfer request, and the first bus occupation request is used to request the main controller 11 to switch the direct memory access controller 120 from the slave working state to the master working state; after the direct memory access controller 120 enters the master working state, the direct memory access controller 120 transfers the operation instruction in the second memory 13 to the first memory 1210 in the microcontroller 121 through the system bus.

[0066] It should be noted that the slave working state refers to that before obtaining the control right of the system bus, the direct memory access controller 120 is a slave of the system bus and cannot control the system bus and accepts the control of the host controller 11. In this working state, the host controller 11 can write various parameters and instructions required for data transmission into various registers of the direct memory access controller 120 to control the transmission process, and can also read the registers to obtain the state of the direct memory access controller 120. The host working state refers to that after obtaining the control right of the bus to start data transmission, the direct memory access controller 120 is a master of the system bus and can independently control the system bus to start the whole process of data transfer according to the information configured by the host controller 11 until the transmission is completed and the control right of the system bus is given up.

[0067] In some embodiments, as shown in Figure 6 The microcontroller 121 is connected with the host controller 11, and the microcontroller 121 is configured to receive a start instruction of the host controller 11 and start according to the start instruction to execute the first instruction. The microcontroller 121 can be connected with the host controller 11 through the system bus, and the microcontroller 121 can also be connected with the host controller 11 through a preset signal line.

[0068] For example, as shown in Figure 6 The host controller 11 can send a start instruction to the microcontroller 121 through a preset signal line to start the microcontroller 121. In addition, the host controller 11 can also send a start instruction to a start register in the microcontroller 121 through the system bus to activate the start register, so as to start the microcontroller 121. The start register can be a pre-defined register configured to start the microcontroller 121.

[0069] It should be noted that in the embodiments of the present application, the host controller can first start the direct memory access controller 120 and then start the microcontroller 121, or the host controller can first start the microcontroller 121 and then start the direct memory access controller 120. By sending a start instruction from the host controller 11 to the microcontroller 121 to start the microcontroller 121, the control right of the host controller 11 to the direct memory access controller 120 can be transferred to the microcontroller 121, and the microcontroller 121 can control the direct memory access controller 120 to perform data transmission.

[0070] When the first instruction is a data transmission instruction, the microcontroller 121 executes the data transmission instruction to control the direct memory access controller 120 to perform data transmission. Specifically, the microcontroller 121 can send a data transmission request to the direct memory access controller 120 through the system bus, and the direct memory access controller 120 sends a second bus occupation request to the microcontroller 121 according to the data transmission request; the microcontroller 121 controls the direct memory access controller 120 to enter the master state from the slave state according to the second bus occupation request; and the direct memory access controller 120 performs data transmission through the system bus after entering the master state.

[0071] In some embodiments, the microcontroller 121 can send the data transmission request to the arbiter 123 first, and the arbiter 123 sends the data transmission request to the direct memory access controller 120 through the system bus.

[0072] For example, the data transmission mode of the direct memory access controller 120 can include a peripheral-to-memory mode, a memory-to-peripheral mode, and a memory-to-memory mode. The peripheral-to-memory mode refers to transmitting data in an external device to an internal memory of the system on chip; the memory-to-peripheral mode refers to transmitting data in the internal memory of the system on chip to an external device; and the memory-to-memory mode refers to transmitting data in a first internal memory of the system on chip to a second internal memory of the system on chip.

[0073] For example, the direct memory access controller 120 can include a data buffer register. When performing data transmission, the direct memory access controller 120 acquires data from a source address through the system bus and stores the data in the data buffer register; and then the direct memory access controller 120 sends the data in the data buffer register to a target address through the system bus.

[0074] It should be noted that when the data transmission mode is the peripheral-to-memory mode, the source address is an address of storing data in the external device 14, and the target address is an address of storing data in the internal memory; when the data transmission mode is the memory-to-peripheral mode, the source address is an address of storing data in the internal memory, and the target address is an address of storing data in the external device 14.

[0075] In some embodiments, when the operation instruction includes a second instruction, the microcontroller 121 is configured to execute the second instruction to complete an operation corresponding to the second instruction instead of the main controller 11.

[0076] It should be noted that the second instruction is an instruction that the direct memory access controller 120 cannot execute; the second instruction is originally executed by the host controller 11, and in the embodiment of the present application, by carrying the second instruction to the first memory 1210 of the microcontroller 121, the microcontroller 121 can replace the host controller 11 to complete the operation corresponding to the second instruction, and then the control right of the system bus can not be repeatedly transferred to the host controller 11 during the transmission of data by the direct memory access controller 120, thereby solving the problem of low system efficiency caused by repeatedly transferring the control right of the system bus to the host controller 11.

[0077] For example, the microcontroller 121 can read each second instruction in the first memory 1210 in time sequence.

[0078] For example, when the second instruction is a wait instruction, the microcontroller 121 performs a wait operation.

[0079] For another example, when the second instruction is an access instruction, the microcontroller 121 performs an access operation. The access instruction can include a peripheral access instruction, and can also be other types of access instructions. For example, when the access instruction is a peripheral access instruction, the microcontroller 121 executes the peripheral access instruction to access the external device through the system bus.

[0080] In some embodiments, when the microcontroller 121 receives an instruction of the host controller 11, the microcontroller 121 preferentially executes the instruction of the host controller 11. For example, when receiving a stop instruction of the host controller 11, the microcontroller 121 stops working. By preferentially executing the instruction sent by the host controller 11 by the microcontroller 121, the host controller 11 can control the microcontroller 121 at any time during the transmission of data by the microcontroller 121 controlling the direct memory access controller 120, and the control right of the host controller 11 is ensured.

[0081] The direct memory access control device 12 provided by the above embodiment can realize that the microcontroller 121 controls the direct memory access controller 120 to transmit data instead of the host controller 11, without occupying the resources of the host controller 11, thereby improving the working efficiency of the system; the microcontroller 121 can obtain the control right of the system bus to complete the operation corresponding to the second instruction during the transmission of data by the direct memory access controller 120, without repeatedly transferring the control right of the system bus to the host controller 11, thereby solving the problem of low working efficiency of the system caused by repeatedly transferring the control right of the system bus to the host controller 11; the format conversion module 122 is arranged to convert the operation instruction to obtain target data, so that the data format of the target data matches the data format required by the first memory 1210, and the microcontroller 121 can avoid failing to recognize the data in the first memory 1210; the arbitrator 123 is arranged to preferentially process the instruction of the host controller 11, so that the host controller 11 can access at any time during the transmission of data by the direct memory access controller 120 controlled by the microcontroller 121, and the working efficiency of the host controller 11 can be ensured.

[0082] Please refer to Figure 7 , Figure 7 is a schematic flowchart of a data transmission method provided by an embodiment of the present application. The data transmission method can be applied to the direct memory access control device provided by the above embodiment, and can realize that the microcontroller controls the direct memory access controller to transmit data instead of the host controller, without occupying the resources of the host controller, thereby improving the working efficiency of the system.

[0083] As shown in Figure 7 , the data transmission method comprises steps S201 and S202.

[0084] In step S201, when data transmission by the direct memory access controller is needed, the microcontroller obtains an operation instruction configured by the host controller.

[0085] It should be noted that when data transmission by the direct memory access controller is needed, it means that an external device requests to transmit data to the memory or requests to transmit data from the memory to the memory of the external device; of course, the host controller on the system on chip can also transmit data in the memory to the external device or transmit data from the external device to the memory.

[0086] For example, when the microcontroller acquires the operation instruction configured by the host controller, the microcontroller can read the instruction stored in the first memory in the microcontroller. The instruction stored in the first memory is pre-configured by the host controller and stored in the second memory, and is carried from the second memory to the first memory by the DMA controller controlled by the host controller.

[0087] For example, the operation instruction can include a first instruction and a second instruction. The first instruction can be a data transmission instruction, and the first instruction is used to control the DMA controller to perform data transmission. The second instruction is a non-operation instruction of the DMA controller, and is used to perform corresponding operations by the microcontroller instead of the host controller.

[0088] By acquiring the operation instruction configured by the host controller by the microcontroller, the microcontroller can control the DMA controller to perform data transmission according to the operation instruction.

[0089] In step S202, the microcontroller controls the DMA controller to perform data transmission according to the operation instruction configured by the host controller.

[0090] For example, the microcontroller can control the DMA controller to perform data transmission according to the data transmission instruction. In the embodiment of the present application, the control of the DMA controller to perform data transmission will be described in detail.

[0091] Please refer to Figure 8 , Figure 8 is a schematic flowchart of a data transmission sub-step provided by the embodiment of the present application, and can include the following steps S2021 to S2023.

[0092] In step S2021, the microcontroller sends a data transmission request to the DMA controller, and the DMA controller sends a bus occupation request to the microcontroller according to the data transmission request.

[0093] For example, the microcontroller can send a data transmission request to the DMA controller through a system bus, and the DMA controller sends a bus occupation request to the microcontroller according to the data transmission request. The microcontroller can first send the data transmission request to an arbitrator, and the arbitrator sends the data transmission request to the DMA controller through the system bus.

[0094] In step S2022, the microcontroller controls the DMA controller to enter a host working state from a slave working state according to the bus occupation request.

[0095] For example, the microcontroller can grant the controller of the system bus to the DMA controller for the DMA controller to independently control the system bus to start transmitting data.

[0096] In step S2023, the DMA controller transmits data through the system bus after entering the host working state.

[0097] For example, the DMA controller can transmit data through the system bus based on different data transmission modes. The data transmission modes can include a peripheral-to-memory mode, a memory-to-peripheral mode, and a memory-to-memory mode.

[0098] For example, the DMA controller can transmit data in an external device to an internal memory of the SoC through the system bus. For another example, the DMA controller can transmit data in the internal memory of the SoC to an external device through the system bus.

[0099] The data transmission method provided by the above embodiment can obtain the operation instruction configured by the host controller through the microcontroller, and then can implement that the microcontroller controls the DMA controller to transmit data according to the operation instruction. The data transmission method can implement that the microcontroller replaces the host controller to control the DMA controller to transmit data by sending the data transmission request to the DMA controller through the microcontroller, and solves the problem that the host controller often needs to participate in the data transmission of the DMA controller. The data transmission method does not need to occupy the resources of the host controller, and improves the working efficiency of the system.

[0100] Please refer to Figure 9 , Figure 9 Another data transmission method provided by the embodiment of the present application includes steps S203 and S204.

[0101] In step S203, the DMA controller carries the operation instruction in the second memory to the first memory of the microcontroller, and the operation instruction at least includes a first instruction.

[0102] In the embodiment of the present application, the host controller can send a start instruction to the DMA controller through the system bus to start the DMA controller. After the DMA controller is started, the host controller can send an instruction carrying request to the DMA controller through the system bus, so that the DMA controller carries the operation instruction in the second memory to the first memory of the microcontroller according to the instruction carrying request.

[0103] It should be noted that the host controller can start the direct memory access controller first, and then start the microcontroller. Of course, the host controller can start the microcontroller first, and then start the direct memory access controller.

[0104] For example, when the direct memory access controller receives the instruction transfer request sent by the host controller, the direct memory access controller sends a bus occupation request to the host controller according to the instruction transfer request, and the bus occupation request is used to request the host controller to switch the direct memory access controller from the slave state to the master state. After the direct memory access controller enters the master state, the direct memory access controller transfers the operation instruction in the second memory to the first memory in the microcontroller through the system bus.

[0105] For example, the operation instruction at least includes a first instruction, and the first instruction can be a data transmission instruction, and the first instruction is used to control the direct memory access controller to perform data transmission.

[0106] By transferring the operation instruction in the second memory to the first memory in the microcontroller by the direct memory access controller, the microcontroller can execute the first instruction to control the direct memory access controller to perform data transmission.

[0107] In step S204, the microcontroller reads and executes the first instruction from the first memory.

[0108] In the embodiment of the present application, after the direct memory access controller transfers the operation instruction in the second memory to the first memory in the microcontroller, if the microcontroller is not started, the host controller needs to start the microcontroller to make the microcontroller execute the first instruction.

[0109] It should be noted that the host controller can send a start instruction to the microcontroller through a preset signal line to start the microcontroller. In addition, the host controller can also send a start instruction to a start register in the microcontroller through the system bus to activate the start register, so that the microcontroller is started. The start register can be a pre-defined register used to start the microcontroller.

[0110] For example, when the first instruction is a data transmission instruction, the microcontroller executes the data transmission instruction to control the direct memory access controller to perform data transmission.

[0111] By executing the data transmission instruction by the microcontroller, the microcontroller can replace the host controller to control the direct memory access controller to perform data transmission, without occupying the resources of the host controller, thereby improving the working efficiency of the system.

[0112] In some embodiments, the data transmission method provided by the embodiment of the present application can further include: the microcontroller executes a second instruction to replace the host controller to complete the operation corresponding to the second instruction.

[0113] It should be noted that in the embodiments of the present application, the operation instruction can include a second instruction in addition to the first instruction. The second instruction is an instruction of the non-operation direct memory access controller, and is used to perform a corresponding operation by the microcontroller instead of the host controller. The second instruction can include one or more of a waiting instruction, an inquiry instruction, a pointer jump instruction, an access instruction, and a stop instruction.

[0114] For example, when the second instruction is a waiting instruction, the microcontroller performs a waiting operation.

[0115] For example, when the second instruction is an access instruction, the microcontroller performs an access operation. The access instruction can include a peripheral access instruction, and can also be another type of access instruction. For example, when the access instruction is a peripheral access instruction, the microcontroller executes the peripheral access instruction to access an external device through the system bus.

[0116] It should be noted that the second instruction is an instruction that cannot be executed by the direct memory access controller. The second instruction is originally executed by the host controller, and in the embodiments of the present application, the second instruction is executed by the microcontroller to replace the host controller to complete the operation corresponding to the second instruction, so that the control right of the system bus is not repeatedly transferred to the host controller during the data transmission of the direct memory access controller, and the problem of low work efficiency of the system caused by repeatedly transferring the control right of the system bus to the host controller is solved.

[0117] For example, the microcontroller can read each second instruction in the first memory in time sequence.

[0118] For example, when the second instruction is a waiting instruction, the microcontroller performs a waiting operation. For example, when the second instruction is an access instruction, the microcontroller performs an access operation. The access instruction can include a peripheral access instruction, and can also be another type of access instruction. For example, when the access instruction is a peripheral access instruction, the microcontroller executes the peripheral access instruction to access an external device through the system bus.

[0119] By executing the second instruction by the microcontroller to replace the host controller to complete the operation corresponding to the second instruction, the control right of the system bus is obtained by the microcontroller to complete the operation corresponding to the second instruction during the data transmission of the direct memory access controller, and the control right of the system bus is not repeatedly transferred to the host controller, and the problem of low work efficiency of the system caused by repeatedly transferring the control right of the system bus to the host controller is solved.

[0120] In some embodiments, the DMA control device further comprises a format conversion module; the data transmission method provided by the embodiments of the present application further comprises: calling the format conversion module to perform format conversion on the operation instruction to obtain target data, wherein the data format of the target data matches the data format required by the first memory.

[0121] For example, the format conversion module can be a separate module in the DMA control device, or can be integrated in the DMA controller, or can be integrated in the microcontroller.

[0122] For example, when the DMA controller carries the operation instruction to the first memory of the microcontroller, the DMA controller first sends the operation instruction to the format conversion module, and the format conversion module performs format conversion on the operation instruction to obtain target data, and then the format conversion module carries the target data to the first memory of the microcontroller.

[0123] For example, the format conversion module is a module integrated in the microcontroller, and the DMA controller can carry the operation instruction to the microcontroller, and the format conversion module in the microcontroller performs format conversion on the operation instruction to obtain target data, and then carries the target data to the first memory.

[0124] For example, the format of the target data can be a string format, an array format, a json format, etc.

[0125] By performing format conversion on the operation instruction through the format conversion module to obtain target data, it is ensured that the data format of the target data matches the data format required by the first memory, which can avoid that the microcontroller cannot recognize the data in the first memory.

[0126] In some embodiments, the DMA control device further comprises an arbitrator; the data transmission method provided by the embodiments of the present application further comprises: when the arbitrator simultaneously receives the instructions sent by the host controller and the microcontroller, controlling the arbitrator to preferentially process the instructions of the host controller.

[0127] For example, when the arbitrator simultaneously receives the instructions sent by the host controller and the microcontroller, the arbitrator can preferentially process the instructions of the host controller and then process the instructions of the microcontroller, thereby ensuring the work efficiency of the host controller.

[0128] By preferentially processing the instructions of the host controller by the arbitrator, it is convenient for the host controller to access at any time during the data transmission controlled by the microcontroller, and the work efficiency of the host controller can be ensured.

[0129] Please refer to Figure 10 , Figure 10is a schematic flowchart of another data transmission method provided by the embodiment of the present application, as shown in Figure 10 The data transmission method can specifically include the following steps:

[0130] Step S301: The host controller initiates an instruction transfer request to transfer operation instructions into the first memory of the microcontroller.

[0131] Step S302: The arbiter determines the source of the instruction transfer request and processes the request of the host controller preferentially.

[0132] Step S303: The arbiter transmits the instruction transfer request to the system bus.

[0133] Step S304: The DMA controller obtains the instruction transfer request through the system bus and transfers the operation instructions in the second memory into the first memory of the microcontroller.

[0134] Step S305: The host controller starts the microcontroller, and the microcontroller starts working.

[0135] Step S306: The microcontroller reads the instructions in the first memory and parses them.

[0136] Step S307: The microcontroller determines whether the instruction content is the first instruction or the second instruction, executes step S308 if the instruction content is the first instruction, or executes step S309 if the instruction content is the second instruction.

[0137] Step S308: The microcontroller sends a data transmission request to the DMA controller, and the DMA controller starts transferring data.

[0138] Step S309: The microcontroller executes the second instruction, which includes one or more of a wait instruction, a query instruction, a pointer jump instruction, an access instruction, and a stop instruction.

[0139] It should be noted that, in step S302, the arbiter can receive instructions from the microcontroller in addition to the instructions from the host controller.

[0140] For example, during the step S308 in which the DMA controller starts transferring data or the step S309 in which the microcontroller executes the second instruction, when the microcontroller receives instructions from the host controller, the microcontroller executes the instructions from the host controller preferentially. For example, when receiving a stop instruction from the host controller, the microcontroller stops working. By executing the instructions sent by the host controller preferentially, the microcontroller can be controlled by the host controller at any time during the transmission of data by the DMA controller under the control of the microcontroller, thereby ensuring the control right of the host controller.

[0141] The first instruction and the second instruction in the second memory are carried to the first memory in the microcontroller by the direct memory access controller according to the instruction carrying request of the host controller, so that the microcontroller controls the direct memory access controller to transmit data according to the first instruction and completes the operation corresponding to the second instruction according to the second instruction, solves the problem that the host controller needs to participate in the data transmission of the direct memory access controller, and improves the working efficiency of the system.

[0142] The data transmission method provided by the above embodiment can carry the operation instruction in the second memory to the first memory in the microcontroller by the direct memory access controller, so that the microcontroller can execute the first instruction to control the direct memory access controller to transmit data; the microcontroller can execute the data transmission instruction to control the controller to transmit data instead of the host controller, so that the resources of the host controller are not occupied, and the working efficiency of the system is improved; the microcontroller can execute the second instruction to complete the operation corresponding to the second instruction instead of the host controller, so that the microcontroller can obtain the control right of the system bus to complete the operation corresponding to the second instruction during the data transmission of the direct memory access controller, and the control right of the system bus does not need to be repeatedly transferred to the host controller, thereby solving the problem that the working efficiency of the system is low due to the repeated transfer of the control right of the system bus to the host controller; the format conversion module can convert the operation instruction to obtain the target data, so that the data format of the target data matches the data format required by the first memory, and the microcontroller can avoid failing to recognize the data in the first memory; the arbitrator can preferentially process the instruction of the host controller, so that the host controller can be connected at any time during the data transmission of the direct memory access controller controlled by the microcontroller, and the working efficiency of the host controller can be ensured.

[0143] Those skilled in the art can understand that all or some of the steps in the above disclosed method and the function modules / units in the system and the device can be implemented as software, firmware, hardware and appropriate combinations thereof.

[0144] In the hardware implementation, the division between the function modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component can have multiple functions, or one function or step can be executed by several physical components in cooperation.

[0145] The above description is merely specific embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements shall be covered in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A direct memory access control device, characterized in that, The direct memory access control device includes a direct memory access controller and a microcontroller. The direct memory access controller is connected to a system bus, and the system bus is also connected to a main controller. When data transmission needs to be performed using the direct memory access controller, the microcontroller is used to control the direct memory access controller to perform data transmission according to the operation instructions configured by the main controller, in place of the main controller.

2. The direct memory access control device according to claim 1, characterized in that, The microcontroller includes a first memory; the first memory is used to store operation instructions configured by the main controller, the operation instructions including at least a first instruction; The microcontroller is configured to read from the first memory and execute the first instruction to control the direct memory access controller to perform data transmission.

3. The direct memory access control device according to claim 2, characterized in that, The direct memory access control device further includes a second memory, which is connected to the system bus and is used to store the operation instructions. The direct memory access controller is further configured to transfer the operation instructions to the first memory.

4. The direct memory access control device according to claim 2, characterized in that, The operation instructions also include a second instruction, which the microcontroller executes to perform the operation corresponding to the second instruction on behalf of the main controller. The second instruction is not an instruction that operates the direct memory access controller.

5. The direct memory access control device according to claim 4, characterized in that, The second instruction includes one or more of the following: wait instruction, query instruction, pointer jump instruction, access instruction, and stop instruction.

6. The direct memory access control device according to claim 5, characterized in that, The access instructions include peripheral access instructions. The microcontroller executes the peripheral access instructions to access external devices through the system bus.

7. The direct memory access control device according to any one of claims 1-6, characterized in that, The microcontroller is connected to the main controller, and the microcontroller is used to receive the start command from the main controller and start according to the start command.

8. The direct memory access control device according to any one of claims 2-6, characterized in that, The direct memory access control device further includes: The format conversion module is used to convert the operation instructions to obtain target data, wherein the data format of the target data matches the data format required by the first memory.

9. The direct memory access control device according to any one of claims 1-6, characterized in that, The direct memory access control device further includes: An arbitrator is provided, wherein the microcontroller is connected to the system bus via the arbitrator, and the main controller is connected to the system bus via the arbitrator. The direct memory access control device includes a first control path and a second control path for controlling the direct memory access controller. The first control path is that the microcontroller accesses the direct memory access controller through the arbiter and the system bus. The second control path is that the master controller accesses the direct memory access controller through the arbiter and the system bus.

10. The direct memory access control device according to claim 9, characterized in that, The arbitrator is configured to prioritize processing the instructions from the main controller when it receives instructions from both the main controller and the microcontroller simultaneously.

11. A data transmission method, characterized in that, Applied in the direct memory access control apparatus according to any one of claims 1-10, the method comprises: When data transmission is required using the direct memory access controller, the microcontroller obtains the operation instructions configured by the main controller; The microcontroller controls the direct memory access controller to perform data transmission according to the operation instructions configured by the main controller.

12. The data transmission method according to claim 11, characterized in that, The microcontroller includes a first memory, the main controller configures operation instructions and stores them in a second memory, and the second memory is connected to the system bus; the method further includes: The direct memory access controller moves the operation instructions in the second memory to the first memory of the microcontroller, and the operation instructions include at least the first instruction; The microcontroller reads from the first memory and executes the first instruction.

13. The data transmission method according to claim 11, characterized in that, The control of the direct memory access controller to perform data transmission includes: The microcontroller sends a data transmission request to the direct memory access controller, and the direct memory access controller sends a bus occupancy request to the microcontroller according to the data transmission request; The microcontroller controls the direct memory access controller to switch from slave working state to master working state according to the bus occupancy request; After entering the host operating state, the direct memory access controller transmits data through the system bus.

14. The data transmission method according to claim 12, characterized in that, The operation instruction further includes a second instruction; the method further includes: The microcontroller executes the second instruction to perform the operation corresponding to the second instruction in place of the main controller. The second instruction includes one or more of the following: wait instruction, query instruction, pointer jump instruction, access instruction, and stop instruction.

15. The data transmission method according to any one of claims 12-14, characterized in that, The direct memory access control device further includes a format conversion module; the method further includes: The format conversion module is invoked to convert the operation instructions to obtain target data, and the data format of the target data matches the data format required by the first memory.

16. The data transmission method according to any one of claims 11-14, characterized in that, The direct memory access control device further includes an arbitrator; the method further includes: When the arbitrator receives instructions from both the main controller and the microcontroller, it controls the arbitrator to prioritize processing the instructions from the main controller.

17. A data transmission system, characterized in that, The data transmission system includes a main controller and a direct memory access control device as described in any one of claims 1-10, wherein the main controller is integrated on the direct memory access control device, or the main controller is disposed outside the direct memory access control device.

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