Timing control circuit, display device and frequency correction method

Abstract

The present invention discloses a timing control circuit, a display device and a frequency correction method, comprising a receiving unit, which receives an external frequency clock signal in an external frequency input stage and outputs a timing signal for writing display data according to the external frequency clock signal; an oscillator, which generates an internal frequency clock signal with adjustable frequency; a calculation unit, which obtains a first correction signal for correcting the frequency of the internal frequency clock signal according to the timing signal for writing display data in the external frequency input stage; and a temperature compensation unit, which stores the corresponding relationship between the current temperature signal and the first correction signal in the external frequency input stage and provides a second correction signal according to the current temperature signal and the corresponding relationship in the non-external frequency stage. The method realizes the frequency correction of the internal frequency clock signal by the timing control circuit in the absence of external frequency, improves the display effect of various display devices, and reduces the design cost, the power consumption of the display device and the calculation pressure of the application processor.

Description

Technical Field

[0001] The present invention relates to the field of display drive technology, and in particular to a timing control circuit, a display device and a frequency correction method. Background Art

[0002] Among various existing display devices, the timing control circuit is an important component. Its function is to receive and process the output signal of the application processor, generate the correct control timing signal to control the normal operation of the display panel and its driving circuit, and play the role of "communication" between the application processor and the display driving circuit.

[0003] The prior art provides a timing control circuit, which can receive an external frequency clock signal provided by an application processor and analyze it to obtain a write display data timing signal, a horizontal scanning signal and other signals, and can also generate an internal frequency clock signal for controlling a display driving circuit, wherein the frequency of the internal frequency clock signal is related to the write display data timing signal, and can correct the frequency drift caused by factors such as temperature change according to the write display data timing signal. However, the problem with the prior art is that the correction of the internal frequency clock signal depends on the external frequency clock signal, and since the temperature environment in the timing control circuit is relatively complex, the internal frequency clock signal needs to be corrected frequently, but in the existing display device, in order to save power and reduce the calculation amount of the application processor, the output of the external frequency clock signal is often stopped, resulting in the internal frequency clock signal being unable to be corrected in time, affecting the final display effect.

[0004] Therefore, a new timing control circuit, a display device and a new frequency correction method are needed, which can continue to correct the internal frequency clock signal in the absence of an external frequency clock signal. Summary of the invention

[0005] In view of the above problems, an object of the present invention is to provide a timing control circuit, a display device and a frequency correction method, so as to realize the correction of the internal frequency clock signal in the absence of an external frequency clock signal, thereby improving the display quality.

[0006] According to one aspect of the present invention, there is provided a timing control circuit, comprising: a receiving unit, for receiving an external frequency clock signal in an external frequency input stage and outputting a write display data timing signal according to the external frequency clock signal; an oscillator, for generating an internal frequency clock signal with adjustable frequency; a calculating unit, for obtaining a first correction signal for correcting the frequency of the internal frequency clock signal according to the write display data timing signal in the external frequency input stage; a temperature detecting unit, for obtaining a current temperature signal of the timing control circuit; and a temperature compensating unit, for storing a corresponding relationship between the current temperature signal and the first correction signal in the external frequency input stage, and providing a second correction signal according to the current temperature signal and the corresponding relationship in a non-external frequency stage.

[0007] Optionally, the calculation unit includes a counter, and the calculation unit is configured to count the write display data timing signal and the internal frequency clock signal within a preset time range and output the first correction signal according to a comparison result of the count values.

[0008] Optionally, the calculation unit is configured to control the oscillator to correct the frequency of the internal frequency clock signal through the first correction signal when the count values ​​of the write display data timing signal and the internal frequency clock signal are different.

[0009] Optionally, the temperature compensation unit includes a plurality of storage locations, and the temperature compensation unit converts the first correction signal into a correction value according to a preset method and stores the converted value in the plurality of storage locations.

[0010] Optionally, the multiple storage locations correspond to multiple temperature intervals respectively, and the temperature detection unit is further used to identify the temperature interval corresponding to the current temperature signal, and to control the correction value to be stored in the corresponding storage location.

[0011] Optionally, the temperature compensation unit is configured to read the current temperature signal in a non-external frequency stage, query the corresponding temperature interval according to the current temperature signal, read the correction value in the corresponding storage position and convert the correction value into the second correction signal output.

[0012] Optionally, the timing control circuit further includes a control unit to control a switching state of at least one of the receiving unit, the oscillator, the calculation unit, the temperature compensation unit and the temperature detection unit.

[0013] According to another aspect of the present invention, a frequency correction method is provided, which includes: receiving an external frequency clock signal, and outputting a write display data timing signal according to the external frequency clock signal; acquiring a first correction signal for correcting the frequency of an internal frequency clock signal according to the write display data timing signal; acquiring a current temperature signal and storing a corresponding relationship between the current temperature signal and the first correction signal; when the external frequency clock signal stops inputting, providing a second correction signal according to the current temperature signal and the corresponding relationship, the second correction signal being used to correct the frequency of the internal frequency clock signal.

[0014] Optionally, the acquiring of the first correction signal further comprises counting the write display data timing signal and the internal frequency clock signal within a preset time range and outputting the first correction signal according to a comparison result of the count values.

[0015] Optionally, when the count values ​​of the write display data timing signal and the internal frequency clock signal are different, the first correction signal corrects the frequency of the internal frequency clock signal.

[0016] Optionally, the first correction signal is converted into a correction value according to a preset method and stored in a plurality of storage locations.

[0017] Optionally, the multiple storage locations correspond to multiple temperature intervals respectively, and the correction value is stored in the corresponding storage location according to the temperature interval corresponding to the current temperature signal.

[0018] Optionally, when the external frequency clock signal stops being input, the corresponding correction value is read according to the temperature interval corresponding to the current temperature signal, and the correction value is converted into the second correction signal for output.

[0019] According to another aspect of the present invention, a display device is provided, comprising the timing control circuit as described above, and configured to execute the frequency correction method as described above.

[0020] The timing control circuit, display device and frequency correction method provided by the present invention realize the correction of the internal frequency clock signal in the absence of an external frequency by setting a temperature compensation unit capable of recording the corresponding relationship between the correction signal and the temperature. In the prior art, the correction signal is obtained by analyzing the timing signal for writing display data and the internal frequency clock signal, resulting in the correction signal being dependent on the generation of the timing signal for writing display data. The timing control circuit of the present invention is additionally provided with a temperature compensation unit, which can continuously store and update the corresponding relationship between the correction signal and the temperature when there is an external frequency input, and continue to provide the correction signal according to the latest corresponding relationship after the external frequency stops inputting, so that the correction of the internal frequency clock signal does not depend on the external frequency clock signal, and can continue to correct the internal frequency clock signal after the external frequency clock signal stops inputting. Through the above design, the timing control circuit of the present invention can improve the display effect of various display devices, while also reducing the design cost, reducing the power consumption of the display device and the computing pressure of the application processor.

[0021] Furthermore, the timing control circuit of the present invention is configured to complete the acquisition and update of the correction signal within one frame, so as to achieve accurate correction of the internal frequency clock signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0023] Figure 1 A schematic diagram of the structure of a timing control circuit according to an embodiment of the present invention is shown;

[0024] Figure 2 shows a signal timing diagram of a timing control circuit according to an embodiment of the present invention;

[0025] Figure 3 A corresponding table between temperature and correction signal according to an embodiment of the present invention is shown;

[0026] Figure 4 A flow chart of a frequency correction method according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0027] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements or modules are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0028] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by programmable circuits. When an element or circuit is said to be "connected to" another element or an element or circuit is said to be "connected" between two nodes, it may be directly coupled or connected to another element or there may be an intermediate element, and the connection between the elements may be physical, logical, or a combination thereof.

[0029] At the same time, certain words are used in this patent specification and claims to refer to specific components. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same component. This patent specification and claims do not use differences in names as a way to distinguish components, but rather use differences in components' functions as the criteria for distinction.

[0030] In addition, it should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements defined by the statement "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

[0031] See also Figure 1 , Figure 1 A schematic diagram of the structure of a timing control circuit according to an embodiment of the present invention is shown. Specifically, the timing control circuit 200 is coupled between the application processor 100 and the display driver unit 300. It should be understood that the application processor 100 is at least a part of the display device system chip, and is used to provide an external frequency clock signal. In order to ensure the stability of the clock signal, the external frequency clock signal of the application processor 100 is generally generated by, for example, an active quartz crystal oscillator, and its frequency and other parameters are less likely to change with factors such as temperature; the timing control circuit 200 receives the external frequency clock signal and generates a corresponding internal frequency clock signal, which is provided to the display driver unit 300 to control the display image.

[0032] The timing control circuit 200 of the present invention is provided with a receiving unit 220, and the receiving unit 220 is coupled to the application processor 100 (display link) to receive an external frequency clock signal, a display signal, etc. In some embodiments of the present invention, the receiving unit 220 includes a decoder for parsing the signal received through the display link into at least one of a line synchronization signal HS, a frame synchronization signal VS, and a write display data timing signal CK-W, wherein the line synchronization signal HS and the frame synchronization signal VS are used to select a valid video signal interval in the display panel, command the display signal to be transmitted in sequence, and ensure the correctness of data transmission; the write display data timing signal CK-W is also used as a clock signal for writing display data into the display panel.

[0033] The timing control circuit 200 of the present invention is provided with an oscillator 230, which generates an internal frequency clock signal CK-D with adjustable frequency. The frequency of the internal frequency clock signal CK-D is related to the above-mentioned display data writing timing signal CK-W, and is used as the clock signal of the display driving unit 300. The frequency of the internal frequency clock signal CK-D can be, for example, a multiple of the display data writing timing signal CK-W. Specifically, the oscillator 230 uses a voltage and current crystal oscillator to generate the internal frequency clock signal CK-D, so the frequency of the internal frequency clock signal CK-D is easily affected by factors such as temperature and drifts, and needs to be corrected with reference to the display data writing timing signal CK-W.

[0034] The timing control circuit 200 of the present invention is provided with a calculation unit 210 to realize the correction of the internal frequency clock signal CK-D when the application processor 100 outputs the external frequency clock signal. Specifically, the calculation unit 210 includes, for example, a counter (not shown in the figure), and the calculation unit 210 is coupled to the above-mentioned receiving unit 220 and the oscillator 230 to receive the write display data timing signal CK-W and the internal frequency clock signal CK-D, and the above-mentioned counter is used to count the above two signals in a unit time (for example, one frame) according to a preset counting rule (for example, for the write display data timing signal CK-W, every two cycles are counted as one), wherein the count value of the write display data timing signal CK-W is recorded as N, and the count value of the internal frequency clock signal CK-D is recorded as N'. The calculation unit 210 is also used to compare the size relationship between N and N' to determine the difference between the frequency of the internal frequency clock signal CK-D actually generated and the expected value, and generate a first correction signal Adj to output to the oscillator 230. The oscillator 230 modifies the oscillation parameters according to the first correction signal Adj to correct the frequency of the output internal frequency clock signal CK-D.

[0035] In some embodiments of the present invention, in order to reduce the amount of calculation of the calculation unit 210, the counting rule adopted by the above counter is related to the frequency multiplication relationship between the write display data timing signal CK-W and the internal frequency clock signal CK-D. For example, in some embodiments, the internal frequency clock signal CK-D expected to be obtained is half the frequency multiplication of the write display data timing signal CK-W, then when the write display data timing signal CK-W is recorded as one for every two cycles, the internal frequency clock signal CK-D is recorded as one for every cycle. Under this counting rule, the count value N of the write display data timing signal CK-W can be used as the expected value of the count value N' of the internal frequency clock signal CK-D. That is to say, the magnitude relationship between the count value N of the write display data timing signal CK-W and the count value N' of the internal frequency clock signal CK-D reflects the frequency drift of the internal frequency clock signal CK-D, that is, if the count value N' of the internal frequency clock signal CK-D is equal to the count value N of the write display data timing signal CK-W, it means that its frequency reaches the expected value; when the count value N' of the internal frequency clock signal CK-D is greater than the count value N of the write display data timing signal CK-W, its frequency is greater than the expected value; conversely, when the count value N' of the internal frequency clock signal CK-D is less than the count value N of the write display data timing signal CK-W, its frequency is less than the expected value.

[0036] In the case where the application processor 100 stops outputting the external frequency clock signal, the timing control circuit 200 of the present invention is provided with a temperature compensation unit 250 and a temperature detection unit 260 to realize the correction of the internal frequency clock signal CK-D. Specifically, the temperature compensation unit 250 is coupled to the calculation unit 210, and receives the first correction signal Adj in the external frequency phase; the temperature compensation unit 250 includes a plurality of storage locations, which are respectively used to store the correction values ​​corresponding to the first correction signal Adj at different temperatures. The temperature detection unit 260 is coupled to an external temperature detector 400, and the temperature detector 400 is used to obtain the temperature of the current chip and transmit it to the temperature detection unit 260. The temperature detection unit 260 receives the current temperature, converts it into a corresponding identifiable temperature signal, and determines the interval to which the current temperature belongs and the corresponding storage location, thereby completing the storage of the corresponding relationship between the first correction signal Adj and the temperature in the external frequency phase. After the application processor 100 stops outputting the external frequency, the temperature compensation unit 250 can convert the correction value in the corresponding storage position into a second correction signal Adj-t according to the current temperature interval provided by the temperature detection unit 260 and output it to the calculation unit 210 to complete the frequency correction of the internal frequency clock signal CK-D.

[0037] Figure 3The table of correspondence between the correction signal and the temperature in the temperature compensation unit in one embodiment of the present invention is shown. As shown in the figure, in this embodiment, the temperature compensation unit 250 includes 8 storage locations, corresponding to -40°C~119°C respectively. It should be understood that the temperature range is based on the temperature range that can be achieved by the timing control circuit of the display device in actual conditions, and the number of storage locations is related to the accuracy of the frequency correction. In this embodiment, the temperature range corresponding to each storage location is 20°C. Each storage location is provided with an initial correction value. When the chip temperature is in the temperature range corresponding to any storage unit, the temperature compensation unit 250 reads the first correction signal Adj generated by the calculation unit 210 and converts it into a correction value to replace the original initial correction value. As shown in the figure, in this embodiment, the display chip, for example, has experienced a low temperature environment (25°C~-30°C) from a normal temperature environment. At this time, the correction values ​​in the storage locations 0~3 in the temperature compensation unit 250 are updated. It should be understood that the time required to update the correction value in the storage location is not fixed. In the case of external frequency, the correction value in the temperature compensation unit 250 is continuously updated to ensure the accuracy of the second correction signal Adj-t.

[0038] Furthermore, the timing control circuit of the present invention is further provided with a control unit 240, and the control unit 240 is coupled (control link) to the application processor 100 to control the switching conditions of each unit in the timing control circuit 200. In some embodiments, the calculation unit 210, the temperature compensation unit 250 and the temperature detection unit 260 are respectively coupled to the control unit 240, the first correction signal Adj is transmitted to the temperature compensation unit 250 through the control unit 240, and the temperature signal obtained by the temperature detection unit 260 is also transmitted to the temperature compensation unit 250 through the control unit 240.

[0039] Figure 2 The signal timing diagram of the timing control circuit according to the embodiment of the present invention is shown. As shown in the figure, the timing control circuit is, for example, t 1, the receiving unit 220 starts to parse the input signal and obtain the line synchronization signal HS, the frame synchronization signal VS and the write display data timing signal CK-W. Since the application processor 100 adopts the active quartz crystal oscillator method to obtain the external frequency signal, the line synchronization signal HS, the frame synchronization signal VS and the write display data timing signal CK-W are all pulse signals with stable frequencies, among which the frame synchronization signal VS is used to control the screen refresh of the display device and has the lowest frequency; the line synchronization signal HS is used to control the charging of a single row of pixels in the display device, and its frequency relative to the frame synchronization signal VS is approximately the number of pixel rows of the display panel in the display device; the write display data timing signal CK-W is used as a clock signal, and its frequency is higher than the line synchronization signal HS and the frame synchronization signal VS. The calculation unit 210 t1, the writing display data timing signal CK-W and the internal frequency clock signal CK-D are counted respectively, as shown in the figure. t 1 o'clock to t 2 is the counting period in this embodiment. In this embodiment, every two cycles of the write display data timing signal CK-W are counted as one. Accordingly, the internal frequency clock signal CK-D is counted according to the frequency multiplication relationship. It should be understood that, as shown in the figure, if the frequency of the internal frequency clock signal CK-D is the same as the expected value, then its count value N' should be t 2 is the same as the count value N of the write display data timing signal CK-W, that is, the calculation unit compares the internal frequency clock signal CK-D at t The frequency drift can be obtained by the magnitude relationship between the count value N' and N at the moment 2, thereby generating a corresponding correction signal.

[0040] It should be understood that the input duration of the external frequency clock signal is, for example, one frame. t At time 3, the external frequency timing signal stops inputting, so that the write display data timing signal CK-W is fixed to a low level. At this time, the receiving unit 220 stops outputting, and the temperature compensation unit 250 outputs the second correction signal Adj-t to the calculation unit 210.

[0041] The timing control circuit of the embodiment of the present invention counts the write display data timing signal CK-W and the internal frequency clock signal CK-D respectively to obtain the first correction signal Adj when there is an external frequency input, and the compensation module stores the first correction signal Adj and its corresponding temperature, thereby outputting the second correction signal Adj-t when there is no external frequency input, thereby realizing the correction of the internal frequency clock signal CK-D when there is no external frequency input, greatly improving the display quality of the display device, saving design costs, and saving the power loss and computing resource occupation caused by the need to continuously output the external frequency clock signal in the prior art.

[0042] An embodiment of the present invention further provides a frequency correction method for a display device, comprising the following steps:

[0043] Step S1: Receive an external frequency clock signal, and obtain a write display data timing signal CK-W according to the external frequency clock signal. In this step, the external frequency clock signal is provided by, for example, an application processor, and the receiving unit in the timing control circuit includes a decoder, which decodes the received signal into at least one of a line synchronization signal HS, a frame synchronization signal VS, and a write display data timing signal CK-W.

[0044] Step S2: Obtain the first correction signal Adj according to the write display data timing signal CK-W. In this step, the write display data timing signal CK-W and the internal frequency clock signal CK-D are counted respectively, and the frequency drift of the internal frequency clock signal CK-D is calculated according to the obtained count value, so as to obtain the first correction signal Adj.

[0045] Step S3: Obtain the current temperature and record the corresponding relationship between the first correction signal Adj and the temperature. In this step, the temperature range that the timing control circuit may reach is divided into several intervals, each interval corresponds to a correction value in a storage location in the temperature compensation unit, and the correction value is related to the first correction signal Adj and is continuously updated.

[0046] Step S4: When there is no external frequency input, output the correction signal according to the corresponding relationship between the correction signal and the temperature. In this step, the temperature compensation unit obtains the current temperature, obtains the corresponding correction value according to the current temperature, and outputs the second correction signal Adj-t according to the correction value.

[0047] An embodiment of the present invention further provides a display device, comprising the timing control circuit as described above, and configured to execute the frequency correction method as described above.

[0048] The timing control circuit and frequency correction method of the present invention realize the correction of the internal frequency clock signal when there is no external frequency by learning the correction signal when the external frequency exists, thereby improving the display effect and reducing the design cost. The timing control circuit and display device of the present invention are applied to display systems such as micro OLED / VR / AR related chip systems, which are small in size, have frequent temperature changes, and often use the non-external frequency mode to achieve pixel compensation and power saving. The frequency correction method of the present invention is applied to data writing scenarios such as MIPI video mode / command mode and panel self-refresh mode.

[0049] It should be noted that those skilled in the art will understand that the terms "during", "when" and "when..." used herein in connection with circuit operation are not strict terms indicating an action that occurs immediately when the start-up action begins, but that there may be some small but reasonable delay or delays between the action and the reaction initiated by the start-up action, such as various transmission delays, etc. The terms "approximately" or "substantially" used herein mean that an element value has a parameter that is expected to be close to the stated value or position.

[0050] According to the embodiments of the present invention, as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention and their equivalents.

Claims

1. A timing control circuit, in, include: A receiving unit, used for receiving an external frequency clock signal in an external frequency input stage and outputting a timing signal for writing display data according to the external frequency clock signal; An oscillator, used to generate an internal frequency clock signal with adjustable frequency; a calculation unit, comprising a counter, wherein the counter is used to count the write display data timing signal and the internal frequency clock signal within a preset range during the external frequency input stage and obtain a first correction signal according to a comparison result of the count values, so that the oscillator corrects the frequency of the internal frequency clock signal to a preset multiple of the write display data timing signal according to the first correction signal during the external frequency input stage; The temperature compensation unit is used to store the corresponding relationship between the current temperature signal and the first correction signal according to the current temperature signal and the first correction signal in the external frequency input stage, and obtain the second correction signal according to the current temperature signal and the corresponding relationship in the non-external frequency stage, so that the oscillator corrects the frequency of the internal frequency clock signal according to the second correction signal in the non-external frequency stage.

2. The timing control circuit according to claim 1, in, The timing control circuit further includes a temperature detection unit for acquiring the current temperature signal.

3. The timing control circuit according to claim 1, in, The calculation unit is configured to control the oscillator to correct the frequency of the internal frequency clock signal through the first correction signal when the count values ​​of the write display data timing signal and the internal frequency clock signal are different.

4. The timing control circuit according to claim 2, in, The temperature compensation unit includes a plurality of storage locations, and the temperature compensation unit converts the first correction signal into correction values ​​according to a preset method and stores the correction values ​​in the plurality of storage locations.

5. The timing control circuit according to claim 4, in, The multiple storage locations correspond to multiple temperature intervals respectively. The temperature detection unit is also used to identify the temperature interval corresponding to the current temperature signal. The temperature compensation unit controls the correction value to be stored in the corresponding storage location according to the temperature interval corresponding to the current temperature signal.

6. The timing control circuit according to claim 5, in, The temperature compensation unit is configured to read the current temperature signal in the non-external frequency stage, query the corresponding temperature interval according to the current temperature signal, read the correction value in the corresponding storage location and convert the correction value into the second correction signal output.

7. The timing control circuit according to claim 6, in, The calculation unit is configured to detect the input status of the external frequency clock signal, and when the input of the external frequency clock signal stops, the second correction signal is controlled to be input into the oscillator.

8. The timing control circuit according to claim 2, in, The timing control circuit further includes a control unit to control a switching state of at least one of the receiving unit, the oscillator, the calculation unit, the temperature compensation unit, and the temperature detection unit.

9. A frequency correction method for a timing control circuit, in, The timing control circuit includes: a receiving unit, an oscillator, a calculation unit and a temperature compensation unit, and the frequency correction method includes: In the external frequency input stage, the receiving unit receives the external frequency clock signal and outputs a timing signal for writing display data according to the external frequency clock signal; In the external frequency input stage, the counter of the calculation unit counts the write display data timing signal and the frequency-adjustable internal frequency clock signal generated by the oscillator within a preset range and obtains a first correction signal according to a comparison result of the count values; In the external frequency input stage, the oscillator corrects the frequency of the internal frequency clock signal to a preset multiple of the write display data timing signal according to the first correction signal; In the external frequency input stage, the temperature compensation unit obtains a current temperature signal and stores a corresponding relationship between the current temperature signal and the first correction signal; When the external frequency clock signal stops being input, the temperature compensation unit provides a second correction signal according to the current temperature signal and the corresponding relationship, and the oscillator corrects the frequency of the internal frequency clock signal according to the second correction signal.

10. The frequency correction method according to claim 9, in, When the count values ​​of the write display data timing signal and the internal frequency clock signal are different, the calculation unit controls the oscillator to correct the frequency of the internal frequency clock signal through the first correction signal.

11. The frequency correction method according to claim 9, in, The temperature compensation unit includes a plurality of storage locations, and the frequency correction method further includes: converting the first correction signal into a correction value according to a preset method and storing the correction value in the plurality of storage locations.

12. The frequency correction method according to claim 11, in, The plurality of storage locations correspond to a plurality of temperature intervals respectively, and the timing control circuit further includes a temperature detection unit. The method of storing the first correction signal to the plurality of storage locations comprises: Acquiring the current temperature signal through the temperature detection unit; and The temperature compensation unit controls the correction value to be stored in the corresponding storage location according to the temperature interval corresponding to the current temperature signal.

13. The frequency correction method according to claim 12, in, When the external frequency clock signal stops being input, the temperature compensation unit reads the corresponding correction value according to the temperature interval corresponding to the current temperature signal, and converts the correction value into the second correction signal for output.

14. A display device, comprising the timing control circuit according to any one of claims 1 to 8, and configured to execute the frequency correction method according to any one of claims 9 to 13.

Images