A method for preparing a monolithic integrated optical receiving chip

Abstract

The present invention discloses a method for preparing a monolithic integrated light receiving chip, which belongs to the technical field of basic electrical components. The preparation method mainly includes: making a transimpedance amplifier on an InP HBT epitaxial wafer; growing an InP PIN photodetector epitaxial layer on an InP semi-insulating substrate; peeling the InP PIN photodetector epitaxial layer from the original substrate; transferring the InP PIN detector epitaxial layer to a transimpedance amplifier chip; completing the preparation of the InP PIN photodetector; and completing the electrical interconnection between the detector and the transimpedance amplifier through on-chip wiring. The method can not only realize the monolithic integration of the photodetector and the transimpedance amplifier, but also support the independent design of the epitaxial layer structures of the detector and the transimpedance amplifier, so that the performance of the integrated light receiving chip reaches the optimal value.

Description

Technical Field

[0001] The invention relates to the field of semiconductor devices, and in particular discloses a method for preparing a monolithic integrated light receiving chip, belonging to the technical field of basic electrical components. Background Art

[0002] The optical receiving front end is mainly composed of a photodetector and a transimpedance amplifier, which converts optical signals into electrical signals and amplifies the electrical signals. Integrating the photodetector and the transimpedance amplifier on the same substrate can not only reduce the overall device size, but also reduce the impact of gold wire interconnection on performance, making the optical receiving front end have a larger bandwidth and higher gain.

[0003] The traditional method to achieve monolithic integration of photodetectors and transimpedance amplifiers is epitaxial layer sharing, that is, the photodetector and the core device heterojunction bipolar transistor (HBT) in the transimpedance amplifier use the same epitaxial layer. Although the epitaxial layer sharing method simplifies the preparation process of the integrated chip, it is difficult to achieve the optimal performance of the two devices at the same time because the epitaxial layer structure of the detector and HBT cannot be designed independently.

[0004] The secondary epitaxy method can meet the needs of independently designing device structures, but it is very difficult to achieve high-quality secondary epitaxial layers. The epitaxial layer transfer technology that has emerged in recent years is expected to replace the secondary epitaxy method and become an effective technical approach to achieve high-performance monolithic integrated light receiving chips. However, the problem with traditional epitaxial layer transfer technology is that the surface of the epitaxial layer is easily damaged during the transfer process. Since the performance of optoelectronic devices is very sensitive to the quality of the epitaxial layer surface, it is urgent to develop new material transfer technologies to achieve the intact transfer of epitaxial layer materials.

[0005] In summary, the present invention aims to provide a method for preparing a monolithic integrated light receiving chip, so as to overcome the defects of the existing monolithic integrated light receiving chip preparation process. Summary of the invention

[0006] The purpose of the present invention is to address the deficiencies of the above-mentioned background technology and to provide a method for preparing a monolithic integrated optical receiving chip, so that the overall performance of the optical receiving chip can be improved, and the technical problems that the epitaxial layer sharing method cannot independently design the epitaxial layer structure of the detector and the HBT and the existing epitaxial layer transfer technology cannot meet the performance requirements of the monolithic integrated optical receiving chip can be solved, so as to achieve the intact transfer of the detector epitaxial layer and the performance of the detector and the HBT while achieving the optimal purpose of the invention.

[0007] The present invention adopts the following technical solutions to achieve the above-mentioned invention object:

[0008] A method for preparing a monolithic integrated light receiving chip comprises the following steps:

[0009] Step 1: Fabricate a transimpedance amplifier based on InP HBT on an InP HBT epitaxial wafer;

[0010] Step 2: growing an InP PIN photodetector epitaxial layer on an InP semi-insulating substrate;

[0011] Step 3: Use a temporary carrier to peel off the InP PIN photodetector epitaxial layer from the original substrate;

[0012] Step 4: Transfer the InP PIN photodetector epitaxial layer to the transimpedance amplifier chip;

[0013] Step 5: Prepare InP PIN waveguide photodetector;

[0014] Step 6: Complete the electrical signal connection between the detector and the transimpedance amplifier through vertical electrical interconnection.

[0015] Furthermore, in step 1, a specific method for making a transimpedance amplifier based on an indium phosphide heterojunction transistor on an indium phosphide heterojunction transistor epitaxial wafer is as follows: three mesas of an emitter region, a base region, and a collector region of an indium phosphide heterojunction transistor are prepared on an indium phosphide heterojunction transistor epitaxial substrate using a wet etching process, and then the emitter metal, the base metal, and the collector metal are made; styrene is spin-coated on the transimpedance amplifier chip formed in step 1-1 and cured at high temperature, and then the emitter metal, the base metal, and the collector metal of the indium phosphide heterojunction transistor are exposed by a dry etching process, and then the first metal wiring is made; silicon nitride dielectric is deposited on the metal formed after the first metal wiring in the collector region, and a MIM capacitor is made using the silicon nitride dielectric; styrene is spin-coated on the transimpedance amplifier chip after the MIM capacitor is made and cured at high temperature to complete the second wiring metal making.

[0016] Furthermore, step 2 is specifically as follows: an InP buffer layer, a first InGaAsP etching stop layer, a second InP etching stop layer, a third InGaAsP etching stop layer, a fourth InP etching stop layer, an N-InGaAsP waveguide layer, an i-InGaAs absorption layer, a P-InGaAsP band smoothing layer, a P-InP barrier layer and a P-InGaAs contact layer are grown in sequence on an InP semi-insulating substrate.

[0017] Furthermore, the thickness of the first InGaAsP etching stop layer, the second InP etching stop layer, the third InGaAsP etching stop layer, and the fourth InP etching stop layer of the InP PIN photodetector epitaxial structure grown in step 2 decreases in sequence, and their thicknesses are 2μm, 0.5μm, 0.1μm, and 0.01μm, respectively. The central wavelengths of the N-InGaAsP waveguide layer and the P-InGaAsP band smoothing layer are both 1.2μm, the thickness of the N-InGaAsP waveguide layer is 2.8μm, the thickness of the i-InGaAs absorption layer is 0.4μm, and the thickness of the P-InGaAsP band smoothing layer is 0.5μm.

[0018] Furthermore, in step 3, the specific method of using a temporary carrier to peel the InP PIN photodetector epitaxial layer from the original substrate is as follows: the temporary carrier and the InP PIN photodetector epitaxial wafer are bonded together by high-temperature wax; most of the InP semi-insulating substrate is removed by mechanical thinning, and the remaining InP semi-insulating substrate, InP buffer layer and each etching stop layer are removed by wet etching, wherein the solution used for wet etching of InP is concentrated hydrochloric acid, and the solution used for etching InGaAsP is a mixture of phosphoric acid, hydrogen peroxide and water.

[0019] Furthermore, in step 4, the specific method of transferring the InP PIN photodetector epitaxial layer to the transimpedance amplifier chip is as follows: spin coating the BCB solution on the transimpedance amplifier chip and the InP PIN epitaxial layer, respectively, and pre-curing the BCB by pre-baking, the pre-baking temperature is 180°C, and the time is 60 minutes; the transimpedance amplifier chip and the temporary carrier are bonded together by BCB; heating at 250°C to melt the high-temperature wax to remove the temporary carrier, and cleaning the remaining high-temperature wax with toluene solution; placing the transimpedance amplifier chip with the InP PIN epitaxial layer transferred in an oven for heating to achieve complete curing of the BCB, and the temperature in the oven is set to 280°C for 120 minutes.

[0020] Furthermore, the specific method of preparing the InP PIN waveguide type photodetector in step 5 is: making a P-type contact metal, etching to form a PD table, preparing an N-type contact metal, annealing the N-type contact metal, etching a ridge waveguide and an isolation table.

[0021] Furthermore, the specific method of step 6 to complete the electrical signal connection between the detector and the transimpedance amplifier through vertical electrical interconnection is: spin coating BCB solution on the transimpedance amplifier chip to flatten the entire chip; etching BCB at the corresponding positions of the second metal wiring of the transimpedance amplifier and the photodetector electrode to form a dielectric hole; filling the dielectric hole by electroplating metal Au and realizing the electrical interconnection between the photodetector and the transimpedance amplifier.

[0022] The present invention adopts the above technical solution and has the following beneficial effects:

[0023] (1) The present invention is based on epitaxial layer transfer technology to transfer the epitaxial layer of the InP PIN detector to the transimpedance amplifier chip, and realizes the monolithic integration of the detector and the transimpedance amplifier through subsequent micromachining technology. Since the epitaxial layer is transferred first and then the device is processed, the integration accuracy of the two is very high.

[0024] (2) In the aspect of InP PIN detector epitaxial layer transfer, the present invention adopts a multi-layer etching stop layer structure with decreasing thickness, which effectively prevents the InP etching solution from corroding the surface of the InGaAsP waveguide layer for a long time, thereby reducing the light transmission loss of the InGaAsP optical waveguide and improving the detector responsivity.

[0025] (3) The monolithic integrated light receiving chip preparation scheme mentioned in the present invention allows for flexible and independent design of the epitaxial structures of the InP detector and the InP HBT, so that both the detector and the transimpedance amplifier can achieve their respective optimal performance, thereby improving the overall performance of the integrated light receiving chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 The present invention is a flow chart of preparing a monolithic integrated light receiving chip.

[0027] Figure 2 It is a cross-sectional schematic diagram of the InP HBT transimpedance amplifier completed in step 1 of the present invention.

[0028] Figure 3 This is a structural diagram of the epitaxial layer of the InP PIN photodetector grown in step 2 of the present invention.

[0029] Figure 4 It is a specific process flow diagram of step 3 of the present invention.

[0030] Figure 5 It is a schematic cross-sectional view of the sapphire substrate and the transimpedance amplifier chip after bonding in step 4 of the present invention.

[0031] Figure 6 It is a schematic cross-sectional view of the InP PIN waveguide photodetector completed in step 5 of the present invention.

[0032] Figure 7 It is a schematic cross-sectional view of the monolithic integrated light receiving chip completed in step 6 of the present invention.

[0033] Explanation of the numbers in the figure: 1. InP HBT epitaxial substrate; 2. InP HBT emitter region; 3. InP HBT base region; 4. InPHBT collector region; 5. First BCB film; 6. First wiring metal; 7. SiN dielectric; 8. MIM capacitor; 9. Second BCB film; 10. Second wiring metal; 11. Third BCB film, 12. InP PIN photodetector epitaxial layer; 13. High-temperature wax; 14. Sapphire carrier; 15. P-type contact metal; 16. PD table; 17. N-type contact metal; 18. Isolation table; 19. Fourth BCB film; 20. Third wiring metal. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0035] This embodiment provides a method for preparing a monolithic integrated light receiving chip. The flow chart of the preparation method is as follows: Figure 1 As shown, it specifically includes the following 6 steps.

[0036] Step 1: Fabricate a transimpedance amplifier based on InP HBT on an InP HBT epitaxial wafer, the specific method is as follows: Use a wet etching process to etch the InP HBT epitaxial wafer, complete the fabrication of three mesas of the InP HBT emitter region 2, the InP HBT base region 3 and the InP HBT collector region 4 on the InP HBT epitaxial substrate 1, and complete the fabrication of the emitter metal, the base metal and the collector metal at the same time; Spin-coat phenylcyclobutene and perform high-temperature curing to achieve BCB flattening to form a first BCB film 5, then expose the three electrodes of the InP HBT device through a dry etching process, and then complete the fabrication of the first wiring metal 6; Deposit SiN dielectric 7, use SiN dielectric to fabricate MIM capacitor 8, spin-coat BCB and perform high-temperature curing to achieve BCB flattening to form a second BCB film 9, and finally complete the fabrication of the second wiring metal 10, the completed InP HBT transimpedance amplifier is as shown in FIG. Figure 2 shown.

[0037] Step 2: Grow an InP PIN photodetector epitaxial layer on an InP semi-insulating substrate to form an InP PIN epitaxial wafer. The material structure of the grown epitaxial layer is as follows: Figure 3As shown, from bottom to top, they are: 0.5μm InP buffer layer (i.e., indium phosphide buffer layer), 2μm InGaAsP etching stop layer (i.e., the first etching stop layer, indium gallium arsenic phosphide etching stop layer), 0.5μm InP etching stop layer (i.e., the second etching stop layer, indium phosphide etching stop layer), 0.1μm InGaAsP etching stop layer (i.e., the third etching stop layer, indium gallium arsenic phosphide etching stop layer), 0.01μm InP etching stop layer (i.e., the fourth etching stop layer, indium phosphide etching stop layer), 2.8μm N-I nGaAsP waveguide layer (i.e. N-type indium gallium arsenic phosphide waveguide layer), 0.4μm i-InGaAs absorption layer (i.e. intrinsic indium gallium arsenic absorption layer), 0.5μm P-InGaAsP band smoothing layer (i.e. P-type indium gallium arsenic phosphide band smoothing layer), 0.5μm P-InP barrier layer (i.e. P-type indium phosphide barrier layer) and 0.1μm P-InGaAs contact layer (i.e. P-type indium gallium arsenide contact layer), wherein the central wavelengths of the N-InGaAsP waveguide layer and the P-InGaAsP band smoothing layer are both 1.2μm.

[0038] Step 3: Use a temporary carrier to peel off the InP PIN photodetector epitaxial layer from the original substrate. In this embodiment, sapphire is used as a temporary carrier. The specific process flow is as follows: Figure 4 As shown: high-temperature wax is spin-coated on a sapphire carrier and an InP PIN epitaxial wafer respectively, and the sapphire carrier and the InP PIN epitaxial wafer are bonded together through the high-temperature wax, the bonding temperature is 200°C, and the bonding pressure is 2 bar; the InP semi-insulating substrate is thinned to about 20 μm by mechanical grinding; the remaining InP semi-insulating substrate, InP buffer layer and each etching stop layer are removed by wet etching, wherein the solution used for wet etching of InP is concentrated hydrochloric acid, and the solution used for etching InGaAsP is a mixture of phosphoric acid, hydrogen peroxide and water.

[0039] Step 4: Transfer the InP PIN photodetector epitaxial layer to the transimpedance amplifier chip. The specific method is as follows: Spin-coat the BCB solution on the transimpedance amplifier chip and the InP PIN photodetector epitaxial layer 12, respectively, and pre-cure the BCB by pre-baking. The pre-baking temperature is 180°C and the time is 60 minutes. Bond the transimpedance amplifier chip and the sapphire carrier together through the third BCB film 11. Figure 5 As shown; heat at 250°C to melt the high-temperature wax to remove the temporary carrier, and use toluene solution to clean the high-temperature wax remaining on the transimpedance amplifier chip; put the transimpedance amplifier chip with the InP PIN photodetector epitaxial layer transferred into an oven and heat it to achieve complete curing of BCB. The temperature in the oven is set to 280°C for 120 minutes.

[0040] Step 5: Prepare an InP PIN waveguide photodetector, the specific method is as follows: prepare a P-type contact metal 15 on the P-InGaAs contact layer, the P-type contact metal is Ti / Pt / Au; use the P-type contact metal 15 as a mask, corrode the P-InP barrier layer, the P-InGaAsP band smoothing layer and the i-InGaAs absorption layer in sequence to form a PD table 16, wherein the etching solution for InP is concentrated hydrochloric acid, and the etching solution for InGaAsP and InGaAs is a mixture of phosphoric acid, hydrogen peroxide and water; prepare an N-type contact metal 17 on the N-InGaAsP waveguide layer, the N-type contact metal is AuGeNi / Au; anneal the N-type contact metal, the annealing temperature is 300°C, and the time is 50s; prepare a ridge waveguide on the N-InGaAsP waveguide layer by photolithography and dry etching process; finally, prepare an isolation table 18 by photolithography and etching. Figure 6 A schematic cross-sectional view of an InP PIN waveguide photodetector is shown.

[0041] Step 6: Complete the electrical signal connection between the detector and the transimpedance amplifier through vertical electrical interconnection. The specific method is as follows: spin-coat the BCB solution on the InP HBT chip to flatten the BCB to form a fourth BCB film 19. The temperature used to cure the BCB is 280°C and the time is 120 minutes; etch the BCB film in the vertical space where the second wiring metal 10 of the transimpedance amplifier and the photodetector electrode metal are located to form a dielectric hole; fill the dielectric hole with electroplated metal Au to complete the production of the third wiring metal 20 to achieve electrical interconnection between the photodetector and the transimpedance amplifier. Figure 7 Schematic diagram of the cross section of the completed monolithic integrated light receiving chip.

[0042] The above implementation modes are only exemplary descriptions of the present invention and do not limit its protection scope. Those skilled in the art may also make partial changes thereto. For example, more etching stop layers with gradually decreasing thickness may be prepared on the InP buffer layer to better realize the intact transfer of the photodetector epitaxial layer and thus improve the detector responsiveness. The preparation method of the present invention may also be used for monolithic integrated light receiving chips of specific structure photodetectors and specific structure transimpedance amplifiers not limited to those involved in this embodiment. Any form of equivalent substitution that conforms to the spirit of the invention falls within the protection scope of the present invention.

Claims

1. A method for preparing a monolithic integrated light receiving chip, characterized in that: The following steps are involved: Step 1: fabricating a transimpedance amplifier based on an indium phosphide heterojunction transistor on an indium phosphide heterojunction transistor epitaxial wafer; Step 2: The specific method for growing an indium phosphide PIN photodetector epitaxial layer on an indium phosphide semi-insulating substrate is as follows: an indium phosphide buffer layer, a first etching stop layer, a second etching stop layer, a third etching stop layer, a fourth etching stop layer, an N-type indium gallium arsenic phosphide waveguide layer, an intrinsic indium gallium arsenic phosphide absorption layer, a P-type indium gallium arsenic phosphide band smoothing layer, a P-type indium phosphide barrier layer, and a P-type indium gallium arsenic contact layer are grown on the indium phosphide semi-insulating substrate in sequence to form an indium phosphide PIN photodetector epitaxial wafer, wherein the first etching stop layer and the third etching stop layer are indium gallium arsenic phosphide etching stop layers, and the second etching stop layer and the fourth etching stop layer are indium phosphide etching stop layers, and the thicknesses of the first etching stop layer, the second etching stop layer, the third etching stop layer, and the fourth etching stop layer decrease in sequence; Step 3: Bonding the temporary carrier and the indium phosphide PIN photodetector epitaxial wafer by high-temperature wax, removing the indium phosphide semi-insulating substrate by mechanical thinning, and removing the remaining indium phosphide semi-insulating substrate, indium phosphide buffer layer and each etching stop layer by wet etching; Step 4: Transferring the indium phosphide PIN photodetector epitaxial layer to the transimpedance amplifier chip; Step 5: Prepare an indium phosphide PIN waveguide photodetector; Step 6: Complete the electrical signal connection between the InP PIN waveguide photodetector and the transimpedance amplifier through vertical electrical interconnection.

2. The method for preparing a monolithic integrated light receiving chip according to claim 1, characterized in that: The solution for removing the remaining indium phosphide semi-insulating substrate, the indium phosphide buffer layer, the second etching stop layer and the fourth etching stop layer by wet etching is concentrated hydrochloric acid.

3. The method for preparing a monolithic integrated light receiving chip according to claim 1, characterized in that: The solution for removing the first etching stop layer and the third etching stop layer by wet etching is a mixture of phosphoric acid, hydrogen peroxide and water.

4. The method for preparing a monolithic integrated light receiving chip according to claim 1, characterized in that: The specific method of transferring the epitaxial layer of the indium phosphide PIN photodetector to the transimpedance amplifier chip in step 4 is: Step 4-1: Spin coating benzoylcyclobutene on the temporary carrier and the transimpedance amplifier chip respectively, and pre-curing the benzoylcyclobutene by pre-baking; Step 4-2: Using the pre-cured phenylpropylcyclobutene as a bonding medium, bonding the transimpedance amplifier chip and the temporary carrier together; Step 4-3: heating and melting the high temperature wax in the bonding sheet, removing the temporary carrier sheet, and washing the high temperature wax remaining on the transimpedance amplifier chip with a toluene solution; Step 4-4: Bake the transimpedance amplifier chip with the indium phosphide photodetector epitaxial layer transferred thereto until the phenylpropylcyclobutene is completely solidified.

5. The method for preparing a monolithic integrated light receiving chip according to claim 1, characterized in that: The specific method of preparing the indium phosphide PIN waveguide photodetector in step 5 is: Step 5-1: Preparing a P-type contact metal on the P-type contact layer; Step 5-2: Using the P-type contact metal as a mask, the P-type InP barrier layer, the P-type InGaAsP band smoothing layer and the intrinsic InGaAs absorption layer are sequentially etched to form a PD mesa; Step 5-3: preparing an N-type contact metal on the N-type InGaAsP waveguide layer, and annealing the N-type contact metal; Step 5-4: preparing a ridge waveguide on the N-type InGaAsP waveguide layer by photolithography and dry etching processes; Step 5-5: Prepare isolation mesas by photolithography and etching.

6. A method for preparing a monolithic integrated light receiving chip according to any one of claims 1 to 5, characterized in that: The specific method of manufacturing a transimpedance amplifier based on an indium phosphide heterojunction transistor on an indium phosphide heterojunction transistor epitaxial wafer in step 1 is: Step 1-1: using a wet etching process to prepare three mesas of an emitter region, a base region, and a collector region of an indium phosphide heterojunction transistor on an indium phosphide heterojunction transistor epitaxial substrate, and then completing the production of an emitter metal, a base metal, and a collector metal; Step 1-2: Spin-coating styrene on the transimpedance amplifier chip formed in step 1-1 and performing high-temperature curing, then exposing the emitter metal, base metal and collector metal of the indium phosphide heterojunction transistor through a dry etching process, and then completing the first metal wiring production; Step 1-3: depositing silicon nitride dielectric on the metal formed after the first metal wiring in the collector region, and using the silicon nitride dielectric to make a MIM capacitor; Step 1-4: Spin-coat phenylpropylcyclobutene on the transimpedance amplifier chip after the MIM capacitor is made and perform high temperature curing to complete the production of the second wiring metal.

7. The method for preparing a monolithic integrated light receiving chip according to claim 6, characterized in that: The specific method of completing the electrical signal connection between the indium phosphide PIN waveguide photodetector and the transimpedance amplifier through vertical electrical interconnection in step 6 is: Step 6-1: Spin-coat the styrene cyclobutene solution on the indium phosphide heterojunction transistor epitaxial wafer, and bake the indium phosphide heterojunction transistor epitaxial wafer coated with the styrene cyclobutene solution until the styrene cyclobutene solution is completely solidified. Step 6-2: Etching the solidified phenylpropylcyclobutene in the vertical space where the secondary wiring metal of the transimpedance amplifier and the electrode of the indium phosphide PIN waveguide photodetector are located to form a dielectric hole; Step 6-3: Fill the dielectric hole with electroplated metal to complete the vertical electrical interconnection between the InP PIN waveguide photodetector and the transimpedance amplifier.

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