A phased array channel amplitude-phase modulation method, electronic device and medium

Abstract

The invention discloses a phased array channel amplitude and phase modulation method, electronic equipment and medium, relates to the technical field of phased array antennas, solves the problems of inaccuracy and gain waste of existing amplitude and phase modulation methods, and the key points of the technical solution are: S1, adjusting the bias register value until the phased array chip works in a linear state; S2, obtaining the amplitude and phase of each array element, and calculating the amplitude difference and phase difference of the amplitude and phase of each array element from the ideal amplitude and ideal phase through the amplitude and phase; S3, inputting the amplitude difference and phase difference into an amplitude and phase offset table, obtaining the actual amplitude offset and the actual phase offset, and adjusting the amplitude register and phase register of the phased array chip; S4, repeating steps S2-S3 until the amplitude and phase of each array element are the ideal amplitude and ideal phase; during calibration, the influence between amplitude and phase is taken into account, and the phase and amplitude do not need to be attenuated too much to obtain array elements with relatively consistent amplitudes, thereby reducing gain waste.

Description

Technical Field

[0001] The present invention relates to the technical field of phased array antennas, and more specifically, to a phased array channel amplitude and phase modulation method, electronic equipment and medium. Background Art

[0002] In phased array testing, in order to accurately point the beam, it is necessary to ensure that the amplitudes of each array element are as consistent as possible. The traditional array element amplitude modulation method is to attenuate the gain of the array element.

[0003] The phased array chip uses a three-stage amplifier to amplify the signal. In the normal working state, the amplitude and phase amplifiers are set to the maximum. However, due to the different wiring methods of each array element of the phased array chip and the influence of other factors, the gains of each array element are different. If a low gain appears, in order to improve the sidelobe suppression after phase synthesis, it will reduce all gains to low gains like the bucket effect to ensure that the amplitudes of each array element are consistent, which results in a large waste of gain.

[0004] Moreover, in the actual amplitude-phase modulation process, there is an offset effect between the amplitude and the phase, that is, the amplitude adjustment will cause the phase to change, and the phase adjustment will also cause the amplitude-phase modulation to be inaccurate. Summary of the invention

[0005] The purpose of the present application is to provide a phased array channel amplitude-phase modulation method, electronic equipment and medium, which solves the problems of inaccuracy and gain waste of existing amplitude-phase modulation methods by considering the offset effect between amplitude and phase.

[0006] On the one hand, the present application provides a phased array channel amplitude and phase modulation method, which is implemented by the following technical solution: comprising the following steps:

[0007] S1, adjust the bias register value to make the phased array chip work in a linear state;

[0008] S2. Obtain the amplitude and phase of each array element, and calculate the ideal amplitude and ideal phase through the amplitude and phase, as well as the amplitude difference and phase difference between the amplitude and phase of each array element and the ideal amplitude and ideal phase;

[0009] S3, inputting the amplitude difference and the phase difference into an amplitude-phase offset table to obtain an actual amplitude offset and an actual phase offset, and adjusting an amplitude register and a phase register of the phased array chip according to the actual amplitude offset and the actual phase offset;

[0010] S4. Repeat steps S2-S3 until the amplitude and phase of each array element are equal to the ideal amplitude and ideal phase.

[0011] By adopting the above technical scheme, the gain of the phased array chip is adjusted to a non-saturated linear state by adjusting the offset register value, and calibration is performed within this range to collect the amplitude and phase of each array element, thereby determining the difference between each array element and the ideal amplitude and the ideal phase, inputting the difference into an amplitude-phase offset table, determining the actual amplitude offset and the actual phase offset, and adjusting the amplitude register and the phase register by the actual amplitude offset and the actual phase offset to achieve amplitude-phase modulation; the setting of the amplitude-phase offset table takes into account the offset effect between amplitude and phase, thereby achieving precise control of amplitude and phase, and at the same time, the array element amplitude does not need to be reduced to the minimum like in the traditional amplitude-phase modulation scheme to obtain array elements with relatively consistent amplitude, thereby reducing gain waste.

[0012] Furthermore, the amplitude-phase offset table is obtained by the following method:

[0013] Adjust the bias register value to make the phased array chip work in a linear state;

[0014] Gradually change the amplitude register value and measure the phase offset. Gradually change the phase register value and measure the amplitude offset.

[0015] The change in the amplitude register value and the phase offset as well as the change in the phase register value and the amplitude offset are stored in a table to generate an amplitude-phase offset table.

[0016] Furthermore, in S1, the bias register value is adjusted until the phased array chip gain is 1 dB lower than the maximum gain.

[0017] Furthermore, in S2, the amplitude and phase of each array element are obtained, including the following steps:

[0018] The noisy vector of each array element is collected by a vector network analyzer as the first vector , the first vector Including the first amplitude and the first phase ;

[0019] Each array element is deflected by the phase register, and the second vector is collected by the vector network analyzer. , the second vector Including the second amplitude and the second phase ;

[0020] Through the first amplitude and the first phase , the second amplitude and the second phase Calculate the amplitude and phase of each array element.

[0021] Furthermore, each array element is deflected 180 degrees via a phase register.

[0022] Furthermore, the amplitude and phase of each array element are calculated, including the following steps:

[0023] The first amplitude and the first phase , the second amplitude and the second phase Substitute into the calculation formula to obtain the real and imaginary parts of the array element vector;

[0024] The real and imaginary parts of the array element vector are converted into the amplitude and phase of the array element vector.

[0025] Furthermore, the real and imaginary parts of the array element vector are obtained by the following formula:

[0026]

[0027]

[0028] in, is the real part of the array element vector, is the imaginary part of the array element vector.

[0029] Furthermore, in S2, the ideal amplitude is the average value of the amplitudes of the array elements, and the ideal phase is the average value of the phases of the array elements.

[0030] On the other hand, the present application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor is used to implement the above-mentioned phased array channel amplitude and phase modulation method when executing the program.

[0031] The present application also provides a storage medium on which a computer program is stored. When the program is executed by a processor, it is used to implement the above-mentioned phased array channel amplitude and phase modulation method.

[0032] Compared with the prior art, the present application has the following beneficial effects: the present application sets up an amplitude-phase offset table, and takes into account the offset effect between amplitude and phase during calibration. On the one hand, the amplitude and phase can be modulated more accurately. On the other hand, the amplitude does not need to be attenuated too much to obtain array elements with relatively consistent amplitude, thereby reducing gain waste. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The drawings described herein are used to provide a further understanding of the embodiments of the present invention, constitute a part of this application, and do not constitute a limitation of the embodiments of the present invention. In the drawings:

[0034] Figure 1 A schematic flow chart of an amplitude-phase modulation method provided in one embodiment of the present invention. DETAILED DESCRIPTION

[0035] Hereinafter, the term "include" or "may include" used in various embodiments of the present application indicates the presence of the function, operation or element applied for, and does not limit the increase of one or more functions, operations or elements. In addition, as used in various embodiments of the present application, the terms "include", "have" and their cognates are intended only to indicate specific features, numbers, steps, operations, elements, components or a combination of the foregoing items, and should not be understood as first excluding the presence of one or more other features, numbers, steps, operations, elements, components or a combination of the foregoing items or the possibility of increasing one or more features, numbers, steps, operations, elements, components or a combination of the foregoing items.

[0036] In various embodiments of the present application, the expression "or" or "at least one of B or / and C" includes any combination or all combinations of the words listed at the same time. For example, the expression "B or C" or "at least one of B or / and C" may include B, may include C, or may include both B and C.

[0037] The expressions (such as "first", "second", etc.) used in the various embodiments of the present application may modify the various constituent elements in the various embodiments, but may not limit the corresponding constituent elements. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are only used for the purpose of distinguishing one element from other elements. For example, the first user device and the second user device indicate different user devices, although both are user devices. For example, without departing from the scope of the various embodiments of the present application, the first element may be referred to as the second element, and similarly, the second element may also be referred to as the first element.

[0038] It should be noted that if it is described that one component element is “connected” to another component element or is “connected to” another component element, the first component element may be directly connected to the second component element, and a third component element may be “connected” between the first component element and the second component element. Conversely, when one component element is “directly connected” to another component element or is “directly connected to” another component element, it can be understood that there is no third component element between the first component element and the second component element.

[0039] The terms used in the various embodiments of the application are only used to describe the purpose of specific embodiments and are not intended to limit the various embodiments of the application. As used herein, the singular form is intended to also include the plural form, unless the context clearly indicates otherwise. Unless otherwise limited, all terms used here (including technical terms and scientific terms) have the same meaning as the meanings commonly understood by ordinary technicians in the field of the various embodiments of the application. The terms (such as the terms defined in the dictionary generally used) will be interpreted as having the same meaning as the contextual meaning in the relevant technical field and will not be interpreted as having an idealized meaning or an overly formal meaning, unless clearly defined in the various embodiments of the application.

[0040] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with examples and drawings. The illustrative implementation scheme of the present application and its description are only used to explain the present application and are not intended to limit the present application.

[0041] On the one hand, the present application provides a phased array channel amplitude-phase modulation method, which is intended to solve the phenomenon of losing gain performance in order to obtain array elements with consistent amplitude during phased array calibration. The applicant has noticed that there is an offset effect between amplitude and phase, that is, the phase will produce a slight change when the amplitude is adjusted, and the amplitude will also change when the phase is adjusted. Therefore, in order to ensure the accuracy of amplitude-phase modulation and reduce gain waste, the present application calibrates each array element of the phased array through an amplitude-phase offset table to obtain more accurate amplitude-phase modulation and reduce gain waste.

[0042] like Figure 1 As shown, the amplitude-phase modulation method comprises the following steps:

[0043] S1, adjust the bias register value until the phased array chip works in a linear state;

[0044] S2. Obtain the amplitude and phase of each array element, and calculate the ideal amplitude and ideal phase through the amplitude and phase, as well as the amplitude difference and phase difference between the amplitude and phase of each array element and the ideal amplitude and ideal phase;

[0045] S3, inputting the amplitude difference and the phase difference into an amplitude-phase offset table to obtain an actual amplitude offset and an actual phase offset, and adjusting an amplitude register and a phase register of the phased array chip according to the actual amplitude offset and the actual phase offset;

[0046] S4. Repeat steps S2-S3 until the amplitude and phase of each array element are equal to the ideal amplitude and ideal phase.

[0047] During implementation, the value of the bias register is first adjusted so that the phased array chip works in a linear state. When the phased array chip works in a linear state, each array element is calibrated. Specifically, the amplitude and phase of each array element are obtained through a vector network analyzer, and then the ideal amplitude and ideal phase, as well as the amplitude difference and phase difference of each array element from the ideal amplitude and ideal phase are calculated. Considering the influence of the offset, the amplitude difference and phase difference are brought into the amplitude and phase offset table for query, and the actual amplitude offset and actual phase offset are obtained. The actual amplitude offset and actual phase offset are written into the phased array chip, and the amplitude register and phase register are adjusted to complete a calibration. The above calibration process is continuously iterated until the amplitude and phase of the array element obtained by the vector network analyzer are equal to the calculated ideal amplitude and phase, and the calibration is completed. On the one hand, the calibration takes into account the influence of the offset, and a flatter array surface can be obtained. On the other hand, considering the influence of the offset, the phase and amplitude do not need to be attenuated too much to obtain array elements with relatively consistent amplitudes, thereby reducing gain waste.

[0048] It should be noted that, in theory, amplitude adjustment and phase adjustment are independent of each other, but in actual use, amplitude adjustment and phase adjustment affect each other. When the phase register is kept unchanged and only the attenuation of the amplitude register is adjusted, the phase of the channel will change accordingly, and vice versa. The applicant also noticed that when the phased array chip works in a linear state, there is a fixed rule between amplitude adjustment and phase adjustment, that is, when the amplitude is adjusted, the phase shifts according to a fixed rule, and the same is true when the phase is adjusted. The amplitude-phase shift table can be obtained by this.

[0049] In some possible embodiments, in step S3, the amplitude-phase offset table is obtained in the following manner:

[0050] Adjust the bias register value until the phased array chip works in a linear state; gradually change the amplitude register value, measure the phase offset, gradually change the phase register value, measure the amplitude offset; store the change in the amplitude register value and the phase offset, as well as the change in the phase register value and the amplitude offset in a table and export them.

[0051] Specifically, when the phased array chip works in a linear state, the amplitude register value is adjusted in steps, and the phase offset is measured by a vector network analyzer. Assuming that the amplitude register value range is 0-31, the amplitude register value can be adjusted from 31 to 0 by attenuating 1 each time, and the phase offset after each adjustment is measured. The same is true for the phase register. Assuming that the phase register value range is 0-63, the phase register value is adjusted from 63 to 0 by attenuating 1 each time, and the amplitude offset after each adjustment is measured. Finally, the attenuation of the amplitude register value, the phase offset, and the attenuation and amplitude offset of the phase register value are stored in a table to obtain an amplitude-phase offset table, and the amplitude-phase offset table is written into the phased array chip for calibration.

[0052] In some possible embodiments, in step S1 , the bias register value is adjusted so that the phased array chip gain is 1 dB lower than the maximum gain.

[0053] Specifically, when the bias register value is set to the maximum, the phased array chip is in a saturated state and reaches the highest gain, so the bias register value is selected to be a value where the phased array chip gain is 1dB lower than the maximum gain. At this time, the phased array chip is in a linear state, the deviation between the amplitude and the phase is regular, the power consumption of the phased array chip is also reduced, and a 1dB increment is reserved.

[0054] In some possible embodiments, in step S2, obtaining the amplitude and phase of each array element includes the following steps:

[0055] The noisy vector of each array element is collected by a vector network analyzer as the first vector , the first vector Including the first amplitude and the first phase ; Deflect each array element through the phase register, and collect the second vector through the vector network analyzer , the second vector Including the second amplitude and the second phase ; Through the first amplitude and the first phase , the second amplitude and the second phase Calculate the amplitude and phase of each array element.

[0056] In a preferred embodiment, in step S2, the array element is deflected 180 degrees via a phase register to facilitate calculation.

[0057] In a preferred embodiment, in step S2, the ideal amplitude is the average value of the amplitudes of the array elements, and the ideal phase is the average value of the phases of the array elements.

[0058] Specifically, when the phased array element is powered on and the RF signal is connected, a set of noisy vectors exists in the space. The noisy vectors are vectors emitted by the array element itself. , and other abnormal vectors in space The first vector is defined as , the first vector Including the first amplitude and the first phase After the array element is deflected 180 degrees by the phase register, there is another set of noisy vectors in the space. The noisy vectors are vectors emitted by the array element itself. , and other abnormal vectors in space The second vector is defined as , the second vector Including the second amplitude and the second phase ; Therefore, the array element vector Equivalent to the first vector With the second vector The formula is half of the difference between .

[0059] In order to facilitate vector operations, we usually use the imaginary and real parts of the vector for addition and subtraction. Therefore, we will use the first vector The real part of the second vector minus The real part of the first vector The imaginary part of the second vector is subtracted from The imaginary part of the array element vector is obtained by the real and imaginary parts, which can be expressed as follows:

[0060]

[0061]

[0062] Among them, sc is the first vector The real part of mc is the second vector The real part of sci is the first vector The imaginary part of mci is the second vector The imaginary part of is the real part of the array element vector, is the imaginary part of the array element vector.

[0063] In a specific implementation scenario, the first vector The amplitude and phase of the first amplitude and the first phase ; After being deflected 180 degrees by the phase register, the second vector can be collected The amplitude and phase of the second amplitude and the second phase , through the first amplitude and the first phase , the second amplitude and the second phase Calculate the amplitude of each array element and Phase , the calculation formula is expressed as:

[0064]

[0065]

[0066] Furthermore, the real part of the array element vector and the imaginary part Substitute the following formula to calculate the radian of the array element vector and model ,

[0067]

[0068]

[0069] Furthermore, the radian of the array element vector and model , substitute into the following formula and convert to the amplitude of the array element vector and Phase ,

[0070]

[0071]

[0072] The amplitude of an array element is obtained by the above formula and Phase , that is, the gain and phase of the array element. Similarly, the amplitude of all array elements can be obtained in turn. and Phase , and then calculate the ideal amplitude and ideal phase of the array element, that is, the amplitude and phase that each array element needs to attenuate or increase.

[0073] Specifically, find the amplitude of each array element , Phase The ideal amplitude and ideal phase are obtained by adding and averaging them respectively. Then, the ideal amplitude is subtracted from the amplitude of each array element to obtain the offset amplitude difference. The ideal phase is subtracted from the phase of each array element to obtain the offset phase difference.

[0074] In step S3, the offset amplitude difference and the offset phase difference are brought into the amplitude and phase offset table, the actual amplitude offset and the actual phase offset are queried, the actual amplitude offset and the actual phase offset are written into the phased array chip, the amplitude register and the phase register are adjusted, and a calibration is completed.

[0075] In step S4, the iterative calibration of steps S2-S3 is continuously repeated until the amplitude and phase of each array element are the ideal amplitude and phase, and the calibration is completed.

[0076] In a specific implementation scenario, in step S2, it is calculated that the amplitude of a certain array element needs to be attenuated by 3dB and the phase needs to be shifted by 73°. The amplitude-phase shift table records that when the amplitude is attenuated by 3dB, the phase will be shifted by 10 degrees, and when the phase is shifted by 73°, the amplitude will be attenuated by 0.5. Therefore, the actual amplitude offset written into the phased array chip register is an attenuation of 2.5dB, and the actual phase offset is 65°.

[0077] In summary, it can be seen that the amplitude-phase modulation method provided in the present application can, on the one hand, more accurately modulate the amplitude and phase to obtain an array element plane with relatively consistent amplitude; on the other hand, there is no need to reduce the amplitude of all array elements to the minimum amplitude, thereby reducing gain waste.

[0078] On the other hand, the present application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor is used to implement the above-mentioned phased array channel amplitude and phase modulation method when executing the program.

[0079] The present application also provides a storage medium on which a computer program is stored. When the program is executed by a processor, it is used to implement the above-mentioned phased array channel amplitude and phase modulation method.

[0080] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A phased array channel amplitude and phase modulation method, which is characterized by: The steps include: S1, adjust the bias register value to make the phased array chip work in a linear state; S2. Obtaining the amplitude and phase of each array element, and calculating the ideal amplitude and ideal phase through the amplitude and phase, as well as the amplitude difference and phase difference between the amplitude and phase of each array element and the ideal amplitude and ideal phase; S3, inputting the amplitude difference and the phase difference into an amplitude-phase offset table to obtain an actual amplitude offset and an actual phase offset, and adjusting the amplitude register and the phase register of the phased array chip according to the actual amplitude offset and the actual phase offset; S4, repeating steps S2-S3 until the amplitude and phase of each array element are equal to the ideal amplitude and ideal phase; The amplitude-phase offset table is obtained by the following method: adjusting the bias register value to make the phased array chip work in a linear state; gradually changing the amplitude register value, measuring the phase offset, and gradually changing the phase register value, measuring the amplitude offset; storing the change in the amplitude register value and the phase offset, and the change in the phase register value and the amplitude offset in a table to generate the amplitude-phase offset table; In S2, the step of obtaining the amplitude and phase of each array element comprises the following steps: collecting the noisy vector of each array element as the first vector by a vector network analyzer; , the first vector The first amplitude A1 and the first phase P1 are included; each array element is deflected by a phase register, and a second vector is collected by a vector network analyzer. , the second vector Including a second amplitude A2 and a second phase P2; calculating the amplitude and phase of each array element through the first amplitude A1 and the first phase P1, the second amplitude A2 and the second phase P2; Each array element is deflected 180 degrees via a phase register; In S2, the ideal amplitude is the average value of the amplitudes of the array elements, and the ideal phase is the average value of the phases of the array elements.

2. A phased array channel amplitude and phase modulation method according to claim 1, characterized in that: In S1, the bias register value is adjusted until the phased array chip gain is 1 dB lower than the maximum gain.

3. The phased array channel amplitude and phase modulation method according to claim 1, wherein: The step of calculating the amplitude and phase of each array element comprises the following steps: Substitute the first amplitude A1 and the first phase P1, the second amplitude A2 and the second phase P2 into a calculation formula to obtain the real part and the imaginary part of the array element vector; The real part and the imaginary part of the array element vector are converted into the amplitude and phase of the array element vector.

4. A phased array channel amplitude and phase modulation method according to claim 3, characterized in that: The real part and imaginary part of the array element vector are obtained by the following formula: Among them, ac is the real part of the array element vector, aci is the imaginary part of the array element vector, A1 is the first amplitude, P1 is the first phase, A2 is the second amplitude, and P2 is the second phase.

5. An electronic device, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method is used to implement a phased array channel amplitude and phase modulation method as claimed in any one of claims 1 to 4.

6. A storage medium, characterized in that: A computer program is stored thereon, and when the program is executed by a processor, it is used to implement a phased array channel amplitude and phase modulation method as described in any one of claims 1-4.

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