Method for manufacturing semiconductor device and semiconductor device

Abstract

A method for manufacturing a semiconductor device includes an implantation process of implanting a first dopant of a first conductivity type from an implantation surface of a semiconductor substrate toward a first implantation position, and implanting a second dopant of the first conductivity type from the implantation surface of the semiconductor substrate toward a second implantation position farther from the implantation surface than the first implantation position after implanting the first dopant. The first implantation position and the second implantation position can be disposed in a buffer region.

Description

Technical Field

[0001] This invention relates to a method for manufacturing a semiconductor device and the semiconductor device itself. Background Technology

[0002] Previously, as a field stop layer in a semiconductor device, a structure having multiple impurity concentration peaks was known (for example, see Patent Document 1).

[0003] Patent Document 1: WO2013 / 89256 Summary of the Invention

[0004] Technical issues

[0005] Doping of semiconductor devices is preferably performed with high precision.

[0006] Technical solution

[0007] To address the aforementioned problems, a method for manufacturing a semiconductor device is provided in a first aspect of the present invention. The manufacturing method may include the following implantation step: implanting a first dopant of a first conductivity type from an implantation surface of a semiconductor substrate to a first implantation location; and after implanting the first dopant, implanting a second dopant of the first conductivity type from an implantation surface of the semiconductor substrate to a second implantation location at a distance greater than the distance from the first implantation location to the implantation surface.

[0008] The first and second dopant can be dopants of the same element. The first and second dopant can be hydrogen ions.

[0009] One of the first dopant and the second dopant can be a phosphorus ion, and the other can be a hydrogen ion.

[0010] In the implantation process, three or more dopants of a first conductivity type, including a first dopant and a second dopant, can be implanted from the implantation surface of the semiconductor substrate at implantation positions at different depths. In the implantation process, the dopant among the three or more dopants can be implanted first at the implantation position closest to the implantation surface of the semiconductor substrate. In the implantation process, the dopant among the three or more dopants can be implanted last at the implantation position furthest from the implantation surface of the semiconductor substrate. In the implantation process, dopants can be implanted sequentially starting from the implantation position closest to the implantation surface of the semiconductor substrate.

[0011] Among three or more dopant implantation sites, the distance between the implantation site furthest from the implantation surface of the semiconductor substrate and the implantation surface of the semiconductor substrate can be less than half the thickness of the semiconductor substrate.

[0012] The semiconductor substrate may include: a drift region of a first conductivity type; and a buffer zone disposed between the drift region and the implantation surface of the semiconductor substrate, wherein the buffer zone has a higher doping concentration than the drift region. A first implantation location and a second implantation location may be configured within the buffer zone.

[0013] The semiconductor substrate may have a collector region of a second conductivity type disposed between the buffer zone and the implantation surface. The collector region can be formed after the implantation process.

[0014] The manufacturing method may also include a helium implantation step, in which helium ions are injected into the buffer. In the helium implantation step, helium ions can be injected into different depths within the buffer. The manufacturing method may also include a first annealing step, annealing the semiconductor substrate, after the implantation step and before the helium implantation step. The manufacturing method may also include a second annealing step, annealing the semiconductor substrate, after the helium implantation step.

[0015] The semiconductor substrate may include: a drift region of a first conductivity type; a base region of a second conductivity type disposed between the drift region and the implantation surface of the semiconductor substrate; and an accumulation region disposed between the base region and the drift region, wherein the doping concentration is higher than that of the drift region. The first implantation site and the second implantation site may be located in the accumulation region.

[0016] From a top-down view, the area where the first dopant is implanted can be the same as the area where the second dopant is implanted.

[0017] At least one of the first dopant and the second dopant can be hydrogen ions. The manufacturing method may further include a region formation step, in which charged particles are implanted from the implantation surface with a range greater than half the thickness of the semiconductor substrate. After the region formation and implantation steps, the manufacturing method may further include a hydrogen diffusion step, in which hydrogen is diffused by annealing the semiconductor substrate. After the region formation step and before the implantation step, the manufacturing method may further include an annealing step, in which the semiconductor substrate is annealed.

[0018] In a second aspect of the present invention, a semiconductor device is provided. The semiconductor device may include a semiconductor substrate having an upper surface and a lower surface. The semiconductor device may include a drift region of a first conductivity type disposed on the semiconductor substrate. The semiconductor device may include a buffer zone of the first conductivity type disposed between the drift region and the lower surface. The buffer zone may be an adjacent region connected to the drift region, containing multiple hydrogen chemical concentration peaks, with the hydrogen chemical concentration decreasing further away from the lower surface. The slope α of the straight line approximating the doping concentration distribution in the adjacent region may be 20 ( / cm) or more and 200 ( / cm) or less.

[0019] Specifically, the depth position at one end of the adjacent region is set as x1 [cm], the depth position at the other end is set as x2 [cm], and the doping concentration at depth position x1 is set as N1 [ / cm]. 3 Set the doping concentration at depth x2 to N2[ / cm] 3 In the case of […], the slope α is given by the following formula:

[0020] α=(|log 10 (N2)-log 10 (N1)|) / (|x2-x1|).

[0021] It should be noted that the above description of the invention does not list all the essential features of the invention. Furthermore, sub-combinations of these feature groups can also constitute separate inventions. Attached Figure Description

[0022] Figure 1 This is a top view showing an example of a semiconductor device 100.

[0023] Figure 2 yes Figure 1 An enlarged view of region D in the image.

[0024] Figure 3 It is shown Figure 2 A diagram of an example of the ee section.

[0025] Figure 4A It is shown Figure 3 A figure showing an example of the doping concentration distribution, hydrogen chemical concentration distribution, helium chemical concentration distribution, and recombination center concentration distribution at the FF line.

[0026] Figure 4B This is a graph showing the relationship between the ion implantation depth (Rp) and the acceleration energy required for implantation.

[0027] Figure 4C This is a graph showing the relationship between the ion implantation depth (Rp) and the straggling width (ΔRp, standard deviation) along the implantation direction.

[0028] Figure 5A This is a diagram illustrating an example of the doping concentration distribution, hydrogen chemical concentration distribution, helium chemical concentration distribution, and recombination center concentration distribution in buffer 20.

[0029] Figure 5B This is a diagram illustrating an example of the doping concentration distribution, hydrogen chemical concentration distribution, helium chemical concentration distribution, and recombination center concentration distribution in buffer 20.

[0030] Figure 6This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20.

[0031] Figure 7 This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20.

[0032] Figure 8 This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20.

[0033] Figure 9 This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20.

[0034] Figure 10A This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20.

[0035] Figure 10B This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20.

[0036] Figure 10C This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20.

[0037] Figure 11 This is a figure illustrating the full width at half maximum (Wk) of the helium chemical concentration peak 221.

[0038] Figure 12A This is a diagram illustrating an example of the doping concentration distribution and hydrogen chemical concentration distribution in buffer 20.

[0039] Figure 12B This is a diagram illustrating a portion of the manufacturing process of the semiconductor device 100.

[0040] Figure 12C This is a diagram illustrating other examples of doping concentration distribution and hydrogen chemical concentration distribution in buffer 20.

[0041] Figure 12D This is a diagram illustrating other examples of doping concentration distribution and hydrogen chemical concentration distribution in buffer 20.

[0042] Figure 12E This is a diagram illustrating other examples of doping concentration distribution and hydrogen chemical concentration distribution in buffer 20.

[0043] Figure 12F This is a diagram illustrating other examples of processes in the manufacturing method of semiconductor device 100.

[0044] Figure 12GThis is a diagram illustrating other examples of processes in the manufacturing method of semiconductor device 100.

[0045] Figure 13 An example of the carrier concentration distribution and helium chemical concentration distribution in buffer 20 of the comparative example is shown.

[0046] Figure 14 The diagram shows other examples of the ee section.

[0047] Figure 15 It is shown Figure 14 A figure showing an example of the doping concentration distribution and hydrogen chemical concentration distribution at the FF line.

[0048] Figure 16 This is a diagram illustrating an example of how buffer 20 is formed.

[0049] Figure 17 This is a diagram showing the cross-sectional shape of the collector region 22 in the comparative example.

[0050] Figure 18 This is a graph showing the results of a withstand voltage test on a semiconductor device.

[0051] Figure 19 This is a graph showing the results of a withstand voltage test on a semiconductor device.

[0052] Figure 20 This is a diagram showing another example of a semiconductor device 100.

[0053] Figure 21 This is a diagram illustrating another example of the manufacturing process of the semiconductor device 100.

[0054] Figure 22 It is shown Figure 21 A diagram illustrating an example of the doping concentration distribution and hydrogen chemical concentration distribution of the semiconductor device 100 shown.

[0055] Figure 23 The diagram shows other examples of the ee section.

[0056] Figure 24 It is shown Figure 23 A diagram illustrating an example of how buffer 20 is formed.

[0057] Symbol Explanation

[0058] 10. Semiconductor substrate, 11. Well region, 12. Emitter region, 14. Base region, 15. Contact region, 16. Accumulation region, 18. Drift region, 20. Buffer zone, 21. Upper surface, 22. Collector region, 23. Lower surface, 24. Collector electrode, 25. Doping concentration peak, 29. Linear portion, 30. Dummy trench portion 31. Front end portion; 32. Dummy insulating film; 34. Dummy conductive portion; 35. Valley portion; 38. Interlayer insulating film; 39. Straight portion; 40. Gate trench portion; 41. Front end portion; 42. Gate insulating film; 44. Gate conductive portion; 52. Emitter; 54. Contact hole; 60, 61. Mesa portion; 70. Crystal. 80...Diode Section, 81...Extension Region, 82...Cathode Region, 90...Edge Termination Structure Section, 100...Semiconductor Device, 103...Hydrogen Chemical Concentration Peak, 105...Interpeak Region, 130...Outer Peripheral Gate Wiring, 131...Active-Side Gate Wiring, 160...Active Section, 162...Terminal Edge, 164...Gate Pad, 210 ...Upper surface lifetime inhibitor, 220...Lower surface lifetime inhibitor, 221...Helium chemical concentration peak, 230...Straight line, 231...Hydrogen peak envelope, 232...Hydrogen valley envelope, 233...Doping peak envelope, 234...Doping valley envelope, 240...Adjacent region, 250...Planar portion, 251...Valley, 252...Valley Detailed Implementation

[0059] The present invention will now be described through embodiments thereof, but these embodiments do not limit the scope of the invention as defined in the claims. Furthermore, not all combinations of the features described in the embodiments are necessarily required for the technical solution of the invention.

[0060] In this specification, one side parallel to the depth direction of the semiconductor substrate is referred to as "upper," and the other side as "lower." Of the two main surfaces of a substrate, layer, or other component, one is referred to as the upper surface, and the other as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the actual orientation of the semiconductor device during mounting.

[0061] In this specification, rectangular coordinate axes, namely the X-axis, Y-axis, and Z-axis, are sometimes used to illustrate technical matters. Rectangular coordinate axes merely determine the relative positions of constituent elements and do not limit specific directions. For example, the Z-axis does not necessarily represent the direction of height relative to the ground. It should be noted that the +Z-axis direction and the -Z-axis direction are opposite to each other. When the Z-axis direction is not specified as positive or negative, it refers to a direction parallel to both the +Z-axis and -Z-axis.

[0062] In this specification, orthogonal axes parallel to the upper and lower surfaces of the semiconductor substrate are designated as the X-axis and Y-axis. An axis perpendicular to the upper and lower surfaces of the semiconductor substrate is designated as the Z-axis. In this specification, the direction of the Z-axis is sometimes referred to as the depth direction. Additionally, in this specification, the direction including the X-axis and Y-axis and parallel to the upper and lower surfaces of the semiconductor substrate is sometimes referred to as the horizontal direction.

[0063] Additionally, the region extending from the center of the semiconductor substrate in the depth direction to the upper surface of the semiconductor substrate is sometimes referred to as the upper surface side. Similarly, the region extending from the center of the semiconductor substrate in the depth direction to the lower surface of the semiconductor substrate is sometimes referred to as the lower surface side.

[0064] In this specification, the terms "same" or "equal" may also include cases with errors caused by manufacturing deviations, etc. Such errors are, for example, within 10%.

[0065] In this specification, the conductivity type of the doped region containing impurities is described as P-type or N-type. In this specification, impurities sometimes specifically refer to either an N-type donor or a P-type acceptor, and are sometimes referred to as dopant. In this specification, doping refers to introducing donors or acceptors into a semiconductor substrate to form a semiconductor exhibiting an N-type conductivity type or a P-type conductivity type.

[0066] In this specification, doping concentration refers to the concentration of donors or acceptors at thermal equilibrium. In this specification, net doping concentration refers to the actual concentration obtained by adding the polarities of the charges, with the donor concentration set to the concentration of positive ions and the acceptor concentration set to the concentration of negative ions. For example, if the donor concentration is set to N... D And set the acceptor concentration to N A Then the actual net doping concentration at any position becomes N. D -N A In this specification, the net doping concentration is sometimes described as the doping concentration only.

[0067] Donors have the function of supplying electrons to semiconductors. Acceptors have the function of taking electrons from semiconductors. Donors and acceptors are not limited to impurities themselves. For example, VOH defects formed by the combination of vacancies (V), oxygen (O), and hydrogen (H) present in semiconductors act as electron-supplying donors. In this specification, VOH defects are sometimes referred to as hydrogen donors.

[0068] In this specification, the semiconductor substrate is integrally distributed with N-type body donors. Body donors are donors formed by dopants that are substantially uniformly contained within the ingot during the fabrication of the ingot that forms the basis of the semiconductor substrate. In this example, the body donors are elements other than hydrogen. While the dopants for body donors are, for example, phosphorus, antimony, arsenic, selenium, and sulfur, they are not limited to these. In this example, the body donor is phosphorus. Body donors are also contained within P-type regions. The semiconductor substrate can be a wafer cut from a semiconductor ingot or a chip formed by monolithically combining wafers. The semiconductor ingot can be manufactured using any of the following methods: Czochralski (CZ) method, magnetic Czochralski (MCZ) method, and floating zone melting (FZ) method. In this example, the ingot is manufactured using the MCZ method. The substrate manufactured using the MCZ method contains an oxygen concentration of 1 × 10⁻⁶. 17 ~7×10 17 / cm 3 The oxygen concentration in the substrate manufactured using the FZ method is 1 × 10⁻⁶. 15 ~5×10 16 / cm 3 High oxygen concentrations tend to promote the formation of hydrogen donors. The bulk donor concentration can be the chemical concentration of bulk donors distributed throughout the semiconductor substrate 10, or a value between 90% and 100% of that chemical concentration. Alternatively, the semiconductor substrate 10 can be an undoped substrate that does not contain dopants such as phosphorus. In this case, the bulk donor concentration (D0) of the undoped substrate is, for example, 1 × 10⁻⁶. 10 / cm 3 Above and 5×10 12 / cm 3 The bulk donor concentration (D0) of the undoped substrate is preferably 1 × 10⁻⁶. 11 / cm 3 The above. The bulk donor concentration (D0) of the undoped substrate is preferably 5 × 10⁻⁶. 12 / cm 3 It should be noted that the concentrations in this specification are values ​​at room temperature. For example, room temperature values ​​can be those at 300 K (Kelvin) (approximately 26.9°C).

[0069] In this specification, "P+" or "N+" indicates a higher doping concentration than "P" or "N" type, while "P-" or "N-" indicates a lower doping concentration than "P" or "N" type. Similarly, "P++" or "N++" indicates a higher doping concentration than "P+" or "N+" type. Unless otherwise stated, the units used in this specification are SI units. Although length is sometimes expressed in cm, all calculations should be converted to meters (m) before proceeding.

[0070] In this specification, chemical concentration refers to the atomic density of impurities measured independently of the electroactivated state. Chemical concentration (atomic density) can be measured using, for example, secondary ion mass spectrometry (SIMS). The net doping concentration described above can be measured using voltage-capacitance measurement (CV method). Alternatively, the carrier concentration measured using extended resistance measurement (SR method) can be used as the net doping concentration. The carrier concentration measured by CV or SR methods can be taken as the value under thermal equilibrium conditions. Furthermore, in the N-type region, the donor concentration is much greater than the acceptor concentration; therefore, the carrier concentration in this region can also be defined as the donor concentration. Similarly, in the P-type region, the carrier concentration in this region can also be defined as the acceptor concentration. In this specification, the doping concentration in the N-type region is sometimes referred to as the donor concentration, and the doping concentration in the P-type region is sometimes referred to as the acceptor concentration.

[0071] Furthermore, when the concentration distribution of donor, acceptor, or net dopant has a peak, the peak value can be taken as the concentration of the donor, acceptor, or net dopant in that region. When the concentration of donor, acceptor, or net dopant is almost uniform, the average concentration of donor, acceptor, or net dopant in that region can also be taken as the concentration of the donor, acceptor, or net dopant. In this specification, concentration per unit volume is expressed in atoms / cm³. 3 or / cm 3 This unit is used to indicate the concentration of donors or acceptors, or the chemical concentration, within a semiconductor substrate. The "atoms" designation can also be omitted.

[0072] The carrier concentration measured by the SR method can be lower than the donor or acceptor concentration. During the measurement of extended resistance, within the current flow range, there are cases where the carrier mobility of the semiconductor substrate is lower than the carrier mobility in the crystalline state. This decrease in carrier mobility is due to the dispersion of carriers caused by crystal structure disorder (disorder) resulting from lattice defects, etc.

[0073] The donor or acceptor concentration calculated from the carrier concentration measured by the CV or SR method can be lower than the chemical concentration of the element representing the donor or acceptor. For example, in silicon semiconductors, the donor concentration of phosphorus or arsenic (which acts as a donor), or the acceptor concentration of boron (which acts as an acceptor), is about 99% of their chemical concentration. On the other hand, in silicon semiconductors, the donor concentration of hydrogen (which acts as a donor) is about 0.1% to 10% of the chemical concentration of hydrogen.

[0074] Figure 1 This is a top view showing an example of a semiconductor device 100. Figure 1 The diagram shows the positions of the components projected onto the upper surface of the semiconductor substrate 10. Figure 1 In this paper, only a portion of the components of the semiconductor device 100 are shown, and some components are omitted.

[0075] Semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 is a substrate formed of semiconductor material. As an example, the semiconductor substrate 10 is a silicon substrate. The semiconductor substrate 10 has end edges 162 when viewed from above. In this specification, "viewed from above" refers to viewing from the upper surface side of the semiconductor substrate 10. In this example, the semiconductor substrate 10 has two sets of end edges 162 that are opposite each other when viewed from above. Figure 1 In this configuration, the X and Y axes are parallel to either end edge 162. Additionally, the Z axis is perpendicular to the upper surface of the semiconductor substrate 10.

[0076] An active portion 160 is provided on the semiconductor substrate 10. The active portion 160 is the region where, when the semiconductor device 100 is operated, the main current flows along the depth direction between the upper and lower surfaces of the semiconductor substrate 10. An emitter is provided above the active portion 160, but... Figure 1 Omitted in .

[0077] The active section 160 is provided with at least one of a transistor section 70 including transistor elements such as IGBTs and a diode section 80 including diode elements such as freewheeling diodes (FWDs). Figure 1 In this example, the transistor section 70 and the diode section 80 are alternately arranged along a predetermined arrangement direction (the X-axis direction in this example) on the upper surface of the semiconductor substrate 10, and the semiconductor device 100 is a reverse-conduction type IGBT (RC-IGBT). In other examples, only one of the transistor section 70 and the diode section 80 may be provided in the active section 160.

[0078] exist Figure 1 In this specification, the area where the transistor section 70 is arranged is marked with the symbol "I", and the area where the diode section 80 is arranged is marked with the symbol "F". In this specification, the direction perpendicular to the arrangement direction when viewed from above is sometimes referred to as the extension direction (in...). Figure 1 (The middle direction is the Y-axis direction). The transistor section 70 and the diode section 80 may each have a long side in the extending direction. That is, the length of the transistor section 70 in the Y-axis direction is greater than its width in the X-axis direction. Similarly, the length of the diode section 80 in the Y-axis direction is greater than its width in the X-axis direction. The extending directions of the transistor section 70 and the diode section 80 may be the same as the long side direction of each trench section described later.

[0079] The diode section 80 has an N+ type cathode region in the area that is in contact with the lower surface of the semiconductor substrate 10. In this specification, the area where the cathode region is provided is referred to as the diode section 80. That is, the diode section 80 is the area that overlaps with the cathode region when viewed from above. A P+ type collector region may be provided on the lower surface of the semiconductor substrate 10 in the area other than the cathode region. In this specification, the diode section 80 may sometimes also include an extension region 81 that extends the diode section 80 along the Y-axis direction to the gate wiring described later. A collector region is provided on the lower surface of the extension region 81.

[0080] The transistor section 70 has a P+ type collector region in the region that is in contact with the lower surface of the semiconductor substrate 10. In addition, the transistor section 70 has an N-type emitter region, a P-type base region, and a gate structure having a gate conductive portion and a gate insulating film periodically arranged on the upper surface side of the semiconductor substrate 10.

[0081] The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. In this example, the semiconductor device 100 has a gate pad 164. The semiconductor device 100 may also have anode pads, cathode pads, and current sensing pads, etc. Each pad is located near the edge 162. "Near the edge 162" refers to the area between the edge 162 and the emitter when viewed from above. When the semiconductor device 100 is actually mounted, each pad can be connected to an external circuit via wiring such as leads.

[0082] A gate potential is applied to the gate pad 164. The gate pad 164 is electrically connected to the conductive portion of the gate trench portion of the active portion 160. The semiconductor device 100 includes gate wiring connecting the gate pad 164 to the gate trench portion. Figure 1 In the diagram, a shading line is marked on the gate wiring.

[0083] The gate wiring in this example includes a peripheral gate wiring 130 and an active-side gate wiring 131. The peripheral gate wiring 130 is disposed between the active portion 160 and the edge 162 of the semiconductor substrate 10 in plan view. In this example, the peripheral gate wiring 130 surrounds the active portion 160 in plan view. Alternatively, the area surrounded by the peripheral gate wiring 130 in plan view can also be considered as the active portion 160. Furthermore, the peripheral gate wiring 130 is connected to the gate pad 164. The peripheral gate wiring 130 is disposed above the semiconductor substrate 10. The peripheral gate wiring 130 can be a metal wiring including aluminum, etc.

[0084] An active-side gate wiring 131 is provided in the active portion 160. Since the active-side gate wiring 131 is provided in the active portion 160, the deviation of the wiring length from the gate pad 164 can be reduced for each region of the semiconductor substrate 10.

[0085] The active-side gate wiring 131 is connected to the gate trench portion of the active portion 160. The active-side gate wiring 131 is disposed above the semiconductor substrate 10. The active-side gate wiring 131 can be a wiring formed from a semiconductor such as polysilicon doped with impurities.

[0086] The active-side gate wiring 131 can be connected to the outer peripheral gate wiring 130. In this example, the active-side gate wiring 131 is provided to cross the active portion 160 in the X-axis direction, approximately at the center of the Y-axis, from the outer peripheral gate wiring 130 on one side that holds the active portion 160 to the outer peripheral gate wiring 130 on the other side. When the active portion 160 is divided using the active-side gate wiring 131, the transistor portion 70 and the diode portion 80 can be alternately arranged in the X-axis direction in each divided region.

[0087] Additionally, the semiconductor device 100 may include: a temperature sensing unit (not shown) which is a PN junction diode formed of polysilicon or the like; and a current sensing unit (not shown) which simulates the operation of the transistor unit disposed in the active unit 160.

[0088] Viewed from above, the semiconductor device 100 of this example has an edge termination structure 90 between the active portion 160 and the edge 162. In this example, the edge termination structure 90 is disposed between the peripheral gate wiring 130 and the edge 162. The edge termination structure 90 alleviates electric field concentration on the upper surface side of the semiconductor substrate 10. The edge termination structure 90 may include at least one of a protective ring surrounding the active portion 160 in an annular shape, a field plate, and a surface electric field reduction section.

[0089] Figure 2 yes Figure 1 An enlarged view of region D is shown. Region D includes the transistor section 70, the diode section 80, and the active-side gate wiring 131. The semiconductor device 100 of this example includes a gate trench section 40, a dummy trench section 30, a well region 11, an emitter region 12, a base region 14, and a contact region 15 disposed inside the upper surface side of the semiconductor substrate 10. The gate trench section 40 and the dummy trench section 30 are examples of trench sections. Furthermore, the semiconductor device 100 of this example includes an emitter 52 and an active-side gate wiring 131 disposed above the upper surface of the semiconductor substrate 10. The emitter 52 and the active-side gate wiring 131 are disposed separately from each other.

[0090] An interlayer insulating film is provided between the emitter 52 and the upper surface of the semiconductor substrate 10, and between the active-side gate wiring 131 and the upper surface of the semiconductor substrate 10, but in Figure 2 The details are omitted. In this example, the interlayer insulating film has contact holes 54 provided in a manner that penetrates the interlayer insulating film. Figure 2 In the middle, the shading of the diagonal lines marks each contact hole 54.

[0091] An emitter 52 is disposed above the gate trench 40, the dummy trench 30, the well region 11, the emitter region 12, the base region 14, and the contact region 15. The emitter 52 contacts the emitter region 12, the contact region 15, and the base region 14 on the upper surface of the semiconductor substrate 10 through a contact hole 54. Furthermore, the emitter 52 is connected to a dummy conductive portion within the dummy trench 30 through a contact hole disposed in the interlayer insulating film. The front end of the emitter 52 in the dummy trench 30 along the Y-axis direction can be connected to a dummy conductive portion of the dummy trench 30.

[0092] The active-side gate wiring 131 is connected to the gate trench portion 40 through a contact hole provided in the interlayer insulating film. The active-side gate wiring 131 can be connected to the gate conductive portion of the gate trench portion 40 at its front end 41 in the Y-axis direction. The active-side gate wiring 131 is not connected to the dummy conductive portion within the dummy trench portion 30.

[0093] The emitter 52 is formed of a material containing metal. Figure 2 The area where the emitter 52 is disposed is shown. For example, at least a portion of the emitter 52 is formed of aluminum or an aluminum-silicon alloy, such as AlSi, AlSiCu, or other metal alloys. The emitter 52 may have a barrier metal formed of titanium or titanium compounds in the lower layer of the area formed of aluminum or the like. Furthermore, a plug formed by embedding tungsten or the like in contact with the barrier metal and the aluminum or the like may be provided within the contact hole.

[0094] The well region 11 is disposed overlapping with the active-side gate wiring 131. The well region 11 also extends with a predetermined width in a region that does not overlap with the active-side gate wiring 131. In this example, the well region 11 is separated from the active-side gate wiring 131 by its end in the Y-axis direction relative to the contact hole 54. The well region 11 is a region of a second conductivity type with a higher doping concentration than the base region 14. In this example, the base region 14 is P-type, and the well region 11 is P+ type.

[0095] Both the transistor section 70 and the diode section 80 have multiple trench sections arranged along the arrangement direction. In the transistor section 70 of this example, one or more gate trench sections 40 and one or more dummy trench sections 30 are alternately arranged along the arrangement direction. In the diode section 80 of this example, multiple dummy trench sections 30 are arranged along the arrangement direction. In the diode section 80 of this example, no gate trench section 40 is provided.

[0096] In this example, the gate trench portion 40 may have two straight portions 39 (the trench portion that is straight in the extension direction) extending in an extension direction perpendicular to the arrangement direction, and a front end portion 41 connecting the two straight portions 39. Figure 2 The direction of extension in the middle is the Y-axis direction.

[0097] Preferably, at least a portion of the front end portion 41 is curved when viewed from above. By connecting the ends of the two straight portions 39 in the Y-axis direction to each other through the front end portion 41, the electric field concentration at the ends of the straight portions 39 can be alleviated.

[0098] In the transistor section 70, dummy trench sections 30 are provided between each straight portion 39 of the gate trench section 40. One dummy trench section 30 may be provided between each straight portion 39, or multiple dummy trench sections 30 may be provided. The dummy trench section 30 may have a straight shape extending in the extension direction, or it may have the same straight portion 29 and front end portion 31 as the gate trench section 40. Figure 2 The semiconductor device 100 shown includes both a dummy trench portion 30 with a straight shape and no front end portion 31, and a dummy trench portion 30 with a front end portion 31.

[0099] The diffusion depth of the well region 11 can be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. The ends of the gate trench portion 40 and the dummy trench portion 30 in the Y-axis direction are provided in the well region 11 when viewed from above. That is, at the ends of each trench portion in the Y-axis direction, the bottom of each trench portion in the depth direction is covered by the well region 11. This helps to alleviate electric field concentration at the bottom of each trench portion.

[0100] Mesa-shaped portions are provided between the trench portions in the arrangement direction. A mesa-shaped portion refers to the area within the semiconductor substrate 10 that is held between the trench portions. For example, the upper end of the mesa-shaped portion is the upper surface of the semiconductor substrate 10. The lower end of the mesa-shaped portion has the same depth as the lower end of the trench portion. In this example, the mesa-shaped portion is provided on the upper surface of the semiconductor substrate 10, extending along the trench in the extension direction (Y-axis direction). In this example, a mesa-shaped portion 60 is provided in the transistor portion 70, and a mesa-shaped portion 61 is provided in the diode portion 80. In this specification, when referred to simply as a mesa-shaped portion, the terms mesa-shaped portion 60 and mesa-shaped portion 61 are used interchangeably.

[0101] A base region 14 is provided on each mesa. The region of the base region 14 exposed on the upper surface of the semiconductor substrate 10 within the mesa, positioned closest to the active-side gate wiring 131, is designated as base region 14-e. Figure 2Although a base region 14-e is shown disposed at one end of each stage in the extending direction, a base region 14-e is also disposed at the other end of each stage. In each stage, the area sandwiched by the base region 14-e in top view may be provided with at least one of a first conductivity type emitter region 12 and a second conductivity type contact region 15. In this example, the emitter region 12 is N+ type, and the contact region 15 is P+ type. The emitter region 12 and the contact region 15 may be disposed between the base region 14 and the upper surface of the semiconductor substrate 10 in the depth direction.

[0102] The mesa portion 60 of the transistor portion 70 has an emitter region 12 exposed on the upper surface of the semiconductor substrate 10. The emitter region 12 is grounded to the gate trench portion 40. A contact region 15 exposed on the upper surface of the semiconductor substrate 10 may be provided on the mesa portion 60 that is in contact with the gate trench portion 40.

[0103] Each contact area 15 and each emission area 12 in the platform surface 60 extends from a groove on one side to a groove on the other side in the X-axis direction. As an example, the contact areas 15 and emission areas 12 of the platform surface 60 are alternately arranged along the extension direction of the groove (Y-axis direction).

[0104] In other examples, the contact area 15 and the emission area 12 of the platform 60 can be arranged in a strip shape along the extension direction (Y-axis direction) of the groove. For example, the emission area 12 is provided in the area that is in contact with the groove, and the contact area 15 is provided in the area that is held by the emission area 12.

[0105] The emitter region 12 is not provided on the mesa 61 of the diode section 80. A base region 14 and a contact region 15 may be provided on the upper surface of the mesa 61. On the upper surface of the mesa 61, a contact region 15 may be provided in the area sandwiched between the base regions 14-e and grounded to each base region 14-e. A base region 14 may be provided on the upper surface of the mesa 61 in the area sandwiched by the contact region 15. The base region 14 may be configured over the entire area sandwiched by the contact region 15.

[0106] A contact hole 54 is provided above each stage surface. The contact hole 54 is located in the area held by the base region 14-e. In this example, the contact hole 54 is located above the contact region 15, the base region 14, and the emitter region 12. The contact hole 54 is not located in the region corresponding to the base region 14-e and the sink region 11. The contact hole 54 can be located at the center of the stage surface 60 in the arrangement direction (X-axis direction).

[0107] In the diode section 80, an N+ type cathode region 82 is provided in a region adjacent to the lower surface of the semiconductor substrate 10. On the lower surface of the semiconductor substrate 10, in a region where the cathode region 82 is not provided, a P+ type collector region 22 may be provided. The cathode region 82 and the collector region 22 are disposed between the lower surface 23 of the semiconductor substrate 10 and the buffer zone 20. Figure 2 In the diagram, a dashed line is used to represent the boundary between the cathode region 82 and the collector region 22.

[0108] The cathode region 82 is disposed separately from the well region 11 in the Y-axis direction. This ensures a sufficient distance between the cathode region 82 and the P-type region (well region 11), which has a high doping concentration and is formed deep within the well, thereby improving the breakdown voltage. In this example, the end of the cathode region 82 in the Y-axis direction is disposed further away from the well region 11 than the end of the contact hole 54 in the Y-axis direction. In other examples, the end of the cathode region 82 in the Y-axis direction may be disposed between the well region 11 and the contact hole 54.

[0109] (First Embodiment)

[0110] Figure 3 It is shown Figure 2 A diagram showing an example of the ee cross section. The ee cross section is the XZ plane passing through the emitter region 12 and the cathode region 82. In this example, the semiconductor device 100 has a semiconductor substrate 10, an interlayer insulating film 38, an emitter 52, and a collector 24 in this cross section.

[0111] An interlayer insulating film 38 is disposed on the upper surface of the semiconductor substrate 10. The interlayer insulating film 38 is a film comprising at least one layer of an insulating film such as silicate glass with impurities such as boron or phosphorus, a thermally oxidized film, and other insulating films. The interlayer insulating film 38 has a layer of... Figure 2 Contact hole 54 as described in the text.

[0112] The emitter 52 is disposed above the interlayer insulating film 38. The emitter 52 contacts the upper surface 21 of the semiconductor substrate 10 through the contact hole 54 of the interlayer insulating film 38. The collector 24 is disposed on the lower surface 23 of the semiconductor substrate 10. The emitter 52 and the collector 24 are formed of a metallic material such as aluminum. In this specification, the direction (Z-axis direction) connecting the emitter 52 and the collector 24 is referred to as the depth direction.

[0113] The semiconductor substrate 10 has N-type or N-type drift regions 18. The drift regions 18 are respectively provided in the transistor section 70 and the diode section 80.

[0114] On the mesa 60 of the transistor section 70, an N+ type emitter region 12 and a P- type base region 14 are sequentially disposed from the upper surface 21 side of the semiconductor substrate 10. A drift region 18 is disposed below the base region 14. An N+ type accumulation region 16 may be disposed on the mesa 60. The accumulation region 16 is disposed between the base region 14 and the drift region 18.

[0115] The emitter region 12 is exposed on the upper surface 21 of the semiconductor substrate 10 and is grounded to the gate trench portion 40. The emitter region 12 can be connected to the trench portions on both sides of the mesa portion 60. The doping concentration of the emitter region 12 is higher than that of the drift region 18.

[0116] The base region 14 is located below the transmitter region 12. In this example, the base region 14 is grounded to the transmitter region 12. The base region 14 can be connected to the grooves on both sides of the stage surface 60.

[0117] An accumulation region 16 is disposed below the base region 14. The accumulation region 16 is an N+ type region with a higher doping concentration than the drift region 18. That is, the donor concentration in the accumulation region 16 is higher than that in the drift region 18. By providing a high-concentration accumulation region 16 between the drift region 18 and the base region 14, the carrier injection enhancement effect (IE effect) can be improved, and the turn-on voltage can be reduced. The accumulation region 16 can be disposed such that it covers the entire lower surface of the base region 14 in each mesa 60.

[0118] A P-type base region 14 is provided on the mesa 61 of the diode section 80, in contact with the upper surface 21 of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. An accumulation region 16 may be provided on the mesa 61, below the base region 14.

[0119] In each transistor section 70 and each diode section 80, an N+ type buffer 20 may be provided below the drift region 18. The doping concentration of the buffer 20 is higher than that of the drift region 18. The buffer 20 may have a concentration peak with a higher doping concentration than that of the drift region 18. The doping concentration of the concentration peak refers to the doping concentration at the apex of the concentration peak. Alternatively, the doping concentration of the drift region 18 can be the average doping concentration in a region with a roughly flat doping concentration distribution.

[0120] The buffer 20 may have two or more concentration peaks in the depth direction (Z-axis direction) of the semiconductor substrate 10. The concentration peaks of the buffer 20 may be set at, for example, the same depth as the chemical concentration peaks of hydrogen (proton) or phosphorus. The buffer 20 can function as a field cutoff layer to prevent the depletion layer extending from the lower end of the base region 14 from reaching the P+ type collector region 22 and the N+ type cathode region 82. In this specification, the depth position of the upper end of the buffer 20 is designated as Zf. The depth position Zf may be a position where the doping concentration is higher than that of the drift region 18.

[0121] In the transistor section 70, a P+ type collector region 22 is provided below the buffer 20. The acceptor concentration in the collector region 22 is higher than that in the base region 14. The collector region 22 may contain the same acceptors as the base region 14, or it may contain acceptors different from the base region 14. The acceptors in the collector region 22 are, for example, boron.

[0122] In the diode section 80, an N+ type cathode region 82 is provided below the buffer zone 20. The donor concentration in the cathode region 82 is higher than that in the drift region 18. The donors in the cathode region 82 are, for example, hydrogen or phosphorus. It should be noted that the elements that become donors and acceptors in each region are not limited to the examples described above. The collector region 22 and the cathode region 82 are exposed on the lower surface 23 of the semiconductor substrate 10 and are connected to the collector electrode 24. The collector electrode 24 can contact the entire lower surface 23 of the semiconductor substrate 10. The emitter 52 and the collector electrode 24 can be formed of a metallic material such as aluminum.

[0123] One or more gate trench portions 40 and one or more dummy trench portions 30 are provided on the upper surface 21 side of the semiconductor substrate 10. Each trench portion extends from the upper surface 21 of the semiconductor substrate 10, penetrates the base region 14, and reaches the drift region 18. In regions where at least one of the emitter region 12, contact region 15, and accumulation region 16 is provided, each trench portion also penetrates these doped regions and reaches the drift region 18. The trench portion penetrating the doped region is not limited to being manufactured in the order of forming the trench portion after forming the doped region. The case where doped regions are formed between the trench portions after the trench portions are formed is also included in the case where the trench portion penetrates the doped region.

[0124] As described above, the transistor section 70 is provided with a gate trench section 40 and a dummy trench section 30. The diode section 80 is provided with a dummy trench section 30, but not with a gate trench section 40. In this example, the boundary between the diode section 80 and the transistor section 70 in the X-axis direction is the boundary between the cathode region 82 and the collector region 22.

[0125] The gate trench portion 40 includes a gate trench disposed on the upper surface 21 of the semiconductor substrate 10, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is disposed covering the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is disposed inside the gate trench, at a position further inward than the gate insulating film 42. That is, the gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon.

[0126] The gate conductive portion 44 may be longer than the base region 14 in the depth direction. The gate trench portion 40 in this cross section is covered by an interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. The gate conductive portion 44 is electrically connected to the gate wiring. If a predetermined gate voltage is applied to the gate conductive portion 44, a channel formed by an electron inversion layer is formed on the surface layer of the interface in the base region 14 that is in contact with the gate trench portion 40.

[0127] The dummy trench portion 30 can have the same structure as the gate trench portion 40 in this cross-section. The dummy trench portion 30 has a dummy trench disposed on the upper surface 21 of the semiconductor substrate 10, a dummy insulating film 32, and a dummy conductive portion 34. The dummy conductive portion 34 is electrically connected to the emitter 52. The dummy insulating film 32 is disposed covering the inner wall of the dummy trench. The dummy conductive portion 34 is disposed inside the dummy trench and is located further inward than the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy conductive portion 34 can be formed of the same material as the gate conductive portion 44. For example, the dummy conductive portion 34 can be formed of a conductive material such as polysilicon. The dummy conductive portion 34 can have the same length in the depth direction as the gate conductive portion 44.

[0128] In this example, the gate trench portion 40 and the dummy trench portion 30 are covered by an interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. It should be noted that the bottom of the dummy trench portion 30 and the gate trench portion 40 can be a downwardly convex curved surface (curved in cross-section). In this specification, the depth of the lower end of the gate trench portion 40 is defined as Zt.

[0129] A surface-side lifetime inhibitor 210 may be provided on the upper surface 21 side of the semiconductor substrate 10. The surface-side lifetime inhibitor 210 is a recombination center of lattice defects or the like, which are locally formed in the depth direction. In the figures, the peak positions of the density distribution of lifetime inhibitors in the depth direction are schematically indicated by cross marks. In this specification, these peak positions are described as the positions of the lifetime inhibitors. The cross marks are discretely arranged in the X-axis direction, but unless otherwise specified, the lifetime inhibitors are also arranged in the X-axis direction.

[0130] The upper surface-side lifetime inhibitor 210 can be formed by implanting helium particles, etc., from the upper surface 21 of the semiconductor substrate 10 to a predetermined depth. A concentration peak of helium particles, etc., can be disposed at the same depth as the upper surface-side lifetime inhibitor 210. The upper surface-side lifetime inhibitor 210 can be disposed at a position lower than each trench portion. Furthermore, it is preferable that the upper surface-side lifetime inhibitor 210 is disposed at a position that does not overlap with the gate trench portion 40 when viewed from above. Thus, the upper surface-side lifetime inhibitor 210 can be formed by implanting helium particles, etc., without damaging the gate insulating film 42. In this example, the upper surface-side lifetime inhibitor 210 is disposed throughout the entire diode portion 80 when viewed from above. Although... Figure 3 The upper surface-side lifetime inhibitor 210 is not provided in the transistor section 70, but in other examples, the upper surface-side lifetime inhibitor 210 may be provided in a part of the transistor section 70.

[0131] A lower surface-side lifetime inhibitor 220 is provided on the lower surface 23 side of the semiconductor substrate 10. The lower surface-side lifetime inhibitor 220 can be formed by injecting particles such as helium from the lower surface 23 side of the semiconductor substrate 10. Multiple lower surface-side lifetime inhibitors 220 can be disposed at different locations in the depth direction. Figure 3 In the example, a first lower surface-side lifetime inhibitor 220-1 and a second lower surface-side lifetime inhibitor 220-2 are configured at different depth locations. The lower surface-side lifetime inhibitor 220 can also be configured at more than three depth locations. A peak of helium chemical concentration can be set at the same depth location as each lower surface-side lifetime inhibitor 220.

[0132] Two or more lower-surface-side lifetime inhibitors 220 can be placed within the buffer 20. This makes it easy to control the distribution of lifetime inhibitors within the buffer 20. Therefore, carrier lifetime can be controlled with high precision.

[0133] The lower surface-side lifetime inhibitor 220 can be disposed throughout the entire diode section 80 when viewed from above. Alternatively, the lower surface-side lifetime inhibitor 220 can be disposed throughout the entire transistor section 70 when viewed from above. The lower surface-side lifetime inhibitor 220 can be disposed throughout the entire active section 160 when viewed from above, or it can be disposed throughout the entire semiconductor substrate 10 when viewed from above. The first lower surface-side lifetime inhibitor 220-1 and the second lower surface-side lifetime inhibitor 220-2 can be disposed within the same area when viewed from above.

[0134] Figure 4A It is shown Figure 3 A figure illustrating an example of the doping concentration distribution, hydrogen chemical concentration distribution, helium chemical concentration distribution, and recombination center concentration distribution at the FF line. Figure 4AIn this design, the central position in the depth direction of the semiconductor substrate 10 is defined as Zc. That is, the region on the upper surface 21 side of the semiconductor substrate 10 refers to the region between the upper surface 21 and the central position Zc, and the region on the lower surface 23 side of the semiconductor substrate 10 is the region between the lower surface 23 and the central position Zc.

[0135] Emitter region 12 contains N-type dopants such as phosphorus. Base region 14 contains P-type dopants such as boron. Accumulation region 16 contains N-type dopants such as phosphorus or hydrogen. The doping concentration distribution can have concentration peaks in emitter region 12, base region 14, and accumulation region 16, respectively.

[0136] Drift region 18 is a region where the doping concentration is approximately flat. The doping concentration Dd of drift region 18 can be the same as or higher than the bulk donor concentration of semiconductor substrate 10.

[0137] In this example, buffer zone 20 has multiple doping concentration peaks 25-1, 25-2, 25-3, and 25-4 in the doping concentration distribution. Each doping concentration peak 25 can be formed by locally implanting hydrogen ions. In other examples, each doping concentration peak 25 can also be formed by implanting N-type dopants such as phosphorus. Collector region 22 contains P-type dopants such as boron. Furthermore, Figure 3 The cathode region 82 shown contains N-type dopants such as phosphorus.

[0138] In this example, the hydrogen chemical concentration distribution exhibits multiple localized hydrogen chemical concentration peaks 103 within buffer zone 20. By injecting hydrogen ions into buffer zone 20, VOH defects formed by the combination of hydrogen, lattice defects, and oxygen are created, acting as donors. In this example, the hydrogen chemical concentration peak 103 is located at the same depth as the doping concentration peak 25. Two peaks located at the same depth mean that the apex of one peak is positioned within the full width at half maximum (FWHM) of the other peak. When the concentration of hydrogen chemical concentration peak 103 is not sufficiently high, a clear doping concentration peak 25 may not be observed at the same depth as it. In this example, the hydrogen chemical concentration decreases sharply immediately after entering drift region 18 from buffer zone 20. Therefore, almost no VOH defects are formed in drift region 18. In other examples, hydrogen may diffuse into the interior of drift region 18, forming VOH defects. In this case, the doping concentration in drift region 18 becomes higher than the bulk donor concentration.

[0139] The buffer zone 20 has two or more helium chemical concentration peaks 221 disposed at different locations in the depth direction of the semiconductor substrate 10. In this example, a first helium chemical concentration peak 221-1 and a second helium chemical concentration peak 221-2 are disposed in the buffer zone 20. The second helium chemical concentration peak 221-2 is configured to be further away from the lower surface 23 than the first helium chemical concentration peak 221-1.

[0140] As described above, a lower surface-side lifetime inhibitor 220 is formed near each helium chemical concentration peak 221. The lower surface-side lifetime inhibitor 220 can be a recombination center that promotes carrier recombination. A recombination center can be a lattice defect. Lattice defects can be dominated by vacancies such as single-atom vacancies (V) and multi-atom vacancies (VV), and can be dislocations, inter-lattice atoms, or transition metals. For example, atoms adjacent to vacancies may have dangling bonds. In a broader sense, lattice defects can also contain donors and / or acceptors; however, in this specification, lattice defects dominated by vacancies are sometimes referred to as vacancy-type lattice defects, or simply lattice defects. In this specification, lattice defects are sometimes referred to as recombination centers that facilitate carrier recombination, and are simply called recombination centers or lifetime inhibitors. Lifetime inhibitors can be formed by implanting helium ions into the semiconductor substrate 10. The lifetime inhibitor formed by helium injection is sometimes terminated by hydrogen present in buffer 20, so the depth position of the density peak of the lifetime inhibitor is sometimes inconsistent with the depth position of the helium chemical concentration peak 221.

[0141] By injecting helium at two or more depth locations within the buffer 20, the density distribution of the lower surface-side lifetime inhibitor 220 in the buffer 20 can be easily controlled. Helium can be injected at various depth locations. 3 He or 4 He. 3 He is a helium isotope containing two protons and one neutron. 4 He is a helium isotope containing two protons and two neutrons.

[0142] By injecting the minimum acceleration energy with a uniquely determined injection depth without passing through a buffer material (such as aluminum). 3 He or 4 He, thus, can reduce the half-width of the concentration peak in the depth direction of helium chemical concentration.

[0143] Figure 4B This is a graph showing the relationship between the ion implantation depth (Rp) and the acceleration energy required for implantation. In this example, helium ions are directly implanted into the silicon semiconductor substrate 10 without using a buffer material. Figure 4B The horizontal axis represents the range Rp (μm), and the vertical axis represents the acceleration energy E (eV) required for injection. Figure 4B In the middle, solid lines are used to represent 3 He's example is represented using dashed lines. 4 He is an example.

[0144] log 10 Set (Rp) to x, and log 10 (E) is set as y.

[0145] exist3 In He, the relationship between the range Rp and the acceleration energy E can be given by equation (1).

[0146] y = 4.52505E-03x 6 -4.71471E-02x 5 +1.67185E-01x 4 -1.72038E-01x 3 -2.92723E-01x 2 +1.39782E+00x+5.33858E+00···Equation (1)

[0147] It should be noted that EA is 10. -A , E+A is 10 A .

[0148] The acceleration energy calculated by substituting the actual range Rp' during the manufacture of semiconductor device 100 into equation (1) is set as E. If the actual acceleration energy E' during manufacturing is within ±20% of the acceleration energy E calculated according to equation (1), it can be considered as using... 3 He.

[0149] exist 4 In He, the relationship between the range Rp and the acceleration energy E can be given by equation (2).

[0150] y = 2.90157E-03x 6 -3.66593E-02x 5 +1.59363E-01x 4 -2.31938E-01x 3 -2.00999E-01x 2 +1.45891E+00x+5.27160E+00···Equation (2)

[0151] If the actual acceleration energy E' during manufacturing is within ±20% of the acceleration energy E calculated using the actual range Rp' according to equation (2), it can be considered as using... 4 He.

[0152] like Figure 4B As shown, the value of the region with a range Rp of 8μm to 10μm is taken as the boundary value. When the range Rp is above the boundary value, 4 He's acceleration energy ratio 3 He's acceleration energy is about 10% higher. This applies when the range Rp is below a certain threshold. 3 He's acceleration energy ratio 4He has an acceleration energy that is about 10% higher. This is presumably due to a change in the balance between electron and nuclear blocking capabilities caused by the number of neutrons in the isotope. As an example, in cases where the range Rp is below 10 μm, it can be used... 4 He. Therefore, it is possible to inject helium ions with a relatively low acceleration energy of around 10%. When the range Rp is greater than 10 μm, it is possible to use... 3 He.

[0153] Figure 4C This is a graph showing the relationship between the ion implantation depth (Rp) and the distribution width (ΔRp, standard deviation) along the implantation direction. In this example, the implantation direction is the depth direction of the semiconductor substrate 10. In this example, helium ions are implanted directly into the silicon semiconductor substrate 10 without using a buffer material. Figure 4C The horizontal axis represents the range Rp (μm), and the vertical axis represents the distribution width ΔRp (μm). Figure 4C In the middle, solid lines are used to represent 3 He's example is represented using dashed lines. 4 He is an example.

[0154] The distribution width ΔRp can be calculated by assuming a Gaussian distribution for helium concentration. For example, the distribution width ΔRp can be set as the distance between two points at a concentration 0.60653 times the peak concentration, or it can be set as the distance between two points at a concentration 0.6 times the peak concentration. When the minimum values ​​between adjacent concentration peaks are greater than 0.6 times the peak concentration, the distance between the inflection points of the minimum values ​​of the concentration distribution can also be set as the distribution width ΔRp.

[0155] log 10 Set (Rp) to x, and log 10 Let (ΔRp) be y.

[0156] exist 3 In He, the relationship between the range Rp and the distribution width ΔRp can be given by equation (3).

[0157] y = 5.00395E-04x 6 +9.91651E-03x 5 -9.76015E-02x 4 +2.12587E-01x 3 +1.30994E-01x 2 +2.25458E-01x-8.59463E-01···Equation (3)

[0158] The distribution width calculated by substituting the actual range Rp' during the manufacture of semiconductor device 100 into equation (3) is set as ΔRp. If the actual distribution width ΔRp' during manufacturing is within ±20% of the distribution width ΔRp calculated according to equation (3), it can be considered as using... 3 He. The actual distribution width ΔRp' preferably does not include the portion of helium diffusion caused by thermal annealing. The actual distribution width ΔRp' can be a value measured after helium injection and before thermal annealing, or a value obtained by subtracting the amount of helium diffusion from a value measured after thermal annealing.

[0159] exist 4 In He, the relationship between the range Rp and the distribution width ΔRp can be given by equation (4).

[0160] y = 3.10234E-03x 6 -9.20762E-03x 5 -6.13612E-02x 4 +2.34304E-01x 3 +3.88591E-02x 2 +2.22955E-01x-8.01967E-01···Equation (4)

[0161] If the actual distribution width ΔRp' during manufacturing is within ±20% of the distribution width ΔRp calculated using the actual range Rp' according to equation (4), it can be considered as using... 4 He. The actual distribution width ΔRp' preferably does not include the helium diffusion portion caused by thermal annealing.

[0162] like Figure 4C As shown, the values ​​in the region where the range Rp is 10–20 μm are taken as boundary values. When the range Rp is below the boundary value, 3 The distribution width of He ΔRp is compared to 4 The distribution width ΔRp of He is about 10% smaller. When the range Rp is above the boundary value... 3 He and 4 The distribution width ΔRp of He is approximately equal. This is presumably due to the balance between electron blocking ability and nuclear blocking ability caused by the number of isotopic neutrons.

[0163] As an example, it can be used when the range Rp is below 20μm. 3 Therefore, a relatively small distribution width ΔRp of around 10% can be established. Alternatively, if a difference of around 10% in the distribution width ΔRp results in a sufficiently small difference in the helium chemical concentration distribution or electrical properties, it can be considered acceptable even when the range Rp is below 20 μm. 3 He and4 The distribution width ΔRp of He is approximately equal. In this case, the helium atoms implanted into the semiconductor substrate 10 can be... 3 He, could also be 4 He.

[0164] As an example, injection 4 In the case of He, the full width at half maximum (FWHM) of the helium chemical concentration peak 221 is less than 1 μm. The FWHM of the helium chemical concentration peak 221 can be less than 0.5 μm. By configuring multiple helium chemical concentration peaks 221 with small FWHMs in the buffer buffer 20, the shape of the distribution of the lower surface-side lifetime inhibitor 220 can be easily controlled. Furthermore, VOH defects formed by helium implantation can be suppressed to have a wide distribution range. Therefore, the doping concentration distribution of the buffer buffer 20 can be suppressed to vary over a wide range.

[0165] Furthermore, by setting multiple helium chemical concentration peaks 221, the total concentration of the lower surface-side lifetime inhibitor 220 can be maintained at a relatively high level. Therefore, it is possible to shorten the carrier lifetime and suppress tail current when the semiconductor device 100 is turned off.

[0166] It should be explained that 3 The acceleration energy E of He is approximately 20 MeV or higher (range Rp is 270 μm or higher), and the distribution width ΔRp is 10 μm or higher. 4 The acceleration energy E of He is approximately 21 MeV or higher (range Rp is 250 μm or higher), and the distribution width ΔRp is 10 μm or higher. In this case, the full width at half maximum (FWHM) of the helium chemical concentration peak 221 cannot be sufficiently reduced compared to the width in the depth direction of the buffer 20. Therefore, VOH defects form over a wide area of ​​the buffer 20, leading to variations in the doping concentration distribution. Consequently, the electric field sometimes concentrates locally in the buffer 20, reducing the short-circuit current tolerance. Conversely, by reducing the FWHM of the helium chemical concentration peak 221, the short-circuit current tolerance is easily maintained. Therefore, during implantation... 3 He and 4 In the case of any of the He, the acceleration energy E can be below 20 MeV or below 10 MeV. Alternatively, the acceleration energy E of at least one or more of the multiple helium chemical concentration peaks 221 can be below 10 MeV or below 5 MeV.

[0167] Figure 5A This is a diagram illustrating an example of the doping concentration distribution, hydrogen chemical concentration distribution, helium chemical concentration distribution, and recombination center concentration distribution in buffer 20. Each concentration distribution can be compared with... Figure 4A The concentration distributions described in the text are the same.

[0168] In this example, the doping concentration distribution, starting from the lower surface 23 of the semiconductor substrate 10, sequentially includes doping concentration peaks 25-1, 25-2, 25-3, and 25-4. Doping concentration peak 25-4 is an example of the deepest doping concentration peak located furthest from the lower surface 23. The depth positions of each doping concentration peak 25, starting from the lower surface 23, are sequentially designated as Zd1, Zd2, Zd3, and Zd4. Each depth position Zd represents the distance from the lower surface 23. It should be noted that any doping concentration peak 25 does not have to be a distinct peak. For example, the inflection point (turning point) of the slope of the doping concentration distribution can be considered as the doping concentration peak 25. Doping concentration peak 25-1 can be the doping concentration peak 25 with the highest concentration value. Doping concentration peak 25-2 can be the doping concentration peak 25 with the second highest concentration value. Doping concentration peak 25-3 can be the doping concentration peak 25 with the lowest concentration value. Doping concentration peak 25-4 can be a doping concentration peak 25 with a higher concentration than doping concentration peak 25-3.

[0169] In this example, the hydrogen chemical concentration distribution, starting from the lower surface 23 of the semiconductor substrate 10, sequentially includes hydrogen chemical concentration peaks 103-1, 103-2, 103-3, and 103-4. The depth positions of each hydrogen chemical concentration peak 103, starting from the lower surface 23, are sequentially designated as Zh1, Zh2, Zh3, and Zh4. Each depth position Zh represents the distance from the lower surface 23. Depth position Zdk can be the same as depth position Zhk. Here, k is an integer from 1 to 4. Hydrogen chemical concentration peak 103-1 can be the hydrogen chemical concentration peak with the highest concentration value. Hydrogen chemical concentration peak 103-2 can be the hydrogen chemical concentration peak with the second highest concentration value. Hydrogen chemical concentration peak 103-3 can be the hydrogen chemical concentration peak with the lowest concentration value. Hydrogen chemical concentration peak 103-4 can be a hydrogen chemical concentration peak with a higher concentration than hydrogen chemical concentration peak 103-3.

[0170] In this example, the helium chemical concentration distribution, starting from the lower surface 23 side of the semiconductor substrate 10, sequentially exhibits a first helium chemical concentration peak 221-1 and a second helium chemical concentration peak 221-2. The depth positions of each helium chemical concentration peak 221, starting from the lower surface 23 side, are sequentially designated as Zk1 and Zk2. Each depth position Zk represents the distance from the lower surface 23. Furthermore, the concentration values ​​of each helium chemical concentration peak 221, starting from the lower surface 23 side, are sequentially designated as Pk1 and Pk2.

[0171] Two or more helium chemical concentration peaks 221 are configured between the deepest doped peak 25-4 and the lower surface 23 of the semiconductor substrate 10. At least one helium chemical concentration peak 221 can be configured between depth positions Zd1 and Zd2. In this example, all helium chemical concentration peaks 221 are configured between depth positions Zd1 and Zd2. The full width at half maximum (FWHM) of helium chemical concentration peak 221-2 can be greater than that of helium chemical concentration peak 221-1. Depending on the acceleration energy, the FWHM of helium chemical concentration peak 221-1 and the FWHM of helium chemical concentration peak 221-2 can be different. In this example, multiple lower surface-side lifetime inhibitors 220 can be configured near the collector region 22.

[0172] Figure 5B This is a diagram illustrating an example of the doping concentration distribution, hydrogen chemical concentration distribution, helium chemical concentration distribution, and recombination center concentration distribution in buffer 20. In this example, the helium chemical concentration distribution and recombination center concentration distribution are compared with... Figure 5A The examples are different. Other distributions can be compared with... Figure 5A The examples are the same.

[0173] In this example, buffer 20 has a helium chemical concentration peak 221-0 and a lower surface-side lifetime inhibitor 220-0. The depth position of the helium chemical concentration peak 221-0 is set as Zk0, and the concentration is set as Pk0.

[0174] The helium chemical concentration peak 221-0, at depth Zk0, is located between depths Zk1 and Zk2. A recombination center concentration peak (lower surface lifetime inhibitor 220-0) is located near depth Zk0. Furthermore, the concentration Pk0 of the helium chemical concentration peak 221-0 can be higher than the concentrations of both Pk1 and Pk2. Similarly, the concentration of the lower surface lifetime inhibitor 220-0 can be higher than the concentrations of both lower surface lifetime inhibitors 220-1 and 220-2.

[0175] exist Figure 5A and Figure 5B In the example, if the depletion layer extending from the lower end of the base region 14 reaches the lower surface lifetime inhibitor 220 during turn-off, the recombination center acts as a carrier generation center. Consequently, the following occurs: leakage current increases, promoting heating of the semiconductor device, the temperature of the semiconductor device rises, and turn-off tolerance decreases. Figure 5AAs in the example, by setting multiple lower surface-side lifetime inhibitors 220, the peak concentration of helium chemical concentration (recombination center concentration) can be reduced. This also reduces the concentration of carrier generation centers, thereby reducing leakage current, suppressing temperature rise in the semiconductor device, and improving turn-off tolerance. Furthermore, it can suppress the injection of hole carriers from the collector region 22 to the drift region 18.

[0176] In addition, Figure 5A In the example, the distance (Zk2-Zk1) between the first helium chemical concentration peak 221-1 closest to depth position Zd1 and the second helium chemical concentration peak 221-2 closest to depth position Zd2 can be more than half the distance (Zd2-Zd1). Therefore, multiple lower surface-side lifetime inhibitors 220 can be configured over a certain range. Furthermore, the interval between adjacent helium chemical concentration peaks 221 in the depth direction (Zk2-Zk1 in this example) can be 2 μm or more, 3 μm or more, 4 μm or more, or 5 μm or more.

[0177] The concentration values ​​Pk of each helium chemical concentration peak 221 can be the same. In other examples, any concentration value Pk can also be different from the other concentration values ​​Pk. The helium ion implantation dose corresponding to each helium chemical concentration peak 221 can be 1 × 10⁻⁶. 11 ( / cm 2 The above can also be 3×10. 11 ( / cm 2 Above that, it can also be 1×10 12 ( / cm 2 The above. The implantation dose of helium ions corresponding to each helium chemical concentration peak 221 can be 1×10. 13 ( / cm 2 Below that, it can also be 3×10 12 ( / cm 2 Below that, it can also be 1×10 12 ( / cm 2 )the following.

[0178] It should be noted that each helium chemical concentration peak 221 can be positioned at a depth different from that of any hydrogen chemical concentration peak 103. That is, the depth Zk of the apex of each helium chemical concentration peak 221 is not included within the full width at half maximum (FWHM) of any hydrogen chemical concentration peak 103. Thus, the lifetime inhibitor formed by helium injection is terminated by hydrogen, making it easier to maintain the concentration of the lower surface-side lifetime inhibitor 220.

[0179] For each helium chemical concentration peak 221, the greater the distance from the depth position Zh of the hydrogen chemical concentration peak 103, the larger the concentration value Pk can become. Therefore, it is possible to suppress the formation of VOH defects by lifetime inhibitors formed through helium implantation and to suppress changes in the shape of the doping concentration distribution in the buffer 20.

[0180] It should be noted that when the carrier concentration distribution obtained by the SR method is taken as the doping concentration distribution, the doping concentration distribution may have a valley 35 at the same depth position as any helium chemical concentration peak 221. The valley 35 is the region where the doping concentration exhibits a minimum value. In this example, since a lower surface lifetime inhibitor 220 is provided at the same depth position as the helium chemical concentration peak 221, the carrier density at this position is reduced.

[0181] Figure 6 This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20. Figure 6 The doping concentration distribution and hydrogen chemical concentration distribution in Figure 5A The example is similar. In this example, the helium chemical concentration distribution, starting from the lower surface 23 side of the semiconductor substrate 10, sequentially has a first helium chemical concentration peak 221-1, a second helium chemical concentration peak 221-2, and a third helium chemical concentration peak 221-3. The depth positions of each helium chemical concentration peak 221 are sequentially designated Zk1, Zk2, and Zk3, starting from the lower surface 23 side. Furthermore, the concentration values ​​of each helium chemical concentration peak 221 are sequentially designated Pk1, Pk2, and Pk3, starting from the lower surface 23 side. The recombination center concentration also exhibits the same distribution as the helium chemical concentration.

[0182] In this example, all helium chemical concentration peaks 221 are also positioned between depth positions Zd1 and Zd2. In other examples, any helium chemical concentration peak 221 may be positioned in other regions of buffer 20.

[0183] The concentration value Pk of the first helium chemical concentration peak 221-1 can be higher than at least one of the concentration values ​​Pk of the second helium chemical concentration peak 221-2 and the third helium chemical concentration peak 221-3. The first helium chemical concentration peak 221-1 can be the helium chemical concentration peak 221 with the largest concentration value Pk. Alternatively, the concentration value Pk of the helium chemical concentration peak 221 can become smaller the further away from the lower surface 23 of the semiconductor substrate 10. In addition, the distribution width ΔRp or full width at half maximum (FWHM) of the helium chemical concentration peak 221 can also become larger the further away from the lower surface 23 of the semiconductor substrate 10.

[0184] It should be noted that the relative magnitudes of the concentrations of the lower surface lifetime inhibitors 220 can be the same as the relative magnitudes of the concentrations of the corresponding helium chemical concentration peaks 221. That is, the higher the concentration of the corresponding helium chemical concentration peak 221, the higher the concentration of the lower surface lifetime inhibitors 220 can also be.

[0185] In this example, a high concentration of lower surface-side lifetime inhibitor 220 is disposed near the lower surface 23. Therefore, it is possible to suppress the injection of hole carriers from the collector region 22 into the drift region 18. Furthermore, it is possible to suppress the increase in leakage current and improve the withstand capability during turn-off.

[0186] Figure 7 This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20. Figure 7 The doping concentration distribution and hydrogen chemical concentration distribution in Figure 5A The example is the same. The relative magnitudes of the concentrations of each helium chemical concentration peak 221 in this example's helium chemical concentration distribution are similar to... Figure 6 The examples differ. Other structures are different. Figure 6 The example is the same. The concentration of recombination centers also has the same distribution as that of helium chemical concentrations.

[0187] The concentration value Pk of the first helium chemical concentration peak 221-1 can be lower than at least one of the concentration values ​​Pk of the second helium chemical concentration peak 221-2 and the third helium chemical concentration peak 221-3. The first helium chemical concentration peak 221-1 can be the helium chemical concentration peak 221 with the smallest concentration value Pk. In addition, the concentration value Pk of the helium chemical concentration peak 221 can become larger the further away from the lower surface 23 of the semiconductor substrate 10. In addition, the distribution width ΔRp or full width at half maximum (FWHM) of the helium chemical concentration peak 221 can also become larger the further away from the lower surface 23 of the semiconductor substrate 10.

[0188] In this example, a high concentration of lower surface-side lifetime inhibitor 220 is disposed near the drift region 18. Therefore, when the semiconductor device 100 is turned off, the lifetime of charge carriers flowing from the drift region 18 to the lower surface 23 can be shortened. Thus, the duration of tail current flow can be shortened. In addition, the increase in leakage current can be suppressed, and the tolerance during turn-off can be improved.

[0189] Figure 8 This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20. Figure 8 The doping concentration distribution and hydrogen chemical concentration distribution in Figure 5A The example is the same. In this example, the peak spacing in the depth direction between the helium chemical concentration peak 221-k and the helium chemical concentration peak 221-(k+1) is set as Lk( Figure 8 (L1 and L2 are in the middle). Other structures are similar to... Figures 5A to 7 The same applies to any example described herein. The peak spacing of two adjacent helium chemical concentration peaks 221 in the depth direction ( Figure 8 The concentrations of L1 and L2 in buffer 20 can be equal. The concentration of recombination centers also has the same distribution as that of helium chemical concentrations.

[0190] Figure 9 This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20. Figure 9 The doping concentration distribution and hydrogen chemical concentration distribution in Figure 5A The example is the same. In this example, the peak spacing Lk is the same as... Figure 8 The examples differ. Other structures are different. Figure 8 The examples are the same.

[0191] In this example, the first peak spacing L1 is smaller than the second peak spacing L2, which is located further away from the lower surface 23 than the first peak spacing L1 (L1 < L2). That is, in the buffer zone 20, the closer to the lower surface 23, the higher the density of the helium chemical concentration peaks 221. The recombination center concentration also has the same distribution as the helium chemical concentration.

[0192] In this example, a large number of lower surface-side lifetime inhibitors 220 can be formed near the collector region 22. Therefore, it is possible to suppress the injection of hole carriers from the collector region 22 into the drift region 18.

[0193] Figure 10A This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20. Figure 10A The doping concentration distribution and hydrogen chemical concentration distribution in Figure 5A The example is the same. In this example, the peak spacing Lk is the same as... Figure 8 The examples differ. Other structures are different. Figure 8 The examples are the same.

[0194] In this example, the first peak interval L1 is greater than the second peak interval L2 (L1 > L2). That is, in buffer zone 20, the closer to drift region 18, the higher the density of helium chemical concentration peak 221. The recombination center concentration also has the same distribution as the helium chemical concentration.

[0195] According to this example, a large number of lower surface-side lifetime inhibitors 220 can be formed near the drift region 18. Therefore, when the semiconductor device 100 is turned off, the lifetime of charge carriers flowing from the drift region 18 to the lower surface 23 can be shortened. Therefore, the period of tail current flow can be shortened.

[0196] Figure 10B This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20. Figure 10BThe doping concentration distribution and hydrogen chemical concentration distribution in Figure 5A The examples are the same.

[0197] The region between two adjacent doping concentration peaks 25 in the depth direction is designated as interpeak region 105. Alternatively, the region between two adjacent hydrogen chemical concentration peaks 103 in the depth direction can also be designated as interpeak region 105. In this example, the region between depth positions Zd1 and Zd2 (or Zh1 and Zh2) is designated as interpeak region 105-1, the region between depth positions Zd2 and Zd3 (or Zh2 and Zh3) is designated as interpeak region 105-2, and the region between depth positions Zd3 and Zd4 (or Zh3 and Zh4) is designated as interpeak region 105-3.

[0198] In this example, helium chemical concentration peaks 221 are configured in two or more interpeak regions 105. The helium chemical concentration peaks 221 can be configured in two adjacent interpeak regions 105. Each interpeak region 105 can have one or more helium chemical concentration peaks 221. Within the interpeak regions 105, the closer to the lower surface 23, the more helium chemical concentration peaks 221 can be configured. Figure 10B In the example, two helium chemical concentration peaks 221 are configured in the interpeak region 105-1, and one helium chemical concentration peak 221 is configured in the interpeak region 105-2.

[0199] The magnitudes of the concentrations of each helium chemical concentration peak 221 can be correlated with... Figures 5A to 10A The same as any of the examples described herein. Figure 10B In the example, the concentration of helium chemical concentration peak 221 decreases the further away from the lower surface 23. The spacing between the various helium chemical concentration peaks 221 can be... Figures 5A to 10A The same applies to any of the examples described. The concentration of recombination centers can also have the same distribution as the helium chemical concentration.

[0200] Figure 10C This is a diagram illustrating other examples of helium chemical concentration distribution and recombination center concentration distribution in buffer 20. Figure 10C The doping concentration distribution and hydrogen chemical concentration distribution in Figure 5A The examples are the same.

[0201] In this example, the interpeak region 105 between the two interpeak regions 105 containing the helium chemical concentration peak 221 is not configured with the helium chemical concentration peak 221. Figure 10C In the example, two helium chemical concentration peaks 221 are configured in interpeak region 105-1, no helium chemical concentration peak 221 is configured in interpeak region 105-2, and one helium chemical concentration peak 221 is configured in interpeak region 105-3. The concentrations of each helium chemical concentration peak 221 can be the same as in the 10B example. The concentration of the recombination center can also have the same distribution as the helium chemical concentration.

[0202] Figure 11 This is a graph illustrating the full width at half maximum (FWHM) Wk of the helium chemical concentration peak 221. In this example, the FWHM of the hydrogen chemical concentration peak 103 is set to Wh. Figure 11 Only one helium chemical concentration peak 221 and one hydrogen chemical concentration peak 103 are shown in the figure; other peaks are omitted.

[0203] The full width at half maximum (FWHM) Wk of each helium chemical concentration peak 221 is smaller than the FWHM Wh of any hydrogen chemical concentration peak 103 that is positioned further away from the lower surface 23 of the semiconductor substrate than each of the helium chemical concentration peaks 221. For example, Figure 10A The full width at half maximum (FWHM) of each of the helium chemical concentration peaks 221-1, 221-2, and 221-3 shown is smaller than the FWHM of any one of the hydrogen chemical concentration peaks 103-2, 103-3, and 103-4. The FWHM of each peak can be less than half the FWHM Wh of the hydrogen chemical concentration peak 103, which is further away from the lower surface 23. By reducing the FWHM Wk of the helium chemical concentration peak 221, it is possible to suppress a wide range of variations in the shape of the doping concentration distribution in the buffer zone 20.

[0204] Figure 12A This is a diagram illustrating an example of the doping concentration distribution and hydrogen chemical concentration distribution in buffer 20. The doping concentration distribution and hydrogen chemical concentration distribution can be compared with... Figures 5A to 11 The examples described are the same. Furthermore, the helium chemical concentration distribution is similar to... Figures 5A to 11 The same as any of the examples described herein.

[0205] In this example, the two doping concentration peaks 25-3 and 25-4, which are furthest from the lower surface 23 of the semiconductor substrate 10, are not observed as distinct concentration peaks. The ratio of the minimum doping concentration in the region between doping concentration peaks 25-3 and 25-4 to the larger of the concentration values ​​of doping concentration peaks 25-3 and 25-4 is defined as n. This ratio n can be less than 50%, less than 20%, or less than 10%.

[0206] Furthermore, the ratio of the minimum hydrogen chemical concentration in the region between hydrogen chemical concentration peaks 103-3 and 103-4 to the larger of the concentration values ​​of the two hydrogen chemical concentration peaks 103-3 and 103-4 furthest from the lower surface 23 of the semiconductor substrate 10 is defined as m. This ratio m can be greater than the ratio n. That is, within the range from depth position Zd3 to depth position Zd4, the amplitude of the fluctuation in the hydrogen chemical concentration distribution can be greater than the amplitude of the fluctuation in the doping concentration distribution.

[0207] Furthermore, region X is defined as the area from depth Zd1 to depth Zd2, and region Y is defined as the area from depth Zd2 to depth Zd4. In region X, the ratio of the minimum hydrogen chemical concentration to the minimum doping concentration is defined as α. Similarly, in region Y, the ratio of the minimum hydrogen chemical concentration to the minimum doping concentration is defined as β. The ratio α can be greater than the ratio β. Additionally, region Y can be longer than region X in the depth direction. Region Y can be at least 1.5 times the length of region X, or at least 2 times the length of region X.

[0208] Figure 12B This diagram illustrates a portion of the steps in a method for manufacturing a semiconductor device 100. In this example, during the upper surface-side structure formation stage S1200, a structure is formed on the upper surface 21 side of the semiconductor substrate 10. The structure on the upper surface 21 side may include at least one of the doped regions on the upper surface 21 side of the semiconductor substrate 10, such as the emitter region 12, the base region 14, and the accumulation region 16. The structure on the upper surface 21 side may include trench portions. The structure on the upper surface 21 side may include a structure, such as an emitter 52, located above the upper surface 21 of the semiconductor substrate 10. The structure on the upper surface 21 side may include an edge termination structure portion 90.

[0209] Next, in the substrate grinding stage S1202, the lower surface 23 of the semiconductor substrate 10 is ground to thin the semiconductor substrate 10. In S1202, the semiconductor substrate 10 can be thinned to a thickness corresponding to the voltage resistance that the semiconductor device 100 should have.

[0210] Next, in the lower surface region formation stage S1204, a lower surface doped region of the semiconductor substrate 10 is formed. The lower surface doped region is a doped region that is in contact with electrodes formed on the lower surface 23, such as the collector 24, which are formed in subsequent processes. The lower surface doped region may include at least one of the cathode region 82 and the collector region 22.

[0211] Next, in the first ion implantation stage S1206, ions for forming the buffer zone 20 are implanted into the semiconductor substrate 10. In S1206, ion implantation can be performed from the lower surface 23 of the semiconductor substrate 10 into the region where the buffer zone 20 should be formed. In S1206, donor ions such as hydrogen ions (e.g., protons) or phosphorus ions can be implanted.

[0212] Next, in the first annealing stage S1208, the semiconductor substrate 10 is thermally annealed. In S1208, the semiconductor substrate 10 can be placed in an electric furnace, and the entire semiconductor substrate 10 (or wafer) is annealed. The annealing temperature in S1208 can be above 320°C and below 420°C. In S1208, annealing can be carried out in an atmosphere containing hydrogen and nitrogen.

[0213] Next, in the second ion implantation stage S1210, ions for forming the lower surface-side lifetime inhibitor 220 are implanted into the semiconductor substrate 10. In S1210, ions can be implanted from the lower surface 23 of the semiconductor substrate 10. In S1210, hydrogen ions such as protons or helium ions can be implanted. In this example, helium ions are implanted.

[0214] In S1210, formation Figures 5A to 10C The lower surface lifetime inhibitor 220 is described herein. By sequentially changing the acceleration energy of helium ions, etc., the lower surface lifetime inhibitor 220 can be formed at multiple locations in the depth direction. In S1210, helium ions, etc., can be sequentially injected from positions closer to the lower surface 23 or from positions farther from the lower surface 23. In this example, helium ions are sequentially injected from positions farther from the lower surface 23. Furthermore, in S1210, ion implantation can be performed sequentially starting with the lower surface lifetime inhibitor 220 with a larger dose or starting with the lower surface lifetime inhibitor 220 with a smaller dose.

[0215] Next, in the second annealing stage S1212, the semiconductor substrate 10 is thermally annealed. In S1212, the semiconductor substrate 10 can be placed in an electric furnace, and the entire semiconductor substrate 10 (or wafer) is annealed. The annealing temperature in S1212 can be lower than the annealing temperature in S1208. The annealing temperature in S1212 can be above 300°C and below 400°C. In S1212, annealing can be carried out in a nitrogen atmosphere or an atmosphere containing hydrogen and nitrogen.

[0216] S1212 can be performed after injecting helium ions or the like at each depth location in S1210, or after injecting helium ions or the like at multiple depth locations. The process combination of S1210 and S1212 can be repeated multiple times (S1213).

[0217] Next, in the lower surface electrode formation stage S1214, an electrode is formed that is connected to the lower surface 23. In S1214, a collector electrode 24 can be formed. Through this process, a semiconductor device 100 can be formed.

[0218] Figure 12C This is a graph illustrating other examples of doping concentration distribution and hydrogen chemical concentration distribution in buffer 20. Figure 12C Unless otherwise specified or illustrated, the doping concentration distribution and hydrogen chemical concentration distribution are consistent with... Figure 12AThe example is the same. In this example, the doping concentration distribution in buffer 20 has a flat portion 250 between any two doping concentration peaks 25. The flat portion 250 is a region where the doping concentration variation within a predetermined depth range falls within a predetermined range of variation. This depth range can be greater than 0.5 μm or greater than 1 μm. This range of variation can be less than ±30% of the average concentration at both ends of this depth range, less than ±20%, or less than ±10%. The magnitude of the concentration distribution variation is the difference between the maximum and minimum doping concentration values ​​within this region.

[0219] Furthermore, in the flat section 250, the doping concentration variation rate R1 is less than the hydrogen chemical concentration variation rate R2. The concentration distribution variation rate is the ratio of the maximum concentration to the minimum concentration in that region. That is, the variation rate is the value obtained by dividing the maximum concentration by the minimum concentration. The variation rate R1 can be less than half, less than 1 / 4, or less than 1 / 10 of the variation rate R2.

[0220] Furthermore, the peak width of the doping concentration peak 25 at the flat portion 250 can be greater than the peak width of the corresponding hydrogen chemical concentration peak 103. The peak width of the doping concentration peak 25 at the flat portion 250 can be taken as the distance between the minimum portion on the upper surface 21 side and the minimum portion on the lower surface 23 side of the doping concentration peak 25. In the flat portion 250, there may be a case where the maximum doping concentration is less than 50% of the minimum value. In this case, the minimum doping concentration becomes more than 50% of the maximum value, and the full width at half maximum (FWHM) of the doping concentration peak 25 cannot be defined. When the FWHM of the doping concentration peak 25 can be measured, the FWHM can be used as the peak width of the doping concentration peak 25. The peak width of the hydrogen chemical concentration peak 103 can also be determined using the FWHM.

[0221] exist Figure 12C In the example, a flat portion 250 is disposed between the doping concentration peak 25-3 and the doping concentration peak 25-4. The doping concentration in the flat portion 250 is greater than the doping concentration Dd of the drift region 18. The doping concentration in the flat portion 250 can be more than 2.5 times the doping concentration Dd of the drift region 18.

[0222] The buffer 20 may have multiple doping concentration peaks 25 on the side of the upper surface 21 of the flat portion 250, which do not have flat portions between peaks. The definition of the flat portion is the same as that of the flat portion 250. Figure 12CIn the example, buffer 20 has doping concentration peaks 25-4, 25-5, 25-6, and 25-7 on the side of the upper surface 21 above the flat portion 250. The values ​​of the doping concentration peaks 25 on the side of the upper surface 21 above the flat portion 250 can be substantially the same, or they can become smaller as they move further away from the lower surface 23. "Substantially the same" can mean that the variation of adjacent doping concentration peaks 25 is less than 30%, less than 20%, or less than 10%.

[0223] In a plurality of doping concentration peaks 25 that do not have flat sections between peaks, valleys 251 may be provided between the peaks. In each valley 251, the gradient (differential value) of the doping concentration distribution in the direction from the lower surface 23 to the upper surface 21 can continuously change from a negative value to a positive value. On the other hand, in the flat section 250, the gradient of the doping concentration distribution in the direction from the lower surface 23 to the upper surface 21 can be substantially a continuous value of 0. It should be noted that, for measurement points based on the CV method or the SR method, the gradient of the doping concentration distribution can be the average value of multiple measurement points within a predetermined measurement range, and this average value can be a value calculated by a known fitting method.

[0224] Furthermore, the positions of the multiple doping concentration peaks 25 that do not have flat portions between peaks correspond in the depth direction to the positions of the hydrogen chemical concentration peaks 103. Each doping concentration peak 25 disposed at a position higher than the flat portion 250 on the upper surface 21 side can have the following relationship with its corresponding hydrogen chemical concentration peak 103.

[0225] C Hv / C Hp <N v / N p

[0226] It should be noted that C Hp It is the concentration of hydrogen chemical concentration peak 103, C Hv The concentration of N is located at the valley 252 adjacent to the hydrogen chemical concentration peak 103 on the upper surface 21 side. p It is the concentration of doping concentration peak 25, N v It is the concentration in the valley 251 adjacent to the doping concentration peak 25 on the upper surface 21 side. C Hv / C Hp It can be N v / N p It can be less than 0.8 times, less than 0.5 times, less than 0.2 times, less than 0.1 times, or less than 0.01 times. Hv / C Hp It can be N v / N pIt can be more than 0.001 times, or more than 0.01 times, or even more than 0.1 times.

[0227] For the semiconductor device 100, by having multiple doping concentration peaks 25 located on the upper surface 21 side of the flat portion 250 without flat portions between peaks, the distribution of doping concentration can be made smoother, and the change in electric field intensity when the depletion layer reaches the buffer 20 can be made smoother. As a result, abrupt changes in the voltage waveform can be suppressed.

[0228] Figure 12D This is a graph illustrating other examples of doping concentration distribution and hydrogen chemical concentration distribution in buffer 20. Figure 12D Unless otherwise specified or illustrated, the doping concentration distribution and hydrogen chemical concentration distribution are consistent with... Figure 12C The example is similar. In this case, the concentration of the doping concentration peak 25 in the buffer 20, which is closer to the upper surface 21 than the flat portion 250, decreases as it gets closer to the upper surface 21. Similarly, the concentration of the hydrogen chemical concentration peak 103, which is closer to the upper surface 21 than the flat portion 250, also decreases as it gets closer to the upper surface 21. This structure allows for a smoother change in the doping concentration of the buffer 20 near the drift region 18.

[0229] The concentration of the hydrogen chemical concentration peak 103-k on the upper surface 21 side of the flat portion 250 can be less than half or less than 1 / 4 of the concentration of the adjacent hydrogen chemical concentration peak 103-(k-1) on the lower surface 23 side. The concentration of the hydrogen chemical concentration peak 103-k can be more than 1 / 10 of the concentration of the hydrogen chemical concentration peak 103-(k-1). The concentration of the doping concentration peak 25-k on the upper surface 21 side of the flat portion 250 can be less than half or less than 1 / 4 of the concentration of the adjacent doping concentration peak 25-(k-1) on the lower surface 23 side. The concentration of the doping concentration peak 25-k can be more than 1 / 10 of the concentration of the doping concentration peak 25-(k-1). In this example, the fluctuation (N) of the doping concentration on the upper surface 21 side of the flat portion 250... V With N p The difference (in C) is also smaller than the fluctuation in hydrogen chemical concentration (C). Hv With C Hp (Differences). In addition, the half-width at half-maximum (WHM) of the doping concentration peak 25 is greater than that of the half-maximum (WHM) of the hydrogen chemical concentration peak 103.

[0230] The envelope connecting the hydrogen chemical concentration peak 103-k is designated as the hydrogen peak envelope 231. The envelope connecting the valley of the hydrogen chemical concentration 104-k is designated as the hydrogen valley envelope 232. Furthermore, the envelope connecting the doping concentration peak 25-k is designated as the doping peak envelope 233. The envelope connecting the valley of the doping concentration 26-k is designated as the doping valley envelope 234. At any position X between position Zd4 and position Zf, the first ratio of the hydrogen peak envelope 231 to the hydrogen valley envelope 232 can be greater than the second ratio of the doping peak envelope 233 to the doping valley envelope 234. The first ratio can be greater than twice or three times the second ratio. The semiconductor device 100, by having a structure in which multiple doping concentration peaks 25 are present on the upper surface 21 side of the flat portion 250 and the multiple doping concentration peaks 25 are reduced, can make the distribution of doping concentration smoother and the change in electric field intensity when the depletion layer reaches the buffer 20 smoother. As a result, abrupt changes in voltage waveform can be suppressed.

[0231] Figure 12E This is a graph illustrating other examples of doping concentration distribution and hydrogen chemical concentration distribution in buffer 20. Figure 12E Unless otherwise specified or illustrated, the doping concentration distribution and hydrogen chemical concentration distribution are consistent with... Figure 12D The example is the same. In the adjacent region 240, which is connected to the drift region 18, the doping concentration distribution of the buffer 20 in this example changes gradually. The adjacent region 240 is a region containing multiple hydrogen chemical concentration peaks 103, and the concentration of the hydrogen chemical concentration peaks 103 decreases the further away from the lower surface 23. In this example, the adjacent region 240 is the region from depth position Zd4 to depth position Zf. Alternatively, the region between the flat portion 250 on the uppermost surface 21 side and the drift region 18 in the buffer 20 can also be used as the adjacent region 240.

[0232] In this example, the depth range (i.e., width) of the adjacent region 240 is greater than... Figure 12D The region from depth position Zd4 to depth position Zf in the example is large. The range of the adjacent region 240 can be adjusted according to the interval of the hydrogen chemical concentration peaks 103 disposed on the side of the upper surface 21 of the flat portion 250. The adjacent region 240 can occupy more than 30% or more of the buffer zone 20 (Zd1 to Zf) in the depth direction, or it can occupy more than 50%. In addition, the width (Zf-Zd4) of the adjacent region 240 in the depth direction can be greater than the width (Zd4-Zd3) of the flat portion 250 in the depth direction. The width (Zf-Zd4) can be more than 2 times, more than 3 times, or more than 5 times the width (Zd4-Zd3).

[0233] The doping concentration distribution in the adjacent region 240 is approximated by a straight line 230. Straight line 230 can be calculated using methods such as least squares. The slope α of straight line 230 in the adjacent region 240 can be expressed using a semi-logarithmic slope. Let the position of one end of the adjacent region 240 be x1 [cm], and the position of the other end be x2 [cm]. Figure 12E In the example, x1 corresponds to depth position Zd4, and x2 corresponds to depth position Zf. The doping concentration at x1 is set to N1. 3 Set the doping concentration at x2 to N2[ / cm] 3 The slope α of line 230 is given by the following formula.

[0234] α=(|log 10 (N2)-log 10 (N1)|) / (|x2-x1|)

[0235] In this example, the slope α of the straight line 230 can be 20 ( / cm) or more and 200 ( / cm) or less. The slope α can be 40 ( / cm) or more, or 60 ( / cm) or more. The slope α can be 180 ( / cm) or less, or 160 ( / cm) or less. By making the slope α of the straight line 230 gentler, the expansion of the depletion layer (space charge region) reaching the adjacent region 240 during the switching of the semiconductor device 100 can be made gentler.

[0236] Figure 12F This is a diagram illustrating other examples of processes in the manufacturing method of the semiconductor device 100. The manufacturing method in this example is similar to... Figure 12B The difference in this example is that the lower surface side region formation stage S1204 is performed after the first annealing stage S1208 and before the second ion implantation stage S1210. Other processes are the same as... Figure 12B The examples are the same.

[0237] It should be noted that the first ion implantation stage S1206 may include the steps S1601 to S1604 described later. In this case, the doping concentration peak 25 closest to the lower surface 23 can be formed without defects in the buffer 20. Therefore, even if the collector region 22 is formed in the lower surface side region formation stage S1204 after the first ion implantation stage S1206, the problem of the depletion layer reaching the collector region 22 as described later will not occur.

[0238] Figure 12G This is a diagram illustrating other examples of processes in the manufacturing method of the semiconductor device 100. The manufacturing method in this example is similar to... Figure 12BThe difference in this example is that the lower surface side region formation stage S1204 is performed after the second annealing stage S1212 and before the lower surface electrode formation stage S1214. Other processes are the same as... Figure 12B The examples are the same.

[0239] In this example, the first ion implantation stage S1206 may also include the steps S1601 to S1604 described later. In this case, the doping concentration peak 25 closest to the lower surface 23 can be formed without defects in the buffer 20. Therefore, even if the collector region 22 is formed in the lower surface side region formation stage S1204 after the first ion implantation stage S1206, the problem of the depletion layer reaching the collector region 22 as described later will not occur.

[0240] Figure 13 This example illustrates the carrier concentration distribution and helium chemistry concentration distribution in buffer 20 of the comparative example. Buffer 20 in this example has only one injection point. 3 The peak of helium chemical concentration formed by He. Additionally, in Figure 13 In the diagram, solid lines represent the carrier concentration distribution without helium injection, and dashed lines represent the carrier concentration distribution with helium injection. The carrier concentration distribution without helium injection is compared with... Figure 5A The doping concentration distribution is the same in all of them.

[0241] In this example, a single helium chemical concentration peak is set in buffer 20. Therefore, it becomes difficult to control the distribution of lifetime inhibitors. Furthermore, with a large half-width of the helium chemical concentration peak, the carrier concentration distribution varies over a wider range compared to the case without helium injection. In contrast, in Figures 1 to 12B In the example, because multiple helium chemical concentration peaks are configured in buffer 20, the distribution of lifetime inhibitors can be adjusted with high precision. Furthermore, by reducing the half-width of the helium chemical concentration peaks, variations in carrier concentration distribution over a wider range can be suppressed.

[0242] (Second Embodiment)

[0243] Figure 14 This is a diagram showing other examples of the ee cross-section. The method of forming the buffer 20 of the semiconductor device 100 in this example is similar to... Figures 1 to 13 This differs from the first embodiment described herein. The method for forming the buffer 20 will be described later. Other parts are the same as in the first embodiment. It should be noted that the semiconductor device 100 in this example may or may not have a lower surface-side lifetime inhibitor 220 provided in the buffer 20. That is, the buffer 20 may or may not have a helium chemical concentration peak 221 provided.

[0244] Figure 15 It is shown Figure 14 A diagram illustrating an example of the doping concentration distribution and hydrogen chemical concentration distribution at the FF line. The doping concentration distribution and hydrogen chemical concentration distribution can be compared with... Figure 5A The examples are the same. It should be noted that, although in Figure 15 The image shows an example where the doping concentration peaks in the doping concentration distribution can be clearly observed, but compared to... Figure 5A Similarly, any doping concentration peak may not be clearly observed.

[0245] Figure 16 This is a diagram illustrating an example of how buffer 20 is formed. Figure 16 The diagram illustrates the implantation process of injecting dopant into buffer 20. First, an N-type first dopant is injected from the implantation surface of the semiconductor substrate 10 to a first implantation location (S1601). In this example, the implantation surface is the lower surface 23, and the first implantation location is... Figure 5A The depth position is Zd1 (or Zh1) as described in the diagram. Additionally, the first dopant is, for example, a hydrogen ion or a phosphorus ion.

[0246] After implanting the first dopant, an N-type second dopant is implanted from the implantation surface (lower surface 23 in this example) of the semiconductor substrate 10 to a second implantation location at a distance greater than that of the first implantation location from the implantation surface (S1602). In this example, the second implantation location is... Figure 5A The depth position is Zd2 (or Zh2) as described in the diagram. Additionally, the second dopant is, for example, a hydrogen ion or a phosphorus ion. The second dopant can be the same element as the first dopant. For example, both the first and second dopants are hydrogen ions. In other examples, one of the first and second dopants can be a phosphorus ion, and the other can be a hydrogen ion.

[0247] After implanting the second dopant, an N-type third dopant is implanted from the implantation surface (lower surface 23 in this example) of the semiconductor substrate 10 to a third implantation location at a distance greater than that of the second implantation location from the implantation surface (S1603). In this example, the third implantation location is... Figure 5A The depth position is Zd3 (or Zh3) as described in the diagram. Additionally, the third dopant is, for example, a hydrogen ion or a phosphorus ion. The third dopant can be the same element as the first or second dopant. For example, the first, second, and third dopants are all hydrogen ions. In other examples, some of the first, second, and third dopants can be hydrogen ions, and some can be phosphorus ions.

[0248] After implanting the third dopant, an N-type fourth dopant is implanted from the implantation surface (lower surface 23 in this example) of the semiconductor substrate 10 to a fourth implantation site at a distance greater than that of the third implantation site (S1604). In this example, the fourth implantation site is located at... Figure 5A The depth position is Zd4 (or Zh4) as described in the diagram. Additionally, the fourth dopant is, for example, a hydrogen ion or a phosphorus ion. The fourth dopant can be the same element as the first, second, or third dopant. For example, the first, second, third, and fourth dopants are all hydrogen ions. In other examples, some of the first, second, third, and fourth dopants can be hydrogen ions, and some can be phosphorus ions.

[0249] In the implantation process, three or more N-type dopants, including a first dopant and a second dopant, can be implanted from the implantation surface of the semiconductor substrate 10 at implantation sites of different depths. Although in Figure 16 In the example, the dopant was injected at four depths, but it is sufficient to inject the dopant at two or more depths.

[0250] When dopant is implanted into the semiconductor substrate 10, foreign matter such as particles may sometimes adhere to the implantation surface. If dopant is further implanted from the implantation surface while foreign matter is attached to it, the dopant may be blocked by the foreign matter, preventing high-precision implantation. In particular, when the distance between the depth of the implanted dopant and the implantation surface is short, the acceleration energy of the dopant is low, making it easier for the dopant to be blocked by foreign matter.

[0251] In this example, after the first dopant is implanted, the second dopant is implanted at a deeper location. Therefore, even if foreign matter adheres to the implantation surface during the second dopant implantation process (S1602), it will not affect the implantation of the first dopant. Thus, the implantation of the first dopant with relatively low acceleration energy can be performed with high precision.

[0252] In the implantation process, it is preferable to implant the dopant that is implanted first among the plurality of dopants implanted into the buffer 20 at the implantation position closest to the lower surface 23 of the semiconductor substrate 10. In this example, the first dopant is implanted first, and this first dopant is implanted at the implantation position closest to the lower surface 23. This allows for high-precision implantation of the first dopant with the lowest acceleration energy. In other examples, the buffer 20 may include dopants implanted after the first dopant and closer to the lower surface 23 than the first dopant.

[0253] Furthermore, during the implantation process, the dopant implanted last among the multiple dopants implanted into the buffer 20 can be the one implanted at the implantation position furthest from the lower surface 23 of the semiconductor substrate 10. In this example, the fourth dopant is implanted last, and this fourth dopant is implanted at the implantation position furthest from the lower surface 23. This allows for the high-precision implantation of each dopant with an acceleration energy lower than that of the fourth dopant.

[0254] In addition, such as Figure 16 As shown, in the implantation process, dopants can be implanted sequentially starting from the implantation position closest to the lower surface 23 of the semiconductor substrate 10. Therefore, implantation can begin sequentially with dopants that have low acceleration energy, thus enabling high-precision implantation of each dopant.

[0255] It should be noted that the distance between the depth position Zd4, which is the farthest from the lower surface 23 of the semiconductor substrate 10 among the multiple dopant injection sites injected into the buffer 20, and the lower surface 23 of the semiconductor substrate 10 can be less than half the thickness of the semiconductor substrate 10. That is, the depth position Zd4 is located at the central position Zc of the semiconductor substrate 10 (refer to...). Figure 4A Between the lower surface 23 and the lower surface 24. In the manufacturing process of the semiconductor device 100, dopants of the same conductivity type can be implanted sequentially starting from the dopant closest to the implantation surface. The dopants of the same conductivity type are dopants implanted from the same implantation surface (lower surface 23 in this example) to the region of the semiconductor substrate 10 on the implantation surface side (lower surface 23 side in this example).

[0256] Furthermore, from a top-down view, the area where the first dopant is implanted can be the same as the area where the second dopant is implanted. During the implantation process, the implantation area of ​​all first conductivity type dopants implanted into the buffer 20 can be the same.

[0257] Figure 17 This is a diagram showing the cross-sectional shape of the collector region 22 in the comparative example. In this example, dopants are sequentially implanted for the buffer zone 20, starting from a position farthest from the lower surface 23. In this case, dopants with shallow implantation sites and low acceleration energies, such as the first dopant, are sometimes masked by particles on the implantation surface. If the first dopant is locally masked, it results in a local absence of the doping concentration peak 25-1 in the XY plane.

[0258] If the doping concentration peak 25-1 is locally absent, the donor concentration in that region becomes lower, making it easier for collector region 22 to enter. As a result, if... Figure 17As shown, an upwardly protruding portion is formed in a part of the collector region 22. Therefore, when the semiconductor device 100 is turned off, the depletion layer extending from the lower end of the base region 14 can easily reach the collector region 22. In the transistor section 70, a p-type collector region 22 is formed on the lower surface 23 of the semiconductor substrate 10. In addition, collector regions 22 are sometimes also formed on the lower surface 23 in a part of the edge terminal structure section 90 and the diode section 80. Thus, if the doping concentration peak 25-1 is locally absent in the region where the p-type collector region 22 is formed on the lower surface 23, the breakdown voltage will decrease.

[0259] Figure 18 This is a graph showing the results of a withstand voltage test on a semiconductor device. Figure 18 The horizontal axis represents the voltage applied between the emitter and collector of a semiconductor device in the off state, and the vertical axis represents the current flowing between the emitter and collector of the semiconductor device. Figure 17 In the comparative example semiconductor device described above, a relatively large emitter-collector current Ices flows when the emitter-collector voltage Vce is below 1400V. In contrast, in the semiconductor device 100 of the embodiment, even when the emitter-collector voltage Vce is around 1600V, a relatively large emitter-collector current Ices does not flow. That is, compared to the comparative example, the semiconductor device 100 of the embodiment has a higher withstand voltage.

[0260] Figure 19 This is a graph showing the results of a withstand voltage test on a semiconductor device. Figure 19 The table shows the number of semiconductor devices that failed the withstand voltage test. In the withstand voltage test, semiconductor devices failing below a predetermined withstand voltage were deemed defective. Figure 19 In addition to Figure 17 In addition to the semiconductor device 100 of the comparative example and embodiment shown, test results of a semiconductor device of a reference example in which each dopant was implanted after cleaning the implantation surface are also shown. In the reference example, dopant was implanted into the buffer 20 in the same implantation sequence as in the comparative example, and the implantation surface was cleaned with water each time a dopant was implanted.

[0261] like Figure 19 As shown, according to the embodiment, compared to the comparative example, the number of defects can be significantly reduced without changing the design of the concentration distributions in the buffer 20. Furthermore, even compared to the reference example with a cleaned injection surface, the embodiment can reduce the number of defects. As described above, in the semiconductor device 100 where a p-type collector region 22 is formed on the lower surface 23, the number of breakdown voltage defects can be significantly reduced.

[0262] Figure 20 This is a diagram illustrating another example of the semiconductor device 100. Figures 14 to 16The example described illustrates a buffer 20 having multiple doping concentration peaks 25. In this example, the accumulation region 16 of the semiconductor device 100 has multiple doping concentration peaks 25. Figure 20 The implantation process for dopant in accumulation region 16 is described below. Buffer zone 20 may have [a function that allows for [something] with [something] Figures 14 to 16 For example, multiple doping concentration peaks 25 formed in the same process may not have multiple doping concentration peaks 25.

[0263] In the implantation process of implanting dopant into accumulation region 16, it is possible to... Figures 14 to 16 The dopant is injected in the same order as the dopant injection procedure described in the previous section for buffer 20. It should be noted that in this example, the dopant is injected in the same order as the dopant injection procedure for buffer 20. Figures 14 to 16 The difference in this example is that the injection surface is the upper surface 21, and the reference position for each dopant injection site is the upper surface 21. Other details can be found in... Figures 14 to 16 The examples are the same. For example, in Figure 16 In the description of the injection process, "buffer zone 20" can be renamed "accumulation zone 16" and "lower surface 23" can be renamed "upper surface 21".

[0264] exist Figure 20 In this example, firstly, an N-type first dopant is implanted from the implantation surface of the semiconductor substrate 10 at a first implantation location (S2001). In this example, the implantation surface is the upper surface 21. Furthermore, the first implantation location is a position away from the upper surface 21 at a distance of Zd1 or Zh1. Additionally, the first dopant is, for example, hydrogen ions or phosphorus ions.

[0265] After implanting the first dopant, an N-type second dopant is implanted from the implantation surface (upper surface 21 in this example) of the semiconductor substrate 10 to a second implantation location, the second implantation location being at a greater distance from the implantation surface than the first implantation location (S2002). In this example, the second implantation location is a position away from the upper surface 21 at a distance of Zd2 or Zh2. In this example, the first depth location (first implantation location) for implanting the first dopant and the second depth location (second implantation location) for implanting the second dopant are disposed within the accumulation region 16. Furthermore, the second dopant is, for example, a hydrogen ion or a phosphorus ion. The second dopant can be the same element as the first dopant. For example, both the first and second dopants are hydrogen ions. In other examples, one of the first and second dopants can be a phosphorus ion, and the other can be a hydrogen ion.

[0266] exist Figure 20In this example, although the accumulation region 16 has two doping concentration peaks 25, the number of doping concentration peaks 25 only needs to be two or more. According to this example, after implanting the first dopant, the second dopant is implanted at a deeper location. Therefore, even if foreign matter adheres to the implantation surface during the second dopant implantation process (S2002), it will not affect the implantation of the first dopant. Therefore, the implantation of the first dopant with relatively low acceleration energy can be performed with high precision.

[0267] Figure 21 This is a diagram illustrating another example of the manufacturing process of the semiconductor device 100. In this example, in Figure 16 Prior to the implantation process described herein, a region formation process S2101 is performed. Furthermore, any dopant implanted into the buffer 20 is a hydrogen ion. At least one of the first and second dopants with relatively high doping concentrations can be a hydrogen ion. Alternatively, other dopants can also be hydrogen ions.

[0268] In the through-region formation process S2101, charged particles are injected from the lower surface 23. The charged particles are hydrogen ions, helium ions, electron beams, etc. The range of the charged particles is more than half the thickness of the semiconductor substrate 10. The range of the charged particles can be greater than the thickness of the semiconductor substrate 10. The region of the semiconductor substrate 10 through which the charged particles pass is called the through-region. The through-region can include more than half of the drift region 18 in the depth direction, or it can include the entire drift region 18.

[0269] In the region through which charged particles pass in the semiconductor substrate 10, lattice defects, primarily composed of single-atom vacancies (V) and multi-atom vacancies (VV), are formed due to the passage of charged particles. Atoms adjacent to vacancies possess dangling bonds. Lattice defects may also include interlattice atoms and / or dislocations, and broadly may include donors and / or acceptors. However, in this specification, lattice defects primarily composed of vacancies are sometimes referred to as vacancy-type lattice defects, or simply lattice defects. In this specification, the concentration of vacancy-type lattice defects is sometimes referred to as vacancy concentration. Furthermore, the large-scale formation of lattice defects due to charged particle implantation into the semiconductor substrate 10 results in a highly disordered crystallinity of the semiconductor substrate 10. In this specification, this disordered crystallinity is sometimes referred to as disorder.

[0270] After the region formation process S2101, the implantation process S2103 is performed. Between the region formation process S2101 and the implantation process S2103, an annealing process S2102 for annealing the semiconductor substrate 10 may also be performed.

[0271] Injection process S2103 includes Figure 16The steps S1601 to S1604 are described above. In the injection step S2103, hydrogen ions are injected into at least one depth position of the buffer 20. Therefore, the buffer 20 contains hydrogen.

[0272] Following the implantation process S2103, a hydrogen diffusion process S2104 is performed. In the hydrogen diffusion process S2104, hydrogen from the buffer zone 20 diffuses into the passage region by annealing the semiconductor substrate 10. The annealing temperature of the hydrogen diffusion process S2104 can be below the annealing temperature in the annealing process S2102.

[0273] Oxygen is present throughout the semiconductor substrate 10. This oxygen is intentionally or unintentionally introduced during the fabrication of the semiconductor ingot. Inside the semiconductor substrate 10, hydrogen (H), vacancies (V), and oxygen (O) combine to form VOH defects. Furthermore, by allowing hydrogen to diffuse after the formation of the through region, lattice defects in the through region combine with hydrogen, promoting the formation of VOH defects. VOH defects function as electron donors. In this specification, VOH defects are sometimes simply referred to as hydrogen donors.

[0274] In the semiconductor substrate 10 of this example, hydrogen donors are formed in the hydrogen ion passage region. The hydrogen donors in the passage region are formed by hydrogen terminating the dangling bonds of vacancy-type lattice defects formed in the passage region and combining with oxygen. Therefore, the doping concentration distribution of the hydrogen donors in the passage region can follow the vacancy concentration distribution. The chemical concentration of hydrogen in the passage region can be more than 10 times, or more than 100 times, the vacancy concentration formed in the passage region. The hydrogen in the passage region can be hydrogen remaining after hydrogen ions pass through, or hydrogen diffused from the hydrogen supply source described later. The doping concentration of hydrogen donors is lower than the chemical concentration of hydrogen. If the ratio of the doping concentration of hydrogen donors to the chemical concentration of hydrogen is defined as the activation rate, the activation rate can be a value of 0.1% to 30%. In this example, the activation rate is 1% to 5%.

[0275] By forming hydrogen donors in the passage regions of the semiconductor substrate 10, the donor concentration in the passage regions can be made higher than the bulk donor concentration. Typically, the semiconductor substrate 10 must be prepared with a predetermined bulk donor concentration, corresponding to the characteristics of the device to be formed on the semiconductor substrate 10, particularly corresponding to the rated voltage or withstand voltage. In this case, such as in... Figure 4A As explained, the doping concentration of drift region 18 is approximately equal to the bulk donor concentration. In contrast, according to... Figure 21The semiconductor device 100 shown can adjust the donor concentration of the semiconductor substrate 10 by controlling the dosage of charged particles or hydrogen ions. Therefore, a semiconductor device 100 having a drift region 18 with a predetermined doping concentration can be manufactured using a semiconductor substrate with a bulk donor concentration that does not correspond to the characteristics of the device. Although the deviation in bulk donor concentration during the manufacture of the semiconductor substrate 10 is relatively large, the dosage of hydrogen ions can be controlled with relatively high precision. Therefore, the concentration of lattice defects generated by hydrogen ion implantation can also be controlled with high precision, and the donor concentration in the transmission region can be controlled with high precision.

[0276] It should be noted that, in Figure 21 In the example, the injection step S2103 is performed after the region formation step S2101. In other examples, the region formation step S2101 may also be performed between the injection step S2103 and the hydrogen diffusion step S2104.

[0277] Figure 22 It is shown Figure 21 A diagram illustrating an example of the doping concentration distribution and hydrogen chemical concentration distribution of the semiconductor device 100 shown. Figure 22 The middle shows with Figure 3 The concentration distribution at the location corresponding to the FF line is shown. In this example, during the region formation process S2101, charged particles are injected into the semiconductor substrate 10 with a range greater than the thickness of the semiconductor substrate 10. That is, most of the charged particles penetrate the semiconductor substrate 10.

[0278] As described above, lattice defects are formed inside the semiconductor substrate 10 in the regions through which charged particles pass. In this example, the entire semiconductor substrate 10 passes through these regions. Then, in the hydrogen diffusion process S2104, hydrogen diffused from the buffer zone 20 combines with the lattice defects to form VOH defects. Therefore, the doping concentration in the passing regions becomes higher than the bulk donor concentration D0.

[0279] Furthermore, the hydrogen chemical concentration can decrease monotonically from the buffer zone 20 toward the upper surface 21, remain flat, or increase monotonically. For example, when hydrogen ions are implanted as charged particles in the zone formation process S2101, the hydrogen chemical concentration can increase monotonically from the buffer zone 20 toward the upper surface 21. The doping concentration can also decrease monotonically from the buffer zone 20 toward the upper surface 21, remain flat, or increase monotonically.

[0280] (Third Embodiment)

[0281] Figure 23 This is a diagram showing other examples of the ee cross-section. In this example, the semiconductor device 100 and... Figures 1 to 22The difference between the examples described is that the buffer 20 has multiple doping concentration peaks 25 and multiple lower surface-side lifetime inhibitors 220. The structure and formation method of the multiple doping concentration peaks 25 are the same as those in... Figures 14 to 22 The second embodiment described herein is identical. Furthermore, the structure and formation method of the plurality of lower surface-side lifetime inhibitors 220 are the same as those described herein. Figures 1 to 13 The first embodiment described herein is the same. Buffer 20 is the same as... Figures 1 to 13 The first embodiment described also has multiple helium chemical concentration peaks 221 corresponding to multiple lower surface-side lifetime inhibitors 220. The structure, except for the buffer zone 20, is similar to that in... Figures 1 to 22 The same as any of the examples described herein.

[0282] Figure 24 It is shown Figure 23 The diagram illustrates an example of a method for forming the buffer 20. In this example, firstly, in implantation step S2401, dopants such as hydrogen ions are implanted into multiple depth locations of the buffer 20. Implantation step S2401 includes... Figure 16 The process described in Sections S1601 to S1604.

[0283] Next, in the first annealing process S2402, the semiconductor substrate 10 is annealed. As a result, multiple doping concentration peaks 25 can be formed in the buffer zone 20.

[0284] Next, in the helium implantation step S2403, helium ions are implanted from the lower surface 23 to different depth positions in the buffer zone 20. In the helium implantation step S2403, helium ions can be implanted sequentially starting from the depth position closest to the lower surface 23. In other examples, helium ions can be implanted in a different order. In the helium implantation step S2403, helium ions can also be implanted sequentially starting from the depth position farthest from the lower surface 23. Even in the case of a local absence of the helium chemical concentration peak 221, a condition similar to... Figure 17 The protrusion of the collector region 22 as shown. In addition, by performing the implantation process S2401 before the helium implantation process S2403, it is possible to prevent the dopant in the implantation process S2401 from being obscured by foreign matter attached to the implantation surface in the helium implantation process S2403.

[0285] After the helium implantation process S2403, a second annealing process S2404 can be performed to anneal the semiconductor substrate 10. This allows hydrogen to be used to terminate excess lattice defects and the like generated in the helium implantation process S2403. The annealing temperature of the second annealing process S2404 can be lower than the annealing temperature of the first annealing process S2402.

[0286] In this example, helium injection step S2403 is performed after injection step S2401. In other examples, injection step S2401 may also be performed after helium injection step S2403. Preferably, an annealing step is performed after each injection step.

[0287] While the present invention has been described above using embodiments, its technical scope is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications or alterations can be made to the above embodiments. As can be seen from the claims, such modifications or alterations can also be included within the technical scope of the present invention.

[0288] It should be noted that the execution order of actions, processes, steps, and stages in the apparatus, system, program, and method shown in the claims, specification, and drawings can be implemented in any order unless specifically stated as "earlier than" or "before," and unless the results of previous processes are used in subsequent processes. Even if the flow of actions in the claims, specification, and drawings is described using terms such as "firstly" or "next" for convenience, this does not mean that they must be implemented in this order.

Claims

1. A method for manufacturing a semiconductor device, characterized in that, It is a method for manufacturing semiconductor devices with semiconductor substrates. The semiconductor substrate has: a drift region of a first conductivity type; and a buffer zone disposed between the drift region and the implantation surface of the semiconductor substrate, wherein the buffer zone has a higher doping concentration than the drift region. The method for manufacturing the semiconductor device includes the following implantation step: A first dopant of a first conductivity type is injected from the implantation surface of the semiconductor substrate at a first implantation location in the buffer. After the first dopant is injected, a second dopant of the first conductivity type is injected from the implantation surface of the semiconductor substrate at a second implantation location in the buffer. The second implantation location is a location at a greater distance from the implantation surface than the first implantation location. At least one of the first dopant and the second dopant is a hydrogen ion. The method for manufacturing the semiconductor device further comprises: By means of a region forming process, charged particles are injected from the injection surface with a range of more than half the thickness of the semiconductor substrate, thereby forming a passing region, which is the area of ​​the semiconductor substrate through which the charged particles pass. as well as The hydrogen diffusion process is carried out by annealing the semiconductor substrate after the through-region formation process and the implantation process.

2. The method for manufacturing a semiconductor device according to claim 1, characterized in that, The first dopant and the second dopant are dopants of the same element.

3. The method for manufacturing a semiconductor device according to claim 2, characterized in that, The first dopant and the second dopant are hydrogen ions.

4. The method for manufacturing a semiconductor device according to claim 1, characterized in that, One of the first dopant and the second dopant is a phosphorus ion, and the other is a hydrogen ion.

5. The method for manufacturing a semiconductor device according to claim 1, characterized in that, In the implantation process, three or more dopants of the first conductivity type, including the first dopant and the second dopant, are implanted from implantation sites at different depths on the implantation surface of the semiconductor substrate towards the buffer. In the implantation process, the dopant among the three or more dopants is implanted first at the implantation position closest to the implantation surface of the semiconductor substrate.

6. The method for manufacturing a semiconductor device according to claim 5, characterized in that, In the implantation process, the last of the three or more dopants is implanted at the implantation position furthest from the implantation surface of the semiconductor substrate.

7. The method for manufacturing a semiconductor device according to claim 6, characterized in that, In the implantation process, the dopant is implanted sequentially starting from the implantation position closest to the implantation surface of the semiconductor substrate.

8. A method for manufacturing a semiconductor device according to any one of claims 5 to 7, characterized in that, The distance between the implantation position furthest from the implantation surface of the semiconductor substrate among the three or more implantation positions of the dopant and the implantation surface of the semiconductor substrate is less than half the thickness of the semiconductor substrate.

9. The method for manufacturing a semiconductor device according to claim 1, characterized in that, The semiconductor substrate has a collector region of a second conductivity type disposed between the buffer zone and the injection surface. The current collector region is formed after the injection process.

10. The method of manufacturing a semiconductor device according to claim 1 or 9, characterized in that, The method for manufacturing the semiconductor device also includes a helium injection step of injecting helium ions into the buffer.

11. The method for manufacturing a semiconductor device according to claim 10, characterized in that, In the helium injection process, helium ions are injected into different depth locations in the buffer zone.

12. The method for manufacturing a semiconductor device according to claim 10, characterized in that, The method for manufacturing the semiconductor device further comprises: The first annealing process involves annealing the semiconductor substrate after the implantation process and before the helium implantation process; and The second annealing process involves annealing the semiconductor substrate after the helium implantation process.

13. The method for manufacturing a semiconductor device according to claim 11, characterized in that, The method for manufacturing the semiconductor device further comprises: The first annealing process involves annealing the semiconductor substrate after the implantation process and before the helium implantation process; and The second annealing process involves annealing the semiconductor substrate after the helium implantation process.

14. A method for manufacturing a semiconductor device according to any one of claims 1 to 7 and 9, characterized in that, From a top view, the area where the first dopant is injected is the same as the area where the second dopant is injected.

15. The method for manufacturing a semiconductor device according to claim 1, characterized in that, The through-region formation process is performed before the injection process.

16. The method of manufacturing a semiconductor device according to claim 1 or 15, characterized in that, The range of the charged particles is greater than the distance between the second injection position and the injection surface.

17. The method for manufacturing a semiconductor device according to claim 15, characterized in that, The method for manufacturing the semiconductor device further includes an annealing step after the through-region formation step and before the implantation step, in which the semiconductor substrate is annealed.

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