An address generation method, apparatus, device, and storage medium

Abstract

This application relates to an address generation method, apparatus, device, and storage medium. The main technical solution includes: obtaining an initial interface address of an extender, the initial interface address comprising multiple bytes of data; obtaining first location data from multiple general-purpose input / output ports; obtaining second location data from a complex programmable logic device; determining first byte data and second byte data based on the first location data and second location data respectively; and determining the first byte data, second byte data, and initial interface address based on the first byte data, second byte data, and initial interface address. This application can accurately and effectively generate a fixed interface address for the extender, avoiding different extenders generating the same interface address.

Description

Technical Field

[0001] This application relates to the field of storage device technology, and in particular to an address generation method, apparatus, device and storage medium. Background Technology

[0002] Since the number of hard drives that a Central Processing Unit (CPU) can directly connect to is limited, storage servers introduce Serial Attached SCSI Expanders (SAS) for hard drive expansion. In the system, SAS addresses are used to distinguish different SAS devices. The same SAS address cannot exist within the same SAS domain; identical SAS addresses will cause conflicts, preventing normal device access. Therefore, accurately and effectively generating SAS addresses for expanders is crucial for the stable operation of the devices. Summary of the Invention

[0003] Based on this, this application provides an address generation method, apparatus, device, and storage medium that can accurately and effectively generate the interface address of the extender.

[0004] Firstly, an address generation method is provided, applied to an address generation system. The system includes at least one expander, multiple general-purpose input / output ports, and a complex programmable logic device (CPLD). The expander connects to peripheral components via the multiple general-purpose input / output ports and to the CPLD via an I2C bus. The method includes:

[0005] Get the initial interface address of the extender, which includes multiple bytes of data;

[0006] First position data is obtained from multiple general-purpose input / output ports, and second position data is obtained from complex programmable logic devices;

[0007] The first byte of data and the second byte of data are determined based on the first position data and the second position data, respectively.

[0008] Based on the first byte of data, the second byte of data, and the initial interface address, generate the fixed interface address of the extender.

[0009] According to one feasible method in an embodiment of this application, a fixed interface address of the extender is generated based on the first byte data, the second byte data, and the initial interface address, including:

[0010] The initial interface address is broken down into multiple bytes, with each byte corresponding to one byte of data;

[0011] Modify the byte data of the first preset byte of the initial interface address to the first byte data, and modify the byte data of the second preset byte to the second byte data;

[0012] By integrating the byte data corresponding to each byte of the modified initial interface address, the fixed interface address of the extender is obtained.

[0013] According to one feasible method in an embodiment of this application, determining the first byte data and the second byte data based on the first position data and the second position data respectively includes:

[0014] The first position data and the second position data are converted into preset format data respectively to obtain the first byte data and the second byte data.

[0015] According to one feasible method in an embodiment of this application, first position data is obtained from multiple general-purpose input / output ports, including:

[0016] Obtain the status data of each general-purpose input / output port;

[0017] Determine the first position data based on the status data.

[0018] According to one achievable method in an embodiment of this application, the method further includes:

[0019] An alarm message is generated when the first position data and the second position data exceed a preset range, or when the first byte data and the second byte data of the extender are different.

[0020] According to one possible implementation method in the embodiments of this application, the first preset byte is the second byte, and the second preset byte is the third byte.

[0021] Secondly, an address generation device is provided, which is applied to an address generation system. The system includes at least one expander, multiple general-purpose input / output ports, and a complex programmable logic device. The expander connects to peripheral components through the multiple general-purpose input / output ports and connects to the complex programmable logic device through an I2C bus. The device includes:

[0022] The acquisition module is used to obtain the initial interface address of the extender, which includes multiple bytes of data.

[0023] The acquisition module is also used to acquire first position data from multiple general-purpose input / output ports and second position data from complex programmable logic devices;

[0024] The determining module is used to determine the first byte data and the second byte data based on the first position data and the second position data, respectively.

[0025] The generation module is used to generate the fixed interface address of the extender based on the first byte of data, the second byte of data, and the initial interface address.

[0026] According to one feasible embodiment of this application, the generation module is specifically used for:

[0027] The initial interface address is broken down into multiple bytes, with each byte corresponding to one byte of data;

[0028] Modify the byte data of the first preset byte of the initial interface address to the first byte data, and modify the byte data of the second preset byte to the second byte data;

[0029] By integrating the byte data corresponding to each byte of the modified initial interface address, the fixed interface address of the extender is obtained.

[0030] Thirdly, a computer device is provided, comprising:

[0031] At least one processor; and

[0032] A memory communicatively connected to the at least one processor; wherein,

[0033] The memory stores computer instructions that can be executed by the at least one processor to enable the at least one processor to perform the method involved in the first aspect above.

[0034] Fourthly, a computer-readable storage medium is provided, having stored thereon computer instructions, wherein the computer instructions are used to cause a computer to perform the methods involved in the first aspect above.

[0035] According to the technical content provided in the embodiments of this application, the initial interface address of the extender is obtained. The initial interface address includes multiple bytes of data. First position data is obtained from multiple general-purpose input / output ports, and second position data is obtained from complex programmable logic devices. First byte data and second byte data are determined based on the first position data and the second position data, respectively. Based on the first byte data, the second byte data and the initial interface address, the fixed interface address of the extender can be accurately and effectively generated, avoiding different extenders from generating the same interface address. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the address generation system in one embodiment;

[0037] Figure 2 This is a flowchart illustrating an address generation method in one embodiment;

[0038] Figure 3This is a structural block diagram of an address generation device in one embodiment;

[0039] Figure 4 This is a schematic structural diagram of a computer device in one embodiment. Detailed Implementation

[0040] The present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the scope of the present application.

[0041] Currently, Expander SAS addresses are typically stored in configuration files. However, refreshing the Expander configuration file can easily erase these SAS addresses, necessitating reconfiguration. Since Expanders are often cascaded, writing SAS addresses to individual Expanders in multi-Expander storage systems is cumbersome and inconvenient for maintenance.

[0042] In the existing technology, the configuration of the SAS address can be achieved by obtaining the characteristic information of multiple expanders, namely the general-purpose input / output (GPIO) status of the expander peripheral device, and using the pre-set correspondence, obtaining the SAS address corresponding to the characteristic information in the EEPROM memory to obtain the target SAS address; and saving the target SAS address to the expander.

[0043] The above method for configuring the SAS address still first stores the SAS address in memory, and generates the SAS address by obtaining the location of the expander through a peripheral device type. There is only one byte difference. When a GPIO of an expander connection fails, different expanders may generate the same SAS address.

[0044] To address the problems of the prior art, embodiments of this application provide an address generation method, apparatus, device, and computer storage medium.

[0045] For ease of understanding, the system to which this application applies will first be described. The address generation method provided in this application can be applied to systems such as... Figure 1 The address generation system architecture shown includes: at least one expander 110, multiple general purpose input / output ports (GPIOs) 120, and a complex programmable logic device (CPLD) 130.

[0046] The Expander connects to peripheral components via multiple GPIO120s, which can be buttons, cables, etc. The Expander connects to the CPLD130 via an I2C bus.

[0047] For example, an expander can connect to peripheral components via two GPIO120s and to a CPLD130 via an I2C bus. The expander, along with its connected CPLD130 and two GPIO120s, can be divided into sub-units; four such sub-units can be configured in the address generation system.

[0048] To ensure the GPIO logic functions correctly, an additional GPIO pin can be added. All GPIO pins are used as inputs.

[0049] Figure 2 A flowchart illustrating an address generation method provided in this application embodiment, the method can be performed by, for example... Figure 1 The expander 110 in the system shown is executed. For example... Figure 2 As shown, the method may include the following steps:

[0050] S210, obtain the initial interface address of the extender, which includes multiple bytes of data.

[0051] Throughout the system, due to the numerous SAS devices, a SAS address is needed to uniquely identify each SAS device. A SAS address consists of 8 bytes, which can be split into two 4-byte blocks. The first 4-byte block identifies the manufacturer, and the second 4-byte block, assigned by the manufacturer, distinguishes the device. For example, with address 0x56c92bf00x0102033f, 0x56c92bf0 identifies the manufacturer, and 0x0102033f is the manufacturer-assigned identifier.

[0052] The central processing unit of the storage server interconnects with multiple SAS Expanders via a Host Bus Adapter (HBA) card. Each Expander can connect to multiple hard drives through a hard drive backplane, greatly increasing the capacity of the entire system and enabling massive storage for the server.

[0053] Since multiple Expanders and HBAs reside in the same SAS domain, and this storage server will not connect to any other SAS devices, a fixed SAS address can be automatically generated using location information provided by the peripheral devices.

[0054] The initial interface address is the expander's factory address, including multiple bytes of data. Based on the initial interface address and the expander's location information obtained through peripheral devices, a fixed SAS address is generated for multiple expanders to avoid SAS address conflicts and management inconveniences.

[0055] S220 acquires first position data from multiple general-purpose input / output ports and second position data from complex programmable logic devices.

[0056] There can be three GPIOs, designated GPIO0, GPIO1, and GPIO2. The status of each GPIO is represented as 0 or 1. The status data at GPIO0 and GPIO1 indicates the position of the expander, while GPIO2 indicates whether the status readings of GPIO0 and GPIO1 are normal.

[0057] When GPIO2 is pulled low to 0, it indicates that GPIO0 and GPIO1 are reading normally. As shown in Table 1, the first position data can be 0, 1, 2, or 3, serving as the valid position data for the expander. When GPIO2 is pulled high to 1, it indicates that GPIO0 and GPIO1 are reading abnormally. As shown in Table 2, a random number between 4 and 255 will be used as the position data.

[0058]

[0059]

[0060] Table 1

[0061] Expander location GPIO0 GPIO1 GPIO2 Location data Expander0 0 0 1 Random(4-255) Expander1 0 1 1 Random(4-255) Expander2 1 0 1 Random(4-255) Expander3 1 1 1 Random(4-255)

[0062] Table 2

[0063] The second position data obtained from the CPLD is the same as the first position data, as shown in Table 3. When the reading is normal, the second position data can be 0, 1, 2, or 3. When the reading is abnormal, a random number between 4 and 255 will be used as the position data.

[0064] Expander location Read normal position data Read abnormal location data Expander0 0 Random(4-255) Expander1 1 Random(4-255) Expander2 2 Random(4-255) Expander3 3 Random(4-255)

[0065] Table 3

[0066] By reading the first position data at the GPIO and the second position data at the CPLD, it is possible to avoid different expanders generating the same SAS address and causing system abnormalities when a GPIO of a certain expander connection fails.

[0067] S230, determine the first byte data and the second byte data based on the first position data and the second position data respectively.

[0068] The corresponding byte data is determined based on the position data obtained from different peripheral components. For example, if the first position data read by Expander2 from GPIO is 2, then the first byte data is 0x02. If the second position data read by Expander2 from CPLD is 2, then the second byte data is 0x02.

[0069] If the first bit data read from GPIO by Expander 3 is 3, then the first byte data is 0x03. If the second bit data read from CPLD by Expander 3 is 3, then the second byte data is 0x03.

[0070] S240 generates the fixed interface address of the extender based on the first byte of data, the second byte of data, and the initial interface address.

[0071] The byte data in the preset bytes of the initial interface address is modified to the first and second bytes, thus obtaining the fixed interface address of the Expander, i.e., the fixed SAS address. Using the fixed interface address obtained by the above method, the SAS address is generated using location information obtained from two different peripheral components. When one peripheral component malfunctions, the corresponding byte data in the SAS address based on the location information obtained from the other peripheral component will still differ, resulting in multiple Expander SAS addresses being different. Furthermore, this method does not require any pre-stored data, effectively avoiding the problem of inaccurate Expander SAS addresses due to data loss or corruption.

[0072] As can be seen, the embodiments of this application obtain the initial interface address of the extender, which includes multiple bytes of data, obtain first position data from multiple general-purpose input / output ports, and obtain second position data from complex programmable logic devices. Based on the first position data and the second position data, the first byte data and the second byte data are determined respectively. Based on the first byte data, the second byte data, and the initial interface address, the fixed interface address of the extender can be accurately and effectively generated, avoiding different extenders from generating the same interface address.

[0073] The steps in the above method flow are described in detail below. First, S240, namely "generating the fixed interface address of the extender based on the first byte data, the second byte data, and the initial interface address," will be described in detail with reference to the embodiment.

[0074] As one feasible approach, the initial interface address is decomposed into multiple bytes, with each byte corresponding to one byte of data.

[0075] Modify the byte data of the first preset byte of the initial interface address to the first byte data, and modify the byte data of the second preset byte to the second byte data;

[0076] By integrating the byte data corresponding to each byte of the modified initial interface address, the fixed interface address of the extender is obtained.

[0077] The initial interface address can be decomposed into 8 bytes, with each byte corresponding to one byte of data. Taking the initial interface address 0x56c92bf00x0102033f as an example, it can be decomposed into 8 bytes, as shown in Table 4:

[0078] 8 bytes 7 bytes 6 bytes 5 bytes 4 bytes 3 bytes 2 bytes Byte 1 0x56 0xc9 0x2b 0xf0 0x01 0x02 0x03 0x3f

[0079] Table 4

[0080] The first preset byte can be the second byte, i.e. byte 2 in Table 4, and the second preset byte can be the third byte, i.e. byte 3 in Table 4.

[0081] Modify the byte data corresponding to byte 2 to the first byte data, that is, modify 0x03 to the first byte data. Modify the byte data corresponding to byte 3 to the second byte data, that is, modify 0x02 to the second byte data.

[0082] For example, the first byte of data corresponding to the first position data read by Expander1 from GPIO is 0x01, and the second byte of data corresponding to the second position data read by Expander1 from CPLD is 0x01. Change 0x03 to 0x01, and change 0x02 to 0x01. The modified initial interface address is shown in Table 5.

[0083] 8 bytes 7 bytes 6 bytes 5 bytes 4 bytes 3 bytes 2 bytes Byte 1 0x56 0xc9 0x2b 0xf0 0x01 0x01 0x01 0x3f

[0084] Table 5

[0085] By integrating the byte data corresponding to each byte of the modified initial interface address, the SAS address of Expander1 can be obtained: 0x56c92bf00x0101013f.

[0086] The byte data corresponding to the correct SAS addresses of Expander0-Expander3 are shown in Table 6:

[0087] Location 8 bytes 7 bytes 6 bytes 5 bytes 4 bytes 3 bytes 2 bytes Byte 1 Expander0 0x56 0xc9 0x2b 0xf0 0x01 0x00 0x00 0x3f Expander1 0x56 0xc9 0x2b 0xf0 0x01 0x01 0x01 0x3f Expander2 0x56 0xc9 0x2b 0xf0 0x01 0x02 0x02 0x3f Expander3 0x56 0xc9 0x2b 0xf0 0x01 0x03 0x03 0x3f

[0088] Table 6

[0089] The SAS address generated in the above manner contains location information. This SAS address allows for quick location of the expander and the hard drives mounted on it. For example, if the second and third bytes of the SAS address are both 0x02, then this expander is located on the backplane BP2, facilitating expander management.

[0090] As one possible approach, determining the first byte of data and the second byte of data based on the first position data and the second position data respectively includes:

[0091] The first position data and the second position data are converted into preset format data respectively to obtain the first byte data and the second byte data.

[0092] The default format data is 0x0Y, where Y represents position data. Converting the first and second position data into the default format data allows for faster and more accurate replacement of all bytes corresponding to the default byte when modifying its byte data. This is significantly faster than replacing a single bit within the default byte, effectively preventing incorrect replacement positions.

[0093] According to one feasible method in an embodiment of this application, first position data is obtained from multiple general-purpose input / output ports, including:

[0094] Obtain the status data of each general-purpose input / output port;

[0095] Determine the first position data based on the status data.

[0096] Each expander can connect to 3 GPIOs, and each GPIO has two status data: 0 and 1. The status data of each GPIO is used to indicate the expander's position, and the status data representing the expander's position can be represented as 000, 010, 100, 110, 001, 011, 101, 111. Among them, 000, 010, 100, and 110 represent normal status data, and 001, 011, 101, and 111 represent abnormal status data.

[0097] The first position data is calculated based on these status data. Since the status data at GPIO0 and GPIO1 indicates the position of the expander, and GPIO2 indicates whether the status readings of GPIO0 and GPIO1 are normal, the first position data calculated from 000 is 0, from 010 is 1, from 100 is 2, and from 110 is 3. 001, 011, 101, and 111 are abnormal status data, and the first position data calculated from them is a random number between 4 and 255.

[0098] The SAS address generated using the above method can also be used for fault determination. As one possible approach, the method further includes generating an alarm message when the first location data and the second location data exceed a preset range, or when the first byte data and the second byte data of the extender are different.

[0099] The default range is 0-X, where X represents the number of Expanders in the address generation system.

[0100] When the first position data and the second position data exceed the preset range, it indicates that the position of the non-existent Expander has been calculated based on the position information obtained from the peripheral components.

[0101] The first and second position data of the same Expander are the same. When the first and second byte data of the expander are different, it means that the peripheral components connected to the same Expander have obtained position information to calculate the positions of different Expanders.

[0102] Both of these situations indicate a hardware problem that needs to be investigated. The anomaly should be logged, and an alarm should be generated based on the log information to notify the user to have it repaired promptly.

[0103] It should be understood that, although Figure 2 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated in this application, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Furthermore, Figure 2 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0104] Figure 3 This is a schematic diagram of an address generation device provided in an embodiment of this application. The device can be disposed in... Figure 1 The expander 110 in the system shown is used to perform, for example... Figure 2 The method flow is shown below. Figure 3 As shown, the device may include: an acquisition module 310, a determination module 320, and a generation module 330. The main functions of each component module are as follows:

[0105] The acquisition module 310 is used to acquire the initial interface address of the extender, which includes multiple bytes of data.

[0106] The acquisition module 310 is also used to acquire first position data from multiple general-purpose input / output ports and second position data from complex programmable logic devices;

[0107] The determining module 320 is used to determine the first byte data and the second byte data based on the first position data and the second position data, respectively.

[0108] The generation module 330 is used to generate the fixed interface address of the extender based on the first byte data, the second byte data, and the initial interface address.

[0109] In this embodiment, the fixed interface address of the extender can be generated accurately and effectively, avoiding different extenders from generating the same interface address.

[0110] As one possible approach, module 330 is specifically used for:

[0111] The initial interface address is broken down into multiple bytes, with each byte corresponding to one byte of data;

[0112] Modify the byte data of the first preset byte of the initial interface address to the first byte data, and modify the byte data of the second preset byte to the second byte data;

[0113] By integrating the byte data corresponding to each byte of the modified initial interface address, the fixed interface address of the extender is obtained.

[0114] As one possible approach, module 320 is specifically used to convert the first position data and the second position data into preset format data respectively, to obtain the first byte data and the second byte data.

[0115] As one possible approach, module 310 is specifically used to acquire the status data of each general-purpose input / output port;

[0116] Determine the first position data based on the status data.

[0117] As one possible implementation, the generation module 330 is also used to generate alarm information when the first position data and the second position data exceed a preset range, or when the first byte data and the second byte data of the extender are different.

[0118] As one possible approach, the first preset byte is the second byte, and the second preset byte is the third byte.

[0119] The same or similar parts among the above embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the device embodiments are basically similar to the method embodiments, so the description is relatively simple, and the relevant parts can be referred to the description of the method embodiments.

[0120] According to embodiments of this application, this application also provides a computer device and a computer-readable storage medium.

[0121] like Figure 4 The diagram shown is a block diagram of a computer device according to an embodiment of this application. The term "computer device" is intended to represent various forms of digital computers or mobile devices. The digital computer may include a desktop computer, a portable computer, a workbench, a personal digital assistant, a server, a mainframe computer, and other suitable computers. The mobile device may include a tablet computer, a smartphone, a wearable device, etc.

[0122] like Figure 4 As shown, device 400 includes a computing unit 401, a ROM 402, a RAM 403, a bus 404, and an input / output (I / O) interface 405. The computing unit 401, ROM 402, and RAM 403 are interconnected via the bus 404. The input / output (I / O) interface 405 is also connected to the bus 404.

[0123] The computing unit 401 can execute various processes in the method embodiments of this application according to computer instructions stored in the read-only memory (ROM) 402 or computer instructions loaded from the storage unit 408 into the random access memory (RAM) 403. The computing unit 401 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. The computing unit 401 can include, but is not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. In some embodiments, the methods provided in the embodiments of this application can be implemented as computer software programs, which are tangibly contained in a computer-readable storage medium, such as the storage unit 408.

[0124] RAM 403 can also store various programs and data required for the operation of device 400. Part or all of the computer program can be loaded and / or installed on device 400 via ROM 402 and / or communication unit 409.

[0125] The input unit 406, output unit 407, storage unit 408, and communication unit 409 in device 400 can be connected to I / O interface 405. The input unit 406 can be, for example, a keyboard, mouse, touchscreen, or microphone; the output unit 407 can be, for example, a display, speaker, or indicator light. Device 400 can exchange information and data with other devices through the communication unit 409.

[0126] It should be noted that the device may also include other components necessary for normal operation. It may also include only the components necessary for implementing the solution of this application, without necessarily including all the components shown in the figures.

[0127] Various implementations of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SOCs), payload programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof.

[0128] The computer instructions used to implement the methods of this application can be written in any combination of one or more programming languages. These computer instructions can be provided to the computing unit 401, such that when executed by the computing unit 401, such as a processor, the computer instructions cause the execution of the steps involved in the embodiments of the methods of this application:

[0129] Obtain the initial interface address of the extender, which includes multiple bytes of data. Obtain first position data from multiple general-purpose input / output ports and second position data from complex programmable logic devices. Determine the first byte data and the second byte data based on the first position data and the second position data, respectively. Generate the fixed interface address of the extender based on the first byte data, the second byte data and the initial interface address.

[0130] As one feasible approach, the fixed interface address of the extender is generated based on the first byte data, the second byte data, and the initial interface address. This includes: decomposing the initial interface address into multiple bytes, with each byte corresponding to one byte of data; modifying the byte data of the first preset byte of the initial interface address to the first byte data; modifying the byte data of the second preset byte to the second byte data; and integrating the byte data corresponding to each byte of the modified initial interface address to obtain the fixed interface address of the extender.

[0131] As one possible approach, determining the first byte data and the second byte data based on the first position data and the second position data respectively includes: converting the first position data and the second position data into preset format data respectively to obtain the first byte data and the second byte data.

[0132] One possible approach is to obtain first position data from multiple general-purpose input / output ports, including: obtaining status data from each general-purpose input / output port, and determining the first position data based on the status data.

[0133] As one possible approach, the method further includes generating an alarm message when the first position data and the second position data exceed a preset range, or when the first byte data and the second byte data of the extender are different.

[0134] As one possible approach, the first preset byte is the second byte, and the second preset byte is the third byte.

[0135] The computer-readable storage medium provided in this application can be a tangible medium that can contain or store computer instructions for performing the steps involved in the method embodiments of this application. The computer-readable storage medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, and other forms of storage media.

[0136] The specific embodiments described above do not constitute a limitation on the scope of protection of this application. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. An address generation method, characterized in that, The method is applied to an address generation system, which includes at least one expander, multiple general-purpose input / output ports, and a complex programmable logic device (CPLD). The expander connects to peripheral components through the multiple general-purpose input / output ports and to the CPLD via an I2C bus. The method includes: Obtain the initial interface address of the extender, wherein the initial interface address includes multiple bytes of data; Obtaining first position data from the plurality of general-purpose input / output ports and obtaining second position data from the complex programmable logic device, wherein obtaining the first position data from the plurality of general-purpose input / output ports specifically includes: obtaining state data of each of the general-purpose input / output ports; and determining the first position data based on the state data; The first byte of data and the second byte of data are determined based on the first position data and the second position data, respectively. The fixed interface address of the extender is generated based on the first byte of data, the second byte of data, and the initial interface address.

2. The method according to claim 1, characterized in that, The step of generating the fixed interface address of the extender based on the first byte of data, the second byte of data, and the initial interface address includes: The initial interface address is decomposed into multiple bytes, with each byte corresponding to one byte of data; Modify the byte data of the first preset byte of the initial interface address to the first byte data, and modify the byte data of the second preset byte to the second byte data; By integrating the byte data corresponding to each byte of the modified initial interface address, the fixed interface address of the extender is obtained.

3. The method according to claim 1, characterized in that, The step of determining the first byte data and the second byte data based on the first position data and the second position data respectively includes: The first position data and the second position data are converted into preset format data respectively to obtain the first byte data and the second byte data.

4. The method according to claim 1, characterized in that, The method further includes: An alarm message is generated when the first location data and the second location data exceed a preset range, or when the first byte data and the second byte data of the extender are different.

5. The method according to claim 2, characterized in that, The first preset byte is the second byte, and the second preset byte is the third byte.

6. An address generation device, characterized in that, The device is applied to an address generation system, which includes at least one expander, multiple general-purpose input / output ports, and a complex programmable logic device (CPL). The expander connects to peripheral components through the multiple general-purpose input / output ports and to the CPL via an I2C bus. The device includes: The acquisition module is used to acquire the initial interface address of the extender, wherein the initial interface address includes multiple bytes of data; The acquisition module is further configured to acquire first position data from the plurality of general-purpose input / output ports and second position data from the complex programmable logic device, wherein acquiring the first position data from the plurality of general-purpose input / output ports specifically includes: acquiring state data of each of the general-purpose input / output ports; and determining the first position data based on the state data. The determining module is used to determine the first byte data and the second byte data based on the first position data and the second position data, respectively; The generation module is used to generate the fixed interface address of the extender based on the first byte data, the second byte data, and the initial interface address.

7. The apparatus according to claim 6, characterized in that, The generation module is specifically used for: The initial interface address is decomposed into multiple bytes, with each byte corresponding to one byte of data; Modify the byte data of the first preset byte of the initial interface address to the first byte data, and modify the byte data of the second preset byte to the second byte data; By integrating the byte data corresponding to each byte of the modified initial interface address, the fixed interface address of the extender is obtained.

8. A computer device, comprising: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores computer instructions executable by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the method of any one of claims 1-5.

9. A computer-readable storage medium storing computer instructions thereon, characterized in that, The computer instructions are used to cause the computer to perform the method according to any one of claims 1 to 5.

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