MOSFET structure and method of fabricating the same

By forming a Schottky diode and a superjunction structure in the MOSFET structure, the problems of poor reverse recovery characteristics and low device reliability of silicon carbide MOSFETs are solved, the avalanche capability is improved and the on-state resistance is reduced.

CN115458410BActive Publication Date: 2026-02-10HANGZHOU SILICON-MAGIC SEMICON TECH CO LTD
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Patent Information

Application Number
CN202211248859.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-12
Publication Date
2026-02-10
Estimated Expiration
2042-10-12

AI Technical Summary

Technical Problem

Existing silicon carbide MOSFET structures have poor reverse recovery characteristics and low device reliability. Furthermore, the forward conduction of the body diode can easily cause 'current-on degradation,' leading to a deterioration in device characteristics.

Method used

In a MOSFET structure, a Schottky diode is constructed by forming a Schottky metal layer on the sidewalls of the drift layer and the body region. Optionally, a second conductivity type pillar is formed in the drift layer to construct a superjunction structure, which improves reverse recovery characteristics, suppresses latch-up effects, and enhances avalanche capability.

Benefits of technology

The reverse recovery characteristics of the MOSFET structure are improved, the latch-up effect is suppressed, the avalanche capability of the device is enhanced, and the on-state resistance is reduced under the same breakdown voltage.

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Abstract

The application provides a MOSFET structure and a manufacturing method thereof. The method comprises the following steps: providing a substrate, sequentially forming a drift layer, a body region and a source region on the substrate from bottom to top; forming a gate trench, a gate dielectric layer and a gate conductive layer; forming a source trench; forming a Schottky metal layer; and forming a source metal layer. The Schottky metal layer is formed on the sidewall of the drift layer and the sidewall of the body region, the Schottky metal layer and the drift layer form a Schottky diode, the reverse recovery characteristic of the MOSFET structure is improved, the Schottky metal layer also forms a Schottky contact with the body region, so that there is a potential barrier difference between the source region and the body region (the potential of the body region is reduced), which helps to inhibit the latch-up effect and improve the avalanche capability of the device. In addition, since the sidewall of the body region is entirely covered by the Schottky metal layer, the manufacturing method of the MOSFET structure of the application does not need to form a Schottky contact and an ohmic contact on the sidewall of the body region in two steps, and the process steps are simple.
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Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor, in particular to a MOSFET structure and a manufacturing method thereof. BACKGROUND

[0002] The silicon carbide super-junction MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) utilizes the charge balance technology, which helps to further reduce the resistance of the silicon carbide MOS, but when the super-junction reverse withstand voltage, the electric field of most areas is greater than that of the vertical double-diffused MOSFET (VDMOS), resulting in that when the body diode changes from forward conduction to reverse withstand voltage, the reverse extraction time is short, and the drift region is rapidly depleted, so that the reverse recovery characteristic is very poor. At the same time, the silicon carbide body diode forward conduction is easy to cause "power deterioration", causing the device characteristics to degrade. SUMMARY

[0003] In view of the above problems, the purpose of the present application is to provide a MOSFET structure and a manufacturing method thereof, which is used to solve the problem of poor reverse recovery characteristic and low device reliability of the MOSFET structure in the prior art.

[0004] To achieve the above-mentioned purpose and other related purposes, the present application provides a manufacturing method of a MOSFET structure, comprising the following steps:

[0005] A first conductive type substrate is provided, and a first conductive type drift layer, a second conductive type body region and a first conductive type source region are sequentially formed on the substrate from bottom to top, and the first conductive type is opposite to the second conductive type;

[0006] A gate trench is formed, which vertically penetrates the source region and the body region and extends downward into the drift layer;

[0007] A gate dielectric layer and a gate conductive layer are sequentially formed in the gate trench;

[0008] A source trench is formed, which vertically penetrates the source region and the body region and extends downward into the drift layer, and the source trench is arranged in a horizontal direction and spaced apart from the gate trench;

[0009] A Schottky metal layer is formed in a preset region of the sidewall of the source trench, and the preset region includes the sidewall of the drift layer exposed by the source trench and the sidewall of the body region exposed by the source trench;

[0010] A source metal layer is formed, which is filled into the source trench to electrically connect with the Schottky metal layer and the source region.

[0011] Optionally, the top end of the Schottky metal layer is not lower than the bottom end of the source region.

[0012] Optionally, the method further comprises the following steps: forming a second-conductivity-type column in the drift layer, a bottom surface of the second-conductivity-type column being higher than a bottom surface of the drift layer, wherein the source trench is formed after the second-conductivity-type column is formed, and the source trench penetrates an upper portion of the second-conductivity-type column so that a top surface of the second-conductivity-type column is lower than a top surface of the drift layer.

[0013] Optionally, the forming of the second-conductivity-type column in the drift layer comprises the following steps:

[0014] forming a column region trench in the drift layer, the column region trench being open from a top surface of the drift layer and extending downward but not reaching a bottom surface of the drift layer;

[0015] forming a second-conductivity-type material layer in the column region trench to obtain the second-conductivity-type column.

[0016] Optionally, the method further comprises the following steps: forming a second-conductivity-type doped layer in the drift layer, the second-conductivity-type doped layer being located below a bottom portion of the source trench and vertically penetrating the upper portion of the second-conductivity-type column so that the top surface of the second-conductivity-type column is further lowered, and a doping concentration of the second-conductivity-type doped layer being higher than a doping concentration of the second-conductivity-type column.

[0017] Optionally, the method further comprises the following steps: forming an interlayer dielectric layer on the source region, and forming an opening vertically penetrating the interlayer dielectric layer in the interlayer dielectric layer, a bottom surface of the opening exposing a portion of the top surface of the source region, and the source metal layer further filling into the opening to contact the top surface of the source region close to a side of the source trench.

[0018] The application also provides a MOSFET structure, comprising:

[0019] a first-conductivity-type substrate, a first-conductivity-type drift layer, a second-conductivity-type body region and a first-conductivity-type source region being sequentially stacked from bottom to top, the first-conductivity-type being opposite to the second-conductivity-type;

[0020] a gate trench vertically penetrating the source region and the body region and extending downward into the drift layer, the gate trench being filled with a gate dielectric layer and a gate conductive layer;

[0021] a source trench vertically penetrating the source region and the body region and extending downward into the drift layer, the source trench being horizontally spaced apart from the gate trench;

[0022] a Schottky metal layer being located on a preset region of a sidewall of the source trench, the preset region including a sidewall of the drift layer exposed by the source trench and a sidewall of the body region exposed by the source trench;

[0023] A source metal layer is filled into the source trench to electrically connect with the Schottky metal layer and the source region.

[0024] Optionally, the top end of the Schottky metal layer is not lower than the bottom end of the source region.

[0025] Optionally, a second-conductivity-type column is further included in the drift layer, the second-conductivity-type column is located below the source trench, and the bottom surface of the second-conductivity-type column is higher than the bottom surface of the drift layer.

[0026] Optionally, a second-conductivity-type doped layer is further included in the drift layer, the second-conductivity-type doped layer is located between the source trench and the second-conductivity-type column in the vertical direction, and the doping concentration of the second-conductivity-type doped layer is higher than the doping concentration of the second-conductivity-type column.

[0027] As described above, the method for manufacturing the MOSFET structure of the present application forms the Schottky metal layer on the sidewall of the drift layer and the sidewall of the body region. On the one hand, the Schottky metal layer forms a Schottky diode with the drift layer, which can improve the reverse recovery characteristics of the MOSFET structure. On the other hand, the Schottky metal layer also forms a Schottky contact with the body region, so that there is a potential barrier difference (the potential of the body region is reduced) between the source region and the body region, which helps to suppress the latch-up effect and improve the avalanche capability of the device. In addition, since the sidewall of the body region is entirely covered by the Schottky metal layer, the method for manufacturing the MOSFET structure of the present application does not need to form a Schottky contact and an ohmic contact on the sidewall of the body region in two steps, and the process steps are simple. Further, the method for manufacturing the MOSFET structure of the present application can selectively form a second-conductivity-type column in the drift layer to construct a super-junction structure. On the one hand, the super-junction structure helps to improve the withstand voltage of the device, and under the same withstand voltage capability, the on-state resistance can be reduced by increasing the doping concentration of the drift layer. On the other hand, as a charge balance structure, according to the super-junction charge balance principle, the maximum electric field is always fixed at the position of the second-conductivity-type doped layer above the second-conductivity-type column when the device withstands voltage, which helps to avoid dielectric breakdown at the corner of the gate trench, and at the same time, helps to improve the avalanche capability of the device. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 A schematic diagram of the method for manufacturing the MOSFET structure of the present application is shown.

[0029] Figure 2 A cross-sectional view of the structure obtained after the method for manufacturing the MOSFET structure of the present application forms the first-conductivity-type drift layer on the substrate is shown.

[0030] Figure 3 A cross-sectional view of the structure obtained after the method for manufacturing the MOSFET structure of the present application forms the column region trench in the drift layer is shown.

[0031] Figure 4A cross-sectional view of a structure resulting after forming a second conductivity type material layer in the pillar region trench to obtain a second conductivity type pillar in the fabrication method of the MOSFET structure of the present application.

[0032] Figure 5 A cross-sectional view of a structure resulting after forming a body region and a source region in the fabrication method of the MOSFET structure of the present application.

[0033] Figure 6 A cross-sectional view of a structure resulting after forming a gate trench in the fabrication method of the MOSFET structure of the present application.

[0034] Figure 7 A cross-sectional view of a structure resulting after sequentially forming a gate dielectric layer and a gate conductive layer in the gate trench in the fabrication method of the MOSFET structure of the present application.

[0035] Figure 8 A cross-sectional view of a structure resulting after forming an interlayer dielectric layer on the source region and forming an opening vertically penetrating the interlayer dielectric layer in the fabrication method of the MOSFET structure of the present application.

[0036] Figure 9 A cross-sectional view of a structure resulting after forming a source trench in the fabrication method of the MOSFET structure of the present application.

[0037] Figure 10 A cross-sectional view of a structure resulting after forming a second conductivity type doped layer in the drift layer in the fabrication method of the MOSFET structure of the present application.

[0038] Figure 11 A cross-sectional view of a structure resulting after forming a Schottky metal layer in a predetermined region of the sidewall of the source trench in the fabrication method of the MOSFET structure of the present application.

[0039] Figure 12 A cross-sectional view of a structure resulting after forming a source metal layer in the fabrication method of the MOSFET structure of the present application.

[0040] Element Number Description

[0041] S1-S6 Steps

[0042] 1 Substrate

[0043] 2 Drift Layer

[0044] 3 Body Region

[0045] 4 Source Region

[0046] 5 Pillar Region Trench

[0047] 6 Second Conductivity Type Pillar

[0048] 7 Gate trench

[0049] 8 Gate dielectric layer

[0050] 9 Gate conductive layer

[0051] 10 Interlayer Dielectric Layer

[0052] 11 Opening

[0053] 12 Source Trench

[0054] 13 Second conductivity type doped layer

[0055] 14 Schottky metal layer

[0056] 15 Source Metal Layer Detailed Implementation

[0057] The illustrations provided in this embodiment are only schematic representations of the basic concept of this application. Therefore, the drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0058] Please see Figure 1 This embodiment provides a method for fabricating a MOSFET structure, including the following steps:

[0059] S1: Provide a substrate of a first conductivity type, and form a drift layer of a first conductivity type, a body region of a second conductivity type, and a source region of a first conductivity type sequentially from bottom to top on the substrate, wherein the first conductivity type is opposite to the second conductivity type;

[0060] S2: A gate trench is formed, which vertically penetrates the source region and the body region and extends downward into the drift layer;

[0061] S3: Sequentially form a gate dielectric layer and a gate conductive layer in the gate trench;

[0062] S4: A source trench is formed, which vertically penetrates the source region and the body region and extends downward into the drift layer. The source trench is spaced apart from the gate trench in the horizontal direction.

[0063] S5: A predetermined region on the sidewall of the source trench is formed with a Schottky metal layer, the predetermined region including the sidewall of the drift layer exposed by the source trench and the sidewall of the body region exposed by the source trench.

[0064] S6: Form a source metal layer, which fills the source trench to electrically connect with the Schottky metal layer and the source region.

[0065] Step S1: Provide a substrate 1 of the first conductivity type, and form a drift layer 2 of the first conductivity type, a body region 3 of the second conductivity type, and a source region 4 of the first conductivity type sequentially from bottom to top on the substrate 1. The first conductivity type is the opposite of the second conductivity type.

[0066] As an example, the first conductivity type is N-type or P-type, and correspondingly, the second conductivity type is P-type or N-type.

[0067] As an example, substrate 1 can be a silicon carbide substrate, a silicon substrate, or other semiconductor material substrates known in the art. In this embodiment, substrate 1 is selected as an N-type heavily doped silicon carbide substrate, which serves as the substrate for subsequent processes and as the drain region of the MOSFET.

[0068] It should be noted that the terms "heavy doping" in the front and "light doping" in the back are relative concepts. The specific doping concentration can be adjusted as needed. The doping concentration in the heavily doped layer is higher than that in the lightly doped layer.

[0069] like Figure 2 The diagram shows a cross-sectional view of the structure obtained after forming a drift layer 2 of the first conductivity type on substrate 1. In this embodiment, the drift layer 2 is a lightly doped N-type epitaxial layer epitaxially grown on the surface of substrate 1.

[0070] like Figures 3-4 As shown, in this embodiment, a second conductivity type pillar 6 is also formed in the drift layer 2 to construct a superjunction structure, and the bottom surface of the second conductivity type pillar is higher than the bottom surface of the drift layer 2. On the one hand, the superjunction structure helps to improve the device breakdown voltage. Under the same breakdown voltage capability, the on-state resistance can be reduced by increasing the doping concentration of the drift layer. On the other hand, as a charge balance structure, according to the superjunction charge balance principle, when the device is breakdown voltage, the maximum electric field is always fixed above the second conductivity type pillar, which helps to avoid dielectric breakdown at the corner of the gate trench and also helps to improve the device avalanche capability.

[0071] As an example, forming a second conductive type pillar 6 in the drift layer 2 includes the following steps:

[0072] like Figure 3 As shown, pillar trenches 5 are first formed in the drift layer 2 through semiconductor processes such as photolithography and etching. The pillar trenches 5 open from the top surface of the drift layer 2 and extend downward, but do not reach the bottom surface of the drift layer 2.

[0073] like Figure 4 As shown, a second conductive type material layer is formed in the column trench 5 by chemical vapor deposition, physical vapor deposition or other suitable methods, and the portion of the second conductive type material layer outside the column trench 5 is removed by chemical mechanical polishing or other suitable methods. The second conductive type material layer remaining in the column trench 5 constitutes the second conductive type column 6.

[0074] As an example, the second-conductivity-type pillars 6 are P-type lightly-doped layers.

[0075] Specifically, as shown in FIG. 2, which is a cross-sectional view of the structure after forming the body regions 3 and the source regions 4, in this embodiment, the body regions 3 are P-type lightly-doped layers, which can be formed on the drift layer 2 and the second-conductivity-type pillars 6 by epitaxy or other suitable methods, and the source regions 4 are N-type heavily-doped layers, which can be formed on the body regions 3 by epitaxy or other suitable methods. Figure 5 Specifically, as shown in FIG. 3, which is a cross-sectional view of the structure after forming the gate trenches 7, in this embodiment, the gate trenches 7 vertically pass through the source regions 4 and the body regions 3, and extend downward into the drift layer 2.

[0076] Figure 6 Specifically, the gate trenches 7 are located between two adjacent second-conductivity-type pillars 6 in the horizontal direction, and the gate trenches 7 are spaced apart from the two adjacent second-conductivity-type pillars 6 by a predetermined distance.

[0077] Specifically, as shown in FIG. 4, which is a cross-sectional view of the structure after forming the gate dielectric layers 8 and the gate conductive layers 9, in this embodiment, the gate dielectric layers 8 and the gate conductive layers 9 are sequentially formed in the gate trenches 7.

[0078] Specifically, as shown in FIG. 5, which is a cross-sectional view of the structure after forming the interlayer dielectric layers 10 and the openings 11, in this embodiment, the interlayer dielectric layers 10 are further formed by chemical vapor deposition, physical vapor deposition or other suitable methods to cover the source regions 4, the gate dielectric layers 8 and the gate conductive layers 9, and the openings 11 are formed in the interlayer dielectric layers 10 by photolithography, etching or other semiconductor processes to vertically pass through the interlayer dielectric layers 10, and the bottom surface of the openings 11 exposes a part of the top surface of the source regions 4. Figure 7 As an example, the patterned interlayer dielectric layers 10 cover the areas where the gate trenches 7 are located, and the second-conductivity-type pillars 6 are located in the opening areas of the openings 11.

[0079] Specifically, as shown in FIG. 6, which is a cross-sectional view of the structure after forming the source trenches 12, in this embodiment, the source trenches 12 vertically pass through the source regions 4 and the body regions 3, and extend downward into the drift layer 2, and the source trenches 12 are spaced apart from the gate trenches 7 in the horizontal direction.

[0080] Figure 8

[0081] As an example, the patterned interlayer dielectric layers 10 cover the areas where the gate trenches 7 are located, and the second-conductivity-type pillars 6 are located in the opening areas of the openings 11.

[0082] Specifically, as shown in FIG. 6, which is a cross-sectional view of the structure after forming the source trenches 12, in this embodiment, the source trenches 12 vertically pass through the source regions 4 and the body regions 3, and extend downward into the drift layer 2, and the source trenches 12 are spaced apart from the gate trenches 7 in the horizontal direction. Figure 9

[0083] ​​​​Specifically, the source trench 12 penetrates the upper portion of the second-conductivity-type pillar 6 to lower the top surface of the second-conductivity-type pillar 6 below the top surface of the drift layer 2. Here, the source trench 12 penetrating the upper portion of the second-conductivity-type pillar 6 means that the second-conductivity-type pillar 6 is located within the opening region of the source trench 12, and during the process of forming the source trench 12, a portion of the second-conductivity-type pillar 6 is also etched away.

[0084] As shown in Figure 10 , in the present embodiment, the following step is further performed: forming a second-conductivity-type doped layer 13 in the drift layer 2 by ion implantation, the second-conductivity-type doped layer 13 is located below the bottom of the source trench 12 and vertically penetrates the upper portion of the second-conductivity-type pillar 6 to further lower the top surface of the second-conductivity-type pillar 6, and the doping concentration of the second-conductivity-type doped layer 13 is higher than the doping concentration of the second-conductivity-type pillar 6. Here, the second-conductivity-type doped layer 13 vertically penetrating the upper portion of the second-conductivity-type pillar 6 means that the upper portion of the second-conductivity-type pillar 6 is converted into the second-conductivity-type doped layer 13 by ion implantation. The second-conductivity-type doped layer 13 in the present embodiment is a P-type heavily doped layer.

[0085] When the device is under voltage stress, the maximum electric field is fixed at the position of the second-conductivity-type doped layer 13 above the second-conductivity-type pillar 6, which helps to avoid dielectric breakdown at the corner of the gate trench, and at the same time helps to improve the avalanche capability of the device.

[0086] Referring back to Figure 11 , step S5 is performed: forming a Schottky metal layer 14 on the preset region of the sidewall of the source trench 12 by chemical vapor deposition, physical vapor deposition or other suitable methods, the preset region includes the sidewall of the drift layer 2 exposed by the source trench 12 and the sidewall of the body region 3 exposed by the source trench 12.

[0087] The material of the Schottky metal layer 14 can include titanium or other suitable metal materials.

[0088] A metal conformal layer is first formed on the surface of the structure as shown in Figure 9 , and the metal conformal layer outside the preset region is removed by anisotropic etching to obtain the Schottky metal layer 14 located in the preset region.

[0089] The Schottky metal layer 14 forms a Schottky diode with the drift layer 2, which can improve the reverse recovery characteristics of the MOSFET structure.

[0090] Specifically, the Schottky metal layer 14 also forms a Schottky contact with the body region 3, so that there is a potential barrier difference between the source region 4 and the body region 3 (the body region potential is lowered), which helps to suppress the latch-up effect and improve the avalanche capability of the device.

[0091] In this embodiment, the top of the Schottky metal layer 14 is not lower than the bottom of the source region 4. That is, the sidewall of the body region 3 facing the source trench 12 is completely covered by the Schottky metal layer 14. If the top of the Schottky metal layer 14 is lower than the bottom of the source region 4, the portion of the sidewall of the body region 3 facing the source trench 12 that is not covered by the Schottky metal layer 14 needs to form an ohmic contact layer. And because of the presence of ohmic contact, the Schottky contact between the Schottky metal layer 14 and the body region 3 is ineffective, and it cannot reduce the body potential and suppress the latch-up effect.

[0092] Since the sidewalls of the body region 3 in this embodiment are completely covered by the Schottky metal layer 14, it is not necessary to form Schottky contacts and ohmic contacts on the sidewalls of the body region in two separate steps.

[0093] Please see Figure 12 Step S6: Form a source metal layer 15 using chemical vapor deposition, physical vapor deposition or other suitable methods. The source metal layer 15 is filled into the source trench 12 to be electrically connected to the Schottky metal layer 14 and the source region 4.

[0094] The source metal layer 15 can be made of aluminum, copper or other suitable conductive materials.

[0095] The source metal layer 15 also fills the opening 11 of the interlayer dielectric layer 10 to contact the top surface of the source region 4 on the side near the source trench 12.

[0096] Thus, a MOSFET structure is fabricated, including but not limited to a silicon carbide superjunction MOSFET structure integrating a Schottky diode. The fabrication method of the MOSFET structure in this embodiment forms a Schottky metal layer on the sidewalls of the drift layer and the body region. On one hand, the Schottky metal layer and the drift layer form a Schottky diode, which can improve the reverse recovery characteristics of the MOSFET structure. On the other hand, the Schottky metal layer also forms a Schottky contact with the body region, creating a barrier difference between the source region and the body region (a decrease in body potential). This barrier difference helps suppress latch-up effects and improves the avalanche capability of the device. Furthermore, since the sidewalls of the body region are entirely covered by the Schottky metal layer, the fabrication method of the MOSFET structure in this application does not require forming Schottky contacts and ohmic contacts on the sidewalls of the body region in two separate steps, simplifying the process. Furthermore, this application can selectively form a second conductivity type pillar in the drift layer to construct a superjunction structure. On the one hand, the superjunction structure helps to improve the device breakdown voltage. Under the same breakdown voltage capability, the on-state resistance can be reduced by increasing the doping concentration of the drift layer. On the other hand, as a charge balance structure, according to the superjunction charge balance principle, when the device is breakdown voltage, the maximum electric field is always fixed at the position of the second conductivity type doped layer above the second conductivity type pillar, which helps to avoid dielectric breakdown at the corner of the gate trench and also helps to improve the device avalanche capability.

[0097] Referring to Figure 12 , a cross-sectional view of a MOSFET structure of the embodiment is shown, which comprises a first-conductivity-type substrate 1, a first-conductivity-type drift layer 2, a second-conductivity-type body region 3 and a first-conductivity-type source region 4 stacked in order from bottom to top, and comprises a gate trench 7, a source trench 12, a Schottky metal layer 14 and a source metal layer 15, wherein the first-conductivity-type is opposite to the second-conductivity-type; the gate trench 7 vertically penetrates the source region 4 and the body region 3 and extends downward to the drift layer 2, and the gate trench 7 is filled with a gate dielectric layer 8 and a gate conductive layer 9; the source trench 12 vertically penetrates the source region 4 and the body region 3 and extends downward to the drift layer 2, and the source trench 12 is horizontally spaced apart from the gate trench 7; the Schottky metal layer 14 is located in a preset region of the sidewall of the source trench 12, and the preset region comprises the sidewall of the drift layer 2 exposed by the source trench 12 and the sidewall of the body region 3 exposed by the source trench 12; the source metal layer 15 fills into the source trench 12 to be electrically connected with the Schottky metal layer 14 and the source region 4.

[0098] Specifically, the top end of the Schottky metal layer 14 is not lower than the bottom end of the source region 4, that is, the sidewall of the side of the body region 3 facing the source trench 12 is entirely covered by the Schottky metal layer 14, which ensures the Schottky contact between the Schottky metal layer 14 and the body region 3, thereby reducing the body potential and suppressing the latch-up effect.

[0099] As an example, the MOSFET structure optionally comprises a second-conductivity-type pillar 6 in the drift layer 2, the second-conductivity-type pillar 6 is located below the source trench 12, and the bottom surface of the second-conductivity-type pillar 6 is higher than the bottom surface of the drift layer 2.

[0100] As an example, the MOSFET structure optionally comprises a second-conductivity-type doped layer 13 in the drift layer 2, the second-conductivity-type doped layer 13 is located between the source trench 12 and the second-conductivity-type pillar 6 in the vertical direction, and the doping concentration of the second-conductivity-type doped layer 13 is higher than the doping concentration of the second-conductivity-type pillar 6.

[0101] The MOSFET structure of the embodiment not only can improve the reverse recovery characteristics of the MOSFET structure, but also can make the source region and the body region have a potential barrier difference, which is helpful to suppress the latch-up effect and improve the avalanche capability of the device. By constructing the super-junction structure, the voltage resistance of the device can be further improved or the on-state resistance can be reduced under the same voltage resistance, and the avalanche capability of the device can be improved.

[0102] In summary, the MOSFET structure fabrication method of this application forms a Schottky metal layer on the sidewalls of the drift layer and the body region. On the one hand, the Schottky metal layer and the drift layer form a Schottky diode, which can improve the reverse recovery characteristics of the MOSFET structure. On the other hand, the Schottky metal layer also forms a Schottky contact with the body region, creating a barrier difference between the source region and the body region (the body region potential is reduced). This barrier difference helps to suppress latch-up effects and improve the avalanche capability of the device. Furthermore, since the sidewalls of the body region are completely covered by the Schottky metal layer, the MOSFET structure fabrication method of this application does not require forming Schottky contacts and ohmic contacts on the sidewalls of the body region in two separate steps. Furthermore, this application can selectively form a second conductivity type pillar in the drift layer to construct a superjunction structure. On the one hand, the superjunction structure helps improve the device's breakdown voltage; under the same breakdown voltage capability, the on-state resistance can be reduced by increasing the doping concentration of the drift layer. On the other hand, as a charge-balanced structure, according to the superjunction charge-balance principle, the maximum electric field is always fixed at the position of the second conductivity type doped layer above the second conductivity type pillar when the device is under breakdown voltage. This helps to avoid dielectric breakdown at the corner of the gate trench and also helps to improve the device's avalanche capability. Therefore, this application effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0103] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. A method for fabricating a MOSFET structure, characterized in that, Includes the following steps: A first conductivity type substrate is provided, on which a first conductivity type drift layer, a second conductivity type body region, and a first conductivity type source region are formed sequentially from bottom to top, wherein the first conductivity type is opposite to the second conductivity type; A gate trench is formed, which vertically penetrates the source region and the body region and extends downward into the drift layer; A gate dielectric layer and a gate conductive layer are sequentially formed in the gate trench; A source trench is formed, which vertically penetrates the source region and the body region and extends downward into the drift layer. The source trench is spaced apart from the gate trench in the horizontal direction. A Schottky metal layer is formed in a predetermined region on the sidewall of the source trench. The predetermined region includes the sidewall of the drift layer exposed by the source trench and the sidewall of the body region exposed by the source trench. The top of the Schottky metal layer is not lower than the bottom of the source region so that the sidewall of the body region facing the source trench is completely covered by the Schottky metal layer. However, the Schottky metal layer does not cover all the sidewalls of the source region, and the Schottky metal layer does not cover the bottom wall of the source trench. There is a gap between the Schottky metal layers on the opposite sidewalls of the source trench. A source metal layer is formed, which fills the source trench to be electrically connected to the Schottky metal layer and the source region. The source metal layer also passes through the gap and covers the bottom wall of the trench. The method further includes the following steps: forming a second conductive type pillar in the drift layer, wherein the bottom surface of the second conductive type pillar is higher than the bottom surface of the drift layer, wherein the formation order of the source trench is after the formation order of the second conductive type pillar, and the source trench penetrates the upper part of the second conductive type pillar so that the top surface of the second conductive type pillar is lower than the top surface of the drift layer.

2. The method for fabricating the MOSFET structure according to claim 1, characterized in that, The process of forming a second type of conductive pillar in the drift layer includes the following steps: A column trench is formed in the drift layer, the column trench opening from the top surface of the drift layer and extending downward, but not reaching the bottom surface of the drift layer; A second conductive type material layer is formed in the column trench to obtain a column of the second conductive type.

3. The method for fabricating the MOSFET structure according to claim 1, characterized in that, It also includes the following steps: A second conductivity type doped layer is formed in the drift layer. The second conductivity type doped layer is located below the bottom of the source trench and extends vertically through the upper part of the second conductivity type pillar so that the top surface of the second conductivity type pillar is further lowered. The doping concentration of the second conductivity type doped layer is higher than the doping concentration of the second conductivity type pillar.

4. The method for fabricating the MOSFET structure according to claim 1, characterized in that, It also includes the following steps: An interlayer dielectric layer is formed on the source region, and a vertical opening is formed in the interlayer dielectric layer, the bottom surface of the opening exposing a portion of the top surface of the source region, and the source metal layer is also filled into the opening and contacts the top surface of the source region on the side near the source trench.

5. A MOSFET structure, characterized in that, include: The first conductivity type substrate, the first conductivity type drift layer, the second conductivity type body region, and the first conductivity type source region are stacked sequentially from bottom to top, wherein the first conductivity type is opposite to the second conductivity type. A gate trench extends vertically through the source region and the body region, and downwards into the drift layer. The gate trench is filled with a gate dielectric layer and a gate conductive layer. The source trench extends vertically through the source region and the body region, and downwards into the drift layer. The source trench is spaced apart from the gate trench in the horizontal direction. A Schottky metal layer is located in a predetermined region on the sidewall of the source trench. The predetermined region includes the sidewall of the drift layer exposed by the source trench and the sidewall of the body region exposed by the source trench. The top of the Schottky metal layer is not lower than the bottom of the source region so that the sidewall of the body region facing the source trench is completely covered by the Schottky metal layer. However, the Schottky metal layer does not cover all the sidewalls of the source region, and the Schottky metal layer does not cover the bottom wall of the source trench. There is a gap between the Schottky metal layers on the opposite sidewalls of the source trench. A source metal layer is filled into the source trench to be electrically connected to the Schottky metal layer and the source region, and the source metal layer also extends through the gap and covers the bottom wall of the trench; It also includes a second conductive type pillar located in the drift layer, the second conductive type pillar being located below the source trench, and the bottom surface of the second conductive type pillar being higher than the bottom surface of the drift layer.

6. The MOSFET structure according to claim 5, characterized in that: It also includes a second conductivity type doped layer located in the drift layer, the second conductivity type doped layer being located in the vertical direction between the source trench and the second conductivity type pillar, and the doping concentration of the second conductivity type doped layer being higher than the doping concentration of the second conductivity type pillar.

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