A method for suppressing surge current controlled by thyristor suitable for wide voltage and wide frequency

Abstract

The application discloses a thyristor control surge current suppression method suitable for wide voltage and wide frequency, which comprises the following steps: a sampling circuit rectifies an input alternating current signal of a main power circuit into a half wave, and divides voltage to obtain an input voltage sampling signal; the voltage sampling signal is transmitted to an input voltage parameter acquisition module, the voltage parameter acquisition module calculates an input voltage average value, an input voltage filter value and a sampling period counter value; the input voltage average value, the input voltage filter value and the sampling period counter value are input into an input voltage period and thyristor opening time calculation module to calculate an input voltage period and a thyristor opening time; the sampling period counter value, the input voltage period and the thyristor opening time are collectively used as inputs of a thyristor driving pulse generation module to generate a thyristor driving pulse. The application has surge suppression functions at low frequency and high frequency.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of converter technology, and in particular to a thyristor-controlled surge current suppression method suitable for wide voltage and wide frequency. BACKGROUND

[0002] The power factor correction module (PFC) and other AC-DC converters charge the output capacitor during the startup process, and the charging process will have a large surge current. If not suppressed, it will significantly increase the current stress of the power device and pose a hidden danger to the equipment. Therefore, the size of the input surge current is one of the key indicators for evaluating the performance of the PFC module power supply.

[0003] The commonly used input surge current suppression schemes in AC-DC converters mainly include: 1) power resistor combined with bypass relay. Since the power resistor and the bypass relay are relatively large in size, this scheme is generally used in high-power power distribution systems and situations where there is no high requirement for size. 2) Series negative temperature coefficient thermistor (NTC). This scheme is a common input surge current limiting method. The resistance of the NTC decreases after heating for a period of time, thereby reducing the loss caused by the series resistance. However, in high-power density module power supplies, it still has the effect of low efficiency, and high-temperature startup also does not achieve good suppression effect. 3) Using the gradual conduction characteristic of the MOS tube in the linear region for surge suppression. A delay drive circuit composed of resistors, capacitors, and voltage stabilizing tubes is used to drive the MOS tube, so that the MOS tube gradually turns on until it is fully turned on as the gate voltage rises, thereby reducing the input surge current. This scheme increases too many devices on the basis of the original, not only increasing the cost, but also reducing the circuit reliability, so it is not widely used in practical applications. 4) Using thyristor half-controlled rectification technology to suppress input current surge. This scheme does not have a series resistor in hardware, and also discards the complex drive control circuit, and completely controls the conduction and turn-off of the thyristor by software. The existing patent, such as Chinese invention patent CN111342436A, gives the realization of the circuit and method of surge suppression. The patent only gives the theoretical waveform of the thyristor drive pulse, and does not give the specific implementation algorithm.

[0004] Thyristor half-controlled rectification is a commonly used surge current suppression circuit for PFC, Figure 1 The circuit structure diagram of the thyristor half-controlled rectification system is given, which mainly includes an input voltage source v ac , a first thyristor VT1, a second thyristor VT2, a first rectifier diode D1, a second rectifier diode D2, and an output capacitor C o, and four-way Boost interleaved parallel composition. The key to surge current suppression is the control of the first and second thyristor turn-on and turn-off time, in the ideal case, the first time thyristor turn-on should be in the input voltage half-wave descending phase and the output voltage is relatively low, and turn off before the input voltage half-wave zero, the second time turn-on time is ahead of the first time, the turn-off time remains the same, and so on until the last turn-on at the input voltage half-wave peak. That is, the driving pulse width of the thyristor slowly increases, the turn-off time remains the same, and finally turns on at the input voltage peak, completes the surge suppression control of the thyristor, Figure 2 The ideal driving timing diagram of the thyristor half-controlled rectifier is given. In actual application, the power frequency grid is generally 220V / 50Hz voltage, the airborne or shipborne power supply system is generally 115V / 400Hz voltage, and in extreme cases, the voltage lower limit is 85V and the upper limit is 264V, and the frequency lower limit is 45Hz and the upper limit can be as high as 800Hz. In this extreme case, more accurate control of the sampling signal of the input voltage is needed. For the wide voltage range and the problem of half-wave offset of the actual voltage, how to determine the starting point of the frequency count is a key technical difficulty. On the other hand, under the high frequency input voltage of 800Hz, the thyristor turn-off point is too close to the input voltage half-wave turning point, which will cause the misjudgment of the thyristor turn-off, and the thyristor turn-off point is too far away from the input voltage turning point, which will cause the thyristor to be turned on less frequently, resulting in excessive surge current, and the determination of the thyristor turn-off point under high frequency is also one of the difficulties.

[0005] In summary, the existing input surge current suppression scheme cannot achieve the expected effect in the PFC module power supply, and for this problem, the application applies a thyristor control input surge current suppression method suitable for wide voltage and wide frequency. SUMMARY

[0006] The purpose of the application is to provide a thyristor control surge current suppression method suitable for wide voltage and wide frequency, which can accurately determine the starting point of the frequency count under wide voltage and the turn-off point of the thyristor under high frequency, thereby realizing precise control of the thyristor driving pulse.

[0007] Technical solution: The technical scheme of the present application includes a thyristor control surge current suppression method suitable for wide voltage and wide frequency, characterized in that the method is based on a thyristor half-controlled rectification system, which includes a main power circuit, a sampling circuit and a thyristor digital control system, wherein the sampling circuit is connected with the main power circuit; the thyristor digital control system includes an input voltage parameter acquisition module, an input voltage period and thyristor opening time calculation module and a thyristor drive pulse generation module; the input voltage parameter acquisition module is connected with the input voltage period and thyristor opening time calculation module and the thyristor drive pulse generation module respectively, and the input voltage period and thyristor opening time calculation module is connected with the thyristor drive pulse generation module; the method includes the following steps:

[0008] (1) The sampling circuit rectifies the input alternating current signal of the main power circuit into a half wave, and then divides the voltage to obtain an input voltage sampling signal v g ;

[0009] (2) The voltage sampling signal v g is input to the input voltage parameter acquisition module, and the voltage parameter acquisition module calculates the input voltage average value v avg , the input voltage filter value v fil and the sampling period counter value N g_cntNum ;

[0010] (3) The input voltage average value v avg , the input voltage filter value v fil and the sampling period counter value N g_cntNum are input to the input voltage period and thyristor opening time calculation module, and the input voltage period and thyristor opening time calculation module calculates the input voltage period T g and the thyristor opening time T on_fly ;

[0011] (4) The sampling period counter value N g_cntNum obtained in step (2), the input voltage period T g and the thyristor opening time T on_fly obtained in step (3) are collectively used as the input of the thyristor drive pulse generation module to generate a thyristor drive pulse v GT .

[0012] In step (2), the voltage parameter acquisition module calculates the input voltage average value v avg , the input voltage filter value v fil and the sampling period counter value N g_cntNum , which specifically includes the following steps:

[0013] Step 201: Wait for the input voltage sampling to end, and start counting the sampling period counter N g_cntNum++, go to step 202;

[0014] Step 202: acquire input voltage sample value v g , go to step 203;

[0015] Step 203: store input voltage sample value, go to step 204;

[0016] Step 204: calculate average value of stored value, obtain input voltage average value v avg , go to step 205;

[0017] Step 205: digitally filter input voltage sample value, obtain input voltage filtered value v fil , go to step 206;

[0018] Step 206: wait for next calculation period.

[0019] In step (3), the input voltage period and thyristor turn-on time calculation module calculates input voltage period T g , thyristor turn-on time T on_fly , and specifically includes the following steps:

[0020] Step 301: receive input voltage average value v avg , input voltage filtered value v fil , and sample period counter value N g_cntNum sent by input voltage parameter acquisition module, go to step 302;

[0021] Step 302: compare current value of input voltage filtered value v fil with input voltage filtered value of last calculation period, determine whether current input voltage filtered value satisfies continuous increase for fixed number of times; if yes, go to step 304; if no, go to step 303;

[0022] Step 303: clear count value of fixed number of times, after clearing count value of fixed number of times, return to step 302;

[0023] Step 304: compare current value of input voltage filtered value v fil with input voltage filtered value of last calculation period, determine whether current filtered value satisfies discontinuous increase for fixed number of times; if yes, go to step 305; if no, return to step 304;

[0024] Step 305: determine whether input voltage filtered value v fil is greater than input voltage average value v avg ; if yes, go to step 306; if no, return to step 305;

[0025] Step 306: the sampling period counter value N g_cntNum is assigned to the input voltage period T g , and the average value v avg is obtained by averaging the input voltage period T g at the intersection of two adjacent rising stages of a half wave, and then step 307 is entered;

[0026] Step 307: the sampling period counter value N g_cntNum is cleared, and the counting of the next input voltage period, i.e., the rising stage of a half wave, is restarted at the intersection of the average value v avg , and then step 308 is entered; g_cntNum is the starting point of the N g_cntNum counter, and the intersection of the average value v avg is the ending point of the N g_cntNum counter;

[0027] Step 308: it is determined whether the value of the input voltage period T g is less than a preset value; if yes, step 310 is entered; if no, step 309 is entered;

[0028] Step 309: the thyristor turn-on step time T on = T g / 256 is calculated, and when the input voltage frequency is less than 200 Hz, the thyristor pulse width is increased by T on = T g / 256 each time;

[0029] Step 310: the value of the thyristor turn-on step time T on is assigned to 1, and when the input voltage frequency is greater than 200 Hz, the thyristor pulse width is increased by T on = 1 each time, and then step 311 is entered;

[0030] Step 311: the cumulative step time T on_fly = T on_fly + T on is calculated, and then the thyristor turn-on time is obtained, and step 312 is entered;

[0031] Step 312: the next calculation period is waited for.

[0032] In step (4), the sampling period counter value N g_cntNum , the input voltage period T g , and the thyristor turn-on time T on_fly are collectively taken as inputs of a thyristor drive pulse generation module to generate a thyristor drive pulse v GT , and the specific steps include the following steps:

[0033] Step 401: the sampling period counter value N g_cntNum , the input voltage period T g , and the thyristor turn-on time T on_fly, enter step 402;

[0034] Step 402: judge the sampling period counter N g_cntNum Whether equal to T g *21 / 32-T on_fly , if yes, enter step 403, if no, return to step 402;

[0035] Step 403: open the thyristor, enter step 404;

[0036] Step 404: judge whether the thyristor opening time T on_fly Equal to T g / 2, if yes, enter step 405, if no, enter step 406;

[0037] Step 405: end of slow rise;

[0038] Step 406: judge whether the sampling period counter N g_cntNum Equal to T g *21 / 32, if yes, enter step 407, if no, return to step 406;

[0039] Step 407: turn off the thyristor, return to step 402.

[0040] The sampling circuit comprises a third rectifier diode D3, a fourth rectifier diode D4, a first sampling resistor R1 and a second sampling resistor R2; one end of the third rectifier diode D3 is connected with the L end of an input voltage source v ac , one end of the fourth rectifier diode D4 is connected with the N end of the input voltage source v ac , and the other end of the third rectifier diode D3 is connected with the other end of the fourth rectifier diode D4, and then the first sampling resistor R1 and the second sampling resistor R2 are connected in series.

[0041] The method is suitable for voltage input range of 85-264V and frequency input range of 45-800Hz, and is suitable for wide voltage and wide frequency range.

[0042] Beneficial effects: compared with the prior art, the technical scheme of the present application has the beneficial effects that (1) the present application determines the starting point of the frequency counting of the half-controlled rectification waveform under the wide voltage input range, adopts the average value of the input voltage as the starting point of the input voltage frequency counting, carries out digital filtering on the input voltage sampling value, and ensures the accuracy of the frequency calculation under the wide voltage input range of 85-264V;

[0043] (2) the application proposes a determination method of thyristor turn-off point of thyristor rectifier system, selects the coefficient 21 / 32 as the basis of thyristor turn-off point determination, ensures that the thyristor turn-off point has a 22.4° margin from the input voltage half-wave turning point, and can ensure that the thyristor can be reliably turned off at high frequency 800Hz. BRIEF DESCRIPTION OF DRAWINGS

[0044] Figure 1 it is a circuit structure schematic diagram of the thyristor half-controlled rectifier system in the prior art;

[0045] Figure 2 it is a ideal driving timing diagram of the thyristor half-controlled rectifier in the prior art;

[0046] Figure 3 it is a topology diagram of main power circuit and sampling circuit;

[0047] Figure 4 it is a structure schematic diagram of the thyristor digital control system;

[0048] Figure 5 it is a flow chart of input voltage parameter acquisition module obtaining sampling period counter, input voltage average value and filter value calculation;

[0049] Figure 6 it is an input voltage half-wave offset schematic diagram.

[0050] Figure 7 it is a flow chart of input voltage period and thyristor turn-on time calculation;

[0051] Figure 8 it is a thyristor turn-on time schematic diagram.

[0052] Figure 9 it is a flow chart of thyristor drive pulse generation;

[0053] Figure 10 it is a thyristor drive timing schematic diagram;

[0054] Figure 11 it is an experimental waveform diagram of the application under 115V / 400Hz power grid;

[0055] Figure 12 it is an experimental waveform diagram of the application under 220V / 50Hz power grid;

[0056] Figure 13 it is an experimental waveform diagram of the application under 85V / 400Hz power grid;

[0057] Figure 14 it is an experimental waveform diagram of the application under 264V / 50Hz power grid;

[0058] Figure 15The experimental waveform diagram of the application under 220V / 45Hz power grid;

[0059] Figure 16 The experimental waveform diagram of the application under 115V / 800Hz power grid. DETAILED DESCRIPTION

[0060] The technical solutions of the application will be described in detail below in combination with specific embodiments and the accompanying drawings of the specification.

[0061] As shown in Figure 3 and Figure 4 The thyristor control surge current suppression method suitable for wide voltage and wide frequency of the application is based on a thyristor half-controlled rectification system, which includes a main power circuit, a sampling circuit and a thyristor digital control system.

[0062] The main power circuit is composed of an input voltage source v ac , a first thyristor VT1, a second thyristor VT2, a first rectifier diode D1, a second rectifier diode D2, an output capacitor C o and a four-way Boost interlaced parallel circuit; one end of the first thyristor VT1 is connected with one end of the first rectifier diode D1 to form a series bridge arm, and the point is connected with the L end of the input voltage source v ac ; one end of the second thyristor VT2 is connected with one end of the second rectifier diode D2 to form a series bridge arm, and the point is connected with the N end of the input voltage source v ac ; the other end of the first thyristor VT1 is connected with the other end of the second thyristor VT2; the other end of the first rectifier diode D1 is connected with the other end of the second rectifier diode D2; one end of the inductance L1 of the four-way Boost interlaced parallel circuit is connected with the connection point of the first thyristor VT1 and the second thyristor VT2; one end of the switch tube Q1 of the four-way Boost interlaced parallel circuit is connected with the connection point of the first rectifier diode D1 and the second rectifier diode D2; one end of the diode D3 of the four-way Boost interlaced parallel circuit is connected with one end of the output capacitor C o ; the other end of the output capacitor C o is connected with one end of the switch tube Q1 of the four-way Boost interlaced parallel circuit, the connection point of the first rectifier diode D1 and the second rectifier diode D2. The voltage across the output capacitor C o is recorded as v o .

[0063] The sampling circuit comprises a third rectifier diode D3, a fourth rectifier diode D4, a first sampling resistor R1 and a second sampling resistor R2. The first rectifier diode D1, the second rectifier diode D2, the third rectifier diode D3 and the fourth rectifier diode D4 rectify the input alternating current signal into a half wave, and then the first sampling resistor R1 and the second sampling resistor R2 divide the voltage to obtain the input voltage sampling signal v g .

[0064] The post-stage of the present application adopts a four-way Boost interleaved parallel converter, and the technical solutions of the present application are described. It should be pointed out that the thyristor rectification control scheme of the present application is also applicable to other types of converters with large capacitors in the post-stage, such as Buck converters, etc. The thyristor rectification control scheme of the present application is also applicable to three-phase systems, such as three-phase step-up or step-down converters, etc.

[0065] The thyristor digital control system comprises an input voltage parameter acquisition module 101, an input voltage period and thyristor opening time calculation module 102, and a thyristor drive pulse generation module 103. The input voltage parameter acquisition module 101 is connected with the input voltage period and the thyristor opening time calculation module 102 and the thyristor drive pulse generation module 103, respectively. The input voltage period and the thyristor opening time calculation module 102 are connected with the thyristor drive pulse generation module 103. The input signal of the thyristor digital control system is the input voltage sampling signal v g , and the output of the digital control system is the thyristor drive pulse signal v GT .

[0066] The present application is suitable for wide voltage and wide frequency thyristor control surge current suppression method, comprising the following steps:

[0067] (1) The sampling circuit rectifies the input alternating current signal of the main power circuit into a half wave, and then divides the voltage to obtain the input voltage sampling signal v g ;

[0068] (2) The voltage sampling signal v g is input to the input voltage parameter acquisition module 101, and the voltage parameter acquisition module 101 calculates the input voltage average value v avg , the input voltage filter value v fil and the sampling period counter value N g_cntNum ; as shown in Figure 5 , the specific working process comprises the following steps:

[0069] Step 201: Wait for the end of input voltage sampling, and the sampling period counter starts counting N g_cntNum ++, and enters step 202:

[0070] Step 202: Obtain the input voltage sample value v g Proceed to step 203;

[0071] Step 203: Store the input voltage sample value in a table, then proceed to step 204;

[0072] Step 204: Calculate the average value of the stored values ​​to obtain the average input voltage v. avg Proceed to step 205; here, the average value is calculated for the subsequent input voltage period T. g The calculation provides the basis for judgment, that is, the judgment in step 305 provides the basis for judgment. An ideal input voltage half-wave curve is as follows: Figure 6 As shown by the dashed line, the input voltage period is the time between two zero-crossing points. To prevent misjudgment, a common practice is to select a voltage comparison value v. com The time between the intersection of two adjacent rising or falling intervals of the half-wave curve and the comparison value is the period of the input voltage. It should be noted that choosing the average value as the criterion is based on two considerations. First, to accommodate a wider range of voltages, the voltage comparison value v... com The magnitude of the half-wave voltage must be correlated to ensure v com Between the half-wave peak and trough. Secondly, in practical applications, the waveform of a thyristor-controlled rectifier will shift, and the waveform trough will not necessarily reach zero, such as... Figure 6 As shown by the solid line, the magnitude of the offset is also strongly correlated with the system, which gives v com The determination of the value presents a challenge. This invention patent uses the average value of the input voltage v. avg As a comparison value v com v avg The value is unaffected by the input voltage range and will necessarily lie between the peak and trough of the input voltage, ensuring that the half-wave curve will always coincide with v. avg An intersection point is formed.

[0073] Step 205: Perform digital filtering on the sampled input voltage value to obtain the filtered input voltage value v. fil Proceed to step 206; It should be noted that the difference between the input sample values ​​is very small in adjacent sampling periods, which may lead to misjudgment in the process of judging whether the half-wave is continuously rising or falling, and misjudgment is also very easy to occur when there are harmonics. Therefore, the input voltage sample value is digitally filtered here.

[0074] Step 206: Wait for the next calculation cycle.

[0075] (3) The average value of the input voltage v avg Input voltage filter value v fil Sampling period counter value N g_cntNumThe input voltage period and thyristor turn-on time calculation module 102 calculates the input voltage period T g , the thyristor turn-on time T on_fly ; as shown in the specific workflow includes the following steps: Figure 7

[0076] Step 301: receive the input voltage average value v avg , the input voltage filter value v fil , the sampling period counter value N g_cntNum , enter step 302;

[0077] Step 302: compare the current value of the input voltage filter value v fil with the last period value, determine whether the current input voltage filter value satisfies 5 consecutive increases; if yes, enter step 304; if no, enter step 303;

[0078] Step 303: clear the 5-time count value, and the input voltage filter value v fil does not occur 5 consecutive rises, which means that this stage is not in the half-wave rising stage, and the 5-time count value needs to be cleared. After returning to step 302;

[0079] Step 304: compare the current value of the input voltage filter value v fil with the last period value, determine whether the current filter value satisfies 5 non-consecutive increases, if yes, enter step 305; if no, return to step 304;

[0080] After experiencing 5 consecutive rises (step 302) and 5 non-consecutive rises (step 304), it can be determined that the input voltage is in the half-wave rising stage, and the input voltage at this time is near the valley point and will continue to rise until the input voltage average value v avg .

[0081] Step 305: determine whether the input voltage filter value v fil is greater than the input voltage average value v avg ; if yes, enter step 306; if no, return to step 305;

[0082] Step 306: assign the sampling period counter value N g_cntNum to the input voltage period T g , obtain the input voltage period T g of the intersection of the two adjacent rising stages of the half wave and the average value v avg , as shown by the solid line in Figure 6 , then enter step 307; ​

[0083] Step 307: counting the sampling period counter value N g_cntNum is cleared and the counting of the next input voltage period, i.e. the half-wave rising stage and the average value v avg is restarted. g_cntNum The intersection point is both the N g_cntNum counter starting point and the N g counter ending point. Figure 6 As shown, step 308 is entered.

[0084] Step 308: judging whether the value of the input voltage period T g is less than the preset value 500; if yes, step 310 is entered; if no, step 309 is entered; it is to be noted that the value 500 is used to distinguish the two step-up times of the low frequency and the high frequency of the input voltage. The sampling frequency set in the embodiment of the present application is 200k, and each counting of 500 indicates that the input voltage frequency is 200Hz, the counting greater than 500 indicates that the input voltage frequency is less than 200Hz, and the counting less than 500 indicates that the input voltage frequency is greater than 200Hz.

[0085] Step 309: calculating the thyristor opening step-up time T on = T g / 256, when the input voltage frequency is less than 200Hz, the thyristor pulse width is increased by T on = T g / 256 each time; as shown, when the input voltage frequency is less than 200Hz, the thyristor pulse width is increased by T on = T g / 256 each time, for example, when the input voltage frequency is 100Hz, the step-up length T on is 1000 / 265=3, when the input voltage frequency is 50Hz, the step-up length T on is 2000 / 256=7, and step 311 is entered.

[0086] Step 310: assigning the value of the thyristor opening step-up time T on to 1, when the input voltage frequency is greater than 200Hz, the thyristor pulse width is increased by T on =1 each time, for example, when the input voltage frequency is 400Hz, the step-up length T on is 1, when the input voltage frequency is 800Hz, the step-up length T on is also 1, and step 311 is entered.

[0087] Step 311: calculating the cumulative step-up time T on_fly = T on_fly +T on , and obtaining the thyristor opening time, as shown, step 312 is entered. Figure 8 Step 312: judging whether the value of the cumulative step-up time T g_cntNum is less than the preset value 1000; if yes, step 313 is entered; if no, step 314 is entered; it is to be noted that the value 1000 is used to distinguish the two step-up times of the low frequency and the high frequency of the input voltage. The sampling frequency set in the embodiment of the present application is 200k, and each counting of 1000 indicates that the input voltage frequency is 200Hz, the counting greater than 1000 indicates that the input voltage frequency is less than 200Hz, and the counting less than 1000 indicates that the input voltage frequency is greater than 200Hz.

[0088] Step 312: Wait for the next calculation cycle.

[0089] (4) The sampling period counter value N obtained in step (2) g_cntNum The input voltage period T obtained in step (3) g thyristor turn-on time T on_fly Together, they serve as inputs to the thyristor drive pulse generation module 103, generating the thyristor drive pulse v. GT ;like Figure 9 As shown, the specific workflow includes the following steps:

[0090] Step 401: Receive the sampling period counter value N g_cntNum Input voltage period T g Thyristor turn-on time T on_fly Proceed to step 402;

[0091] Step 402: Determine the sampling period counter N g_cntNum Is it equal to T? g *21 / 32-T on_fly If yes, proceed to step 403; otherwise, return to step 402.

[0092] Step 403: Turn on the thyristor and proceed to step 404;

[0093] Step 404: Determine the thyristor turn-on time T on_fly Is it equal to T? g / 2, if yes, proceed to step 405; if no, proceed to step 406;

[0094] Step 405: Slow start ends;

[0095] Step 406: Determine the sampling period counter N g_cntNum Is it equal to T? g *21 / 32, if yes, proceed to step 407; if no, return to step 406;

[0096] Step 407: Turn off the thyristor and return to step 402.

[0097] This needs to be combined Figure 10 The selection of the coefficient 21 / 32 is explained. For example... Figure 10 As shown, time t1 is the intersection of the average input voltage and the rising phase of the half-wave. At this time, the sampling period counter N... g_cntNum =0, and start counting until the next intersection of the average input voltage and the rising half-wave phase, at which point it resets to zero. The entire counting cycle is T. g Time t2 is the turn-on time of the thyristor, which is the sampling period counter N. g_cntNum =T g*21 / 32-T on_fly The thyristor is turned on at time t1. Time t3 is the time when the thyristor is turned off, that is, the counting end point of the sampling period counter N g_cntNum = T g The thyristor is turned off at time *21 / 32. When the thyristor turn-on time T on_fly is equal to T g / 2, the thyristor does not need to be turned off, that is, the soft start program ends. t4 is the turning point of the half wave of the input voltage, and t5 is the counting end point of the current half wave period and the counting start point of the next half wave period. The sampling frequency of the embodiment of the present application is 200 kHz, and when the input voltage is 50 Hz, the number of sampling points of a perfect half wave period is 2000, and there are 1000 counting periods in the half wave descending stage, so there is sufficient time margin to control the turn-on and turn-off of the thyristor. When the input voltage is 800 Hz, the number of sampling points of a half wave period is 125, and there are only 62 counting periods in the half wave descending stage. If the turn-off point t3 of the thyristor is too close to the turning point of the half wave, the turn-off time will be misjudged, resulting in the failure of the thyristor control. If the turn-off point t3 of the thyristor is too far from the turning point of the half wave, the surge current suppression effect will be greatly reduced. After calculation, for a perfect input voltage half wave, the input voltage angle value corresponding to time t1 is 39.5°, the angle value corresponding to time t3 is 157.6°, the angle value corresponding to time t4 is 180°, and the interval between t3 and t4 is 22.4°. It can be calculated that there are 15 sampling points between t3 and t4 when the input voltage is 800 Hz, which has a certain time margin from the turning point of the half wave, and the voltage value at time t3 is 0.38 times the peak value. Considering that the exponent of the divisor is multiplied by 2 in software processing, the coefficient of step 402 is 21 / 32, which ensures the reliable turn-off of the thyristor at high frequency.

[0098] To further illustrate the effect of surge current suppression of the control algorithm, a test platform is built, and tests are carried out under the conditions of grid voltage 115V / 400Hz, 220V / 50Hz, 85V / 400Hz, 264V / 50Hz, 220V / 45Hz and 115V / 800Hz according to the method described in the present application. The test waveforms are shown in Figures 11 to 16 , and channel 1 to channel 4 are respectively the bus voltage, the grid voltage doughnut wave, the thyristor driving signal and the test waveform of the input surge current. It can be seen from the test waveform diagram that the control method of the present application can be applied to the wide grid voltage and wide grid frequency scene, and can effectively suppress the surge current.

[0099] The protection scope of the present application is not limited to the above-mentioned embodiments, and any technical solution falling within the idea of the present application shall fall within the protection scope of the present application. It should be noted that some improvements and refinements of the present application without departing from the principles of the present application shall be regarded as the protection scope of the present application.

Claims

1. A method for surge current suppression by thyristor control suitable for wide voltage and wide frequency, characterized by, The method is based on a thyristor half-controlled rectification system, which comprises a main power circuit, a sampling circuit and a thyristor digital control system, wherein the sampling circuit is connected with the main power circuit; The thyristor digital control system comprises an input voltage parameter acquisition module, an input voltage period and thyristor opening time calculation module and a thyristor drive pulse generation module; The input voltage parameter acquisition module is connected with the input voltage period and thyristor opening time calculation module and the thyristor drive pulse generation module respectively, and the input voltage period and thyristor opening time calculation module is connected with the thyristor drive pulse generation module; The method comprises the following steps: (1) The sampling circuit rectifies the input AC signal of the main power circuit into a half wave, and divides the voltage to obtain an input voltage sampling signal v g ; (2) the voltage sampling signal v g is input to an input voltage parameter acquisition module, and the voltage parameter acquisition module calculates an input voltage average value v avg , an input voltage filter value v fil , and a sampling period counter value N g_cntNum ; (3) the input voltage average value v avg , the input voltage filter value v fil , the sampling period counter value N g_cntNum is input to the input voltage period and thyristor turn-on time calculation module, and the input voltage period and thyristor turn-on time calculation module calculates the input voltage period T g , the thyristor turn-on time T on_fly ; (4) the sampling period counter value N obtained in step (2) g_cntNum , the input voltage period T obtained in step (3) g , and the thyristor turn-on time T on_fly together as inputs of the thyristor drive pulse generation module to generate a thyristor drive pulse v GT ; In step (2), the voltage parameter acquisition module calculates the input voltage average value v avg , the input voltage filtered value v fil , and the sampling period counter value N g_cntNum , specifically including the following steps: Step 201: Wait for the end of input voltage sampling, the sampling period counter starts counting N g_cntNum ++ Go to step 202; Step 202: Obtain input voltage sample value v g Enter step 203; Step 203: store the input voltage sampling value in a table and enter step 204; Step 204: Calculate the average of the table values, resulting in the input voltage average v avg , go to step 205; Step 205: digitally filter the input voltage sample value to obtain an input voltage filtered value v fil , and enter step 206; Step 206: wait for the next calculation period.

2. The surge current suppression method for thyristor control suitable for wide voltage wide frequency as claimed in claim 1 wherein, In step (3), the input voltage period and thyristor turn-on time calculation module calculates the input voltage period T g , the thyristor turn-on time T on_fly , and specifically includes the following steps: Step 301: receiving the input voltage average value v avg , input voltage filter value v fil , sampling period counter value N g_cntNum , entering step 302; Step 302: compare the current value of the input voltage filtered value v fil with the input voltage filtered value of the last calculation cycle, determine whether the current input voltage filtered value satisfies continuous increase for a fixed number of times; if yes, go to step 304; if no, go to step 303; Step 303: clear the fixed number of count values, and return to step 302 after the fixed number of count values are cleared; Step 304: input voltage filter value v fil The current value of the input voltage filter value v is compared with the input voltage filter value of the last calculation cycle, and it is determined whether the current filter value satisfies the discontinuous increase for a fixed number of times. If yes, step 305 is entered; if no, step 304 is returned. Step 305: judge whether the input voltage filtered value v fil is greater than the input voltage average value v avg ; if yes, go to step 306; if no, return to step 305; Step 306: Counting the sampling period counter value N g_cntNum assigned to the input voltage period T g , obtaining the input voltage period T avg at the intersection of the two adjacent rising phases of the half wave and the average value v g , and then entering step 307; Step 307: Counting the sampling period counter value N g_cntNum clearing and restarting the counting of the next input voltage period, i.e. the half-wave rising phase and the average value v avg The intersection is both the N g_cntNum counter start point and the N g_cntNum counter end point, entering step 308; Step 308: judging whether the value of the input voltage period T g is less than a preset value; if yes, entering step 310; if no, entering step 309; Step 309: Calculate thyristor opening step time T on = T g / 256, when the input voltage frequency is less than 200Hz, the thyristor pulse width is increased by T on = T g / 256 each time; Step 310: Assign the thyristor opening step time T on =1, when the input voltage frequency is greater than 200Hz, the thyristor pulse width is increased by T on =1 each time, and enter step 311; Step 311: Calculate the accumulated step time T on_fly = T on_fly + T on , to obtain the thyristor turn-on time, and enter step 312; Step 312: wait for the next calculation period.

3. The surge current suppression method for thyristor control suitable for wide voltage wide frequency as claimed in claim 1 wherein, In step (4), the sampling period counter value N g_cntNum , the input voltage period T g , the thyristor turn-on time T on_fly are collectively taken as inputs of the thyristor drive pulse generation module to generate the thyristor drive pulse v GT , and specifically include the following steps: Step 401 : receive a sample period counter value N g_cntNum , an input voltage period T g , and a thyristor turn-on time T on_fly , proceed to step 402; Step 402: judge whether the sampling period counter N is equal to T g_cntNum Step 403: judge whether the sampling period counter N is equal to 21 / 32-T g Step 404: judge whether the sampling period counter N is equal to 1 / 32-T on_fly If yes, go to step 405; if no, return to step 402. Step 403: open the thyristor and enter step 404; Step 404: judging whether the thyristor turn-on time T on_fly is equal to T g / 2, if yes, go to step 405; if no, go to step 406; Step 405: end the slow rise; Step 406: judge whether the sampling period counter N is equal to T g_cntNum g *21 / 32, if yes, go to step 407; if no, return to step 406;​ Step 407: turn off the thyristor and return to step 402.

4. The surge current suppression method for thyristor control suitable for wide voltage wide frequency as claimed in claim 1 wherein: The sampling circuit comprises a third rectifier diode D3, a fourth rectifier diode D4, a first sampling resistor R1 and a second sampling resistor R2; One end of the third rectifier diode D3 is connected to the L terminal of the input voltage source v ac One end of the fourth rectifier diode D4 is connected to the N terminal of the input voltage source v ac The other end of the third rectifier diode D3 is connected to the other end of the fourth rectifier diode D4, and then the first sampling resistor R1 and the second sampling resistor R2 are connected in series.

5. The surge current suppression method for thyristor control suitable for wide voltage wide frequency as claimed in claim 1 wherein: The voltage input range of the method is 85-264V, and the frequency input range is 45-800Hz.

Images