Photoelectric component, light source pool, photoelectric switching device and control method of photoelectric component

Abstract

The present application discloses a photoelectric component, a light source pool, a photoelectric switching device, and a control method for a photoelectric component, which relates to the field of optical communications and is used to improve the efficiency of the photoelectric component. The photoelectric component includes: a voltage conversion circuit, a semiconductor photoelectric device, a photoelectric detection circuit, and a controller; the voltage conversion circuit is used to provide a bias voltage to the semiconductor photoelectric device, and adjust the output optical power of the semiconductor photoelectric device by changing the bias voltage; wherein the differential resistance value Rdiff of the semiconductor photoelectric device within the target optical power range satisfies 0.1Ω≤Rdiff≤50Ω, and the differential resistance value refers to the ratio of the voltage change to the current change corresponding to the voltage change; the photoelectric detection circuit is used to detect the output optical power of the semiconductor photoelectric device and output a detection signal to the controller; the controller is used to determine a control signal based on the detection signal and output the control signal to the voltage conversion circuit, and the control signal is used to adjust the bias voltage.

Description

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on June 11, 2021, with application number 202110657331.2 and application name “Optoelectronic component, light source pool, optoelectronic switching device and control method of optoelectronic component”. In addition, this application claims priority to the international patent application filed with the State Intellectual Property Office on June 9, 2022, with application number PCT / CN2022 / 097945 and application name “Optoelectronic component, light source pool, optoelectronic switching device and control method of optoelectronic component”. The entire contents of both applications are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of optical communications, and in particular to a photoelectric component, a light source pool, a photoelectric switching device, and a control method for the photoelectric component. Background Art

[0003] The optical power output by a semiconductor optoelectronic device may be too large or too small. For example, the output optical power may decrease due to device aging or increased ambient temperature. In order to stabilize the optical power output by the semiconductor optoelectronic device within a preset range, a driving circuit can be added to the semiconductor optoelectronic device to form an optoelectronic component, so that the optoelectronic component can adjust the optical power output by the semiconductor optoelectronic device and complete the automatic power control (APC) function.

[0004] However, current optoelectronic components use an adjustable current source to adjust the optical power output by semiconductor optoelectronic devices, which has the problem of low efficiency. Summary of the Invention

[0005] Embodiments of the present application provide a photoelectric component, a light source pool, a photoelectric switching device, and a control method for the photoelectric component, for improving the efficiency of the photoelectric component.

[0006] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0007] In the first aspect, an optoelectronic component is provided, including: a voltage conversion circuit, a semiconductor optoelectronic device, a photodetection circuit, and a controller; the voltage conversion circuit is used to provide a bias voltage to the semiconductor optoelectronic device, and to adjust the output optical power of the semiconductor optoelectronic device by changing the bias voltage; wherein the differential resistance value Rdiff of the semiconductor optoelectronic device within the target optical power range satisfies 0.1Ω≤Rdiff≤50Ω, and the differential resistance value refers to the ratio of the voltage change to the current change corresponding to the voltage change. The photodetection circuit is used to detect the output optical power of the semiconductor optoelectronic device and output a detection signal to the controller; the controller is used to determine a control signal based on the detection signal and output a control signal to the voltage conversion circuit, and the control signal is used to adjust the bias voltage. wherein the target optical power is generally determined based on the optical power budget range of the optical link of the system where the optoelectronic component, light source pool, or optoelectronic switching device is located, to ensure that the system can be in a normal working state with a bit error rate less than a certain index. In this application, the optoelectronic component includes a load link and a feedback link. The load link serves as the load of the voltage conversion circuit and includes a voltage conversion circuit and a semiconductor optoelectronic device, while the feedback link includes a photoelectric detection circuit and a controller. The controller does not need to receive the current sampling information of the load link, and can adjust the bias voltage according to the output signal of the photoelectric detection circuit.

[0008] In the optoelectronic assembly provided in an embodiment of the present application, a voltage conversion circuit provides a bias voltage to a semiconductor optoelectronic device to adjust the optical power of light output by the semiconductor optoelectronic device; a photodetection circuit receives light output by the semiconductor optoelectronic device and detects the optical power of light output by the semiconductor optoelectronic device, outputting a detection signal to a controller; and the controller can determine a control signal for adjusting the bias voltage based on the detection signal and send the control signal to the voltage conversion circuit. No additional detection circuit is required between the voltage conversion circuit and the semiconductor optoelectronic device, and no additional power output by the voltage conversion circuit is consumed. Most of the power output by the voltage conversion circuit is converted into the optical power of light output by the semiconductor optoelectronic device, thereby improving the efficiency of the optoelectronic assembly.

[0009] The requirement that the differential resistance value Rdiff of the semiconductor optoelectronic device within the target optical power range must meet 0.1Ω≤Rdiff≤50Ω is mainly based on the following reasons:

[0010] When the differential resistance value Rdiff of a semiconductor optoelectronic device is too large within the target optical power range, a large bias voltage change is required to produce a small change in the equivalent current of the semiconductor optoelectronic device. In other words, when the bias voltage input to the semiconductor optoelectronic device changes significantly, the change in the equivalent current flowing through the semiconductor optoelectronic device is minimal, and the corresponding change in carrier concentration is minimal, insufficient to effectively change the optical power output by the semiconductor optoelectronic device. For example, assuming a differential resistance value Rdiff = 100Ω, a voltage change of 100mV is required to produce a current change of 1mA. This typically corresponds to a state just below the semiconductor optoelectronic device's conduction threshold, making it unsuitable for normal operation of an automatic power control (APC) loop. Even if the semiconductor optoelectronic device is in a good lasing state above the conduction threshold, achieving a current change of 10mA requires a voltage change of 1V for such a semiconductor optoelectronic device. This is limited in practical applications by the voltage output capability and voltage conversion efficiency of the voltage conversion circuit, making it difficult to implement.

[0011] When the differential resistance value Rdiff of a semiconductor optoelectronic device is too small within the target optical power range, a small change in the bias voltage input to the semiconductor optoelectronic device will cause a large change in the semiconductor optoelectronic device's current. Consequently, the carrier concentration changes significantly, and the output optical power of the semiconductor optoelectronic device fluctuates significantly, potentially entering a range where the optical power is too high or too low, or entering the semiconductor optoelectronic device's roll-off operating range (where the output optical power decreases as the injected current increases), making it difficult to use in APC. For example, assuming the differential resistance value of the semiconductor optoelectronic device within the target optical power range is 0.01Ω, when the input voltage changes by 1mV, the current flowing through the semiconductor optoelectronic device changes by 100mA, which is unacceptable for feedback regulation in the APC loop.

[0012] The semiconductor optoelectronic devices involved in the embodiments of the present application refer to light-emitting devices prepared based on semiconductor materials, including, for example, light sources (such as laser diodes (LD), lasers, lidars, etc.) or semiconductor optical amplifiers (SOA).

[0013] The bias adjustment circuit in the embodiment of the present application is a circuit used to adjust the bias voltage or bias current of a semiconductor optoelectronic device, such as an adjustable voltage source or an adjustable current source.

[0014] In the embodiment of the present application, a voltage conversion circuit is used to replace an adjustable current source to provide a bias voltage for a semiconductor optoelectronic device. The current of the load link is not collected. Only the optical power output by the optoelectronic component is collected as feedback to control the bias voltage output by the voltage conversion circuit, thereby achieving linear control and simple control logic. Compared with the prior art in which an adjustable current source is used to provide a driving current to a semiconductor optoelectronic device, providing a bias voltage to a semiconductor optoelectronic device by a voltage conversion circuit can improve conversion efficiency. The reason is that the solution provided by the embodiment of the present application can be applied to high-power and high-driving current application scenarios. For example, the optoelectronic component can be used as an external light source (i.e., a light source separated from an optical modulator), or as an optical amplifier. The optoelectronic component, light source pool, or optoelectronic switching device needs to output light to multiple silicon optical links. The optical power is high, up to about 100mW, requiring a high carrier density, that is, a large driving current needs to be injected. When an adjustable current source is used to provide a driving current to a semiconductor optoelectronic device, the larger the driving current, the greater the additional voltage drop generated by the current sampling circuit, and the lower the conversion efficiency of the entire optoelectronic component. Providing bias voltage to semiconductor optoelectronic devices through voltage conversion circuits (such as direct current-to-direct current (DC-DC) converters) essentially utilizes the charging and discharging of high-frequency switches, inductors, capacitors, and transformers to achieve voltage conversion, eliminating significant additional voltage drops and achieving conversion efficiencies of 90% or even 93%. Furthermore, eliminating the operational amplifiers required in optoelectronic components based on adjustable current sources reduces costs, increases integration, and facilitates miniaturization of optoelectronic components.

[0015] In one possible implementation, the optoelectronic component can be an external light source (ie, a light source separate from the optical modulator) or an optical amplifier. The optoelectronic component can be used as an external light source or an optical amplifier, which require high power and high drive current.

[0016] In a possible implementation, the semiconductor optoelectronic device is a light source, and within a target optical power range, a resistance of the light source is ≤60Ω.

[0017] In a possible implementation, the semiconductor optoelectronic device is an optical amplifier, and within a target optical power range, a resistance of the optical amplifier is ≤60Ω.

[0018] When the resistance value of the semiconductor optoelectronic device is low, it indicates that the semiconductor optoelectronic device is well-conducted and has entered a good lasing state. At this time, the current-voltage curve relationship of the semiconductor optoelectronic device changes relatively smoothly and has obvious linear characteristics. The differential resistance value of the semiconductor optoelectronic device is also moderate. At this time, changes in the bias voltage of the semiconductor optoelectronic device can cause the corresponding current of the semiconductor optoelectronic device to change relatively linearly, and then cause the carrier concentration of the semiconductor optoelectronic device to change relatively linearly, which can effectively change the output optical power of the semiconductor optoelectronic device relatively linearly. On the contrary, when the resistance value of the semiconductor optoelectronic device is large, it indicates that the state of the semiconductor optoelectronic device is close to the threshold on state. At this time, changes in the bias voltage of the semiconductor optoelectronic device can cause the corresponding current of the semiconductor optoelectronic device to change relatively nonlinearly, and then cause the carrier concentration of the semiconductor optoelectronic device to change relatively nonlinearly, making it difficult to effectively change the output optical power of the semiconductor optoelectronic device relatively linearly.

[0019] In one possible implementation, the voltage conversion circuit serves as the sole bias adjustment circuit for the semiconductor optoelectronic device. That is, the optical power of the semiconductor optoelectronic device is controlled solely by the bias voltage output by the voltage conversion circuit, without requiring an adjustable current source or the like to provide drive current.

[0020] In one possible implementation, the bit width of the digital signal processed by the controller is greater than or equal to 6 bits. The controller can be a micro-control unit (MCU) or a field programmable gate array (FPGA).

[0021] This application requires that the bit width of the digital signal processed by the controller is at least 6 bits, and the voltage change corresponding to the minimum weight bit can meet the demand for fine adjustment of the bias voltage output by the voltage conversion circuit, so as to achieve precise control of the bias voltage output by the voltage conversion circuit. If the number of bits of the digital signal processed by the controller is only 4 bits, taking the maximum value of the 4-bit binary number corresponding to the internal reference voltage of the controller 2.5V as an example, the voltage change corresponding to the minimum weight bit of the control signal Z output by the controller is 2.5V / 2^4≈156mV, and this voltage regulation accuracy is unacceptable. If the bit width of the digital signal processed by the controller is 6 bits, taking the maximum value of the 6-bit binary number corresponding to the internal reference voltage of the controller 2.5V as an example, the voltage change corresponding to the minimum weight bit of the control signal Z output by the controller is 2.5V / 2^6≈39mV. Even if the bias voltage accuracy of the voltage conversion circuit output is the same as the 39mV voltage change corresponding to the minimum weighted bit of the control signal Z, if the differential resistance value Rdiff of the semiconductor optoelectronic device within the target optical power range is 10Ω, a 39mV change in the bias voltage output by the voltage conversion circuit will result in a 3.9mA change in the current flowing through the semiconductor optoelectronic device. This can be considered an equivalent large current adjustment step size in the APC loop control, but it is acceptable. Furthermore, if the digital signal processed by the controller has an 8-bit bit width, taking the maximum value of an 8-bit binary number corresponding to the controller's internal reference voltage of 2.5V as an example, the voltage change corresponding to the minimum weighted bit of the control signal Z output by the controller is 2.5V / 2^8≈9.8mV. Even if the bias voltage accuracy of the voltage conversion circuit output is the same as the 9.8mV voltage change corresponding to the minimum weighted bit of the control signal Z, if the differential resistance value Rdiff of the semiconductor optoelectronic device within the target optical power range is 10Ω, when the bias voltage output by the voltage conversion circuit changes by 9.8mV, the current flowing through the semiconductor optoelectronic device changes by 0.98mA. This can be regarded as an equivalent smaller current adjustment step in the APC loop control and is acceptable.

[0022] In a possible implementation, the controller is further configured to enable or disable the voltage conversion circuit.

[0023] During controller initialization, the voltage conversion circuit is first disabled, and then enabled after the controller outputs a control signal to the voltage conversion circuit. Alternatively, the voltage conversion circuit can be disabled during controller initialization by fixing the input high and low levels or other logic gate circuits. Alternatively, during controller initialization, the voltage conversion circuit can be enabled via a soft start circuit, thereby turning on the semiconductor optoelectronic device. This can prevent the control signal from being unstable during initialization, which could cause the bias voltage output by the voltage conversion circuit to be excessive and burn out the semiconductor optoelectronic device. Otherwise, if the voltage conversion circuit is already in the enabled state before the controller outputs the control signal, the bias voltage output by the voltage conversion circuit is uncontrolled and may be excessive, thereby burning out the semiconductor optoelectronic device on the load link. In addition, these methods can be combined.

[0024] In a possible implementation, the controller is configured to: obtain load link information, and determine a control signal according to the load link information and a detection signal, wherein the load link information includes a value of a bias voltage.

[0025] If the load link information indicates the actual value of the bias voltage, the deviation between the theoretical and actual values ​​of the bias voltage caused by device parameter deviations and fluctuations in the feedback network can be eliminated, providing a more accurate input for the controller to obtain the control signal Z. For example, the controller can calculate the control signal Z according to the formula Z = A*X + B*Y + C or obtain the control signal Z by looking up the table, where A is the adjustment rule corresponding to the load link information X, B is the adjustment rule corresponding to the backlight sampling voltage Y, and C is the fitting constant. The values ​​of A, B, and C can be found in a pre-calibrated or fitted table in the controller or calculated in real time. Furthermore, the values ​​of A, B, and C in the pre-calibrated or fitted table in the controller can be corrected based on the actual accurate input.

[0026] In a possible implementation, the optoelectronic component further includes a temperature control drive circuit and a temperature control circuit. The temperature control drive circuit is used to supply power to the temperature control circuit, and the temperature control circuit is used to control the temperature of the semiconductor optoelectronic device.

[0027] Temperature control can include, for example, cooling or heating to keep the semiconductor optoelectronic device operating at a preset operating temperature to increase the output optical power or extend the service life of the semiconductor optoelectronic device. Exemplarily, the temperature control circuit can be a thermoelectric cooler (TEC).

[0028] In a possible implementation, the power supply voltage input to the temperature control driving circuit ranges from 2V to 18V.

[0029] The magnitude of the supply voltage can be optimized based on the voltage, current, cooling capacity, heating capacity, cooling power consumption, heating power consumption, etc. of the temperature control drive circuit and the temperature control circuit to improve the power supply efficiency of the temperature control circuit. For example, the supply voltage can be 3.3V, 5V, or 12V, etc., and the deviation accuracy of the supply voltage can be less than or equal to 20%. Furthermore, the deviation accuracy of the supply voltage can be less than or equal to 10%, and further, the deviation accuracy of the supply voltage can be less than or equal to 5%.

[0030] In a possible implementation manner, the supply voltage of the voltage conversion voltage input ranges from 1.8V to 18V.

[0031] The magnitude of the supply voltage can be optimized based on the input-output voltage variation curve efficiency of the voltage conversion circuit to maximize the voltage conversion efficiency of the voltage conversion circuit. For example, the supply voltage can be 3.3V, 5V, or 12V, etc., and the deviation accuracy of the supply voltage can be less than or equal to 20%. Furthermore, the deviation accuracy of the supply voltage can be less than or equal to 10%, and further, the deviation accuracy of the supply voltage can be less than or equal to 5%.

[0032] In one possible embodiment, the supply voltage input to the controller is in the range of 1.5V to 6V. The magnitude of the supply voltage can be optimized based on the voltage, current, and power consumption of components such as the controller, analog-to-digital converter, and digital-to-analog converter to ensure the normal operation of the above components and improve system stability. Exemplarily, the supply voltage can be in the range of 1.8V to 3.6V. Further, the supply voltage can be 3.3V. The deviation accuracy of the supply voltage can be less than or equal to 20%. Further, the deviation accuracy of the supply voltage can be less than or equal to 10%. Further, the deviation accuracy of the supply voltage can be less than or equal to 5%.

[0033] The power supply voltage connected to the voltage conversion circuit, temperature control drive circuit and controller is determined according to the load characteristics of the coupled devices, which can improve power supply efficiency, reduce energy consumption and improve system stability.

[0034] In one possible implementation, if the detection signal is less than a first threshold, the control signal instructs the bias voltage to be increased. The detection signal corresponds to the optical power output by the semiconductor optoelectronic device. If the detection signal is less than the first threshold, it indicates that the optical power output by the semiconductor optoelectronic device is too low. Therefore, the control signal instructs the voltage conversion circuit to increase the bias voltage to increase the optical power output by the semiconductor optoelectronic device.

[0035] In one possible implementation, if the detection signal is greater than a second threshold, the control signal instructs the bias voltage to be reduced. The detection signal corresponds to the optical power output by the semiconductor optoelectronic device. A detection signal greater than the second threshold indicates that the optical power output by the semiconductor optoelectronic device is excessive. Therefore, the control signal instructs the voltage conversion circuit to reduce the bias voltage to increase the optical power output by the semiconductor optoelectronic device.

[0036] In one possible embodiment, the voltage conversion circuit includes a first voltage conversion circuit and a second voltage conversion circuit, the semiconductor optoelectronic device includes a first semiconductor optoelectronic device and a second semiconductor optoelectronic device, and the photodetection circuit includes a first photodetection circuit and a second photodetection circuit; the first photodetection circuit is used to detect the output optical power output by the first semiconductor optoelectronic device and output a first detection signal to the controller; the second photodetection circuit is used to detect the output optical power output by the second semiconductor optoelectronic device and output a second detection signal to the controller; the controller is used to determine a first control signal based on the first detection signal and send the first control signal to the first voltage conversion circuit, the first control signal being used to adjust the bias voltage provided to the first semiconductor optoelectronic device; the second control signal is determined based on the second detection signal and sent to the second voltage conversion circuit, the second control signal being used to adjust the bias voltage provided to the second semiconductor optoelectronic device.

[0037] The optoelectronic component provided in the embodiment of the present application is not limited to supporting two semiconductor optoelectronic devices to output light, but may also include more semiconductor optoelectronic devices, thereby being able to output multiple paths of light.

[0038] In one possible embodiment, the optoelectronic component also includes a digital-to-analog converter; the controller is used to send the first control signal and the second control signal in a serial manner to the digital-to-analog converter; the digital-to-analog converter is used to perform digital-to-analog conversion on the first control signal and output it to the first voltage conversion circuit, and to perform digital-to-analog conversion on the second control signal and output it to the second voltage conversion circuit.

[0039] This implementation improves the design flexibility of optoelectronic components, further reducing the resource requirements of the controller's digital-to-analog conversion port, reducing the number of digital-to-analog converters, lowering costs, improving integration, and facilitating miniaturization of optoelectronic components. For example, if a digital-to-analog converter converts two digital signals into one analog signal, the number of digital-to-analog converters can be reduced by 50%. When the digital-to-analog converter can convert more digital signals into one analog signal, the number of digital-to-analog converters can be further reduced.

[0040] In one possible implementation, the bit width of the digital-to-analog converter is greater than or equal to 6 bits. Exemplarily, the bit width of the digital-to-analog converter is consistent with the bit width of the digital signal processed by the controller.

[0041] In one possible embodiment, the semiconductor optoelectronic device includes a first semiconductor optoelectronic device and a second semiconductor optoelectronic device, and the photoelectric detection circuit includes a first photoelectric detection circuit and a second photoelectric detection circuit; the first photoelectric detection circuit is used to detect the output optical power of the first semiconductor optoelectronic device and output a first detection signal to the controller; the second photoelectric detection circuit is used to detect the output optical power of the second semiconductor optoelectronic device and output a second detection signal to the controller; the controller is used to determine a control signal based on the first detection signal and the second detection signal, and send it to the voltage conversion circuit, and the control signal is used to adjust the bias voltage provided to the first semiconductor optoelectronic device and the second semiconductor optoelectronic device.

[0042] In a possible implementation, if the first detection signal is smaller than the second detection signal and the first detection signal is smaller than a first threshold, the control signal instructs to increase the bias voltage.

[0043] In a possible implementation, if the first detection signal is smaller than the second detection signal, and the second detection signal is greater than a second threshold, the control signal instructs to reduce the bias voltage.

[0044] In a possible embodiment, the optoelectronic component further includes an analog-to-digital converter, which is used to perform analog-to-digital conversion on the first detection signal, perform analog-to-digital conversion on the second detection signal, and output the analog-to-digital converted first detection signal and the second detection signal to the controller in serial.

[0045] This implementation improves the design flexibility of optoelectronic components, further reducing the resource requirements of analog-to-digital conversion ports, reducing the number of analog-to-digital converters, lowering costs, improving integration, and facilitating miniaturization of optoelectronic components. For example, if an analog-to-digital converter converts two analog signals into one digital signal, the number of analog-to-digital converters can be reduced by 50%. When the analog-to-digital converter can convert more analog signals into one digital signal, the number of analog-to-digital converters can be further reduced.

[0046] In one possible implementation, the bit width of the analog-to-digital converter is greater than or equal to 6 bits. Exemplarily, the bit width of the analog-to-digital converter is consistent with the bit width of the digital signal processed by the controller.

[0047] In a possible implementation, the optoelectronic component further includes a feedback network, and the feedback network is used to amplify or reduce the voltage range of the control signal.

[0048] The feedback network can further improve the accuracy of the control signal and the accuracy of the bias voltage output by the voltage conversion circuit, that is, equivalently improve the resolution of the analog-to-digital conversion interface in the DAC or controller.

[0049] In one possible embodiment, the feedback network includes a first resistor, a second resistor, and a third resistor, the second end of the first resistor is grounded, the first end of the first resistor, the second end of the second resistor, and the first end of the third resistor are coupled to the feedback end of the voltage conversion circuit, the first end of the second resistor is coupled to the output end of the voltage conversion circuit, and the second end of the third resistor is coupled to the output end of the controller; wherein the output end of the controller is used to output a control signal; and the feedback end of the voltage conversion circuit is used to input an amplified or reduced control signal.

[0050] The feedback network based on the resistor divider network achieves linear amplification or reduction of the control signal by the feedback control signal, thereby adapting to the signal range required by the voltage conversion circuit input and improving the accuracy of the control signal. Furthermore, the feedback network has a simple design and a compact structure, facilitating the miniaturization of the entire optoelectronic assembly.

[0051] In a possible implementation, the voltage conversion circuit is a DC-DC conversion circuit.

[0052] In this application, the charging and discharging of high-frequency switches, inductors, capacitors, transformers, etc. in the DC-DC conversion circuit are used to achieve voltage conversion without generating a large additional voltage drop, and the conversion efficiency can reach 90% or even 93%.

[0053] In a second aspect, a light source pool is provided, comprising at least one optoelectronic component as described in the first aspect and any embodiment thereof.

[0054] The solution provided by the embodiments of this application can be applied to high-power, high-drive-current applications. The light source pool needs to output light to multiple silicon photonic links. The light output power is high, reaching approximately 100mW, requiring a high carrier density, which means a large drive current needs to be injected. For a 10W light source pool, using the optoelectronic assembly of this application can save nearly 3W of power consumption, greatly improving the product's thermal design, reliability, service life, and external power supply pressure. It can also achieve product miniaturization, thereby enhancing the product's overall competitiveness.

[0055] In a third aspect, an optoelectronic switching device is provided, comprising at least one of the optoelectronic component described in the first aspect and any embodiment thereof or the light source pool described in the second aspect, an optical modulator and a switching chip, wherein the optoelectronic component or the light source pool is used to output light, and the switching chip is used to control the optical modulator to modulate the light output by the optoelectronic component or the light source pool.

[0056] The solution provided in the embodiments of the present application can be applied to application scenarios with high power and high driving current. The optoelectronic switching device requires at least one of the optoelectronic components or the light source pool to output light to multiple silicon optical links of the optical modulator in the optoelectronic switching device. The output light power is high, which can reach about 100mW. It requires a high carrier density, that is, a large driving current needs to be injected. The optoelectronic switching device can be miniaturized, the driving efficiency can be improved, and the power consumption of the entire optoelectronic switching device can be reduced.

[0057] In one possible embodiment, the optoelectronic switching device also includes a first controller, which can determine a single-board control signal based on whether the optical power output by the optoelectronic switching device meets the requirements, and output the single-board control signal to the controller of the optoelectronic component to request adjustment of the output optical power of the optoelectronic component or the light source pool, or output the single-board control signal to the controller of the light source pool to request adjustment of the output optical power of the light source pool, so that the optical power output by the optoelectronic switching device increases, decreases or drops to zero.

[0058] In a fourth aspect, a control method for a photoelectric component is provided, which can be applied to the photoelectric component described in the first aspect and any embodiment thereof; the method includes: receiving a detection signal from a photoelectric detection circuit in the photoelectric component, wherein the detection signal is used to indicate the output optical power of the semiconductor photoelectric device in the photoelectric component; determining a control signal based on the detection signal, and sending the control signal to the voltage conversion circuit in the photoelectric component, wherein the control signal is used to adjust the bias voltage.

[0059] In a possible implementation, the method further includes: disabling the voltage conversion circuit, and outputting a preset control signal to the voltage conversion circuit to enable the voltage conversion circuit.

[0060] In a possible implementation, if the detection signal is smaller than a first threshold, the control signal instructs to increase the bias voltage.

[0061] In a possible implementation, if the detection signal is greater than a second threshold, the control signal instructs to reduce the bias voltage.

[0062] In a possible implementation, the method further includes: acquiring load link information, wherein the load link information includes a bias voltage value; and determining a control signal according to the detection signal, including: determining the control signal according to the load link information and the detection signal.

[0063] In a possible embodiment, it also includes: sending the first control signal and the second control signal in a serial manner to the digital-to-analog converter in the optoelectronic component, the first control signal is used to adjust the bias voltage provided to the first semiconductor optoelectronic device, and the second control signal is used to adjust the bias voltage provided to the second semiconductor optoelectronic device.

[0064] In a possible embodiment, it also includes: determining a control signal based on the first detection signal and the second detection signal, and sending it to the voltage conversion circuit, the control signal is used to adjust the bias voltage provided to the first semiconductor optoelectronic device and the second semiconductor optoelectronic device, the first detection signal is used to indicate the output optical power of the first semiconductor optoelectronic device, and the second detection signal is used to indicate the output optical power of the second semiconductor optoelectronic device.

[0065] In a possible implementation, if the first detection signal is smaller than the second detection signal and the first detection signal is smaller than a first threshold, the control signal instructs to increase the bias voltage.

[0066] In a possible implementation, if the first detection signal is smaller than the second detection signal, and the second detection signal is greater than a second threshold, the control signal instructs to reduce the bias voltage.

[0067] Regarding the technical effects of the second to fourth aspects, reference may be made to the technical effects of the first aspect and any of its embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] Figure 1 A schematic diagram of the structure of an optoelectronic switching device provided in an embodiment of the present application;

[0069] Figure 2 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 1 ;

[0070] Figure 3 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 2 ;

[0071] Figure 4 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 3 ;

[0072] Figure 5 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 4 ;

[0073] Figure 6 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 5 ;

[0074] Figure 7 A schematic diagram of a coupling method between a power supply, a voltage conversion circuit, and a semiconductor optoelectronic device provided in an embodiment of the present application;

[0075] Figure 8 A schematic diagram of a coupling method between an ADC and a controller provided in an embodiment of the present application;

[0076] Figure 9 A schematic diagram of a coupling method between a DAC and a controller provided in an embodiment of the present application;

[0077] Figure 10 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 6 ;

[0078] Figure 11 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 7 ;

[0079] Figure 12 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 8 ;

[0080] Figure 13 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 9 ;

[0081] Figure 14 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 10 ;

[0082] Figure 15 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 10 one;

[0083] Figure 16 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 10 two;

[0084] Figure 17 A schematic diagram of a coupling method between a power supply, a voltage conversion circuit, a temperature control drive circuit, and a controller provided in an embodiment of the present application;

[0085] Figure 18 A schematic diagram of the structure of an optoelectronic component provided in an embodiment of the present application Figure 10 three;

[0086] Figure 19 A schematic flow chart of a control method for a photoelectric component provided in an embodiment of the present application;

[0087] Figure 20 A flowchart of another method for controlling an optoelectronic component provided in an embodiment of the present application. DETAILED DESCRIPTION

[0088] The rapid development of technologies such as cloud computing, big data, fifth-generation (5G) communications, and autonomous driving has led to higher requirements for optoelectronic modules used in optical communication networks—miniaturization, high bandwidth, and low power consumption. This high bandwidth demands ever-increasing optical power from the semiconductor optoelectronic devices used in optoelectronic modules, which in turn drives increasing drive current and power consumption. For example, Table 1 shows the drive current and power consumption of semiconductor optoelectronic devices in different application scenarios. This negatively impacts miniaturization and low-power designs, creating unprecedented challenges for the design of driver circuits for semiconductor optoelectronic devices.

[0089] Table 1

[0090]

[0091] The semiconductor optoelectronic devices involved in the embodiments of the present application refer to light-emitting devices made based on semiconductor materials, including, for example, laser diodes (LDs), lasers, semiconductor optical amplifiers (SOAs), lidars and other devices.

[0092] Current optoelectronic components use the drive current (also called bias current) output by an adjustable current source to adjust the optical power output by semiconductor optoelectronic devices. This solution has the following disadvantages:

[0093] 1. Low driving efficiency: Since the optoelectronic component needs to transform the input voltage and output it to the adjustable current source, the conversion efficiency will be reduced. The driving current output by the adjustable current source must also pass through the current sampling circuit to detect the driving current, which will produce unnecessary voltage drop and further reduce the conversion efficiency. Therefore, the conversion efficiency of the entire optoelectronic component is about 66.5%.

[0094] 2. Multiple feedback loops, multiple input parameters for adjustment, and complex rules: When adjusting the bias current output by the adjustable current source, the optoelectronic component relies on multiple input parameters, including, for example, the current value of the drive current and the optical power output by the semiconductor optoelectronic device. Simple linear control cannot be achieved, making the control rules complex.

[0095] 3. The system requires an additional current sampling circuit, and the hardware cost is high: Since a current sampling circuit needs to be added to detect the driving current, sometimes in order to improve the resolution of detecting the driving current, an operational amplifier needs to be added to amplify the sampling value of the driving current, which is not conducive to system miniaturization and cost reduction.

[0096] 4. In order to achieve precise control of the driving current, the number of bits of the digital-to-analog-to-digital conversion in the optoelectronic component needs to reach a certain number so that the change in voltage or current corresponding to the minimum weight bit of the digital-to-analog-to-digital conversion meets the requirements of precise control. Normally, it needs to reach about 10 bits.

[0097] 5. Failure to consider the power-on sequence of different components in the system and the protection of semiconductor optoelectronic devices may easily cause the semiconductor optoelectronic devices to be over-biased and burn out.

[0098] To this end, embodiments of the present application provide a photoelectric component, a light source pool including a photoelectric component, a photoelectric switching device including at least one of the photoelectric component or the light source pool, and a control method for the photoelectric component, wherein a voltage conversion circuit in the photoelectric component provides a bias voltage to a semiconductor photoelectric device in the photoelectric component to adjust the output optical power of the semiconductor photoelectric device; a photoelectric detection circuit in the photoelectric component receives light output by the semiconductor photoelectric device and detects the output optical power of the semiconductor photoelectric device, and outputs a detection signal to a controller in the photoelectric component; the controller can determine a control signal for adjusting the bias voltage based on the detection signal and send it to the voltage conversion circuit. The differential resistance value Rdiff of the semiconductor photoelectric device within the target optical power range satisfies 0.1Ω≤Rdiff≤50Ω, and the differential resistance value refers to the ratio of the voltage change to the current change corresponding to the voltage change. Exemplarily, the differential resistance value Rdiff of the semiconductor optoelectronic device within the target optical power range satisfies 0.1Ω≤Rdiff≤20Ω. As another example, the differential resistance value Rdiff of the semiconductor optoelectronic device within the target optical power range satisfies 1Ω≤Rdiff≤15Ω, or satisfies 2Ω≤Rdiff≤10Ω, or satisfies 2Ω≤Rdiff≤8Ω, or satisfies 2Ω≤Rdiff≤6Ω.

[0099] A voltage conversion circuit replaces an adjustable current source to provide bias voltage for semiconductor optoelectronic devices. Instead of sampling the load link current, only the optical power output by the optoelectronic component is collected as feedback to control the bias voltage output by the voltage conversion circuit, achieving linear control and simplifying the control logic. Furthermore, since the current sampling circuit that collects the load link current is eliminated, only semiconductor optoelectronic devices are present in the load link, eliminating the voltage drop generated by the current sampling circuit. The power conversion efficiency of the voltage conversion circuit can reach as high as 90% or even 93%, an improvement of (90-66.5) / 66.5=35% compared to solutions using an adjustable current source to provide the drive current. The lack of an operational amplifier reduces costs, increases integration, and facilitates miniaturization of optoelectronic components.

[0100] The optoelectronic components, light source pools, optoelectronic switching devices, and control methods of optoelectronic components provided in the embodiments of the present application can be applied to application scenarios that require large driving currents, such as 10G passive optical networks (XGPON), 50G passive optical networks (50GPON), SOA, and autonomous driving lidar.

[0101] like Figure 1 As shown, the optoelectronic switching device 11 provided in an embodiment of the present application includes at least one of an optoelectronic component 111 or a light source pool 112, multiple optical power splitters 113, multiple optical modulators 114, multiple wavelength division multiplexers 115, a multi-channel optical fiber array 116, a first optoelectronic switching chip 117 and a controller 118.

[0102] It should be noted that, in the first embodiment, the optoelectronic switching device 11 may include a light source pool 112, an optical power splitter 113, an optical modulator 114, and a multi-channel optical fiber array 116. Alternatively, in the second embodiment, the optoelectronic switching device 11 may include an optoelectronic component 111, an optical power splitter 113, an optical modulator 114, and a multi-channel optical fiber array 116. Alternatively, in the third embodiment, the optoelectronic switching device 11 may include a light source pool 112, an optical power splitter 113, an optical modulator 114, and a wavelength division multiplexer 115. Alternatively, any combination of these three embodiments may be used.

[0103] The light source pool 112 may include at least one optoelectronic component 111, each optoelectronic component 111 is used to output light of a wavelength (such as laser or fluorescence), and the wavelengths of the light output by different optoelectronic components 111 may be the same or different. The optical power splitter 113 can split one path of light output by an optoelectronic component 111 according to the optical power, thereby outputting multiple paths of light to multiple optical modulators 114. The first optoelectronic switching chip 117 controls each optical modulator 114 to modulate one path of light output by the optical power splitter 113 to output one path of optical signal. Each wavelength division multiplexer 115 is used to multiplex multiple paths of optical signals of different wavelengths to transmit multiple paths of optical signals to the receiving end 12 through one optical fiber in a coarse wavelength division multiplexing (CWDM) manner, thereby reducing the number of optical fibers. The multiplexing here can be different depending on the wavelength combination of the laser, and can also be medium wavelength division multiplexing (MWDM), lane wavelength division multiplexing (LWDM), dense wavelength division multiplexing (DWDM), etc., or it can be a combination of the above different wavelength division multiplexing according to actual applications. The optical fiber array 116 is used to couple and output multiple wavelength optical signals through a multi-fiber push-on (MPO) interface to transmit multiple optical signals to the receiving end 12 through a parallel single-mode fiber (PSM). The second optoelectronic switching chip 121 of the receiving end 12 demodulates the optical signal received by the high-speed optical module 122. For example, if each channel of the optical modulator 114 is 100Gbps, the high-speed optical module 122 corresponding to the PSM solution can be a 400G DR4 optical module, and the high-speed optical module 122 corresponding to the CWDM solution under each 100G channel can be a 400G FR4 optical module. For example, if each optical modulator 114 is 50 Gbps, and each fiber array 116 connects to an eight-channel silicon photonic link with optical modulators 114, the high-speed optical module 122 corresponding to the LWDM solution can be a 400GLR8 optical module. Furthermore, if the receiving end 12 is also located on another optoelectronic switching device similar to the optoelectronic switching device 11, the high-speed optical module 122 can also be the silicon photonic receiving end on the corresponding optical modulator, used to receive and recover multiple optical signals.

[0104] The controller 118 can determine the single-board control signal based on whether the optical power output by the optoelectronic switching device 11 meets the requirements, and output the single-board control signal to the controller of the optoelectronic component 111 to request adjustment of the output optical power output by the optoelectronic component 111, or output the single-board control signal to the controller of the light source pool 112 to request adjustment of the output optical power output by the light source pool 112, so that the optical power output by the optoelectronic switching device 11 increases, decreases or drops to zero.

[0105] Generally, the power supply or power supply interface in the optoelectronic assembly 111 or the light source pool 112 is located in the optoelectronic switching device 11, specifically, on a single board of the optoelectronic switching device 11. In particular, the compact, highly efficient parallel multi-channel driver on the light source pool 112 or the optoelectronic assembly 111 is located on a single board of the optoelectronic switching device 11.

[0106] In the silicon photosynthetic sealed optical communication system of the optoelectronic switching device 11, the light source pool 112 or the optoelectronic component 111 is a pluggable module, which can be used to provide an external high-power light source for the silicon photosynthetic sealed optical communication system. The silicon photosynthetic sealed optical communication system can achieve optical communications of 1.6Tbps, 3.2Tbps, ..., 25.6Tbps, 21.2Tbps or even higher capacities. The optoelectronic component 111, the light source pool 112 or the optoelectronic switching device 11 is used to output light to multiple silicon optical links, and the output light power is high, which can reach about 100mW. The improvement in driving efficiency can reduce the power consumption of the entire optoelectronic switching device 11. It is of great significance to the power consumption and heat dissipation design of the entire silicon photosynthetic sealed optical communication system. For a 10W light source pool, the use of the optoelectronic component of the present application can save 3W of power consumption, which can greatly improve the thermal design, reliability, service life and external power supply pressure of the product, thereby enhancing the overall competitiveness of the product. At the same time, the compact structure of the driving circuit of the light source pool 112 or the optoelectronic component 111 can improve the panel area utilization of the optoelectronic switching device 11, help miniaturize the equipment, improve the communication capacity of the system, and further enhance the overall competitiveness of the product.

[0107] The following introduces the possible structures of the optoelectronic components provided in the embodiments of the present application.

[0108] like Figure 2 and Figure 3 As shown, the optoelectronic component includes a voltage conversion circuit 21, a semiconductor optoelectronic device 22, a photodetection circuit 23 and a controller 24. Figure 3As shown, the optoelectronic component may further include a feedback network 31. When the controller 24 does not have an analog-to-digital conversion interface and a digital-to-analog conversion interface, or when the analog-to-digital conversion interface and the digital-to-analog conversion interface resources of the controller 24 are insufficient, the optoelectronic component may further include an analog-to-digital converter (ADC) 32 and a digital-to-analog converter (DAC) 33. When the controller 24 has an analog-to-digital conversion interface (i.e., it can directly input analog signals) and a digital-to-analog conversion interface (i.e., it can directly output analog signals), or when the analog-to-digital conversion interface and the digital-to-analog conversion interface resources of the controller 24 are sufficient, the ADC 32 may be the analog-to-digital conversion interface in the controller 24, and the DAC 33 may be the digital-to-analog conversion interface in the controller 24.

[0109] The power supply 25 can supply power to the entire optoelectronic component through M (M≥1) power supply interfaces, and the supply voltages of the M power supplies can be the same or different. Taking a common optoelectronic component as an example, the supply voltage of the power supply 25 can be a fixed voltage of 3.3V.

[0110] The voltage conversion circuit 21 can be an adjustable voltage source, a DC-DC conversion circuit, a DC-DC conversion chip, or a device or module with an adjustable voltage output. It can convert the input supply voltage into W (W ≥ 1) bias voltages through DC-DC conversion and output them to the semiconductor optoelectronic device 22 to drive the semiconductor optoelectronic device 22. The bias voltages output by the voltage conversion circuit 21 can be adjusted according to the W control signals Z output by the controller 24, thereby adjusting the output optical power of the semiconductor optoelectronic device 22. The voltage conversion circuit 21 may serve as the sole bias adjustment circuit for the semiconductor optoelectronic device 22. In other words, the output optical power of the semiconductor optoelectronic device 22 is controlled solely by the bias voltage output by the voltage conversion circuit 21. In order for the semiconductor optoelectronic device 22 to operate normally, each bias voltage output by the voltage conversion circuit 21 must be greater than 1.0V, and the supply voltage Vcc of the power supply 25 must be greater than 1.3V. To ensure high energy conversion efficiency during voltage conversion, each bias voltage output by the voltage conversion circuit 21 must be less than 0.9*Vcc.

[0111] The bias adjustment circuit is a circuit used to adjust the bias voltage or bias current of a semiconductor optoelectronic device, such as an adjustable voltage source or an adjustable current source.

[0112] Compared to the prior art in which an adjustable current source provides a driving current to the semiconductor optoelectronic device 22, the voltage conversion circuit 21 provides a bias voltage to the semiconductor optoelectronic device 22 to improve the conversion efficiency. The reason is that the solution provided in the embodiment of the present application can be applied to high-power and high-driving current application scenarios. Optoelectronic components, light source pools or optoelectronic switching equipment need to output light to multiple silicon photonic links. The output light power is high, up to about 100mW, requiring a high carrier density, that is, a large driving current needs to be injected. According to the analysis of providing a driving current to the semiconductor optoelectronic device through an adjustable current source, it can be seen that the greater the driving current, the greater the additional voltage drop generated by the current sampling circuit, and the lower the conversion efficiency of the entire optoelectronic component. Providing a bias voltage to the semiconductor optoelectronic device 22 through a voltage conversion circuit (such as a DC-DC conversion circuit) 21 essentially uses the charging and discharging of high-frequency switches, inductors, capacitors, transformers, etc. to achieve voltage conversion, which does not generate a large additional voltage drop, and the conversion efficiency can reach 90% or even 93%.

[0113] like Figure 4 As shown, the semiconductor optoelectronic device 22 can be a light source (such as an LED, a laser, a lidar, etc.), and the bias voltage is used to drive the semiconductor optoelectronic device 22 to emit light. Alternatively, as shown in FIG. Figure 5 As shown, the semiconductor optoelectronic device 22 can also be an SOA. In this case, the semiconductor optoelectronic device 22 is also coupled to a light source 51. The light source 51 can be an external light source or a light source within the optoelectronic component. In this case, the bias voltage is used to drive the semiconductor optoelectronic device 22 to amplify the light output by the light source 51. The semiconductor optoelectronic devices 22 are located on P load links, and the number of semiconductor optoelectronic devices 22 can be N (N ≥ 1). The light output of the semiconductor optoelectronic device 22 includes two parts: the first part is the light output of the entire optoelectronic component (such as laser or fluorescence), and the second part (usually backlight) is output to the photodetection circuit 23 for detecting the optical power of the semiconductor optoelectronic device 22. In order to ensure that the APC loop operates within the normal range and that the current-voltage relationship curve of the semiconductor optoelectronic device 22 has a flat linearity, the differential resistance value Rdiff of the semiconductor optoelectronic device 22 within the target optical power range must be neither too small nor too large. For example, the differential resistance value Rdiff of the semiconductor optoelectronic device 22 within the target optical power range satisfies 0.1Ω≤Rdiff≤50Ω.

[0114] In the embodiments of the present application, the target optical power generally refers to the target optical power determined based on the optical power budget range of the optical link of the system where the optoelectronic component, light source pool or optoelectronic switching device is located, to ensure that the system can be in a normal working state with a bit error rate less than a certain index. For example, to support the normal operation of 4 100Gpbs silicon photonic modulation links, the target optical power range of the optoelectronic component, light source pool or optoelectronic switching device can be 50mW to 150mW; further, the target optical power range of the optoelectronic component, light source pool or optoelectronic switching device can be 64mW to 120mW; further, the target optical power range of the optoelectronic component, light source pool or optoelectronic switching device can also be 64mW to 100mW, reducing the power consumption of the system while ensuring the optical power budget of the system optical link. As another example, to support the normal operation of 8 100Gpbs silicon photonic modulation links, the target optical power range of the optoelectronic component, light source pool or optoelectronic switching device can be 150mW to 300mW; further, the target optical power range of the optoelectronic component, light source pool or optoelectronic switching device can be 150mW to 250mW.

[0115] In an embodiment of the present application, the differential resistance value Rdiff of the semiconductor optoelectronic device within the target optical power range is Rdiff = dV / dI, where dI is the current change caused by the current flowing through the semiconductor optoelectronic device when the input voltage produces a voltage change dV, that is, the differential resistance value Rdiff is the ratio of the voltage change dV to the current change dI corresponding to the voltage change dV.

[0116] It should be noted that, in the embodiment of the present application, in order to keep the output laser light power stable within a certain range, the controller 24 will perform APC. The APC loop refers to a loop formed by the voltage conversion circuit 21, the semiconductor optoelectronic device 22, the photodetection circuit 23 and the controller 24. The controller 24 can detect the output light power of the semiconductor optoelectronic device 22 through the photodetection circuit 23, and then adjust the output light power of the semiconductor optoelectronic device 22 by controlling the bias voltage output by the voltage conversion circuit 21 to the semiconductor optoelectronic device 22, that is, the controller 24 can implement APC for the semiconductor optoelectronic device 22. The APC loop working in the normal range means that the bias voltage output by the voltage conversion circuit 21 is moderate, so that the semiconductor optoelectronic device 22 can emit light normally, and the output light power output by the semiconductor optoelectronic device 22 is within the target optical power range. Among them, the load link includes the device coupled to the voltage output end of the voltage conversion circuit 21, for example, including the semiconductor optoelectronic device 22.

[0117] When the differential resistance value Rdiff of the semiconductor optoelectronic device 22 is too large within the target optical power range, a large bias voltage change is required to induce a small current change in the equivalent current of the semiconductor optoelectronic device 22. In other words, when the bias voltage input to the semiconductor optoelectronic device 22 changes significantly, the change in the equivalent current flowing through the semiconductor optoelectronic device 22 is very small, and accordingly, the change in carrier concentration is very small, insufficient to effectively adjust the optical power output by the semiconductor optoelectronic device 22. For example, assuming a differential resistance value Rdiff = 100Ω, a voltage change of 100mV is required to induce a current change of 1mA. This typically corresponds to a state before the semiconductor optoelectronic device 22 reaches the conduction threshold, making it unsuitable for normal operation of the APC loop. Even if the semiconductor optoelectronic device 22 is in a lasing state above the conduction threshold, a voltage change of 1V is required to achieve a current change of 10mA. In practical applications, such semiconductor optoelectronic devices are limited by the voltage output capability and voltage conversion efficiency of the voltage conversion circuit 21, making them difficult to use.

[0118] When the differential resistance value Rdiff of the semiconductor optoelectronic device 22 is too small within the target optical power range, a small change in the bias voltage input to the semiconductor optoelectronic device 22 will cause a large change in the current of the semiconductor optoelectronic device 22. Consequently, the carrier concentration changes significantly, and the output optical power of the semiconductor optoelectronic device 22 changes significantly, potentially entering a range where the optical power is too high or too low, or entering the roll-off operating range of the semiconductor optoelectronic device 22 (i.e., the output optical power decreases as the injected current increases), making it difficult to use in APC. For example, assuming the differential resistance value of the semiconductor optoelectronic device 22 within the target optical power range is 0.01Ω, when the input voltage changes by 1mV, the current flowing through the semiconductor optoelectronic device 22 changes by 100mA, which is unacceptable for feedback regulation in the APC loop.

[0119] Therefore, in the embodiment of the present application, the differential resistance value Rdiff of the semiconductor optoelectronic device 22 within the target optical power range satisfies the condition 0.1Ω≤Rdiff≤50Ω. Taking the differential resistance value of the semiconductor optoelectronic device 22 within the target optical power range as an example, when the bias voltage output by the voltage conversion circuit 21 changes by 1mV, the current flowing through the semiconductor optoelectronic device 22 changes by 5mA. During the APC loop adjustment process, this is suitable for situations where the equivalent adjustment current step size is large. Taking the differential resistance value of the semiconductor optoelectronic device 22 within the target optical power range as an example, when the bias voltage output by the voltage conversion circuit 21 changes by 1mV, the current flowing through the semiconductor optoelectronic device 22 changes by 0.5mA. During the APC loop adjustment process, this is suitable for situations where the equivalent adjustment current step size is small. Taking the differential resistance value of the semiconductor optoelectronic device 22 within the target optical power range as an example, when the bias voltage output by the voltage conversion circuit 21 changes by 1mV, the current flowing through the semiconductor optoelectronic device 22 changes by 0.05mA. During the APC loop adjustment process, it is applicable to situations where the equivalent adjustment current step size is finer.

[0120] Furthermore, when the APC loop operates within the normal range, the resistance of the semiconductor optoelectronic device 22 within the target optical power range is ≤60Ω. When the resistance of the semiconductor optoelectronic device 22 is low, it indicates that the semiconductor optoelectronic device 22 is conducting properly and has entered a good lasing state. At this point, the current-voltage curve of the semiconductor optoelectronic device 22 changes relatively smoothly and has a distinct linear characteristic. The differential resistance of the semiconductor optoelectronic device 22 is also moderate. At this point, changes in the bias voltage of the semiconductor optoelectronic device 22 can cause a relatively linear change in the corresponding current of the semiconductor optoelectronic device 22, which in turn causes a relatively linear change in the carrier concentration of the semiconductor optoelectronic device 22, thereby relatively linearly changing the output optical power of the semiconductor optoelectronic device 22. On the contrary, when the resistance value of the semiconductor photoelectric device 22 is large, it means that the state of the semiconductor photoelectric device 22 is closer to the threshold on state, and the current-voltage relationship curve near the threshold on state changes steeply and the linear characteristics are not obvious. At this time, the change in the bias voltage of the semiconductor photoelectric device 22 can cause the corresponding current of the semiconductor photoelectric device 22 to change more nonlinearly, and the carrier concentration change of the semiconductor photoelectric device 22 caused by it is also more nonlinear, making it difficult to change the output light power of the semiconductor photoelectric device 22 more linearly. The semiconductor photoelectric device 22 is not suitable for working in this range.

[0121] Furthermore, when the APC loop operates within a normal range, to ensure that the voltage step size and the corresponding current step size during APC loop adjustment vary uniformly, thereby causing a relatively linear change in the carrier concentration of the semiconductor optoelectronic device 22 and enabling a relatively linear change in the output optical power of the semiconductor optoelectronic device 22, the differential resistance of the selected semiconductor optoelectronic device 22 within the target optical power range can also be relatively uniform. Specifically, the differential resistance value Rdiffsub of the semiconductor optoelectronic device 22 within a sub-range of the target optical power is relatively close to the average differential resistance value Rdiffavg within the target optical power range. The average differential resistance value Rdiffavg represents the ratio between the bias voltage change dV and the corresponding current change dI corresponding to the lower and upper optical power limits within the target optical power range.

[0122] For example, the differential resistance value Rdiffsub within a certain sub-range of the target optical power satisfies max(0.02*Rdiffavg, 0.1Ω)≤Rdiffsub≤min(50*Rdiffavg, 50Ω). Here, max(0.02*Rdiffavg, 0.1Ω) indicates that the larger of 0.02*Rdiffavg and 0.1Ω is used, and min(50*Rdiffavg, 50Ω) indicates that the smaller of 50*Rdiffavg and 50Ω is used.

[0123] For example, the differential resistance value Rdiffsub within a certain sub-range of the target optical power satisfies max(0.1*Rdiffavg, 0.1Ω)≤Rdiffsub≤min(10*Rdiffavg, 50Ω). Here, max(0.1*Rdiffavg, 0.1Ω) indicates that the larger of 0.1*Rdiffavg and 0.1Ω is used; min(10*Rdiffavg, 50Ω) indicates that the smaller of 10*Rdiffavg and 50Ω is used.

[0124] For example, the differential resistance value Rdiffsub within a certain sub-range of the target optical power satisfies max(0.2*Rdiffavg, 0.1Ω)≤Rdiffsub≤min(5*Rdiffavg, 50Ω). Here, max(0.2*Rdiffavg, 0.1Ω) indicates that the larger of 0.2*Rdiffavg and 0.1Ω is used; min(5*Rdiffavg, 50Ω) indicates that the smaller of 5*Rdiffavg and 50Ω is used.

[0125] For example, the differential resistance value Rdiffsub within a certain sub-range of the target optical power satisfies max(0.5*Rdiffavg, 0.1Ω)≤Rdiffsub≤min(2*Rdiffavg, 50Ω). Here, max(0.5*Rdiffavg, 0.1Ω) indicates that the larger of 0.5*Rdiffavg and 0.1Ω is used; min(2*Rdiffavg, 50Ω) indicates that the smaller of 2*Rdiffavg and 50Ω is used.

[0126] For example, the differential resistance value Rdiffsub within a certain sub-range of the target optical power satisfies max(0.8*Rdiffavg, 0.1Ω)≤Rdiffsub≤min(1.25*Rdiffavg, 50Ω). Here, max(0.8*Rdiffavg, 0.1Ω) indicates that the larger of 0.8*Rdiffavg and 0.1Ω is used, and min(1.25*Rdiffavg, 50Ω) indicates that the smaller of 1.25*Rdiffavg and 50Ω is used.

[0127] Exemplarily, the differential resistance value Rdiffsub within a certain sub-range of the target optical power satisfies max(0.5*Rdiffavg, 0.1Ω)≤Rdiffsub≤min(4*Rdiffavg, 50Ω). Here, max(0.5*Rdiffavg, 0.1Ω) indicates taking the larger of 0.5*Rdiffavg and 0.1Ω; min(4*Rdiffavg, 50Ω) indicates taking the smaller of 4*Rdiffavg and 50Ω. Furthermore, exemplarily, at the target optical power, the differential resistance value Rdiff1 of the semiconductor optoelectronic device 22 under the bias voltage satisfies 0.1Ω≤Rdiff1≤50Ω. At the same time, within the target optical power range, the differential resistance value Rdiff of the semiconductor optoelectronic device 22 satisfies max(0.1*Rdiff1, 0.1Ω)≤Rdiff≤min(10*Rdiff1, 50Ω). Here, max(0.1*Rdiff1, 0.1Ω) indicates that the larger value of 0.1*Rdiff1 or 0.1Ω is used; min(10*Rdiff1, 50Ω) indicates that the smaller value of 10*Rdiff1 or 50Ω is used.

[0128] Exemplarily, at the target optical power, the differential resistance value of the semiconductor optoelectronic device 22 under the bias voltage is Rdiff1, which satisfies 0.1Ω≤Rdiff1≤50Ω. Simultaneously, within the target optical power range, the differential resistance value Rdiff of the semiconductor optoelectronic device 22 satisfies max(0.2*Rdiff1, 0.1Ω)≤Rdiff≤min(5*Rdiff1, 50Ω). Here, max(0.2*Rdiff1, 0.1Ω) indicates the larger of 0.2*Rdiff1 and 0.1Ω; min(5*Rdiff1, 50Ω) indicates the smaller of 5*Rdiff1 and 50Ω.

[0129] Exemplarily, at the target optical power, the differential resistance value of the semiconductor optoelectronic device 22 under the bias voltage is Rdiff1, which satisfies 0.1Ω≤Rdiff1≤50Ω. Simultaneously, within the target optical power range, the differential resistance value Rdiff of the semiconductor optoelectronic device 22 satisfies max(0.5*Rdiff1, 0.1Ω)≤Rdiff≤min(2*Rdiff1, 50Ω). Here, max(0.5*Rdiff1, 0.1Ω) indicates the larger of 0.5*Rdiff1 and 0.1Ω; min(2*Rdiff1, 50Ω) indicates the smaller of 2*Rdiff1 and 50Ω.

[0130] Exemplarily, at the target optical power, the differential resistance value of the semiconductor optoelectronic device 22 under the bias voltage is Rdiff1, which satisfies 0.1Ω≤Rdiff1≤50Ω. Simultaneously, within the target optical power range, the differential resistance value Rdiff of the semiconductor optoelectronic device 22 satisfies max(0.8*Rdiff1, 0.1Ω)≤Rdiff≤min(1.25*Rdiff1, 50Ω). Here, max(0.8*Rdiff1, 0.1Ω) indicates the larger of 0.8*Rdiff1 and 0.1Ω; min(1.25*Rdiff1, 50Ω) indicates the smaller of 1.25*Rdiff1 and 50Ω.

[0131] Exemplarily, at the target optical power, the differential resistance value of the semiconductor optoelectronic device 22 under the bias voltage is Rdiff1, which satisfies 0.1Ω≤Rdiff1≤50Ω. Simultaneously, within the target optical power range, the differential resistance value Rdiff of the semiconductor optoelectronic device 22 satisfies max(0.5*Rdiff1, 0.1Ω)≤Rdiff≤min(4*Rdiff1, 50Ω). Here, max(0.5*Rdiff1, 0.1Ω) indicates the larger of 0.5*Rdiff1 and 0.1Ω; min(4*Rdiff1, 50Ω) indicates the smaller of 4*Rdiff1 and 50Ω.

[0132] In the embodiments of the present application, the relationship between the number P of load links, the number N of semiconductor optoelectronic devices 22, and the number W of bias voltage paths output by the voltage conversion circuit 21 can be adjusted accordingly based on the series-parallel relationship of different load links and the series-parallel relationship of different semiconductor optoelectronic devices 22 in the same load link. Typically, P = N = W, meaning that each bias voltage path output by the voltage conversion circuit 21 drives one load link, each of which has a semiconductor optoelectronic device 22. In particular, if the semiconductor optoelectronic devices 22 have good device performance consistency, a single voltage output port of the voltage conversion circuit 21 can also drive multiple load links in parallel, with each link having at least one semiconductor optoelectronic device 22. For example, if a single voltage output port of the voltage conversion circuit 21 drives two load links in parallel, each of which includes a semiconductor optoelectronic device 22, then W = P / 2 and P = N. For another example, if a single voltage output port of the voltage conversion circuit 21 drives two load links in parallel, each of which has two semiconductor optoelectronic devices connected in series, then W = P / 2 and P = N / 2.

[0133] The photodetection circuit 23 is used to receive the light output by the semiconductor photoelectric device 22, detect the output optical power of the semiconductor photoelectric device 22, and output a detection signal to the controller 24. The detection signal can indicate the output optical power of the semiconductor photoelectric device 22. The photodetection circuit 23 usually detects the output optical power of the semiconductor photoelectric device 22 by detecting the backlight optical power output by the semiconductor photoelectric device 22 in N detection links. Figure 6 As shown, the photodetection circuit 23 includes a photodetector 2301 and a sampling resistor 2302 connected in series. When illuminated by backlight, the reverse-biased photodetector 2301 generates a photocurrent. When the photocurrent flows through the sampling resistor 2302, a detection signal proportional to the photocurrent is generated (the backlight sampling voltage Y is used as an example in this application, but is not intended to be limited to this). Since the magnitude of the photocurrent is proportional to the backlight power, the backlight sampling voltage Y is proportional to the output light power. The backlight sampling voltage Y output by the photodetection circuit 23 is an analog signal.

[0134] The ADC 32 is used to convert the backlight sampling voltage Y generated by the photodetection circuit 23 from an analog signal to a digital signal. The ADC 32 may include a single ADC device or multiple ADC devices, and the specifications of each ADC device may be the same or different.

[0135] If ADC 32 includes a single ADC device, the number of input analog channels supported by the ADC device, Q, is greater than or equal to N, and the number of output digital channels supported by the ADC device, R, is greater than or equal to S, where S (S≧1) is the number of digital channels of controller 24 coupled to ADC 32. Specifically, the number of input analog channels supported by the single ADC device, Q, is equal to N, and the number of output digital channels supported by the single ADC device, R, is equal to or equal to S, and is equal to or equal to 1.

[0136] If ADC 32 includes J (J ≥ 2) ADC devices, the number of input analog channels supported by the i-th (2 ≤ i ≤ J) ADC device is Qi, and the number of output digital channels supported by it is Ri. Then, the following conditions must be met: Q1 + ... + Qi + ... + QJ ≥ N, and R1 + ... + Ri + ... + RJ ≥ S. Specifically, the number of input analog channels supported by each of the J ADC devices satisfies Q1 + ... + Qi + ... + QJ = N, and the number of output digital channels supported by each ADC device satisfies Ri = 1 (2 ≤ i ≤ J).

[0137] The controller 24 is used to provide signal processing and control for the entire drive system in conjunction with a control processing algorithm to execute the control method for the optoelectronic component. Specifically, the controller 24 can determine a control signal Z based on the detection signal (e.g., backlight sampling voltage Y) output by the photodetection circuit 23 and output the control signal Z to the feedback terminal of the voltage conversion circuit 21 to adjust the bias voltage output by the voltage conversion circuit 21, thereby implementing APC. The controller 24 can also be used for automatic gain control (AGC), light pulse output control, and the like. For example, the controller 24 can calculate the control signal Z according to the formula Z = B * Y + C or obtain the control signal Z through a table lookup, where B is the adjustment rule corresponding to the backlight sampling voltage Y and C is a fitting constant. The values ​​of B and C can be obtained from a pre-calibrated or fitted table in the controller 24 or calculated in real time. Furthermore, the A, B, and C values ​​in the pre-calibrated or fitted table in the controller 24 can be modified based on actual accurate input. That is, there is a linear relationship between the control signal Z and the detection signal (backlight sampling voltage Y), which simplifies the algorithm design of the controller 24 and facilitates the control of the bias voltage.

[0138] Furthermore, the controller 24 can also obtain load link information (how to obtain the load link information will be described later), where the load link information includes the value of the bias voltage. The load link information can be a digital signal or an analog signal. The controller 24 can determine the control signal Z based on the load link information X and the detection signal (e.g., the backlight sampling voltage Y), and output the control signal Z to the feedback terminal of the voltage conversion circuit 21 to adjust the bias voltage output by the voltage conversion circuit 21.

[0139] If the load link information indicates the actual value of the bias voltage, the deviation between the theoretical and actual values ​​of the bias voltage caused by device parameter deviations and fluctuations in the feedback network 31 can be eliminated, providing a more accurate input for the controller 24 to obtain the control signal Z. For example, the controller 24 can calculate the control signal Z according to the formula Z = A*X + B*Y + C or obtain the control signal Z by looking up a table, where A is the adjustment rule corresponding to the load link information X, B is the adjustment rule corresponding to the backlight sampling voltage Y, and C is the fitting constant. The values ​​of A, B, and C can be obtained from a pre-calibrated or fitted table in the controller 24 or calculated in real time. Furthermore, the values ​​of A, B, and C in the pre-calibrated or fitted table in the controller 24 can be corrected based on the actual accurate input.

[0140] The bit width of the digital signal processed by the controller 24 is at least 6 bits, and the voltage change corresponding to the minimum weight bit can meet the demand for fine adjustment of the bias voltage output by the voltage conversion circuit 21, so as to achieve precise control of the bias voltage output by the voltage conversion circuit 21. If the bit number of the digital signal processed by the controller 24 is only 4 bits, taking the internal reference voltage of the controller 24 corresponding to the maximum value of a 4-bit binary number of 2.5V as an example, the voltage change corresponding to the minimum weight bit of the control signal Z output by the controller 24 is 2.5V / 2^4≈156mV, and this voltage adjustment accuracy is unacceptable. If the bit width of the digital signal processed by the controller 24 is 6 bits, taking the internal reference voltage of the controller 24 corresponding to the maximum value of a 6-bit binary number of 2.5V as an example, the voltage change corresponding to the minimum weight bit of the control signal Z output by the controller 24 is 2.5V / 2^6≈39mV. Even if the bias voltage output by voltage conversion circuit 21 has the same accuracy as the 39mV voltage change corresponding to the minimum weighted bit of control signal Z, if semiconductor optoelectronic device 22 has a differential resistance value Rdiff = 10Ω within the target optical power range, a 39mV change in the bias voltage output by voltage conversion circuit 21 will result in a 3.9mA change in the current flowing through semiconductor optoelectronic device 22. This can be considered an equivalent large current adjustment step size in the APC loop control, but it is acceptable. If the digital signal processed by controller 24 has an 8-bit bit width, and using the maximum value of an 8-bit binary number corresponding to the internal reference voltage of controller 24 of 2.5V as an example, the voltage change corresponding to the minimum weighted bit of control signal Z output by controller 24 is 2.5V / 2^8 = 9.8mV. Even if the accuracy of the bias voltage output by voltage conversion circuit 21 is the same as the 9.8mV voltage change corresponding to the minimum weighted bit of control signal Z, if the differential resistance value Rdiff of semiconductor optoelectronic device 22 within the target optical power range is 10Ω, a 9.8mV change in the bias voltage output by voltage conversion circuit 21 results in a 0.98mA change in the current flowing through semiconductor optoelectronic device 22. This can be considered an acceptable change in the APC loop control current step size, which is equivalent to a smaller adjustment current step size. Further improving the accuracy of control signal Z by combining feedback network 31 can further improve the accuracy of the bias voltage output by voltage conversion circuit 21, effectively increasing the resolution of the analog-to-digital conversion interface in DAC 33 or controller 24.

[0141] The number of digital channels of the controller 24 coupled to the ADC 32 is S (S ≥ 1), and the number of analog channels of the controller 24 coupled to the DAC 33 is T (T ≥ 1). The controller 24 can be a micro-control unit (MCU) or a field programmable gate array (FPGA).

[0142] The DAC 33 is used to convert the control signal Z generated by the controller 24 from a digital signal to an analog signal. The DAC 33 may include a single DAC device or multiple DAC devices, and the specifications of each DAC device may be the same or different.

[0143] If DAC 33 includes a single DAC device, the number of input digital channels supported by the DAC device is U ≥ T, and the number of output analog channels supported by the DAC device is V ≥ W. Where T (T ≥ 1) is the number of digital channels of controller 24 coupled to DAC 33. Specifically, the number of input digital channels supported by the single DAC device is U = T = 1, and the number of output analog channels supported by the single DAC device is V = W.

[0144] If DAC 33 includes L (L ≥ 2) DAC devices, the number of input digital channels supported by the i-th (2 ≤ i ≤ L) DAC device is Ui, and the number of output analog channels supported by it is Vi. Then, the following conditions must be satisfied: U1 + ... + Ui + ... + UL ≥ T, and V1 + ... + Vi + ... + VL ≥ W. Specifically, the number of input digital channels supported by each of the L DAC devices satisfies Ui = 1 (2 ≤ i ≤ L), and the number of output analog channels supported by each DAC device satisfies V1 + ... + Vi + ... + VL = W.

[0145] It should be noted that in order to match the bit width of the digital signal processed by the controller 24, which is at least 6 bits, the bit width of the DAC 33 and ADC 32 can be consistent with the bit width of the digital signal processed by the controller 24 to ensure the adjustment accuracy. The bit width of the DAC 33 and ADC 32 is also at least 6 bits.

[0146] The feedback network 31 is used to amplify or reduce the voltage range of the control signal Z to obtain a feedback control signal F, and output it to the voltage conversion circuit 21 to adapt to the signal range requirements of the voltage conversion circuit 21 input and improve the accuracy of the control signal Z. The feedback control signal F can be expressed as F=E*Z+G, where E is the adjustment rule corresponding to the control signal Z of the feedback network 31, and G is the fitting constant. In addition, when the voltage conversion circuit 21 is a DC-DC conversion circuit, the DC-DC conversion circuit usually includes an operational amplifier, and the feedback network 31 couples the output terminal and the feedback terminal of the operational amplifier to form a feedback path of the operational amplifier. The feedback network 31 can provide the voltage conversion circuit 21 with W feedback control signals F corresponding to the W output voltages.

[0147] In particular, when the voltage conversion circuit 21 has a modulation frequency input or control terminal, the controller 24 can also provide another feedback control signal F2 to the voltage conversion circuit 21 according to the circuit state and the characteristics of the voltage conversion circuit 21, so as to change the modulation frequency of the voltage conversion circuit 21, thereby improving the voltage conversion efficiency of the voltage conversion circuit 21.

[0148] The feedback network 31 may be a voltage divider network including resistors. For example, Figure 6 As shown, the feedback network includes a resistor Ra, a resistor Rb and a resistor Rc, the second end of the resistor Ra is grounded, the first end of the resistor Ra, the second end of the resistor Rb and the first end of the resistor Rc are coupled to the feedback end of the voltage conversion circuit 21, the first end of the resistor Rb is coupled to the bias voltage output end of the voltage conversion circuit 21, and the second end of the resistor Rc is coupled to the output end of the controller 24.

[0149] Assume that there is a functional relationship between the bias voltage Vout output by the voltage conversion circuit 21 and the feedback voltage Vfb (i.e., the voltage of the feedback control signal F) input to the feedback terminal of the voltage conversion circuit 21: Vout = f(Vfb), where f() represents a function, and this functional relationship is related to the design of the voltage conversion circuit 21. If this functional relationship is a linear relationship, it can be further expressed as Vout = a*Vfb+c, where a and c are constant coefficients related to the design of the voltage conversion circuit 21. When the voltage conversion circuit 21 is a DC-DC conversion circuit, one input terminal of the operational amplifier in the DC-DC conversion circuit inputs the reference voltage Vref (usually a fixed value) inside the DC-DC conversion circuit, and the other input terminal of the operational amplifier inputs the voltage Vfb. Then, when Rc is disconnected, the voltage Vout, the voltage Vfb, and the reference voltage Vref have the following relationship:

[0150] Vfb=Vref Formula 1

[0151] Vout=Vfb*(Ra+Rb) / Rb Formula 2

[0152] Specifically, combined with the resistor divider network of the feedback network 31, we can obtain:

[0153] Vout=(Vref / Ra-(Vadj-Vref) / Rc)*Rb+Vref Formula 3

[0154] Wherein, Vadj is the voltage of the control signal Z output by the DAC 33 .

[0155] As can be seen from Equation 3, for given resistances Ra, Rb, and Rc, the DC-DC converter circuit's output voltage Vout can be adjusted based on the voltage Vadj of the control signal Z, i.e., Vout = f(Vadj), and the control signal Z and the feedback control signal F exhibit a linear relationship. Therefore, by varying the resistances Ra, Rb, and Rc, the voltage Vadj, and the reference voltage Vref, different voltages Vout can be obtained.

[0156] The aforementioned feedback network, based on a resistor divider network, linearly amplifies or reduces the control signal Z using the feedback control signal F, thereby adapting to the input signal range requirements of the voltage conversion circuit 21 and improving the accuracy of the control signal. Furthermore, the feedback network has a simple design and a compact structure, facilitating miniaturization of the entire optoelectronic assembly.

[0157] It should be noted that this application only provides a feedback network based on a resistor divider network. Different functional relationships Vout = f(Vadj) can also be designed by combining other components such as digital circuits and analog circuits. In addition, the controller 24 can further combine the functional relationship Z = g(Y) to determine the control signal Z based on the backlight sampling voltage Y to obtain Vout = f(Vadj) = f(g(Y)).

[0158] For example, the controller 24 determines the control signal Z according to the detection signal (e.g., backlight sampling voltage Y) output by the photodetection circuit 23 to illustrate how the controller 24 calibrates the various parameters of the formula Z=B*Y+C:

[0159] Step 1: Controller 24 outputs control signal Z. If a feedback network 31 is provided, feedback network 31 converts the control signal into feedback control signal F, which is then output to voltage conversion circuit 21 to adjust the bias voltage output by voltage conversion circuit 21. If no feedback network 31 is provided, control signal Z is output to voltage conversion circuit 21 to adjust the bias voltage output by voltage conversion circuit 21. The bias voltage output by voltage conversion circuit 21 generates a corresponding drive current (also called bias current). Under the action of the drive current, semiconductor optoelectronic device 22 outputs light (which accounts for the majority of the power) and backlight (which accounts for a smaller portion of the power). The output optical power P is measured by an external optical power detector, and photodetection circuit 23 outputs backlight sampling voltage Y. The backlight sampling voltage Y, control signal Z, and optical power P are stored in controller 24 as a parameter combination (Y, Z, P).

[0160] Under the target optical power range, the ratio of the backlight optical power output by the semiconductor optoelectronic device 22 to the light output optical power P is basically stable. Since the backlight optical power is proportional to the backlight sampling voltage Y, the light output optical power P is proportional to the backlight sampling voltage Y. Therefore, the parameter combination (Y, Z, P) can be expressed as (Y, Z, P(Y)).

[0161] Step 2: The controller 24 changes the output control signal Z, obtains more parameter combinations (Yi, Zi, Pi(Yi)) according to Step 1 and stores them in the controller 24, where i is a positive integer. Alternatively, the controller 24 can fit new parameter combinations based on multiple existing parameter combinations. After obtaining multiple combined parameters, the controller 24 can establish the mapping relationship of B, C, Y, and Z in the formula Z = B*Y + C according to a certain algorithm and rule.

[0162] Step 3: The controller 24 sets the default parameter combination (Yo, Zo, Po(Y)) according to the target optical power Pg, and uses this default parameter combination to output the control signal Z during initialization, where Po ≥ Pg.

[0163] During the actual operation of the system, in order to keep the output light output optical power within the preset range, the controller 24 performs APC. The controller 24 will obtain the backlight sampling voltage Y in real time, and combine the calibrated formula Z = B*Y + C to obtain the control signal Z. Under normal circumstances, the backlight sampling voltage Y obtained by the controller 24 is relatively stable, so the control signal Z is also relatively stable.

[0164] When the light output optical power of the semiconductor optoelectronic device 22 decreases due to device aging or environmental temperature increase, the backlight sampling voltage Yo decreases to Y'. At this time, the controller 24 needs to adjust the control signal Z according to the established Z = B*Y + C during the calibration process, so that the bias voltage output by the voltage conversion circuit 21 increases to provide a larger drive current, increase the carrier concentration, thereby increasing the output light output optical power, and further increasing the backlight sampling voltage to Yt. The controller 24 compares Yt with Yo. If Yt < Yo, continue to adjust the control signal Z so that the bias voltage output by the voltage conversion circuit 21 increases to provide a larger drive current, and the backlight sampling voltage Yt increases until |Yt - Yo| is less than the set error; if Yt > Yo, continue to adjust the control signal Z so that the bias voltage output by the voltage conversion circuit 21 decreases to provide a smaller drive current, and the backlight sampling voltage Yt decreases until |Yt - Yo| is less than the set error. Among them, the adjustment direction and step size of the control signal Z can be dynamically adjusted in combination with the change trend of the backlight sampling voltage Yt and the formula Z = B*Y + C. Finally, the entire system will work under a new parameter combination (Yo, Zt, Po(Yo)).

[0165] When the output optical power of the semiconductor optoelectronic device 22 increases due to a decrease in the ambient temperature, the backlight sampling voltage Yo increases to Y'. At this time, the controller 24 needs to adjust the control signal Z according to the formula Z = B * Y + C established during the calibration process, so that the bias voltage output by the voltage conversion circuit 21 decreases, providing a smaller drive current, reducing the carrier concentration, and further reducing the backlight sampling voltage to Yt. The controller 24 compares Yt with Yo. If Yt > Yo, it continues to adjust the control signal Z so that the bias voltage output by the voltage conversion circuit 21 decreases, providing a smaller drive current, and the backlight sampling voltage Yt decreases until |Yt - Yo| is less than the set error. If Yt < Yo, it continues to adjust the control signal Z so that the bias voltage output by the voltage conversion circuit 21 increases, providing a larger drive current, and the backlight sampling voltage Yt increases until |Yt - Yo| is less than the set error. Among them, the adjustment direction and step size of the control signal Z can be dynamically adjusted in combination with the change trend of the backlight sampling voltage Yt and the formula Z = B * Y + C. Finally, the entire system will work under a new parameter combination (Yo, Zt, Po(Yo)).

[0166] The above optoelectronic component, light source pool and control method of the optoelectronic component provided by the embodiments of the present application improve the efficiency of the optoelectronic component. The voltage conversion circuit provides a bias voltage to the semiconductor optoelectronic device to adjust the output optical power of the semiconductor optoelectronic device. The optoelectronic detection circuit receives the light output by the semiconductor optoelectronic device and detects the output optical power of the semiconductor optoelectronic device, and outputs a detection signal to the controller. The controller can determine the control signal for adjusting the bias voltage according to the detection signal and send it to the voltage conversion circuit. There is no need to couple other detection circuits between the voltage conversion circuit and the semiconductor optoelectronic device, which will not consume the power output by the voltage conversion circuit additionally. Most of the power output by the voltage conversion circuit is converted into the output optical power of the semiconductor optoelectronic device, so the efficiency of the optoelectronic component can be improved.

[0167] There can be various coupling methods between the power supply 25, the voltage conversion circuit 21 and the semiconductor optoelectronic device 22. The following combines Figure 7 to illustrate the coupling method between the power supply 25, the voltage conversion circuit 21 and the semiconductor optoelectronic device 22. For the convenience of description, the composition, functions and coupling methods of other functional modules can be referred to the descriptions in other drawings.

[0168] Such as Figure 7As shown in Figure A, power supply 25 outputs two voltages, Vcc1 and Vcc2, which are respectively supplied to first voltage conversion circuit 211 and second voltage conversion circuit 212. Vcc1 and Vcc2 can be equal or unequal. The bias voltage output by first voltage conversion circuit 211 is controlled by control signal Z output by the controller, thereby adjusting the output optical power of the semiconductor optoelectronic device in load chain 1. The bias voltage output by second voltage conversion circuit 212 is controlled by control signal Z output by the controller, thereby adjusting the output optical power of the semiconductor optoelectronic device in load chain 2.

[0169] like Figure 7 As shown in Figure B, the power supply 25 outputs a voltage Vcc1, which is supplied to the first voltage conversion circuit 211 and the second voltage conversion circuit 212. The bias voltage output by the first voltage conversion circuit 211 is controlled by a control signal Z output by a controller, thereby adjusting the optical power outputted by the semiconductor optoelectronic device in load link 1. The bias voltage output by the second voltage conversion circuit 212 is controlled by a control signal Z output by a controller, thereby adjusting the optical power outputted by the semiconductor optoelectronic device in load link 2.

[0170] like Figure 7 As shown in Figure C, the power supply 25 outputs two voltages, Vcc1 and Vcc2, which are respectively output to the first voltage conversion circuit 211 and the second voltage conversion circuit 212. Vcc1 and Vcc2 can be equal or different. Load links 1 and 2 are coupled in parallel to the voltage output terminal of the first voltage conversion circuit 211. The bias voltage output by the first voltage conversion circuit 211 is controlled by the control signal Z output by the controller, thereby adjusting the optical power output by the semiconductor optoelectronic device in load link 1 and the conductor optoelectronic device in load link 2. Load links 3 and 4 are coupled in parallel to the voltage output terminal of the first voltage conversion circuit 211. The bias voltage output by the second voltage conversion circuit 212 is controlled by the control signal Z output by the controller, thereby adjusting the optical power output by the semiconductor optoelectronic device in load link 3 and the semiconductor optoelectronic device in load link 4.

[0171] like Figure 7As shown in Figure D, power supply 25 outputs a voltage Vcc1, which is supplied to first voltage conversion circuit 211 and second voltage conversion circuit 212. Load links 1 and 2 are coupled in parallel to the voltage output terminal of first voltage conversion circuit 211. The bias voltage output by first voltage conversion circuit 211 is controlled by a control signal Z output by a controller, thereby adjusting the optical power outputted by the semiconductor optoelectronic device in load link 1 and the conductor optoelectronic device in load link 2. Load links 3 and 4 are coupled in parallel to the voltage output terminal of first voltage conversion circuit 211. The bias voltage output by second voltage conversion circuit 212 is controlled by a control signal Z output by a controller, thereby adjusting the optical power outputted by the semiconductor optoelectronic device in load link 3 and the semiconductor optoelectronic device in load link 2.

[0172] like Figure 7 As shown in FIG. 5E , a plurality of semiconductor optoelectronic devices (eg, a first semiconductor optoelectronic device 221 and a second semiconductor optoelectronic device 222 ) may be connected in series in a load link, or, as shown in FIG. Figure 7 As shown in FIG. 5 , a plurality of semiconductor optoelectronic devices (eg, a first semiconductor optoelectronic device 221 and a second semiconductor optoelectronic device 222) can be connected in parallel in a load link, that is, Figure 7 E and F can be combined with Figure 7 It should be noted that, at this time, each semiconductor optoelectronic device is paired with an independent photodetection circuit.

[0173] for Figure 7 For example, in Figures E and F, the first semiconductor optoelectronic device 221 is paired with a first photodetection circuit for detecting the output optical power of the first semiconductor optoelectronic device 221 and outputting a first control signal to the controller 24. The second semiconductor optoelectronic device 222 is paired with a second photodetection circuit for detecting the output optical power of the second semiconductor optoelectronic device 222 and outputting a second control signal to the controller 24. The controller 24 can determine a control signal based on the first detection signal and the second detection signal and send it to the voltage conversion circuit 21. Since the first semiconductor optoelectronic device 221 and the second semiconductor optoelectronic device 222 are coupled to the voltage conversion circuit 21 via a load link, the control signal can adjust the bias voltage provided to the first semiconductor optoelectronic device 221 and the second semiconductor optoelectronic device 222.

[0174] Regardless of whether the first semiconductor optoelectronic device 221 and the second semiconductor optoelectronic device 222 are connected in series or in parallel, if the first detection signal is smaller than the second detection signal and the first detection signal is smaller than the first threshold (i.e., the output optical power of the semiconductor optoelectronic device is too low), the controller 24 determines a control signal based on the first detection signal. The control signal can instruct the voltage conversion circuit 21 to increase the bias voltage to increase the output optical power of the first semiconductor optoelectronic device 221 and the second semiconductor optoelectronic device 222. In other words, if the output optical power of the optoelectronic component is to be increased, the control signal is determined based on the detection signal corresponding to the one of the two semiconductor optoelectronic devices with the smaller output optical power.

[0175] Regardless of whether the first semiconductor optoelectronic device 221 and the second semiconductor optoelectronic device 222 are connected in series or in parallel, if the first detection signal is less than the second detection signal and the second detection signal is greater than the second threshold (i.e., the output optical power of the semiconductor optoelectronic device is too high), the controller 24 determines a control signal based on the second detection signal. This control signal can instruct the voltage conversion circuit 21 to reduce the bias voltage to reduce the output optical power of the first semiconductor optoelectronic device 221 and the second semiconductor optoelectronic device 222. In other words, if the output optical power of the optoelectronic component is to be reduced, the control signal is determined based on the detection signal corresponding to the one of the two semiconductor optoelectronic devices with the larger output optical power.

[0176] Various coupling modes between the power supply 25, the voltage conversion circuit 21 and the semiconductor optoelectronic device 22 provide more flexibility for the design of the optoelectronic component, which can further reduce the number of components, lower costs and improve integration.

[0177] It should be noted that those skilled in the art will Figure 7 Various combinations can be made, all of which can be regarded as embodiments of the present application and fall within the scope of protection of the present application. Figure 7 The various combinations require good consistency between the load links in the same voltage conversion circuit, as well as good consistency between the semiconductor optoelectronic devices in the same load link. Otherwise, inconsistent regulation trends or power oscillations between the two semiconductor optoelectronic devices are likely to occur. Furthermore, if both the first threshold and the second threshold exist, they must be within a certain range. Otherwise, inconsistent regulation trends or power oscillations between the two semiconductor optoelectronic devices are likely to occur.

[0178] There are many ways to couple the ADC 32, DAC 33 and controller 24. Figure 8 The coupling method between ADC 32 and controller 24 is described. Figure 9The coupling method between the controller 24 and the DAC 33 is described. For the convenience of description, the composition, function and coupling method of other functional modules can refer to the description in other drawings.

[0179] like Figure 8 As shown in Figure 2A, ADC 32 includes four analog input ports (in1-in4) and one digital output port (out1). Controller 24 includes a digital input port (in5), which is coupled to digital output port out1 of ADC 32. The four analog input ports (in1-in4) of ADC 32 receive four analog signals (backlight sampling voltage 1 - backlight sampling voltage 4) from the photodetection circuit. ADC 32 performs analog-to-digital conversion on these four analog signals to obtain four digital signals, which are then serially output to controller 24 via digital output port out1 of ADC 32 in a specific order. After receiving these four digital signals, controller 24 analyzes them in a specific order to obtain the values ​​of the four backlight sampling voltages. Based on these four backlight sampling voltages, controller 24 generates a control signal and sends these four control signals to the corresponding voltage conversion circuits to adjust the output bias voltage.

[0180] like Figure 8As shown in Figure B, the first ADC 321 includes two analog input ports (in1-in2) and a digital output port (out1), the second ADC 322 includes two analog input ports (in3-in4) and a digital output port (out2), and the controller 24 includes two digital input ports (in5-in6). The digital input port in5 of the controller 24 is coupled to the digital output port out1 of the first ADC 321, and the digital input port in6 of the controller 24 is coupled to the digital output port out2 of the second ADC 322. The two analog input ports (in1-in2) of the first ADC 321 respectively receive two analog signals (backlight sampling voltage 1 and backlight sampling voltage 2) from the photodetection circuit. The first ADC 321 performs analog-to-digital conversion on these two analog signals to obtain two digital signals, and then outputs these two digital signals serially to the controller 24 through the digital output port out1 of the first ADC 321 in a predetermined order. After receiving these two digital signals, the controller 24 analyzes them in a predetermined order to obtain the values ​​of the two backlight sampling voltages. The two analog input ports (in3 and in4) of the second ADC 322 receive two analog signals (backlight sampling voltage 3 and backlight sampling voltage 4) from the photodetection circuit. The second ADC 322 performs analog-to-digital conversion on these two analog signals to obtain two digital signals. These signals are then serially output to the controller 24 via the digital output port out2 of the second ADC 322 in a specific order. After receiving these two digital signals, the controller 24 analyzes them in a specific order to obtain the values ​​of the two backlight sampling voltages. Based on these four backlight sampling voltages, the controller 24 generates a control signal for each of these four control signals and sends them to the corresponding voltage conversion circuits to adjust the output bias voltage.

[0181] like Figure 8As shown in Figure C, ADC 32 includes four analog input ports (in1-in4) and one digital output port (out1). Controller 24 includes two digital input ports (in5-in6). Controller 24's digital input port in5 is coupled to ADC 32's digital output port out1, and controller 24's digital input port in6 is coupled to ADC 32's digital output port out2. The two analog input ports (in1-in2) of ADC 32 receive two analog signals (backlight sampling voltage 1 - backlight sampling voltage 2) from the photodetection circuit. ADC 32 performs analog-to-digital conversion on these two analog signals to obtain two digital signals. These signals are then serially output to controller 24 via ADC 32's digital output port out1 in a specific order. After receiving these two digital signals, controller 24 analyzes them in a specific order to obtain the values ​​of the two backlight sampling voltages. The two analog input ports (in3 and in4) of ADC 32 receive two analog signals (backlight sampling voltage 3 and backlight sampling voltage 4) from the photodetection circuit, respectively. ADC 32 performs analog-to-digital conversion on these two analog signals to obtain two digital signals, which are then serially output to controller 24 via digital output port out2 of ADC 32 in a specific order. After receiving these two digital signals, controller 24 analyzes them in a specific order to obtain the values ​​of the two backlight sampling voltages. Based on these four backlight sampling voltages, controller 24 generates a control signal and sends these four control signals to the corresponding voltage conversion circuits to adjust the output bias voltage. More generally, the total number of digital signals output by output ports out1 and out2 of ADC 32 is four, but the number of digital signals output by each of these two ports and their corresponding relationship with backlight sampling voltages 1 to 4 are not limited.

[0182] like Figure 8As shown in Figure D, the first ADC 321 includes four analog input ports (in1-in4) and one digital output port (out1). The second ADC 322 includes two analog input ports (in5-in6) and one digital output port (out2). The controller 24 includes two digital input ports (in7-in8). The digital input port in7 of the controller 24 is coupled to the digital output port out1 of the first ADC 321, and the digital input port in8 of the controller 24 is coupled to the digital output port out2 of the second ADC 322. The four analog input ports (in1-in4) of the first ADC 321 respectively receive four analog signals (backlight sampling voltage 1-backlight sampling voltage 4) from the photodetection circuit. The first ADC 321 performs analog-to-digital conversion on these four analog signals to obtain four digital signals. These signals are then serially output to the controller 24 via the digital output port out1 of the first ADC 321 in a predetermined order. After receiving these four digital signals, the controller 24 analyzes them in a predetermined order to obtain the values ​​of the four backlight sampling voltages. The two analog input ports (in5 and in6) of the second ADC 322 receive two analog signals (backlight sampling voltage 5 and backlight sampling voltage 6) from the photodetection circuit. The second ADC 322 performs analog-to-digital conversion on these two analog signals to obtain two digital signals. These signals are then serially output to the controller 24 via the digital output port out2 of the second ADC 322 in a specific order. After receiving these two digital signals, the controller 24 analyzes them in a specific order to obtain the values ​​of the two backlight sampling voltages.

[0183] like Figure 9 As shown in Figure A, DAC 33 includes four analog output ports (out1-out4) and one digital input port (in1). Controller 24 includes a digital output port (out5), which is coupled to digital input port in1 of DAC 33. Controller 24 serially outputs four control signals (control signal 1-control signal 4) via digital output port out5 of controller 24 in a specific order to DAC 33. DAC 33 receives these four digital signals and analyzes them in a specific order to obtain four control signals. It then performs analog-to-digital conversion on these four control signals to obtain four analog signals, which are then output through the four analog output ports (out1-out4) of DAC 33.

[0184] like Figure 9As shown in Figure B, the first DAC 331 includes two analog output ports (out1-out2) and a digital input port (in1). The second DAC 332 includes two analog output ports (out3-out4) and a digital input port (in2). The controller 24 includes two digital output ports (out5-out6). The digital output port out5 of the controller 24 is coupled to the digital input port in1 of the first DAC 331, and the digital output port out6 of the controller 24 is coupled to the digital input port in2 of the second DAC 332. The controller 24 serially outputs two control signals (control signal 1-control signal 2) to the first DAC 331 via the digital output port out5 of the controller 24 in a predetermined sequence. After receiving these two digital signals, the first DAC 331 analyzes them in a predetermined sequence to obtain two control signals. The first DAC 331 then performs analog-to-digital conversion on these two control signals to obtain two analog signals, which are then output through the two analog output ports (out1-out2) of the first DAC 33. The controller 24 outputs two control signals (control signal 3 - control signal 4) in a serial manner through the digital output port out6 of the controller 24 to the second DAC 332 in a certain order. After receiving the two digital signals, the second DAC 332 analyzes them in a certain order to obtain two control signals, performs analog-to-digital conversion on the two control signals, and outputs the two analog signals through the two analog output ports (out3 - out4) of the second DAC 332.

[0185] like Figure 9As shown in Figure C, DAC 33 includes four analog output ports (out1-out4) and two digital input ports (in1-in2). Controller 24 includes two digital output ports (out5-out6). Controller 24's digital output port out5 is coupled to DAC 33's digital input port in1, and controller 24's digital output port out6 is coupled to DAC 33's digital input port in2. Controller 24 serially outputs two control signals (control signal 1 - control signal 2) via controller 24's digital output port out5 to DAC 33 in a specific order. DAC 33 receives these two digital signals and analyzes them in a specific order to obtain two control signals. It then performs analog-to-digital conversion on these two control signals to obtain two analog signals, which are then output via DAC 33's two analog output ports (out1-out2). Controller 24 serially outputs two control signals (control signal 3 and control signal 4) to DAC 33 via digital output port out6 of controller 24 in a specific order. DAC 33 receives these two digital signals and analyzes them in a specific order to obtain two control signals. It then performs analog-to-digital conversion on these two control signals to obtain two analog signals, which are then output via the two analog output ports (out3 and out4) of DAC 33. More generally, the total number of digital signals input to input ports in1 and in2 of DAC 33 is four, but the number of digital signals inputted by each input port and their corresponding relationship to control signals 1 through 4 are not limited.

[0186] like Figure 9As shown in Figure D, the first DAC 331 includes four analog output ports (out1-out4) and one digital input port (in1). The second DAC 332 includes two analog output ports (out5-out6) and one digital input port (in2). The controller 24 includes two digital output ports (out7-out8). The digital output port out7 of the controller 24 is coupled to the digital input port in1 of the first DAC 331, and the digital output port out8 of the controller 24 is coupled to the digital input port in2 of the second DAC 332. The controller 24 serially outputs four control signals (control signal 1-control signal 4) to the first DAC 331 via the digital output port out7 of the controller 24 in a predetermined sequence. After receiving these four digital signals, the first DAC 331 analyzes them in a predetermined sequence to obtain four control signals. The first DAC 331 then performs analog-to-digital conversion on these four control signals to obtain four analog signals, which are then output through the four analog output ports (out1-out4) of the first DAC 331. The controller 24 outputs two control signals (control signal 5 - control signal 6) in a serial manner through the digital output port out8 of the controller 24 to the second DAC 332 in a certain order. After receiving the two digital signals, the second DAC 332 analyzes them in a certain order to obtain two control signals, performs analog-to-digital conversion on the two control signals, and outputs the two analog signals through the two analog output ports (out5 - out6) of the second DAC 332.

[0187] pass Figure 8 and Figure 9 The coupling method shown improves the design flexibility of optoelectronic components, further reducing the resource requirements of analog-to-digital conversion ports and digital-to-analog conversion ports, reducing the number of ADCs and DACs, lowering costs, improving integration, and facilitating miniaturization of optoelectronic components. For example, if an ADC converts two analog signals into one digital signal, the number of ADCs can be reduced by 50%. This reduction can be further increased when the ADC can convert more analog signals into one digital signal. If a DAC converts two digital signals into one analog signal, the number of DACs can be reduced by 50%. This reduction can be further increased when the DAC can convert more digital signals into one analog signal.

[0188] The following combination Figure 10 A specific coupling method between the ADC 32 , the DAC 33 and the controller 24 is described below.

[0189] like Figure 10As shown, the power supply 25 provides power supply voltages Vcc1 and Vcc2 to the entire optoelectronic assembly. A first voltage conversion circuit 211 converts voltage Vcc1 into bias voltage 1, which is provided to a first semiconductor optoelectronic device 221. Bias voltage 1 output by the first voltage conversion circuit 211 can be adjusted based on a control signal Z1 output by the controller 24. A second voltage conversion circuit 212 converts voltage Vcc2 into bias voltage 2, which is provided to a second semiconductor optoelectronic device 222. Bias voltage 2 output by the second voltage conversion circuit 212 can be adjusted based on a control signal Z2 output by the controller 24. At least one of the first voltage conversion circuit 211 and the second voltage conversion circuit 212 can be a DC-DC conversion circuit. For example, 0.9*Vcc1 > bias voltage 1 > 1.0V, and Vcc1 > 1.3V. 0.9*Vcc2 > bias voltage 2 > 1.0V, and Vcc2 > 1.3V.

[0190] It should be noted that the embodiment of the present application takes two voltage conversion circuits providing bias voltages to two semiconductor optoelectronic devices as an example, but is not intended to be limited to this. For example, more voltage conversion circuits can provide bias voltages to more semiconductor optoelectronic devices.

[0191] The light output from the first semiconductor optoelectronic device 221 includes two parts, the first part being light output 1, and the second part (backlight 1) being output to the first photodetection circuit 231 for detecting the optical power of the first semiconductor optoelectronic device 221. The light output from the second semiconductor optoelectronic device 222 includes two parts, the first part being light output 2, and the second part (backlight 2) being output to the second photodetection circuit 232 for detecting the optical power of the second semiconductor optoelectronic device 222. Both the first semiconductor optoelectronic device 221 and the second semiconductor optoelectronic device 222 meet the requirement that the resistance value within the target optical power range is ≤60Ω, and the differential resistance value Rdiff within the target optical power range is 0.1Ω≤Rdiff≤50Ω.

[0192] The first photodetection circuit 231 is used to detect the output optical power of the first semiconductor photoelectric device 221 , and the second photodetection circuit 232 is used to detect the output optical power of the second semiconductor photoelectric device 222 .

[0193] ADC 32 includes two analog input ports, one for receiving the backlight sampling voltage Y1 (analog signal) from the first photodetection circuit 231 and the other for receiving the backlight sampling voltage Y2 (analog signal) from the second photodetection circuit 232. ADC 32 converts the backlight sampling voltage Y1 (analog signal) into a backlight sampling voltage Y1 (digital signal), and the other into a backlight sampling voltage Y2 (analog signal) into a backlight sampling voltage Y2 (digital signal). ADC 32 then serially outputs these two digital signals to controller 24 via a digital output port in a specific order. Converting two ADC channels to one can save 50% of ADC resources.

[0194] The controller 24 parses the corresponding backlight sampling voltage Y1 (digital signal) and backlight sampling voltage Y2 (digital signal) according to the rules and a certain order of the backlight sampling voltage (digital) output by the ADC 32. The controller 24 generates a control signal Z1 (digital signal) based on the backlight sampling voltage Y1 (digital signal) and a control signal Z2 (digital signal) based on the backlight sampling voltage Y2 (digital signal), and outputs these two control signals to the DAC 33 through the digital output port in a serial manner in a certain order.

[0195] DAC 33 parses the control signal Z1 (digital signal) and the control signal Z2 (digital signal) according to the corresponding rules and a certain order of the control signal output by controller 24. DAC 33 performs digital-to-analog conversion on control signal Z1 (digital signal) to obtain control signal Z1 (analog signal), which is output to first feedback network 311 through an analog output port. DAC 33 also performs digital-to-analog conversion on control signal Z2 (digital signal) to obtain control signal Z2 (analog signal), which is output to second feedback network 312 through an analog output port. Converting one DAC signal into two can save 50% of DAC resources.

[0196] The first feedback network 311 is used to amplify or reduce the voltage range of the control signal Z1 to obtain a feedback control signal F1, and output it to the feedback terminal of the first voltage conversion circuit 211 to adapt to the signal range requirements of the first voltage conversion circuit 211 input, effectively improving the accuracy of the control signal Z1. The second feedback network 312 is used to amplify or reduce the voltage range of the control signal Z2 to obtain a feedback control signal F2, and output it to the feedback terminal of the second voltage conversion circuit 212 to adapt to the signal range requirements of the second voltage conversion circuit 212 input, effectively improving the accuracy of the control signal Z2. The bias voltage 1 output by the first voltage conversion circuit 211 can be adjusted according to the feedback control signal F1, and the bias voltage 2 output by the second voltage conversion circuit 212 can be adjusted according to the feedback control signal F2.

[0197] The following describes how the controller 24 obtains the load link information X.

[0198] In one possible implementation, Figure 11 As shown, in Figure 2 On the basis of this, when the controller 24 has an analog-to-digital conversion interface (i.e., it can directly input analog signals) and a digital-to-analog conversion interface (i.e., it can directly output analog signals), or when the analog-to-digital conversion interface and the digital-to-analog conversion interface resources of the controller 24 are sufficient, the controller 24 can directly obtain the load link information X from the bias voltage output end of the voltage conversion circuit 21.

[0199] In another possible embodiment, Figure 12 As shown, in Figure 3 On the basis of the above, when the controller 24 does not have an analog-to-digital conversion interface and a digital-to-analog conversion interface, or when the analog-to-digital conversion interface and the digital-to-analog conversion interface resources of the controller 24 are insufficient, the optoelectronic assembly may further include a second ADC 34, wherein the analog input port of the second ADC 34 is coupled to the bias voltage output terminal of the voltage conversion circuit 21, and the digital output port of the second ADC 34 is coupled to the input terminal of the controller 24. The controller 24 may obtain the load link information X from the bias voltage output terminal of the voltage conversion circuit 21 via the second ADC 34. When the controller 24 has an analog-to-digital conversion interface (i.e., it can directly input an analog signal), or when the analog-to-digital conversion interface of the controller 24 is sufficient, the second ADC 34 may be the analog-to-digital conversion interface in the controller 24.

[0200] Furthermore, the second ADC 34 can be a two-channel analog input and one-channel digital output ADC like the ADC 32. The two analog input ports of the ADC can be coupled to the bias voltage output of the voltage conversion circuit 21 and the output of the photodetection circuit 23, respectively. The ADC can serially output the load link information X and the backlight sampling voltage Y to the controller 24 in a certain order. The controller 24 can then analyze the load link information X and the backlight sampling voltage Y in a certain order. This can reduce the number of ADCs, lower costs, improve integration, and facilitate miniaturization of optoelectronic components.

[0201] In another possible embodiment, Figure 13 As shown, in Figure 10On the basis of the above, when the controller 24 does not have an analog-to-digital conversion interface and a digital-to-analog conversion interface, or when the analog-to-digital conversion interface and the digital-to-analog conversion interface resources of the controller 24 are insufficient, the optoelectronic assembly may further include a second ADC 34. The two analog input ports of the second ADC 34 are respectively coupled to the output of the first voltage conversion circuit 211 and the output of the second voltage conversion circuit 212, and the digital output port of the second ADC 34 is coupled to the controller 24. The controller 24 can obtain the load link information X1 from the output of the first voltage conversion circuit 211 through the second ADC 34, and obtain the load link information X2 from the output of the second voltage conversion circuit 212 through the second ADC 34. The second ADC 34 performs analog-to-digital conversion on the load link information X1 and the load link information X2, respectively, to obtain two digital signals. The two digital signals are then serially output to the controller 24 through the digital output port of the second ADC 34 in a predetermined order. The controller 24 then parses the signals in the predetermined order to obtain the load link information X1 and the load link information X2. The controller 24 can determine a control signal Z1 based on the load link information X1 and the backlight sampling voltage Y1, and output the control signal Z1 to the first voltage conversion circuit 211. The controller 24 can determine a control signal Z2 based on the load link information X2 and the backlight sampling voltage Y2, and output the control signal Z2 to the second voltage conversion circuit 212. When the controller 24 has an analog-to-digital conversion interface (i.e., it can directly input an analog signal), or when the analog-to-digital conversion interface of the controller 24 is sufficient, the second ADC 34 can be the analog-to-digital conversion interface in the controller 24.

[0202] Furthermore, the second ADC 34 can be a four-channel analog input and one-channel digital output ADC like the ADC 32. The four analog input ports of the ADC can be coupled to the output of the first voltage conversion circuit 211, the output of the second voltage conversion circuit 212, the output of the first photodetection circuit 231, and the output of the second photodetection circuit 232, respectively. The ADC can serially output the load link information X1, the load link information X2, the backlight sampling voltage Y1, and the backlight sampling voltage Y2 in a certain order through the digital output port of the second ADC 34 to the controller 24. The controller 24 can parse the load link information X1, the load link information X2, the backlight sampling voltage Y1, and the backlight sampling voltage Y2 in a certain order. This can reduce the number of ADCs, lower costs, improve integration, and facilitate miniaturization of optoelectronic components.

[0203] In another possible embodiment, Figure 14 As shown, in Figure 2On the basis of, the voltage conversion circuit 21 further has an information output terminal, which is coupled to the information input terminal of the controller 24, and the information output terminal is used to output the load link information X to the controller 24.

[0204] In another possible embodiment, Figure 15 As shown, in Figure 3 On the basis of the above, the voltage conversion circuit 21 further has an information output terminal for outputting the load link information X, and the load link information X is an analog signal. When the controller 24 does not have an analog-to-digital conversion interface and a digital-to-analog conversion interface, or when the analog-to-digital conversion interface and the digital-to-analog conversion interface resources of the controller 24 are insufficient, the optoelectronic component may further include a second ADC 34. The analog input port of the second ADC 34 is coupled to the information output terminal of the voltage conversion circuit 21, and the digital output port of the second ADC 34 is coupled to the input terminal of the controller 24. The second ADC 34 performs analog-to-digital conversion on the load link information X to obtain a digital signal, and outputs the digital signal to the controller 24 through the digital output port of the second ADC 34.

[0205] Furthermore, the second ADC 34 can be a two-channel analog input and one-channel digital output ADC like the ADC 32. The two analog input ports of the ADC can be coupled to the information output port of the voltage conversion circuit 21 and the output port of the photodetection circuit 23, respectively. The ADC can serially output the load link information X and the backlight sampling voltage Y to the controller 24 in a certain order. The controller 24 can then analyze the load link information X and the backlight sampling voltage Y in a certain order. This can reduce the number of ADCs, lower costs, improve integration, and facilitate miniaturization of optoelectronic components.

[0206] In addition, the optoelectronic assembly may further include a temperature control drive circuit and a temperature control circuit. The temperature control drive circuit is used to supply power to the temperature control circuit, and the temperature control circuit is used to control the temperature of the semiconductor optoelectronic device 22 (e.g., to cool or heat it), so that the semiconductor optoelectronic device 22 operates at a preset operating temperature to increase the output optical power or extend the service life of the semiconductor optoelectronic device 22. Exemplarily, the temperature control circuit may be a thermoelectric cooler (TEC).

[0207] In one possible implementation, Figure 16 As shown, in Figure 2On the basis of the above, the optoelectronic component may further include a temperature control drive circuit 41 and a temperature control circuit 42. The power supply 25 is used to supply power to the entire optoelectronic component, and the power supply 25 may have at least three voltage output terminals, respectively providing a supply voltage Vcc_a to the voltage conversion circuit 21, a supply voltage Vcc_b to the temperature control drive circuit 41, and a supply voltage Vcc_c to the controller 24. Exemplarily, the power supply 25 is located outside the entire optoelectronic component and provides three power supply interfaces, Vcc_a, Vcc_b, and Vcc_c, to the optoelectronic component. The supply voltages Vcc_a, Vcc_b, and Vcc_c may be the same or different, and the magnitude of the supply voltages may be determined based on the current characteristics or voltage characteristics of the device to which the power supply 25 is coupled. In addition, the supply voltage Vcc_c may also be used to power other devices such as ADCs and DACs.

[0208] In addition, the magnitude of the supply voltage Vcc_a can be optimized based on the input-output voltage curve efficiency of the voltage conversion circuit 21 to maximize the voltage conversion efficiency of the voltage conversion circuit 21. The magnitude of the supply voltage Vcc_b can be optimized based on the voltage, current, cooling capacity, heating capacity, cooling power consumption, and heating power consumption of the temperature control drive circuit 41 and the temperature control circuit 42 to improve the power supply efficiency of the temperature control circuit 42. The magnitude of the supply voltage Vcc_c can be optimized based on the voltage, current, and power consumption of components such as the controller 24, ADC, and DAC to ensure the normal operation of these components and improve system stability.

[0209] The supply voltage Vcc_a may range from 1.8V to 18V. For example, the supply voltage Vcc_a may be 3.3V, 5V, or 12V, etc. The deviation accuracy of the supply voltage Vcc_a may be less than or equal to 20%. Furthermore, the deviation accuracy of the supply voltage Vcc_a may be less than or equal to 10%. Furthermore, the deviation accuracy of the supply voltage may be less than or equal to 5%.

[0210] The supply voltage Vcc_b may range from 2V to 18V. For example, the supply voltage Vcc_b may be 3.3V, 5V, or 12V, etc. The deviation accuracy of the supply voltage Vcc_b may be less than or equal to 20%. Furthermore, the deviation accuracy of the supply voltage Vcc_b may be less than or equal to 10%. Furthermore, the deviation accuracy of the supply voltage may be less than or equal to 5%.

[0211] The range of the supply voltage Vcc_c can be 1.5V to 6V. Exemplarily, the range of the supply voltage Vcc_c can be 1.8V to 3.6V. Further, the supply voltage Vcc_c can be 3.3V. The deviation accuracy of the supply voltage Vcc_c can be less than or equal to 20%. Further, the deviation accuracy of the supply voltage Vcc_c can be less than or equal to 10%. Further, the deviation accuracy of the supply voltage can be less than or equal to 5%.

[0212] The bias voltage output by the voltage conversion circuit 21 has a voltage ripple of 50mV or less after filtering. Furthermore, the voltage ripple is 40mV or less. Furthermore, the voltage ripple is 30mV or less. Furthermore, the voltage ripple is 20mV or less. Furthermore, the voltage ripple is 10mV or less. Furthermore, the voltage ripple is 5mV or less. The smaller the voltage ripple, the smaller the current change in the semiconductor optoelectronic device caused by the voltage ripple, and the smaller the impact on the target optical power.

[0213] The following combination Figure 17 The coupling method between the power supply 25, the voltage conversion circuit 21, the temperature control drive circuit 41 and the controller 24 is explained. For the convenience of explanation, the composition, function and coupling method of other functional modules can refer to the description in other drawings.

[0214] In one possible implementation, Figure 17 As shown in Figure A, power supply 25 is used to power the entire optoelectronic assembly. Power supply 25 may have at least one voltage output terminal, which provides a supply voltage Vcc_a to voltage conversion circuit 21, temperature control drive circuit 41, and controller 24. The magnitude of supply voltage Vcc_a can be determined based on the current or voltage characteristics of the devices coupled to power supply 25. Furthermore, supply voltage Vcc_a can also be used to power other devices such as ADCs and DACs.

[0215] The range of the supply voltage Vcc_a can be 1.8V to 18V. Exemplarily, the range of the supply voltage Vcc_a can be 2V to 6V. Further, the range of the supply voltage Vcc_a can be 2V to 3.6V. Further, the supply voltage Vcc_a can be 3.3V. The deviation accuracy of the supply voltage Vcc_a can be less than or equal to 20%. Further, the deviation accuracy of the supply voltage Vcc_a can be less than or equal to 10%. Further, the deviation accuracy of the supply voltage can be less than or equal to 5%.

[0216] In another possible embodiment, Figure 17As shown in Figure B, power supply 25 is used to supply power to the entire optoelectronic assembly. Power supply 25 may have at least two voltage output terminals, one for providing a supply voltage Vcc_a to voltage conversion circuit 21 and temperature control drive circuit 41, and one for providing a supply voltage Vcc_c to controller 24. Supply voltages Vcc_a and Vcc_c may be the same or different, and their magnitudes may be determined based on the current or voltage characteristics of the devices to which power supply 25 is coupled. Furthermore, supply voltage Vcc_c may also be used to power other devices, such as ADCs and DACs.

[0217] The supply voltage Vcc_a may range from 1.8V to 18V. For example, the supply voltage Vcc_a may be 3.3V, 5V, or 12V, etc. The deviation accuracy of the supply voltage Vcc_a may be less than or equal to 20%. Furthermore, the deviation accuracy of the supply voltage Vcc_a may be less than or equal to 10%. Furthermore, the deviation accuracy of the supply voltage may be less than or equal to 5%.

[0218] The range of the supply voltage Vcc_c can be 1.5V to 6V. Exemplarily, the range of the supply voltage Vcc_c can be 1.8V to 3.6V. Further, the supply voltage Vcc_c can be 3.3V. The deviation accuracy of the supply voltage Vcc_c can be less than or equal to 20%. Further, the deviation accuracy of the supply voltage Vcc_c can be less than or equal to 10%. Further, the deviation accuracy of the supply voltage can be less than or equal to 5%.

[0219] In another possible embodiment, Figure 17 As shown in Figure C, power supply 25 is used to supply power to the entire optoelectronic assembly. Power supply 25 may have at least two voltage output terminals, one for providing a supply voltage Vcc_a to voltage conversion circuit 21 and controller 24, and one for providing a supply voltage Vcc_b to temperature control drive circuit 41. Supply voltages Vcc_a and Vcc_b may be the same or different, and their magnitudes may be determined based on the current or voltage characteristics of the devices to which power supply 25 is coupled. Furthermore, supply voltage Vcc_a may also be used to power other devices such as ADCs and DACs.

[0220] The supply voltage Vcc_a may range from 1.8V to 18V. For example, the supply voltage Vcc_a may be 3.3V, 5V, or 12V, etc. The deviation accuracy of the supply voltage Vcc_a may be less than or equal to 20%. Furthermore, the deviation accuracy of the supply voltage Vcc_a may be less than or equal to 10%. Furthermore, the deviation accuracy of the supply voltage may be less than or equal to 5%.

[0221] The supply voltage Vcc_b may range from 2V to 18V. For example, the supply voltage Vcc_b may be 3.3V, 5V, or 12V, etc. The deviation accuracy of the supply voltage Vcc_b may be less than or equal to 20%. Furthermore, the deviation accuracy of the supply voltage Vcc_b may be less than or equal to 10%. Furthermore, the deviation accuracy of the supply voltage may be less than or equal to 5%.

[0222] In another possible embodiment, Figure 17 As shown in Figure D, power supply 25 is used to supply power to the entire optoelectronic assembly. Power supply 25 may have at least two voltage output terminals, one for providing a supply voltage Vcc_c to the temperature-controlled drive circuit 41 and controller 24, and one for providing a supply voltage Vcc_a to the voltage conversion circuit 21. Supply voltage Vcc_a and supply voltage Vcc_c may be the same or different, and the magnitude of the supply voltage can be determined based on the current or voltage characteristics of the device to which power supply 25 is coupled. Furthermore, supply voltage Vcc_c may also be used to power other devices such as ADCs and DACs.

[0223] The supply voltage Vcc_a may range from 1.8V to 18V. For example, the supply voltage Vcc_a may be 3.3V, 5V, or 12V, etc. The deviation accuracy of the supply voltage Vcc_a may be less than or equal to 20%. Furthermore, the deviation accuracy of the supply voltage Vcc_a may be less than or equal to 10%. Furthermore, the deviation accuracy of the supply voltage may be less than or equal to 5%.

[0224] The range of the supply voltage Vcc_c can be 1.5V to 6V. Exemplarily, the range of the supply voltage Vcc_c can be 1.8V to 3.6V. Further, the supply voltage Vcc_c can be 3.3V. The deviation accuracy of the supply voltage Vcc_c can be less than or equal to 20%. Further, the deviation accuracy of the supply voltage Vcc_c can be less than or equal to 10%. Further, the deviation accuracy of the supply voltage can be less than or equal to 5%.

[0225] The various coupling modes among the above-mentioned power supply 25, voltage conversion circuit 21, temperature control drive circuit 41 and controller 24, wherein the power supply voltage provided by the power supply 25 is determined according to the load characteristics of the device coupled to the power supply 25, can improve power supply efficiency, reduce energy consumption and improve system stability.

[0226] In addition, the voltage conversion circuit 21 may also have an enable terminal. When an enable signal is input to the enable terminal, the voltage conversion circuit 21 is enabled (turned on), and the voltage conversion circuit 21 outputs a bias voltage to the semiconductor photoelectric device 22 to drive the semiconductor photoelectric device 22 to emit light or amplify light from the light source. When a disable signal is input to the enable terminal, the voltage conversion circuit 21 is disabled (turned off), and the voltage conversion circuit 21 does not output a bias voltage to the semiconductor photoelectric device 22, so that the semiconductor photoelectric device 22 does not emit light or cannot amplify light from the light source. It should be noted that the enable signal and the disable signal can be signals of different levels.

[0227] For example, Figure 18 As shown, in Figure 10 On the basis of the first voltage conversion circuit 211 and the second voltage conversion circuit 212, they may further have an enable terminal. The enable terminals of each voltage conversion circuit 21 may be independently controlled by different pins of the controller 24, or may be uniformly controlled by the same pin of the controller 24. If the enable terminals of each voltage conversion circuit 21 are independently controlled by different pins of the controller 24, the controller 24 may enable or disable at least one of the first voltage conversion circuit 211 and the second voltage conversion circuit 212, i.e., independent control of different load links may be achieved, thereby enabling the independent turning on or off of each semiconductor optoelectronic device 22. If the enable terminals of multiple voltage conversion circuits 21 are uniformly controlled by the same pin of the controller 24, multiple semiconductor optoelectronic devices 22 may be turned on or off together, thereby saving pin resources of the controller 24.

[0228] During the initialization of the entire optoelectronic component, the controller 24 outputs a disable signal to disable each voltage conversion circuit 21 (at least one of the first voltage conversion circuit 211 and the second voltage conversion circuit 212). After the controller 24 outputs a preset control signal, it outputs an enable signal to enable each voltage conversion circuit 21. Alternatively, during the initialization process of the controller 24, a disable signal can be input to the enable terminal of the voltage conversion circuit 21 by fixing the input high and low levels or other logic gate circuits, so that the voltage conversion circuit 21 is disabled during the initialization process of the controller 24. Alternatively, the enable terminal of the voltage conversion circuit 21 can be coupled to a soft start circuit. During the initialization process of the controller 24, when the soft start circuit is powered on and soft started, the soft start circuit outputs an enable signal to enable the voltage conversion circuit 21, thereby turning on the semiconductor optoelectronic device 22. This can prevent the control signal Z from being unstable during the initialization process, which could cause the bias voltage output by the voltage conversion circuit 21 to be excessively large. Otherwise, if the voltage conversion circuit 21 is already in the enabled state before the controller 24 outputs the control signal Z, the bias voltage output by the voltage conversion circuit 21 is uncontrolled and could be excessively large, thereby burning out the semiconductor optoelectronic device 22 on the load link. Furthermore, these methods can be combined.

[0229] like Figure 19 As shown, for Figure 3 In the case where the optoelectronic component shown in FIG includes a voltage conversion circuit 21, for example, when the voltage conversion circuit 21 is enabled or disabled by the controller 24, the controller 24 may execute the following control method for the optoelectronic component:

[0230] S101 , after the optoelectronic component is powered on, the controller 24 performs initialization.

[0231] S102 : The controller 24 outputs a disable signal to the enable terminal of the voltage conversion circuit 21 to disable the voltage conversion circuit 21 .

[0232] S103 : The controller 24 outputs a preset control signal to the feedback terminal of the voltage conversion circuit 21 .

[0233] The preset control signal can control the voltage conversion circuit 21 to output a default bias voltage to the semiconductor optoelectronic device 22. The preset control signal can be converted from digital to analog via the DAC 33 and can also be amplified or reduced via the feedback network 31.

[0234] S104 : The controller 24 outputs an enable signal to the enable terminal of the voltage conversion circuit 21 to enable the voltage conversion circuit 21 .

[0235] The semiconductor photoelectric device 22 emits light or amplifies the light from the light source, and the photodetection circuit 23 outputs the backlight sampling voltage Y.

[0236] S105 , the controller 24 obtains the backlight sampling voltage Y from the photodetection circuit 23 , calculates the photocurrent of the photodetection circuit 23 based on the backlight sampling voltage Y, and further calculates the optical power of the semiconductor photoelectric device 22 to determine whether the optical power meets the requirement.

[0237] If the requirements are met, step S106 is executed and then step S105 is re-executed; if the requirements are not met, step S107 is executed and then step S105 is re-executed, thereby realizing dynamic and real-time APC.

[0238] S106 : The controller 24 maintains the control signal Z outputted previously.

[0239] This step stabilizes the bias voltage output by the voltage conversion circuit 21 within a certain range, thereby stabilizing the output optical power of the semiconductor optoelectronic device 22 within a certain range.

[0240] S107 , the controller 24 obtains a control signal Z according to the backlight sampling voltage Y, and outputs the control signal Z to the feedback terminal of the voltage conversion circuit 21 .

[0241] This step causes the bias voltage output by the voltage conversion circuit 21 to change, thereby changing the output optical power of the semiconductor optoelectronic device 22 .

[0242] like Figure 20 As shown, for Figure 18 In the case where the optoelectronic component shown includes multiple voltage conversion circuits 21, the controller 24 can execute the following optoelectronic component control method:

[0243] S201 , after the optoelectronic component is powered on, the controller 24 performs initialization.

[0244] S202 , the controller 24 outputs a disable signal 1 to the enable terminal of the first voltage conversion circuit 211 to disable the first voltage conversion circuit 211 , and outputs a disable signal 1 to the enable terminal of the second voltage conversion circuit 212 to disable the second voltage conversion circuit 212 .

[0245] S203 : The controller 24 outputs a preset control signal to the feedback terminal of the first voltage conversion circuit 211 and the feedback terminal of the second voltage conversion circuit 212 .

[0246] The controller 24 outputs a preset control signal to the feedback terminal of the first voltage conversion circuit 211 to control the first voltage conversion circuit 211 to output a preset bias voltage to the first semiconductor optoelectronic device 221. The controller 24 outputs a preset control signal to the feedback terminal of the second voltage conversion circuit 212 to control the second voltage conversion circuit 212 to output a preset bias voltage to the second semiconductor optoelectronic device 222. These two preset control signals can be the same or different. These two preset control signals can be sent to the DAC 33 in a certain order, undergo digital-to-analog conversion by the DAC 33, and can also be amplified or reduced by the first feedback network 311 and the second feedback network 312, respectively.

[0247] S204 , the controller 24 outputs an enable signal 1 to the enable terminal of the first voltage conversion circuit 211 to enable the first voltage conversion circuit 211 , and outputs an enable signal 2 to the enable terminal of the second voltage conversion circuit 212 to enable the second voltage conversion circuit 212 .

[0248] The first semiconductor optoelectronic device 221 emits light or amplifies light from a light source, and the first photodetection circuit 231 outputs a backlight sampling voltage Y1. The second semiconductor optoelectronic device 222 emits light or amplifies light from a light source, and the second photodetection circuit 232 outputs a backlight sampling voltage Y2. The backlight sampling voltages Y1 and Y2 can be converted to digital by the ADC 32 and then output to the controller 24 in a specified order.

[0249] S205. The controller 24 obtains the backlight sampling voltage from the photodetection circuit in the i-th APC loop, calculates the photocurrent of the photodetection circuit in the i-th APC loop based on the backlight sampling voltage, and then calculates the optical power of the semiconductor photoelectric device in the i-th APC loop to determine whether the optical power meets the requirements.

[0250] For example, Figure 18 The optoelectronic component shown includes two APC loops, and the value of i can be 1 or 2. For the first APC loop, the controller 24 obtains the backlight sampling voltage Y1 from the first photodetection circuit 231, calculates the photocurrent of the first photodetection circuit 231 based on the backlight sampling voltage Y1, and then calculates the optical power of the first semiconductor optoelectronic device 221 to determine whether the optical power meets the requirements. For the second APC loop, the controller 24 obtains the backlight sampling voltage Y2 from the second photodetection circuit 232, calculates the photocurrent of the second photodetection circuit 232 based on the backlight sampling voltage Y2, and then calculates the optical power of the second semiconductor optoelectronic device 222 to determine whether the optical power meets the requirements.

[0251] If the requirements are met, step S206 is executed and then step S205 is re-executed; if the requirements are not met, step S207 is executed and then step S205 is re-executed, thereby realizing dynamic real-time APC for the i-th APC loop.

[0252] It should be noted that if the output optical power of one APC loop meets the requirement, while the output optical power of the other APC loop does not meet the requirement, the controller 24 can set a software delay to allow the two APC loops to enter step S205 again at the same time after going through different step processes, so as to simplify the program control algorithm design and achieve synchronization of different APC loops.

[0253] Alternatively, the controller 24 may synchronize the two APC loops when outputting the control signals Z of different APC loops to the DAC 33. The controller 24 converts the two parallel control signals Z into serial signals according to a certain rule and outputs them to the DAC 33. The DAC 33 decomposes the serial digital signals according to the corresponding rule and converts them into two analog signals, which are output to the feedback terminals of the first feedback network 311 and the second feedback network 312, respectively.

[0254] S206 : The controller 24 maintains the control signal Zi previously outputted for the i-th APC loop.

[0255] This step stabilizes the bias voltage output by the voltage conversion circuit 21 of the i-th APC loop within a certain range, thereby stabilizing the output optical power of the semiconductor optoelectronic device 22 of the i-th APC loop within a certain range.

[0256] S207 , the controller 24 obtains a control signal according to the backlight sampling voltage output by the photodetection circuit in the i-th APC loop, and outputs a control signal Zi to the feedback terminal of the voltage conversion circuit in the i-th APC loop.

[0257] This step causes the bias voltage output by the voltage conversion circuit 21 of the i-th APC loop to change, so as to change the output optical power of the semiconductor optoelectronic device 22 of the i-th APC loop.

[0258] For example, for the first APC loop, the controller 24 obtains a control signal Z1 based on the backlight sampling voltage Y1 and outputs the control signal Z1 to the feedback terminal of the first voltage conversion circuit 211. For the second APC loop, the controller 24 obtains a control signal Z2 based on the backlight sampling voltage Y2 and outputs the control signal Z2 to the feedback terminal of the second voltage conversion circuit 212.

[0259] This control method can be extended to scenarios with multiple APC loops to achieve separate control for each APC loop.

[0260] The control method for an optoelectronic component provided in an embodiment of the present application first disables the voltage conversion circuit during controller initialization, and then enables the voltage conversion circuit after the controller outputs a control signal to the voltage conversion circuit. Alternatively, the voltage conversion circuit can be disabled during the controller initialization process by fixing the input high and low levels or other logic gate circuits. Alternatively, the voltage conversion circuit can be enabled during the controller initialization process by using a soft start circuit, thereby turning on the semiconductor optoelectronic device. This can prevent the control signal from being unstable during the initialization process, which could cause the bias voltage output by the voltage conversion circuit to be excessive and burn out the semiconductor optoelectronic device.

[0261] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0262] Those skilled in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0263] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0264] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0265] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located on a single device or distributed across multiple devices. Some or all of the modules may be selected to achieve the purpose of this embodiment based on actual needs.

[0266] In addition, the functional modules in the various embodiments of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0267] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loading and executing computer program instructions on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website, computer, server or data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) mode to another website, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more media that can be integrated. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (eg, a solid state disk (SSD)).

[0268] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A photoelectric component, characterized in that: include: Voltage conversion circuits, semiconductor optoelectronic devices, photoelectric detection circuits and controllers; The voltage conversion circuit is used to provide a bias voltage to the semiconductor optoelectronic device, and adjust the output optical power of the semiconductor optoelectronic device by changing the bias voltage, wherein the differential resistance value Rdiff of the semiconductor optoelectronic device within the target optical power range satisfies 0.1Ω≤Rdiff≤50Ω, and the differential resistance value refers to the ratio of the voltage change to the current change corresponding to the voltage change; The photoelectric detection circuit is used to detect the output optical power of the semiconductor photoelectric device and output a detection signal to the controller; The controller is used to determine a control signal according to the detection signal and output the control signal to the voltage conversion circuit, wherein the control signal is used to adjust the bias voltage.

2. The optoelectronic component according to claim 1, characterized in that The differential resistance Rdiffsub of the semiconductor optoelectronic device within a certain sub-range of the target optical power and the average differential resistance Rdiffavg within the target optical power range satisfy the following conditions: max(0.02*Rdiffavg, 0.1Ω)≤Rdiffsub≤min(50*Rdiffavg, 50Ω); Among them, max(0.02*Rdiffavg, 0.1Ω) means taking the larger value of 0.02*Rdiffavg and 0.1Ω; min(50*Rdiffavg, 50Ω) means taking the smaller value of 50*Rdiffavg and 50Ω; The average differential resistance Rdiffavg represents the ratio between the change in bias voltage and the corresponding current change corresponding to the lower limit and upper limit of the optical power of the semiconductor optoelectronic device within the target optical power range.

3. The optoelectronic component according to claim 1, characterized in that The semiconductor optoelectronic device is a light source, and within the target optical power range, the resistance of the light source is ≤60Ω.

4. The optoelectronic component according to claim 1, characterized in that The semiconductor optoelectronic device is an optical amplifier. Within the target optical power range, the resistance of the optical amplifier is ≤60Ω.

5. The optoelectronic component according to claim 1, wherein: The voltage conversion circuit is the only bias adjustment circuit of the semiconductor optoelectronic device.

6. The optoelectronic component according to any one of claims 1 to 5, characterized in that: The controller processes a digital signal with a bit width greater than or equal to 6 bits.

7. The optoelectronic component according to any one of claims 1 to 5, characterized in that: The controller is also used for: Enable or disable the voltage conversion circuit.

8. The optoelectronic component according to any one of claims 1 to 5, characterized in that: The controller is used to: Load link information is acquired, and the control signal is determined according to the load link information and the detection signal, wherein the load link information includes a value of the bias voltage.

9. The optoelectronic component according to any one of claims 1 to 5, characterized in that: The optoelectronic component further includes a temperature control driving circuit and a temperature control circuit. The temperature control driving circuit is used to supply power to the temperature control circuit, and the temperature control circuit is used to control the temperature of the semiconductor optoelectronic device.

10. The optoelectronic component according to claim 9, characterized in that: The power supply voltage input to the temperature control driving circuit ranges from 2V to 18V.

11. The optoelectronic component according to any one of claims 1 to 5, characterized in that: The power supply voltage input to the voltage conversion circuit ranges from 1.8V to 18V.

12. The optoelectronic component according to any one of claims 1 to 5, characterized in that: The power supply voltage input to the controller ranges from 1.5V to 6V.

13. The optoelectronic component according to any one of claims 1 to 5, characterized in that: The voltage ripple of the bias voltage output by the voltage conversion circuit after filtering is ≤50mV.

14. The optoelectronic component according to claim 1, characterized in that The voltage conversion circuit includes a first voltage conversion circuit and a second voltage conversion circuit, the semiconductor optoelectronic device includes a first semiconductor optoelectronic device and a second semiconductor optoelectronic device, the photodetection circuit includes a first photodetection circuit and a second photodetection circuit; the detection signal includes a first detection signal and a second detection signal; the control signal includes a first control signal and a second control signal; The first photoelectric detection circuit is used to detect the output optical power of the first semiconductor photoelectric device and output the first detection signal to the controller; The second photoelectric detection circuit is used to detect the output optical power of the second semiconductor photoelectric device and output the second detection signal to the controller; The controller is configured to determine the first control signal according to the first detection signal, and send the first control signal to the first voltage conversion circuit, wherein the first control signal is used to adjust a bias voltage provided to the first semiconductor optoelectronic device; The second control signal is determined according to the second detection signal, and the second control signal is sent to the second voltage conversion circuit, where the second control signal is used to adjust the bias voltage provided to the second semiconductor optoelectronic device.

15. The optoelectronic component according to claim 14, characterized in that: The optoelectronic assembly also includes a digital-to-analog converter; The controller is configured to send the first control signal and the second control signal to the digital-to-analog converter in a serial manner; The digital-to-analog converter is used to perform digital-to-analog conversion on the first control signal and output the result to the first voltage conversion circuit, and to perform digital-to-analog conversion on the second control signal and output the result to the second voltage conversion circuit.

16. The optoelectronic component according to claim 15, characterized in that The bit width of the digital-to-analog converter is greater than or equal to 6 bits.

17. The optoelectronic component according to claim 1, characterized in that The semiconductor optoelectronic device includes a first semiconductor optoelectronic device and a second semiconductor optoelectronic device, the photodetection circuit includes a first photodetection circuit and a second photodetection circuit; the detection signal includes a first detection signal and a second detection signal; The first photoelectric detection circuit is used to detect the output optical power of the first semiconductor photoelectric device and output the first detection signal to the controller; The second photoelectric detection circuit is used to detect the output optical power of the second semiconductor photoelectric device and output the second detection signal to the controller; The controller is used to determine the control signal according to the first detection signal and the second detection signal, and send it to the voltage conversion circuit. The control signal is used to adjust the bias voltage provided to the first semiconductor optoelectronic device and the second semiconductor optoelectronic device.

18. The optoelectronic component according to any one of claims 14 to 17, characterized in that: The optoelectronic component also includes an analog-to-digital converter, which is used to perform analog-to-digital conversion on the first detection signal, perform analog-to-digital conversion on the second detection signal, and output the analog-to-digital converted first detection signal and the second detection signal to the controller in serial.

19. The optoelectronic component according to claim 18, characterized in that The bit width of the analog-to-digital converter is greater than or equal to 6 bits.

20. The optoelectronic component according to any one of claims 1 to 5, characterized in that: The optoelectronic component further includes a feedback network, which is used to amplify or reduce the voltage range of the control signal.

21. The optoelectronic component according to claim 20, characterized in that The feedback network includes a first resistor, a second resistor, and a third resistor, wherein the second end of the first resistor is grounded, the first end of the first resistor, the second end of the second resistor, and the first end of the third resistor are coupled to the feedback end of the voltage conversion circuit, the first end of the second resistor is coupled to the output end of the voltage conversion circuit, and the second end of the third resistor is coupled to the output end of the controller; The output terminal of the controller is used to output the control signal; the feedback terminal of the voltage conversion circuit is used to input the amplified or reduced control signal.

22. The optoelectronic assembly according to any one of claims 1 to 5, characterized in that: The voltage conversion circuit is a DC-DC conversion circuit.

23. The optoelectronic assembly according to any one of claims 1 to 5, characterized in that: The optoelectronic component is a light source or an optical amplifier separated from the optical modulator.

24. A light source pool, characterized in that: The method comprises at least one optoelectronic component according to any one of claims 1 to 23.

25. An optoelectronic switching device, characterized in that: It comprises at least one of the optoelectronic component according to any one of claims 1 to 23 or the light source pool according to claim 24, an optical modulator and a switching chip, wherein the optoelectronic component or the light source pool is used to output light, and the switching chip is used to control the optical modulator to modulate the light.

26. The optoelectronic switching device according to claim 25, characterized in that: The optoelectronic switching device includes a first controller, which is used to output a signal to a controller in the optoelectronic component to adjust the output optical power of the optoelectronic component, or to output a signal to a controller in the light source pool to adjust the output optical power of the light source pool.

27. A method for controlling a photoelectric component, characterized in that: Applicable to the optoelectronic assembly according to any one of claims 1 to 23; the method comprising: receiving a detection signal from a photoelectric detection circuit in the photoelectric component, wherein the detection signal is used to indicate the output optical power of the semiconductor photoelectric device in the photoelectric component; A control signal is determined according to the detection signal, and the control signal is sent to a voltage conversion circuit in the optoelectronic component, wherein the control signal is used to adjust the bias voltage.

28. The method according to claim 27, characterized in that Also includes: The voltage conversion circuit is disabled, and a preset control signal is output to the voltage conversion circuit to enable the voltage conversion circuit.

29. The method according to any one of claims 27-28, characterized in that The method further includes: acquiring load link information, wherein the load link information includes a value of the bias voltage; The determining the control signal according to the detection signal includes: determining the control signal according to the load link information and the detection signal.

30. The method according to any one of claims 27-28, characterized in that The method is specifically applied to the optoelectronic assembly according to any one of claims 14 to 16; the method further comprises: A first control signal and a second control signal are sent serially to a digital-to-analog converter in the optoelectronic component, wherein the first control signal is used to adjust a bias voltage provided to a first semiconductor optoelectronic device, and the second control signal is used to adjust a bias voltage provided to a second semiconductor optoelectronic device.

31. The method according to any one of claims 27-28, characterized in that The method is specifically applied to the optoelectronic component according to claim 17; the method further comprises: The control signal is determined based on the first detection signal and the second detection signal and sent to the voltage conversion circuit. The control signal is used to adjust the bias voltage provided to the first semiconductor optoelectronic device and the second semiconductor optoelectronic device. The first detection signal is used to indicate the output optical power of the first semiconductor optoelectronic device, and the second detection signal is used to indicate the output optical power of the second semiconductor optoelectronic device.

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