Method for acquiring breakdown voltage, computer readable storage medium and terminal

By applying a negative potential to the control gate and measuring the point where the current in the word line equals that in the control gate, the dielectric layer breakdown voltage is determined, which solves the problem of inaccurate testing in the prior art and improves the reliability of flash memory devices and the durability of the dielectric layer.

CN115482872BActive Publication Date: 2026-08-04HUA HONG SEMICON WUXI LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HUA HONG SEMICON WUXI LTD
Filing Date
2022-09-26
Publication Date
2026-08-04

AI Technical Summary

Technical Problem

In the prior art, the breakdown voltage test of the dielectric layer between the word line and the control gate is inaccurate, and leakage current of the semiconductor substrate affects the measurement results.

Method used

By applying a negative potential to the control gate and applying a voltage to the word line within a preset voltage range, the current of the word line and the control gate is measured, and the breakdown voltage of the dielectric layer is determined using the point where the currents are equal, thus suppressing leakage current in the semiconductor substrate.

Benefits of technology

Accurately measuring the breakdown voltage of the dielectric layer improves the reliability of flash memory devices and is suitable for TDDB testing, ensuring the durability of the dielectric layer under long-term load.

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Abstract

This invention provides a method for obtaining breakdown voltage, a computer-readable storage medium, and a terminal. The method includes: providing a flash memory device, the flash memory device including word lines, control gates located on both sides of the word lines, and a dielectric layer between the two; applying a first voltage to the control gates, and applying a second voltage to the word lines within a preset voltage range with a preset step size; measuring and obtaining the word line current and control gate current under each of the second voltages, wherein the word line current is the current flowing into the word line, and the control gate current is the current flowing out of the control gate; and obtaining the breakdown voltage of the dielectric layer based on the word line current and the control gate current; wherein the first voltage is less than 0V, and the second voltage is greater than or equal to 0V. This invention solves the problem of inaccurate breakdown voltage of the dielectric layer between the word lines and the control gates obtained by existing methods.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for obtaining breakdown voltage, a computer-readable storage medium, and a terminal. Background Technology

[0002] The breakdown voltage (BV) of the dielectric layer between the word line and the control gate in Nord Flash memory affects the device's reliability during erasure. Currently, when testing the breakdown voltage of the dielectric layer between the word line and the control gate, the semiconductor substrate (or the Chuck carrying the wafer) is grounded, with a potential of approximately 0V. This causes most of the current to pass through the gate oxide layer (the oxide layer between the floating gate and the semiconductor substrate) and then be lost through the semiconductor substrate, resulting in inaccurate measured breakdown voltage.

[0003] Furthermore, while manually testing breakdown voltage with a probe can avoid excessive leakage by leaving the semiconductor substrate ungrounded, in reality, even when the control gate is at 0 potential, a small portion of current still fails to pass through the dielectric layer between the word line and the control gate. This indicates that leakage still exists in areas of the device close to the control gate potential. Additionally, when using an automated probe to test breakdown voltage, all probes are connected, and grounding the semiconductor substrate is necessary in some tests. Therefore, it is difficult to rule out interference from grounding leakage on the dielectric layer breakdown voltage test. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for obtaining breakdown voltage, a computer-readable storage medium, and a terminal, to solve the problem that the breakdown voltage of the dielectric layer between the word line and the control gate obtained by the existing method is inaccurate.

[0005] To achieve the above and other related objectives, the present invention provides a method for obtaining breakdown voltage, the method comprising:

[0006] A flash memory device is provided, the flash memory device including word lines, control gates located on both sides of the word lines and a dielectric layer between the two;

[0007] A first voltage is applied to the control gate, and a second voltage is applied to the word line within a preset voltage range with a preset step size;

[0008] The word line current and control gate current under each of the second voltages are obtained by measurement, wherein the word line current is the current flowing into the word line and the control gate current is the current flowing out of the control gate;

[0009] The breakdown voltage of the dielectric layer is obtained based on the word line current and the control gate current.

[0010] Wherein, the first voltage is less than 0V, and the second voltage is greater than or equal to 0V.

[0011] Optionally, the preset voltage range is 0V to 25V.

[0012] Optionally, the method for obtaining the breakdown voltage of the dielectric layer based on the word line current and the control gate current includes:

[0013] Determine whether the word line current has reached the target value, and determine whether the word line current and the control gate current are equal. If the word line current reaches the target value and is equal to the control gate current, subtract the first voltage from the second voltage corresponding to the word line current to obtain the breakdown voltage.

[0014] Optionally, the target value is 2nA.

[0015] Optionally, the preset step size includes 0.01V to 1V.

[0016] Optionally, the flash memory device includes a semiconductor substrate, and the semiconductor substrate is grounded during measurement.

[0017] Accordingly, the present invention also provides a computer-readable storage medium storing a computer program that is used to perform the method for obtaining breakdown voltage as described above.

[0018] Accordingly, the present invention also provides a terminal, including a processor and a memory, wherein the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory to cause the terminal to perform the method for obtaining breakdown voltage as described above.

[0019] As described above, the method for obtaining breakdown voltage, the computer-readable storage medium, and the terminal of the present invention, by applying a negative potential on the control gate, suppress the leakage current of the semiconductor substrate when scanning the word line with a voltage applied within a certain voltage range, ensuring that the current of the word line and the control gate are approximately equal, and are not affected by interference from other regions near 0 potential in the flash memory device, thereby obtaining an accurate breakdown voltage and improving the reliability of the flash memory device; moreover, the above test method can also be applied to TDDB (time-dependent dielectric breakdown) testing to accurately measure the endurance of the dielectric layer between the word line and the control gate under long-term load. Attached Figure Description

[0020] Figure 1 The diagram shown is a flowchart of the method for obtaining the breakdown voltage according to the present invention.

[0021] Figure 2The diagram shown illustrates the structure and measurement method of the flash memory device of this invention.

[0022] Figure 3 The graphs displayed are word line current curves, control gate current curves, and substrate current curves under different test conditions. Detailed Implementation

[0023] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0024] Please see Figures 1 to 3 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Although the illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation, the shape, quantity and proportion of each component in the actual implementation can be arbitrarily changed, and the layout of the components may also be more complex.

[0025] like Figure 1 As shown, this embodiment provides a method for obtaining the breakdown voltage, the method comprising:

[0026] A flash memory device is provided, the flash memory device including word lines, control gates located on both sides of the word lines and a dielectric layer between the two;

[0027] A first voltage is applied to the control gate, and a second voltage is applied to the word line within a preset voltage range with a preset step size;

[0028] The word line current and control gate current under each of the second voltages are obtained by measurement, wherein the word line current is the current flowing into the word line and the control gate current is the current flowing out of the control gate;

[0029] The breakdown voltage BV of the dielectric layer is obtained based on the word line current and the control gate current.

[0030] Wherein, the first voltage is less than 0V, and the second voltage is greater than or equal to 0V.

[0031] In this embodiment, when measuring the breakdown voltage BV of the dielectric layer, the first voltage applied to the control gate is a negative potential, making its potential lower than that of other regions in the semiconductor substrate and device. This suppresses current loss through other regions (regions with potential close to 0) in the semiconductor substrate and device. Moreover, when the negative potential applied to the control gate is sufficiently low, the current mainly flows through the dielectric layer between the word line and the control gate (meaning the current flowing into the word line is approximately equal to the current flowing out of the control gate), while the current through the semiconductor substrate is negligible. At this time, applying a high potential (positive potential) to the word line for scanning allows for a more accurate measurement of the breakdown voltage.

[0032] In this embodiment, the flash memory device further includes a floating gate and bit lines. The floating gate is located below the control gate and is isolated from the control gate by a gate dielectric layer. A gate oxide layer is formed between the floating gate and the semiconductor substrate. The gate oxide layer is also formed between the word lines and the semiconductor substrate. The bit lines are located on both sides of the control gate and the floating gate.

[0033] Specifically, the preset voltage range is 0V to 25V.

[0034] Specifically, the preset step size includes 0.01V to 1V. Optionally, in this embodiment, the preset step size is 0.2V. Of course, it can be selected according to the actual situation during actual measurement, which has no impact on this embodiment.

[0035] Specifically, the method for obtaining the breakdown voltage BV of the dielectric layer based on the word line current and the control gate current includes: determining whether the word line current reaches a target value, and determining whether the word line current and the control gate current are equal; if the word line current reaches the target value and is equal to the control gate current, subtracting the first voltage from the second voltage corresponding to the word line current to obtain the breakdown voltage BV.

[0036] Specifically, the target value is 2nA.

[0037] Specifically, the flash memory device includes a semiconductor substrate, and the semiconductor substrate is grounded during measurement.

[0038] Figure 3The figure shows the curves of word line current, control gate current, and substrate current obtained when a first voltage is applied to the control gate of the flash memory device and a second voltage is applied to the word line at a preset step size. Arrow 1 indicates the test condition: the control gate is connected to 0V and the semiconductor substrate is floating; arrow 2 indicates the test condition: the control gate is connected to 0V and the semiconductor substrate is grounded; arrow 3 indicates the test condition: the control gate is connected to -9V and the semiconductor substrate is grounded. As can be seen from the figure, when the control gate is connected to 0V and the semiconductor substrate is grounded or floating, the word line current and the control gate current are not equal, indicating leakage current in the semiconductor substrate or other areas close to 0 potential. When the control gate is connected to -9V, the word line current and the control gate current are equal, indicating that leakage current in the semiconductor substrate or other areas close to 0 potential is suppressed, and the current mainly flows through the dielectric layer between the word line and the control gate. Figure 3 It can be seen that the second voltage corresponding to the word line current reaching the target value (2nA) is 13.6V (it should be noted that the second voltage corresponding to the word line current reaching the target value is different under different test conditions). Therefore, the breakdown voltage of the dielectric layer is the second voltage 13.6V minus the first voltage -9V, that is, the breakdown voltage of the dielectric layer is 22.6V. It is evident that the method provided in this embodiment can more accurately reflect the breakdown voltage information of the dielectric layer between the word line and the control gate in the flash memory device.

[0039] Accordingly, this embodiment also provides a computer-readable storage medium storing a computer program that is used to perform the method for obtaining the breakdown voltage as described above.

[0040] Specifically, the computer-readable storage medium includes, but is not limited to, floppy disks, optical disks, CD-ROMs (compact disc-read-only memory), magneto-optical disks, ROMs (read-only memory), RAMs (random access memory), EPROMs (erasable programmable read-only memory), EEPROMs (electrically erasable programmable read-only memory), magnetic cards or optical cards, flash memory, or other types of media / machine-readable media suitable for storing machine-executable instructions. In addition, the computer-readable storage medium can be a product not connected to a computer device or a component already connected to a computer device.

[0041] Accordingly, this embodiment also provides a terminal, including a processor and a memory, wherein the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory, so that the terminal performs the method for obtaining the breakdown voltage as described above.

[0042] Specifically, the processor can be a general-purpose processor, including one or more central processing units (CPUs), network processors (NPs), etc.; it can also be a microcontroller unit (MCU), digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The memory can include, but is not limited to, random access memory, non-volatile memory, such as one or more disk storage devices, storage devices, or other non-volatile solid-state storage devices.

[0043] In summary, the method for obtaining breakdown voltage, the computer-readable storage medium, and the terminal of the present invention, by applying a negative potential to the control gate, enable the suppression of semiconductor substrate leakage current when scanning the word line with a voltage within a certain voltage range. This ensures that the current in the word line and the control gate are approximately equal, and is not affected by interference from other regions near zero potential in the flash memory device, thereby obtaining an accurate breakdown voltage and improving the reliability of the flash memory device. Furthermore, the above-mentioned testing method can also be applied to TDDB (time-dependent dielectric breakdown) testing to accurately measure the endurance of the dielectric layer between the word line and the control gate under long-term load. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0044] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method of obtaining a breakdown voltage, characterized by, The method includes: A flash memory device is provided, the flash memory device including word lines, control gates located on both sides of the word lines and a dielectric layer between the two; A first voltage is applied to the control gate, and a second voltage is applied to the word line within a preset voltage range with a preset step size; The word line current and control gate current under each of the second voltages are obtained by measurement, wherein the word line current is the current flowing into the word line and the control gate current is the current flowing out of the control gate; Determine whether the word line current reaches the target value, and determine whether the word line current and the control gate current are equal. If the word line current reaches the target value and is equal to the control gate current, subtract the first voltage from the second voltage corresponding to the word line current to obtain the breakdown voltage of the dielectric layer. Wherein, the first voltage is less than 0V, and the second voltage is greater than or equal to 0V.

2. The method of acquiring a breakdown voltage according to claim 1, wherein, The preset voltage range is 0V~25V.

3. The method of acquiring a breakdown voltage according to claim 1, wherein, The target value is 2nA.

4. The method of acquiring a breakdown voltage according to claim 1, wherein, The preset step size includes 0.01V to 1V.

5. The method of acquiring a breakdown voltage according to claim 1, wherein, The flash memory device includes a semiconductor substrate, which is grounded during measurement.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that is used to perform the method for obtaining the breakdown voltage as described in any one of claims 1 to 5.

7. A terminal, characterized by comprising: The device includes a processor and a memory, the memory being used to store a computer program, and the processor being used to execute the computer program stored in the memory to cause the terminal to perform the method for obtaining breakdown voltage as described in any one of claims 1 to 5.