A package and method of making the same
By setting a connecting block between the substrate and the plastic packaging layer and achieving conduction between the chip and the connecting block through the connecting piece and the connecting layer, the problem of poor structural stability of the package is solved and the welding strength and tensile strength of the package are enhanced.
Patent Information
- Application Number
- CN202211067925.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-01
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2042-09-01
AI Technical Summary
The existing packaging structure has the risk of the bottom pad of the chip falling off, and the structural stability of the package body is poor.
A connecting block is set between the substrate and the plastic packaging layer, and the chip and the connecting block are connected through the connecting parts and the connecting layer, thereby increasing the bonding area between the connecting block and the substrate. The strong bonding force and large bonding area between the substrate and the plastic packaging layer are utilized to reduce the risk of the connecting block falling off.
The structural stability of the package is improved, the welding strength of the package on the external device or external circuit is enhanced, and the ability to resist thrust and tension is increased.
Smart Images

Figure CN115497888B_ABST
Abstract
Description
Technical Field
[0001] The present invention is applied to the technical field of packages, in particular to a package and a preparation method thereof. Background Art
[0002] Packaging technology is used to install the shell for semiconductor integrated circuit chips, and plays the role of placing, fixing, sealing, protecting the chip and enhancing the electrical and thermal performance. It also serves as a bridge to communicate the internal circuit of the chip with the external circuit.
[0003] The existing packaging structure has the risk of the bottom pad of the chip falling off, and the structural stability of the package body is poor. Summary of the Invention
[0004] The present invention provides a package and a preparation method thereof to solve the problem of poor structural stability of the package.
[0005] To solve the above technical problems, the present invention provides a method for preparing a package, comprising: a substrate, a plurality of connecting blocks are formed on one side of the substrate, wherein the connecting blocks include: a first connecting block and a second connecting block arranged at intervals; a chip, the chip is mounted on the first connecting block; a plastic encapsulation layer, the plastic encapsulation layer is bonded to one side of the substrate and wraps the chip; a connector, the connector is bonded to the side of the plastic encapsulation layer away from the substrate, and corresponds to connecting the chip and the second connecting block; a connecting layer, one end of the connecting layer is located on the side of the substrate away from the plastic encapsulation layer, and the other end of the connecting layer extends along the side of the substrate to the corresponding connecting block and is connected to the corresponding connecting block.
[0006] A first blind hole and a second blind hole are formed on the side of the plastic encapsulation layer away from the substrate; the first blind hole exposes the chip, and the second blind hole exposes the second connecting block. One end of the connecting member fills the first blind hole and contacts the chip; the other end of the connecting member extends from the side of the plastic encapsulation layer away from the substrate to the second blind hole, and extends from the hole wall of the second blind hole to the second connecting block, and contacts the second connecting block.
[0007] A plurality of grooves are formed on the side surface of the substrate, and the grooves are obtained by cutting through holes on the substrate.
[0008] Wherein, the substrate comprises epoxy glass cloth.
[0009] To solve the above technical problems, the present invention also provides a method for preparing a package, comprising: obtaining a substrate with a plurality of connecting blocks formed on one side, wherein the connecting blocks include: a first connecting block and a second connecting block arranged at intervals; mounting chips on each first connecting block respectively, and performing plastic sealing on one side of the substrate to form a plastic sealing layer that wraps the chip, and obtaining a processed plate; controlling the depth of the opposite sides of the processed plate respectively to expose the plastic sealing layer on the side of the substrate away from the plastic sealing layer, and to expose each chip and each second connecting block on the side of the plastic sealing layer away from the substrate; preparing a plurality of connecting members connecting the corresponding chip and the second connecting block on the side of the processed plate where the plastic sealing layer is formed; preparing a plurality of connecting layers on the side of the processed plate away from the plastic sealing layer to form a package; wherein one end of each connecting layer is located on the side of the substrate away from the plastic sealing layer, and the other end of each connecting layer extends along the side of the corresponding substrate to the corresponding connecting block, and is connected to the corresponding connecting block.
[0010] Among them, a plurality of connectors connecting the corresponding chip and the second connecting block are prepared on the side of the processing plate formed with the plastic sealing layer; a plurality of connecting layers are prepared on the side of the processing plate away from the plastic sealing layer to form a package body, including: electroplating the entire plate on the opposite sides of the processing plate to form conductive layers on the opposite sides of the processing plate; etching the conductive layer on the side of the processing plate formed with the plastic sealing layer to form a plurality of connectors connecting the corresponding chip and the second connecting block; etching the conductive layer on the side of the processing plate formed with the substrate to form a plurality of connecting layers to form a package body.
[0011] The step of obtaining a substrate with a plurality of connection blocks formed on one side includes: obtaining a substrate, forming conductive layers on two opposite sides of the substrate; and etching one side of the substrate to form a plurality of connection blocks.
[0012] Among them, the steps of controlling the depth of the opposite sides of the processing plate to expose the plastic sealing layer on the side of the substrate away from the plastic sealing layer, and exposing each chip and each second connecting block on the side of the plastic sealing layer away from the substrate also include: controlling the depth of the side of the substrate away from the plastic sealing layer to form multiple through holes exposing the plastic sealing layer; preparing multiple connecting layers on the side of the processing plate away from the plastic sealing layer to form a package body also includes: cutting the processing plate along the position of each through hole to obtain multiple packages; wherein, grooves are formed on each package body at the position corresponding to the through hole.
[0013] Among them, after the step of preparing multiple connectors connecting the corresponding chips and the second connecting block on the side of the processed plate with the plastic sealing layer, the step includes: pressing a protective layer on the entire board on the side of the processed plate with the plastic sealing layer to cover each connector.
[0014] The step of preparing multiple connection layers on the side of the processing plate away from the plastic packaging layer to form a package body further includes: tinning the side of each connection layer away from the plastic packaging layer to cover each connection layer.
[0015] To address the above-mentioned technical problems, the package of the present invention disposes a connecting block between the substrate and the plastic encapsulation layer. Utilizing the strong bonding force and large bonding area between the substrate and the plastic encapsulation layer, the risk of the connecting block falling off can be reduced. Furthermore, since the substrate is disposed between the connecting layer and the connecting block, the bonding area between the connecting layer and the substrate can be increased, reducing the risk of the connecting layer falling off and improving the structural stability of the package. Furthermore, the other end of the connecting layer extends along the side of the substrate to the corresponding connecting block, thereby increasing the fixing area of the connecting layer on the side of the substrate, increasing the welding strength of the package when welded to an external device or external circuit, and significantly improving the package's ability to resist thrust and tension. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 1 is a schematic structural diagram of an embodiment of a package provided by the present invention;
[0017] Figure 2 yes Figure 1 A schematic diagram of a partial side structure of an embodiment of a substrate in the examples;
[0018] Figure 3 1 is a flow chart of an embodiment of a method for preparing a package provided by the present invention;
[0019] Figure 4 is a schematic flow chart of another embodiment of the method for preparing a package provided by the present invention;
[0020] Figure 5 yes Figure 4 A schematic structural diagram of an embodiment of a substrate in step S21 in the embodiment;
[0021] Figure 6 yes Figure 4 A structural diagram of an embodiment of processing a plate in step S22 in the embodiment;
[0022] Figure 7 yes Figure 4 A structural diagram of an embodiment of the present invention after the depth control of the plate is processed in step S23;
[0023] Figure 8 yes Figure 4 A schematic structural diagram of an embodiment of the present invention after electroplating of the processed plate in step S24. DETAILED DESCRIPTION
[0024] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.
[0025] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.
[0026] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features specified as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that ordinary technicians in this field can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.
[0027] See also Figure 1 , Figure 1 It is a structural schematic diagram of an embodiment of a package provided by the present invention.
[0028] The package 100 of this embodiment includes a substrate 130 , a chip 110 , a plastic layer 120 , a connector 123 , and a connection layer 131 .
[0029] A plurality of connection blocks 140 are formed on one side of the substrate 130. These connection blocks 140 include first connection blocks 141 and second connection blocks 142, spaced apart from each other. The first connection blocks 141 are used for subsequent mounting of the chip 110, while the second connection blocks 142 are not used for mounting the chip 110. The connection blocks 140 are conductive and can be made of one or more conductive materials, such as copper, silver, aluminum, gold, or an alloy, without limitation.
[0030] The number of first connection blocks 141 and second connection blocks 142 on one side of the substrate 130 may be one or more. The number of first connection blocks 141 may be determined based on the number of chips 110 in the package 100, and the two may be the same. The number of second connection blocks 142 may be determined based on the number of chips 110 in the package 100 and the number of electrodes on the side of the chip 110 away from the substrate 130.
[0031] The chip 110 is mounted on the first connection block 141. Specifically, the chip 110 is mounted on the side of the first connection block 141 away from the substrate 130. The number of chips 110 on the package 100 can be one or more, which is set based on actual conditions and is not limited here.
[0032] The plastic encapsulation layer 120 is laminated to one side of the substrate 130 and wraps the chip 110. The plastic encapsulation layer 120 may be made of one or more materials such as epoxy resin, polyimide, bismaleimide triazine (BT), and ceramic-based materials.
[0033] Connectors 123 are attached to the side of the plastic encapsulation layer 120 away from the substrate 130 and correspondingly connect the chip 110 and the second connection block 142. Connectors 123 are used to achieve electrical continuity between the chip 110 and the second connection block 142. A chip 110 can be electrically connected to one or more second connection blocks 142, and the number of connectors 123 can be determined based on the number of chips 110 and second connection blocks 142. Connectors 123 can be made of one or more conductive materials such as copper, silver, aluminum, gold, or an alloy, without limitation herein.
[0034] In a specific application scenario, the connector 123 may include a connecting wire, a metal part, or other connectors, which are not limited here.
[0035] One end of the connection layer 131 is located on the side of the substrate 130 away from the plastic encapsulation layer 120. The other end of the connection layer 131 extends along the side of the substrate 130 to the corresponding connection block 140 and is connected to the corresponding connection block 140. Each first connection block 141 and each second connection block 142 are in contact with the corresponding connection layer 131. The connection layer 131 can be composed of one or more conductive materials such as copper, silver, aluminum, gold, or an alloy, which are not limited here.
[0036] That is, in this embodiment, the electrodes on one side of the chip 110 can sequentially connect via the connector 123, the second connection block 142, and the connection layer 131 to achieve signal extraction, while the electrodes on the other side can sequentially connect via the first connection block 141 and the connection layer 131 to achieve signal extraction, thereby achieving the functions of the package 100. The connection layer 131 can serve as a pad for soldering to an external device or external circuit, for example, to a printed circuit board.
[0037] Because the connection block 140 of this embodiment is disposed between the substrate 130 and the molding layer 120, the strong bonding force and large bonding area between the substrate 130 and the molding layer 120 can reduce the risk of the connection block 140 falling off. Furthermore, because the substrate 130 is disposed between the connection layer 131 and the connection block 140, the bonding area between the connection layer 131 and the substrate 130 can be increased, reducing the risk of the connection layer 131 falling off and improving the structural stability of the package 100.
[0038] The other end of the connecting layer 131 extends along the side of the substrate 130 to the corresponding connecting block 140, increasing the fixing area of the connecting layer 131 on the side of the substrate 130, and increasing the welding strength of the connecting layer 131 of the package body 100 welded to the external device or external circuit, greatly improving the ability to resist thrust and tension.
[0039] Through the above structure, the package of this embodiment disposes the connection block between the substrate and the plastic encapsulation layer. Utilizing the strong bonding force and large bonding area between the substrate and the plastic encapsulation layer, the risk of the connection block falling off can be reduced. Furthermore, because the substrate is disposed between the connection layer and the connection block, the bonding area between the connection layer and the substrate can be increased, reducing the risk of the connection layer falling off and improving the structural stability of the package. Furthermore, the other end of the connection layer extends along the side of the substrate 130 to the corresponding connection block, thereby increasing the fixing area of the connection layer on the side of the substrate, increasing the soldering strength of the package when soldered to an external device or external circuit, and significantly improving the package's ability to resist thrust and tension.
[0040] In other embodiments, a first blind via 121 and a second blind via 122 are formed on the side of the plastic encapsulation layer 120 away from the substrate 130. The first blind via 121 exposes the chip 110, while the second blind via 122 exposes the second connection block 142. The number of first blind vias 121 in the package 100 is determined based on the number of chips 110.
[0041] In one specific application scenario, when a single electrode needs to be connected to the side of the chip 110 away from the substrate 130, a first blind hole 121 and a connector 123 are formed on the side of the chip away from the substrate 130. The connector 123 is connected to a second connection block 142. In another specific application scenario, when two electrodes need to be connected to the side of the chip 110 away from the substrate 130, two first blind holes 121 and two connectors 123 are formed on the side of the chip away from the substrate 130. The two connectors 123 are connected to two second connection blocks 142, respectively, and the two connectors 123 do not contact each other. When multiple electrodes need to be connected to the side of the chip 110 away from the substrate 130, the configuration of the first blind hole 121 and the connector 123 is similar to that described above and will not be repeated here.
[0042] When one electrode needs to be led out from the side of the chip 110 away from the substrate 130, the number of the first blind holes 121 is equal to the number of the chips 110; when two electrodes need to be led out from the side of the chip 110 away from the substrate 130, the number of the first blind holes 121 is equal to twice the number of the chips 110, and so on, which is not limited here.
[0043] One end of the connector 123 completely fills the first blind hole 121 and contacts the chip 110. The other end of the connector 123 extends from the side of the plastic encapsulation layer 120 away from the substrate 130 to the second blind hole 122, and then extends from the hole wall of the second blind hole 122 to the second connection block 142, contacting the second connection block 142, thereby achieving an electrical connection between the chip 110 and the second connection block 142. The other end of the connector 123 can completely fill the second blind hole 122 or cover its hole wall. The specific size can be determined based on the size of the second blind hole 122 and is not limited here.
[0044] In other embodiments, a plurality of grooves are formed on the side surface of the substrate 130 , and the grooves are obtained by cutting through holes in the substrate 130 .
[0045] See also Figure 2 , Figure 2 yes Figure 1 A schematic diagram of the partial side structure of an embodiment of a substrate in the examples.
[0046] The through hole penetrates the substrate 130 from the side of the substrate 130 away from the molding layer 120 to the side of the substrate 130 close to the molding layer 120. The groove 132 formed after the through hole is cut is formed by a portion of the hole wall of the through hole.
[0047] In a specific application scenario, when the through hole is cylindrical and the groove 132 is a semi-cylindrical surface, the other end of the connecting layer 131 extends along the inner wall of the semi-cylindrical surface of the corresponding groove 132 to the corresponding connecting block 140, thereby increasing the fixed area and three-dimensionality of the connecting layer 131 on the side of the substrate 130, further increasing the welding strength of the package body 100 welded to the external device or external circuit, and greatly improving the ability of the package body 100 to resist thrust and tension.
[0048] In another specific application scenario, the through hole can also be a tapered cylinder, and the groove 132 is an inclined semi-cylindrical surface, thereby further increasing the three-dimensionality of the connecting layer 131 on the side of the substrate 130, further increasing the welding strength of the package 100 on the external device or external circuit, and greatly improving the ability of the package 100 to resist thrust and tension.
[0049] In other application scenarios, the through hole may also be in the shape of a cube, a triangular pyramid, an oblique column, etc., which is not limited here.
[0050] In other embodiments, the substrate 130 includes epoxy glass cloth (FR4) to increase the structural strength of the package 100 and enhance the structural stability of the package 100 by utilizing its rigidity.
[0051] In other embodiments, a tin layer is plated on a surface of each connection layer 131 away from the plastic packaging layer 120 to protect the connection layer 131 from oxidation.
[0052] In other embodiments, a protective layer 180 is provided on the side of the plastic layer 120 away from the substrate 130 . The protective layer 180 wraps the connectors 123 and can also fill the second blind holes 122 to provide insulation protection for the connectors 123 .
[0053] See also Figure 3 , Figure 3 FIG1 is a flow chart of an embodiment of a method for preparing a package provided by the present invention. The method for preparing a package of this embodiment is used to prepare a package of any of the above embodiments.
[0054] Step S11: obtaining a substrate with a plurality of connection blocks formed on one side.
[0055] A substrate is obtained with a plurality of connection blocks formed on one side. That is, the connection blocks are all formed on the same side of the substrate. The connection blocks include: a first connection block and a second connection block arranged at intervals.
[0056] The first connection block is used for subsequent chip installation, while the second connection block is not used for chip installation. The connection block is a conductive connection block, which can include one or more conductive materials such as copper, silver, aluminum, gold or alloy, which are not limited here.
[0057] The number of the first connection blocks on one side of the substrate can be one or more, which is set based on actual needs. The number of the second connection blocks is set based on the connection requirements of subsequent chips.
[0058] Step S12: mounting chips on the first connecting blocks respectively, and performing plastic sealing on one side of the substrate to form a plastic sealing layer that wraps the chips, thereby obtaining a processed board.
[0059] Chips are mounted on each first connection block respectively. After mounting, a chip is fixedly arranged on a side of each first connection block away from the substrate.
[0060] One side of the substrate is plastic-sealed to form a plastic-sealing layer that wraps the chip, thereby obtaining a processed board. The plastic-sealing material may specifically include one or more materials such as epoxy resin, polyimide, bismaleimide triazine (BT), and ceramic-based materials.
[0061] Step S13: Controlling the depth of opposite sides of the processed plate to expose the plastic layer on the side of the substrate away from the plastic layer, and to expose the chips and the second connecting blocks on the side of the plastic layer away from the substrate.
[0062] After the plastic sealing is completed, the depth of the two opposite sides of the processed panel is controlled separately.
[0063] Specifically, the depth is controlled on the side of the substrate away from the plastic layer to expose the plastic layer; and the depth is controlled on the side of the plastic layer away from the substrate to expose each chip and each second connecting block.
[0064] After the depth control is completed, the processed plate is obtained. The depth control can be performed by mechanical depth control or laser hole depth control.
[0065] Step S14: preparing a plurality of connectors for connecting the corresponding chips with the second connecting blocks on the side of the processed plate where the plastic packaging layer is formed.
[0066] In step S13, the depth of the plastic layer is controlled on the side away from the substrate, exposing each chip and each second connection block. In a specific application scenario, the exposed chips and corresponding second connection blocks can be electroplated to form multiple connectors connecting the corresponding chips and the second connection blocks.
[0067] In a specific application scenario, the connection between the chip and the corresponding second connection block can be achieved by welding connectors on the exposed chip and the corresponding second connection block.
[0068] In another specific application scenario, wire bonding may also be performed on the exposed chip and the corresponding second connection block, thereby achieving connection between the chip and the corresponding second connection block.
[0069] Step S15: preparing a plurality of connection layers on a side of the processing plate away from the plastic packaging layer to form a package body.
[0070] In step S13, the depth of the substrate is controlled on the side away from the plastic layer, exposing the plastic layer. Multiple connecting layers are prepared on the side of the processed plate away from the plastic layer, with one end of each connecting layer located on the side of the substrate away from the plastic layer, and the other end of each connecting layer extending along the side of the corresponding substrate to the corresponding connecting block and connecting to the corresponding connecting block.
[0071] In one specific application scenario, multiple connection layers can be formed by electroplating and etching on the side of the substrate away from the plastic encapsulation layer. In another specific application scenario, the connection layers can also be welded to the area on the side of the substrate away from the plastic encapsulation layer to the corresponding connection blocks. This is not limited here.
[0072] Through the above steps, the preparation method of the package body of this embodiment is to obtain a processed plate by mounting chips on each first connecting block respectively and performing plastic sealing on one side of the substrate to form a plastic sealing layer that wraps the chip; the depth of the opposite sides of the processed plate is controlled respectively to expose the plastic sealing layer on the side of the substrate away from the plastic sealing layer, and expose each chip and each second connecting block on the side of the plastic sealing layer away from the substrate; prepare multiple connectors connecting the corresponding chips and the second connecting blocks on the side of the processed plate where the plastic sealing layer is formed, and prepare multiple connecting layers on the side of the processed plate away from the plastic sealing layer to form a package body, so that the connecting block is arranged between the substrate and the plastic sealing layer, and the strong bonding force and large bonding area between the substrate and the plastic sealing layer can be used to reduce the risk of the connecting block falling off. And because the substrate is arranged between the connecting layer and the connecting block, the bonding area between the connecting layer and the substrate can be increased, the risk of the connecting layer falling off can be reduced, and the structural stability of the package can be improved. The other end of the connecting layer extends along the side of the corresponding substrate to the corresponding connecting block, which increases the fixing area of the connecting layer on the side of the substrate, increases the welding strength of the package on the external device or external circuit, and greatly improves the package's ability to resist thrust and tension.
[0073] See also Figure 4 , Figure 4 FIG2 is a flow chart of another embodiment of the method for preparing a package provided by the present invention. The method for preparing a package of this embodiment is used to prepare the package of any of the above embodiments.
[0074] Step S21: obtaining a substrate, forming conductive layers on two opposite sides of the substrate; etching one side of the substrate to form a plurality of connection blocks.
[0075] The substrate may include epoxy glass cloth (FR4) to increase the structural strength and stability of the package by utilizing its rigidity.
[0076] Conductive layers are formed on opposite sides of a substrate; one side of the substrate is etched to form multiple connection blocks. In one specific application scenario, two conductive layers can be laminated to opposite sides of the substrate. In another specific application scenario, copper electroplating can be performed on opposite sides of the substrate to form conductive layers on opposite sides.
[0077] One side of the substrate is etched to form a plurality of connection blocks, wherein the connection blocks include: a first connection block and a second connection block that are spaced apart.
[0078] See also Figure 5 , Figure 5 yes Figure 4 A schematic structural diagram of an embodiment of the substrate in step S21 in the embodiment.
[0079] A plurality of spaced connection blocks 540 are formed on one side of the substrate 530. The connection blocks 540 include a first connection block 541 and a second connection block 542. The first connection block 541 is used for mounting the chip 110, while the second connection block 542 is not used for mounting the chip 110.
[0080] A conductive layer 550 is laminated on the other side of the substrate 530 .
[0081] Step S22: mounting chips on the first connecting blocks respectively, and performing plastic sealing on one side of the substrate to form a plastic sealing layer that wraps the chips, thereby obtaining a processed board.
[0082] This step is the same as step S12 in the aforementioned embodiment. Please refer to the above text and will not be repeated here.
[0083] See also Figure 6 , Figure 6 yes Figure 4 A structural diagram of an implementation method of processing a plate in step S22 in the embodiment.
[0084] The processed plate 500 of this embodiment is Figure 5 Based on the embodiment, a chip 510 is mounted on the side of each first connection block 541 away from the substrate 530. A plastic encapsulation layer 520 is laminated on one side of the substrate 530, which wraps each chip 510 and the second connection block 542 and fills the gaps between the connection blocks 540.
[0085] Step S23: controlling the depth of opposite sides of the processed plate to expose the plastic layer on the side of the substrate away from the plastic layer, and to expose the chips and the second connecting blocks on the side of the plastic layer away from the substrate.
[0086] After the plastic sealing is completed, the depth of the two opposite sides of the processed panel is controlled separately.
[0087] Specifically, the depth is controlled on the side of the substrate away from the plastic layer to form multiple through holes exposing the plastic layer; and the depth is controlled on the side of the plastic layer away from the substrate to form a first blind hole exposing each chip and a second blind hole exposing each second connecting block.
[0088] After the depth control is completed, the processed plate is obtained. The depth control can be performed by mechanical depth control or laser hole depth control.
[0089] See also Figure 7 , Figure 7 yes Figure 4 A structural diagram of an implementation method after depth control of the plate processing in step S23 in the embodiment.
[0090] The processed plate 500 of this embodiment is Figure 6 Based on the embodiment, first blind holes 521 for exposing the chips 510 and second blind holes 522 for exposing the second connecting blocks 542 are formed on the plastic encapsulation layer 420. A first blind hole 521 is formed on the side of each chip 510 away from the substrate 530, and a second blind hole 522 is formed on the side of each second connecting block 542 away from the substrate 530.
[0091] The substrate 530 is formed with a through hole 532 that exposes the plastic encapsulation layer 520. The position of the through hole 532 can be set based on the position of the subsequent division of the board to form multiple packages. Since the first connecting block 541 and the second connecting block 542 belonging to different packages are separated during the division of the board, the through hole 532 can also be located between the first connecting block 541 and the second connecting block 542 of different packages.
[0092] In a specific application scenario, in order to ensure the connection between the subsequent connection layer and the connection block 540, the through hole 532 can not only penetrate the conductive layer 550 and the substrate 530, but also expose the side of the connection block 540 to facilitate contact between the subsequent connection layer and the connection block 540.
[0093] Step S24: electroplating the entire plate on opposite sides of the processed plate to form conductive layers on opposite sides of the processed plate; etching the conductive layer on the side of the processed plate where the plastic sealing layer is formed to form multiple connectors connecting the corresponding chip and the second connecting block; etching the conductive layer on the side of the processed plate where the substrate is formed to form multiple connecting layers to form a package body.
[0094] The entire plate is electroplated on opposite sides of the processed plate to form conductive layers on the opposite sides of the processed plate. The electroplating in this step can be performed on the opposite sides of the processed plate simultaneously to improve the production efficiency of the package.
[0095] See also Figure 8 , Figure 8 yes Figure 4 A schematic structural diagram of an embodiment of the present invention after electroplating of the processed plate in step S24.
[0096] This embodiment Figure 7 Based on the embodiment, a first conductive layer 570 and a second conductive layer 580 are formed on opposite sides of the processed plate 500. The first conductive layer 570 is laminated to the surface of the plastic encapsulation layer 520 away from the substrate 530, completely filling the first blind vias 521 and covering the walls of the second blind vias 522 and the exposed second connecting blocks 542. The second conductive layer 580 is laminated to the surface of the substrate 530 away from the plastic encapsulation layer 520, covering the surface of the through-holes 532, contacting the connecting blocks 540, and covering the exposed plastic encapsulation layer 520. The connecting blocks 540 include a first connecting block 541 and a second connecting block 542.
[0097] The second conductive layer 580 is Figure 7 The first conductive layer 570 and the second conductive layer 580 are formed by electroplating and thickening the conductive layer 550. The thickness of the first conductive layer 570 and the thickened thickness of the second conductive layer 580 can be greater than 6 microns.
[0098] The conductive layer on the side of the processed plate where the plastic encapsulation layer is formed is etched to form multiple connectors that connect the corresponding chips to the second connection block. The conductive layer on the side of the processed plate where the substrate is formed is etched to form multiple connection layers to form the package. The etching process can be carried out in the following steps: dry film, exposure, development, and etching.
[0099] Specifically, the connector is attached to the side of the plastic packaging layer away from the substrate and correspondingly connects the chip and the second connection block. The connector is used to achieve conduction between the chip and the second connection block.
[0100] One end of the connecting layer is located on a side of the substrate away from the plastic encapsulation layer, and the other end of the connecting layer extends along the inner wall of the corresponding through hole to the corresponding connecting block and is connected to the corresponding connecting block. Each first connecting block and each second connecting block are in contact with the corresponding connecting layer.
[0101] After the step of preparing a plurality of connectors for connecting the corresponding chips with the second connecting blocks on the side of the plate having the plastic encapsulation layer formed thereon, the following steps may be performed:
[0102] A protective layer is pressed onto the entire plate on one side of the plate where the plastic sealing layer is formed, so as to cover each connector and provide insulation protection for each connector.
[0103] Before cutting, tin plating can be performed on the side of each connection layer away from the plastic sealing layer to cover each connection layer and protect it from oxidation.
[0104] Finally, the processed plate is cut along the positions of the through holes to obtain a plurality of packaging bodies. The structure of the packaging body of this embodiment can refer to any of the above embodiments and will not be described in detail here.
[0105] The groove formed after the through-hole is cut is formed by part of the hole wall. In a specific application scenario, when the through-hole is cylindrical, the groove is a semi-cylindrical surface. The other end of the connecting layer extends along the inner wall of the semi-cylindrical surface of the corresponding groove to the corresponding connecting block, increasing the fixing area and three-dimensionality of the connecting layer on the side of the substrate, further increasing the soldering strength of the package to the external device or external circuit, and greatly improving the package's ability to resist thrust and tension.
[0106] In another specific application scenario, the through hole can also be a tapered cylinder, and the groove is an inclined semi-cylindrical surface, thereby further increasing the three-dimensionality of the connection layer on the side of the substrate, further increasing the welding strength of the package body on the external device or external circuit, and greatly improving the package body's ability to resist thrust and tension.
[0107] In other application scenarios, the through hole may also be in the shape of a cube, a triangular pyramid, an oblique column, etc., which is not limited here.
[0108] Through the above steps, the method for preparing the package of this embodiment can dispose the connection block between the substrate and the plastic encapsulation layer, and take advantage of the strong bonding force and large bonding area between the substrate and the plastic encapsulation layer to reduce the risk of the connection block falling off. Moreover, since the substrate is disposed between the connection layer and the connection block, the bonding area between the connection layer and the substrate can be increased, reducing the risk of the connection layer falling off, and improving the structural stability of the package. In addition, the groove on the side of the substrate is in the shape of a side recess, which can increase the surface area of the side. Since the other end of the connection layer extends along the inner wall of the corresponding groove to the corresponding connection block, the fixing area of the connection layer on the side of the substrate is increased, and the welding strength of the package to the external device or external circuit is increased, which greatly improves the ability of the package to resist thrust and tension.
[0109] The above description is only an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A package, characterized in that: The package body comprises: A substrate, wherein a plurality of connection blocks are formed on one side of the substrate, wherein the connection blocks include: a first connection block and a second connection block arranged at intervals; a plurality of grooves are formed on the side of the substrate, wherein the grooves are obtained by cutting through holes on the substrate; a chip mounted on the first connecting block; a plastic encapsulation layer, the plastic encapsulation layer being laminated to one side of the substrate and wrapping the chip; a connecting member, the connecting member being attached to a side of the plastic packaging layer away from the substrate and correspondingly connecting the chip and the second connecting block; a connecting layer, one end of the connecting layer being located on a side of the substrate away from the plastic encapsulation layer, and the other end of the connecting layer extending along a side surface of the substrate to a corresponding connecting block and being connected to the corresponding connecting block; Wherein, the through hole comprises a cylinder, the groove is a semi-cylindrical surface, and the other end of the connecting layer extends along the inner wall of the semi-cylindrical surface of the corresponding groove to the corresponding connecting block.
2. The package according to claim 1, wherein: A first blind hole and a second blind hole are formed on a side of the plastic packaging layer away from the substrate; the first blind hole exposes the chip, and the second blind hole exposes the second connecting block; One end of the connecting member fills the first blind hole and contacts the chip; The other end of the connecting member extends from the side of the plastic packaging layer away from the substrate to the second blind hole, and extends from the hole wall of the second blind hole to the second connecting block, and contacts the second connecting block.
3. The package according to claim 1, wherein: The substrate includes epoxy glass cloth.
4. A method for preparing a package, characterized in that: The method for preparing the package is used to prepare the package according to any one of claims 1 to 3, comprising: A substrate having a plurality of connection blocks formed on one side is obtained, wherein the connection blocks include: a first connection block and a second connection block arranged at intervals; Mounting chips on each of the first connecting blocks, and performing plastic sealing on one side of the substrate to form a plastic sealing layer that wraps the chips, thereby obtaining a processed board; Controlling the depth of opposite sides of the processing plate to expose the plastic sealing layer on a side of the substrate away from the plastic sealing layer, and to expose each chip and each second connecting block on a side of the plastic sealing layer away from the substrate; A plurality of connectors for connecting the corresponding chips and the second connecting block are prepared on the side of the processing plate where the plastic sealing layer is formed; preparing a plurality of connection layers on a side of the processing plate away from the plastic packaging layer to form the package body; One end of each connection layer is located on a side of the substrate away from the plastic encapsulation layer, and the other end of each connection layer extends along the side surface of the corresponding substrate to the corresponding connection block and is connected to the corresponding connection block.
5. The method for preparing a package according to claim 4, wherein: A plurality of connectors are prepared on the side of the processing plate where the plastic sealing layer is formed, connecting the corresponding chips with the second connecting block; The step of preparing a plurality of connection layers on a side of the processing plate away from the plastic packaging layer to form the package body includes: performing whole-plate electroplating on opposite sides of the processed plate to form conductive layers on the opposite sides of the processed plate respectively; Etching the conductive layer on the side of the processing plate where the plastic sealing layer is formed to form a plurality of the connecting members connecting the corresponding chips with the second connecting block; The conductive layer on the side of the processing plate where the substrate is formed is etched to form a plurality of the connection layers to form the package body.
6. The method for preparing a package according to claim 4, wherein: The step of obtaining a substrate having a plurality of connection blocks formed on one side includes: Obtaining a substrate, and forming conductive layers on opposite sides of the substrate; One side of the substrate is etched to form a plurality of the connection blocks.
7. The method for preparing a package according to claim 4, wherein: The step of controlling the depth of opposite sides of the processing plate to expose the plastic encapsulation layer on a side of the substrate away from the plastic encapsulation layer, and exposing each of the chips and each of the second connecting blocks on a side of the plastic encapsulation layer away from the substrate further includes: Controlling the depth of a side of the substrate away from the plastic sealing layer to form a plurality of through holes exposing the plastic sealing layer; The step of preparing a plurality of connection layers on a side of the processing plate away from the plastic packaging layer to form the package body further comprises: cutting the processing plate along the positions of the through holes to obtain a plurality of the packaging bodies; Wherein, a groove is formed on each of the packaging bodies at a position corresponding to the through hole.
8. The method for preparing a package according to claim 4, wherein: After the step of preparing a plurality of connectors for connecting the corresponding chips and the second connecting block on the side of the processing plate where the plastic sealing layer is formed, the following steps are included: A protective layer is laminated on the entire plate on one side of the processed plate with the plastic sealing layer formed thereon to cover each of the connecting parts.
9. The method for preparing a package according to claim 4, wherein: The step of preparing a plurality of connection layers on a side of the processing plate away from the plastic packaging layer to form the package body further comprises: Tin plating is performed on a side of each connection layer away from the plastic packaging layer to cover each connection layer.
Citation Information
Patent Citations
Chip package, method for forming the same
CN103107157A
Chip packaging method, chip packaging body and electronic device
CN114695127A