Network device and media access control address learning method thereof

Abstract

The network switching device includes a forwarding engine and a two-stage learning engine. The forwarding engine parses the packet header and packet verification parameters of the packet from the input and output ports, and generates a port identifier corresponding to the input and output ports. The two-stage learning engine starts the first-stage program with the packet header, and starts the second-stage program with the packet verification parameters. The first-stage program includes learning the source MAC address of the packet header according to the port identifier and the MAC forwarding table to generate a learning result; generating a state parameter according to the learning result; and associating the state parameter, the port identifier and the hash address corresponding to the source MAC address and storing them in a memory. The second-stage program includes obtaining the state parameter and the hash address from the memory according to the port identifier; and updating the MAC forwarding table according to the packet verification parameters, the state parameter and the hash address.

Description

Technical Field

[0001] The present invention relates to a network technology, and more particularly to a network device with MAC address learning and a method thereof. Background Art

[0002] When a network switch is transmitting packets from an electronic device, it can use cut-through switching. Specifically, the network switch does not forward the packet and establish and maintain the Media Access Control (MAC) address forwarding table after receiving and storing the entire packet (e.g., store and forward switching). Instead, when the source MAC address and destination MAC address of the packet are received, the network switch forwards the packet through the destination MAC address and establishes and maintains the MAC address forwarding table through the source MAC address. Compared with store and forward switching, the packet forwarding speed of the network switch is faster under cut-through forwarding.

[0003] However, direct forwarding may cause the wrong source MAC address to be learned into the MAC address forwarding table, occupying the effective storage capacity of the MAC address forwarding table, and some actions (e.g., output and input port migration (station move)) may be triggered by mistake. For example, the network switch learns the source MAC address into the MAC address forwarding table before knowing whether the integrity verification of the packet has passed. Therefore, if the source MAC address is damaged (e.g., the source MAC address is not completely sent from the electronic device to the network switch), the MAC address forwarding table will learn the wrong source MAC address, so that the output and input port migration may be triggered by the wrong source MAC address (i.e., the output and input port migration is triggered by mistake). Summary of the invention

[0004] In view of the above, the present invention provides a network switching device and a MAC address learning method thereof. According to some embodiments, the network switching device can filter out incorrect source MAC addresses in a MAC address forwarding table in a case of direct forwarding.

[0005] According to some embodiments, a network switching device includes a forwarding engine and a two-stage learning engine. The forwarding engine is used to receive a packet from an input / output port, parse a packet header and a packet check parameter of the packet, and generate a port identifier corresponding to the input / output port. The forwarding engine forwards the packet to another input / output port according to a MAC forwarding table, wherein the packet header has a source MAC address. The two-stage learning engine includes a memory and a two-stage learning circuit. The memory stores a MAC forwarding table. The two-stage learning circuit is used to start a first-stage program when the source MAC address and port identifier are obtained; and to start a second-stage program when the packet check parameter and port identifier are obtained. The first-stage program includes performing a learning process on the source MAC address according to the MAC forwarding table and the port identifier to generate a learning result; generating a state parameter according to the learning result; and associating a hash address corresponding to the state parameter, the port identifier and the source MAC address, and storing it in the memory. The second stage procedure includes obtaining a state parameter and a hash address from a memory according to a port identifier; and updating a MAC forwarding table according to a packet check parameter, the obtained state parameter and the obtained hash address.

[0006] According to some embodiments, a MAC address learning method is suitable for a network switching device. The MAC address learning method includes receiving a packet from an input / output port; generating a port identifier corresponding to the input / output port; starting a first-stage program when parsing a packet header of the packet, wherein the packet header has a source MAC address; starting a second-stage program when parsing a packet verification parameter of the packet; and forwarding the packet to another input / output port according to a MAC forwarding table in a memory. The first-stage program includes performing a learning process on the source MAC address according to the MAC forwarding table and the port identifier to generate a learning result; generating a state parameter according to the learning result; and associating a hash address corresponding to the state parameter, the port identifier, and the source MAC address, and storing it in the memory. The second-stage program includes obtaining the state parameter and the hash address from the memory according to the port identifier; and updating the MAC forwarding table according to the packet verification parameter, the obtained state parameter, and the obtained hash address.

[0007] In summary, according to some embodiments, the network switching device filters out the wrong source MAC address in the MAC address forwarding table in the case of direct forwarding, so that only the correct source MAC address can be stored in the MAC address forwarding table in the case of fast forwarding packets. According to some embodiments, since the network switching device can perform the source MAC address learning process when receiving the source MAC address in the packet (that is, it is not necessary to store the entire packet before performing the learning process), and confirm the above learning process after receiving the entire packet, the storage capacity required for the network switching device to process the packet is reduced, and the processing speed of the network switching device to process the packet is improved. For example, when the network switching device obtains an instruction to discard the packet in the learning process of the source MAC address, it can discard the packet, thereby improving the speed of processing the packet. In this way, the network switching device can complete the source MAC address learning process at the line rate (that is, the physical layer gross bit rate). BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 This is a schematic diagram of the application of the network switching device according to some embodiments of the present invention.

[0009] Figure 2 is a block diagram of a network switching device according to some embodiments of the present invention.

[0010] Figure 3 This is a flowchart of the MAC address learning method according to some embodiments of the present invention.

[0011] Figure 4 This is a flowchart of the first phase of the process according to some embodiments of the present invention.

[0012] Figure 5 This is a flowchart of the second phase of the process according to some embodiments of the present invention.

[0013] Figure 6 This is a schematic diagram of a MAC forwarding table according to some embodiments of the present invention.

[0014] Figure 7 This is a flowchart of the first phase of the process according to some embodiments of the present invention.

[0015] Figure 8 It is a schematic diagram of a MAC forwarding table before the first stage procedure is executed according to some embodiments of the present invention.

[0016] Fig. 9This is a schematic diagram of a MAC forwarding table after executing the first stage procedure when the first condition is met according to some embodiments of the present invention.

[0017] Fig.10 This is a schematic diagram of a MAC forwarding table after executing the first stage procedure when the second condition is met according to some embodiments of the present invention.

[0018] Fig.11 This is a schematic diagram of a MAC forwarding table after executing the first stage procedure according to an embodiment of the present invention when the third condition is met.

[0019] Fig.12 This is a schematic diagram of a MAC forwarding table after executing the first stage procedure according to another embodiment of the present invention when the third condition is met.

[0020] Fig.13 This is a flowchart of the second phase of the process according to some embodiments of the present invention.

[0021] Fig.14 This is a schematic diagram of the MAC forwarding table after the second stage procedure is executed according to the established parameters based on some examples in this case after verification.

[0022] Fig.15 This is a schematic diagram of a MAC forwarding table after the second stage procedure is executed according to the mobile parameters when verification is passed according to some embodiments of the present invention.

[0023] Fig.16 This is a schematic diagram of a MAC forwarding table after the second stage procedure is executed according to the mobility overlimit parameter in some embodiments of the present invention when verification is passed.

[0024] Fig.17 This is a schematic diagram of a MAC forwarding table after executing the second stage procedure according to updated parameters when verification is passed according to some embodiments of the present invention. DETAILED DESCRIPTION

[0025] Reference Figure 1 , Figure 1 1 is an application diagram of a network switching device 10 according to some embodiments of the present invention. The network switching device 10 includes a forwarding engine 12, a two-stage learning engine 14, and a plurality of input and output ports 16A-16D. The forwarding engine 12 is coupled to the two-stage learning engine 14 and the input and output ports 16A-16D. The input and output ports 16A-16D are coupled to a plurality of electronic devices 20A-20D. Figure 1Only four input / output ports and four electronic devices are shown, but the present invention is not limited thereto. The two-stage learning engine 14 includes a memory 141 and a two-stage learning circuit 143. The two-stage learning circuit 143 is coupled to the memory 141. The memory 141 stores a MAC address forwarding table (hereinafter referred to as a MAC forwarding table 1411). The MAC forwarding table 1411 records the correspondence between the MAC addresses of the electronic devices 20A to 20D (hereinafter referred to as recorded MAC addresses) and the input / output ports 16A to 16D (for example, the input / output ports 16A to 16D are represented by port identification parameters). The memory 141 can be a volatile memory, a non-volatile memory, or a combination thereof. In some examples, the volatile memory is a random access memory, etc., and the non-volatile memory is a read-only memory, etc. The two-stage learning circuit 143 can be a computing circuit such as a microcontroller, an embedded controller, a specific application integrated circuit, or a system-on-chip.

[0026] The network switch device 10 is used to forward data (e.g., packets) of the electronic devices 20A-20D via the input / output ports 16A-16D and the forwarding engine 12. In other words, the electronic devices 20A-20D transmit packets through the network switch device 10. The network switch device 10 may forward packets of the electronic devices 20A-20D via MAC addresses in the data link layer.

[0027] The forwarding engine 12 is used to receive a packet from an input / output port 16A-16D, parse a packet header and a packet verification parameter of the packet, generate a port identifier (Port ID) corresponding to the input / output port 16A-16D, and output the packet header, the packet verification parameter and the port identifier to the second-stage learning engine 14. The packet header has a source MAC address. In some embodiments, the packet header also has a destination MAC address.

[0028] The second-stage learning engine 14 establishes and maintains the MAC forwarding table 1411 according to the source MAC address, port identifier and packet verification parameters. For example, the second-stage learning engine 14 checks whether the MAC forwarding table 1411 has recorded the source MAC address of the packet. If it has not been recorded, the second-stage learning engine 14 records the source MAC address of the packet (i.e., the MAC address of the electronic device 20A~20D) and the port identifier (specifically, the port identifier is recorded in the MAC forwarding table 1411 as a port identification parameter). If it has been recorded, the second-stage learning engine 14 adjusts some parameters in the MAC forwarding table 1411. This learning method is used to establish and maintain the correspondence between the MAC addresses of the electronic devices 20A~20D and the output and input ports 16A~16D.

[0029] The forwarding engine 12 forwards the packet from one input / output port 16A-16D to another input / output port 16A-16D according to the MAC forwarding table 1411. For example, the forwarding engine 12 learns the port identification parameter corresponding to the destination MAC address (i.e., learns the input / output port 16A-16D corresponding to the destination MAC address) by comparing the destination MAC address of the packet with the MAC forwarding table 1411 (i.e., forwarding query), and forwards the packet from the corresponding input / output port 16A-16D to the electronic device 20A-20D corresponding to the destination MAC address.

[0030] Reference Figure 2 , Figure 2 1 is a block diagram of a network switching device 10 according to some embodiments of the present invention. In some embodiments, the forwarding engine 12 includes a plurality of pre-processing circuits 120A-120D, a first multiplexer 121, a selection circuit 122, a data segment buffer circuit 123, a capture circuit 124, a forwarding processing circuit 125, a decision circuit 126, a second multiplexer 127, a sequence management circuit 128 and a demultiplexer 129. For the coupling relationship of the above components, please refer to Figure 2 .

[0031] The pre-processing circuits 120A-120D are used to receive packets from the input / output ports 16A-16D and perform pre-processing operations on the packets to output the processed packets to the selection circuit 122 via the first multiplexer 121. The pre-processing operation may include a segmentation operation, a check operation and a port identifier assignment operation.

[0032] The verification operation is to verify the correctness of the packet and generate a packet verification parameter. For example, a cyclic redundancy check (CRC) is used to verify the correctness of the packet to generate the packet verification parameter.

[0033] Segmentation is the process of dividing a packet into multiple data segments. Figure 1 and Figure 2 As shown, when the first pre-processing circuit 120A receives a 9 kilobyte (KB) packet from the first electronic device 20A via the first input / output port 16A, the first pre-processing circuit 120A performs packet segmentation on the packet to segment out a plurality of serial data segments of a fixed size (e.g., 128 byte groups). In some embodiments, the first data segment in the packet may include a packet header, and the last data segment in the packet may include a packet check parameter. In some embodiments, in a single packet, a packet header segment SOP, at least one intermediate data segment OOP, and a packet tail segment EOP may be distinguished. Specifically, the packet header segment SOP is the first non-data segment in the packet, such as a packet header. The packet tail segment EOP is the last non-data segment in the packet, such as a packet check parameter. The intermediate data segment OOP is the data in the packet divided into a plurality of serial data segments of a fixed size.

[0034] The port identifier assignment operation is for the pre-processing circuit 120A-120D to generate a corresponding port identifier according to which input / output port 16A-16D the received packet is input from. The port identifier can be placed in each data segment and non-data segment divided from the packet, or when the data segment and the non-data segment are output to the selection circuit 122, a port identifier is output together. In other words, each data segment or non-data segment of the same packet (for example, the packet header segment SOP, the middle data segment OOP and the packet tail segment EOP) corresponds to the same port identifier.

[0035] like Figure 2 As shown, the selection circuit 122 is used to output the packet header SOP to the capture circuit 124 via the signal path L1, and output the middle data segment OOP and the packet tail segment EOP to the data segment buffer circuit 123 via the signal path L2. The selection circuit 122 can be implemented by a multiplexer (MUX).

[0036] like Figure 2 As shown, the data segment buffer circuit 123 is used to store the intermediate data segment OOP and the packet tail segment EOP, and output the intermediate data segment OOP and the packet tail segment EOP to the sequence management circuit 128 via the second multiplexer 127. The data segment buffer circuit 123 can be implemented by a first in first out (FIFO) buffer.

[0037] like Figure 2As shown, the capture circuit 124 is used to parse the received packet header SOP to obtain the port identifier and the source MAC address of the packet header, and output it to the second-stage learning engine 14 for executing the MAC address learning method. The capture circuit 124 obtains the destination MAC address of the packet header from the packet header SOP for the forwarding processing circuit 125 to perform forwarding query. In some embodiments, the packet header SOP may also include virtual local area network (VLAN) information. The capture circuit 124 may obtain the virtual local area network information, the source MAC address and the port identifier from the packet header SOP for the second-stage learning engine 14 to execute the MAC address learning method.

[0038] like Figure 2 As shown, the forwarding processing circuit 125 is used to compare the MAC forwarding table 1411 according to the destination MAC address to perform a forwarding query and generate a forwarding instruction. The sequence management circuit 128 is used to start forwarding the packet through the demultiplexer 129 after receiving the forwarding instruction. For example, the sequence management circuit 128 combines the packet header segment SOP, the intermediate data segment OOP and the packet tail segment EOP corresponding to the same port identifier to restore the packet, and forwards the packet after receiving the forwarding instruction. In some embodiments, the sequence management circuit 128 includes a plurality of sequence management sub-circuits 1281A~1281D, which correspond to the output and input ports 16A~16D respectively, and store packets from the corresponding output and input ports 16A~16D before receiving the forwarding instruction.

[0039] like Figure 2 As shown, the decision circuit 126 is used to perform other functions of the network switch device 10 besides forwarding packets and MAC address learning. For example, transmission flow monitoring. The capture circuit 124, the forwarding processing circuit 125 and the decision circuit 126 can be implemented by a computing circuit such as a central processing unit or a microprocessor. The sequence management circuit 128 can be implemented by a controller with a storage medium.

[0040] Reference Figure 3 , Figure 31 is a flow chart of the MAC address learning method according to some embodiments of the present invention. In some embodiments, the MAC address learning method of the present invention (i.e., the method of establishing and maintaining the MAC forwarding table 1411) is suitable for execution by the network switching device 10. First, when parsing the packet header, the two-stage learning circuit 143 starts the first-stage program (step S310). Specifically, the two-stage learning circuit 143 starts the first-stage program when obtaining the source MAC address and port identifier from the forwarding engine 12. Then, the first-stage program is executed (step S312). In some embodiments of step S310, the two-stage learning circuit 143 starts the first-stage program after obtaining the virtual local area network information, the source MAC address and the port identifier.

[0041] Reference Figure 4 , Figure 4 1 is a flowchart of the first stage of the process according to some embodiments of the present invention. First, the second stage learning circuit 143 performs a learning process (described in detail later) on the source MAC address according to the MAC forwarding table 1411 and the port identifier to generate a learning result (step S410). Next, the second stage learning circuit 143 generates a state parameter according to the learning result (step S412). After that, the second stage learning circuit 143 associates the state parameter, the port identifier and a hash address corresponding to the source MAC address (described in detail later) and stores it in the memory 141 (step S414).

[0042] In some embodiments, Figure 2 As shown, the two-stage learning circuit 143 includes a learning processing circuit 1431, and the learning processing circuit 1431 is coupled to the capture circuit 124 and the MAC forwarding table 1411 to execute the first stage program. In some embodiments, the memory 141 includes a state buffer circuit 1413. The state buffer circuit 1413 is used to store the associated state parameters, port identifiers and hash addresses corresponding to the source MAC addresses. The state buffer circuit 1413 can be implemented by a first-in-first-out buffer. In some embodiments, the state buffer circuit 1413 includes a plurality of state buffer sub-circuits 14131A~14131D, corresponding to the output and input ports 16A~16D respectively. In some embodiments of step S414, the two-stage learning circuit 143 stores the associated state parameters, port identifiers and hash addresses to the corresponding state buffer sub-circuits 14131A~14131D according to the port identifier. In some embodiments, the state buffer sub-circuits 14131A- 14131D are serially connected in the state buffer circuit 1413 according to the order of the input and output ports 16A- 16D.

[0043] In some embodiments, Figure 2As shown, the two-stage learning circuit 143 further includes an instruction circuit 1434, and the instruction circuit 1434 is coupled to the learning processing circuit 1431 and the state buffer circuit 1413. In some embodiments of step S414, the learning processing circuit 1431 sends a push instruction to the state buffer circuit 1413 through the instruction circuit 1434, so that the state buffer circuit 1413 responds to the push instruction and stores the associated state parameter, port identifier and hash address corresponding to the source MAC address.

[0044] Re-reference Figure 3 . On the other hand, when the packet verification parameters are parsed, the second-stage learning circuit 143 starts the second-stage program (step S314). Specifically, the second-stage learning circuit 143 starts the second-stage program when obtaining the packet verification parameters and the port identifier from the forwarding engine 12. Then, the second-stage program (step S316) is executed to confirm whether the packet verification passes (i.e., confirm whether the packet data is correct). If the verification passes (i.e., the packet is correct), the second-stage learning circuit 143 reads the data stored in the memory 141 under the first-stage program, and updates the MAC forwarding table 1411 according to the obtained data.

[0045] Reference Figure 5 , Figure 5 1 is a flow chart of the second stage procedure according to some embodiments of the present invention. If the verification is passed, the second stage learning circuit 143 obtains the associated state parameters and hash address from the memory 141 according to the port identifier (step S510). Next, the second stage learning circuit 143 updates the MAC forwarding table 1411 according to the packet verification parameters, the obtained state parameters and the obtained hash address (step S512).

[0046] If the check fails (i.e., the packet is incorrect), the second-stage learning circuit 143 does not update the MAC forwarding table 1411. In some embodiments, if the check fails, the second-stage learning circuit 143 may restore the operations or changes made to the MAC forwarding table 1411 under the first-stage procedure, that is, restore the MAC forwarding table 1411 before the first-stage procedure is executed, and does not update the MAC forwarding table 1411. In some embodiments, if Figure 2 As shown, the second-stage learning circuit 143 further includes an update processing circuit 1432 coupled to the state buffer circuit 1413, the MAC forwarding table 1411 and the forwarding engine 12 (not shown) to execute the second-stage procedure.

[0047] In this way, it is possible to prevent an erroneous MAC address from being stored in the MAC forwarding table 1411, thereby ensuring effective storage space for the MAC forwarding table 1411. In some embodiments, since the amount of data required for executing the MAC address learning method stored in the memory 141 is relatively small relative to the entire packet, the MAC address learning method of the present invention can also reduce the storage space required for the memory 141 or other storage media in the network switching device 10.

[0048] In some embodiments, Figure 2 As shown, the memory 141 further includes an instruction buffer circuit 1415. The instruction buffer circuit 1415 is coupled to the update processing circuit 1432, the second multiplexer 127 and the instruction circuit 1434. The instruction buffer circuit 1415 can be implemented by a first-in-first-out buffer. In some embodiments of step S510, the update processing circuit 1432 obtains the packet check parameter and the port identifier of the end segment EOP of the packet through the instruction buffer circuit 1415. The update processing circuit 1432 sends a control signal to the instruction buffer circuit 1415 according to the port identifier. In response to the control signal, the instruction buffer circuit 1415 sends a pop-up instruction to the state buffer circuit 1413 through the instruction circuit 1434. In response to the pop-up instruction, the state buffer circuit 1413 outputs the state parameter and hash address associated with the port identifier to the update processing circuit 1432.

[0049] In some embodiments, since the priority of the state buffer circuit 1413 in responding to the pop command is lower than the priority of the state buffer circuit 1413 in responding to the push command, when the state buffer circuit 1413 receives the pop command and the push command at the same time, the command buffer circuit 1415 can temporarily store the port identifier, the packet check parameter and the control signal, so that data will not be lost due to the lower priority.

[0050] In some embodiments, Figure 2 As shown, the two-stage learning circuit 143 further includes an arbiter 1435, which is coupled between the MAC forwarding table 1411, the learning processing circuit 1431, and the update processing circuit 1432. When the first-stage program is started, the arbiter 1435 turns on the coupling between the MAC forwarding table 1411 and the learning processing circuit 1431, so that the learning processing circuit 1431 can execute the first-stage program. When the second-stage program is started, the arbiter 1435 turns on the coupling between the MAC forwarding table 1411 and the update processing circuit 1432, so that the update processing circuit 1432 can execute the second-stage program.

[0051] Reference Figure 6 , Table 1 and Table 2. Figure 6 Table 1 is a schematic diagram of the MAC forwarding table 1411 according to some embodiments of the present invention. Figure 6Table 2 is a hash table. Figure 6 Each column is an entry. Each entry corresponds to a hash address. Each entry may include a recorded MAC address, a status flag, an outdated parameter, a port identification parameter, and the number of MAC addresses corresponding to the port identification parameter. The status flag includes an update flag, an establishment flag, and a move flag. Here, Figure 6 The port identification parameters “port A”, “port B”, “port C”, and “port D” shown correspond to the first input / output port 16A to the fourth input / output port 16D, respectively.

[0052] In some embodiments, in order to conveniently and quickly read the recorded MAC addresses of the MAC forwarding table 1411 from the memory 141, the memory 141 may store a hash table. The hash table (as shown in Table 2) and the MAC forwarding table 1411 (as shown in Table 2) are Figure 6 As shown in Table 2, there is a mapping relationship between the physical addresses (as shown) so that the MAC forwarding table 1411 can be quickly read and searched through the hash table. In the hash table, a single hash value corresponds to a hash address set. For example, as shown in Table 2, a single hash value (such as "0x00") corresponds to a hash address set consisting of four hash addresses ("0x00 / 0x0", "0x00 / 0x1", "0x00 / 0x2", "0x00 / 0x3"). The hash address can be a physical address in the memory 141. For example, "0x00 / 0x0" is the physical address "0x00", "0x00 / 0x1" is the physical address "0x01", etc. The hash value can be generated by the learning processing circuit 1431 performing a hash function calculation using the source MAC address and the virtual area network information.

[0053] [Table 1] Figure 6 The description of each column is as follows.

[0054]

[0055]

[0056] [Table 2] is a hash table

[0057] Hash value First hash address Second hash address Third hash address Fourth hash address 0x00 0x00 / 0x0 0x00 / 0x1 0x00 / 0x2 0x00 / 0x3 0x04 0x04 / 0x0 0x04 / 0x1 0x04 / 0x2 0x04 / 0x3 0x08 0x08 / 0x0 0x08 / 0x1 0x08 / 0x2 0x08 / 0x3

[0058] In some embodiments, each input / output port 16A-16D corresponds to a MAC number, and the MAC forwarding table 1411 can store these MAC numbers. In some embodiments, the port identification parameters, port identifiers, and MAC numbers corresponding to the same input / output port 16A-16D are associated with each other. The MAC number is the total number of MAC addresses corresponding to a single input / output port 16A-16D in the MAC forwarding table 1411. For example, Figure 6 As shown, the port identification parameter corresponding to the first input / output port 16A is “port A”. In the MAC forwarding table 1411 , it can be seen that the first input / output port 16A corresponds to 2 recorded MAC addresses.

[0059] In some embodiments, Figure 2 As shown, the two-stage learning circuit 143 further includes a counting circuit 1433. The counting circuit 1433 is coupled to the MAC forwarding table 1411. The counting circuit 1433 is used to accumulate the number of MACs of each input and output port 16A-16D. The counting circuit 1433 may include a plurality of counting sub-circuits 14331A-14331D to respectively accumulate the number of MACs of the input and output ports 16A-16D. In some embodiments, the counting circuit 1433 may also be coupled to the learning processing circuit 1431 and the updating processing circuit 1432. The learning processing circuit 1431 or the updating processing circuit 1432 may drive the counting circuit 1433 to increase the number of MACs (e.g., increase the number of MACs by one) or decrease the number of MACs (e.g., decrease the number of MACs by one) when the number of MACs of a certain input and output port 16A-16D needs to be increased or decreased.

[0060] In some embodiments, the learning process may include a MAC limit exceed check, a hash collision check, an update check, an input / output port migration check, and a station move MAC limit exceed check (described later).

[0061] In some embodiments, the learning processing circuit 1431 compares the source MAC address with the entries recorded in the MAC forwarding table 1411. If the source MAC address does not have a corresponding entry in the MAC forwarding table 1411 (for example, the recorded MAC addresses of the entries in the MAC forwarding table 1411 are all different from the source MAC address), the learning processing circuit 1431 performs a MAC address overlimit check and a hash collision check. If the check passes, the learning processing circuit 1431 creates a new entry in the MAC forwarding table 1411 to record the source MAC address as a new recorded MAC address, and records the port identifier as a port identification parameter.

[0062] If the source MAC address has a corresponding entry in the MAC forwarding table 1411 (for example, the recorded MAC address of one of the entries in the MAC forwarding table 1411 is the same as the source MAC address), the learning processing circuit 1431 generates a learning result of "learning allowed" and performs an update check, a connection port migration check, or a connection port migration overlimit check.

[0063] In some embodiments, the MAC address over-limit check is that the learning processing circuit 1431 determines whether the number of MAC addresses corresponding to the port identifier has reached the upper limit of the MAC number according to the port identifier. If the upper limit of the MAC number has been reached, the learning processing circuit 1431 generates a learning result of "learning is not allowed", that is, it has not passed the test. If the upper limit of the MAC number has not been reached, the learning processing circuit 1431 generates a learning result of "learning is allowed", that is, it has passed the test.

[0064] In some embodiments, the hash collision check is that the learning processing circuit 1431 determines whether the hash addresses in the hash address set have all been assigned MAC addresses based on the hash value generated by the source MAC address according to the MAC forwarding table 1411 and the hash table. If all have been assigned MAC addresses, the learning processing circuit 1431 generates a learning result of "not allowed to learn", that is, it fails the check. For example, if Figure 6 As shown in Table 2, if the hash value generated according to the source MAC address is "0x04", and the first to fourth hash addresses have all been assigned MAC addresses, the learning processing circuit 1431 generates a learning result of "not allowed to learn". If not all have been assigned MAC addresses, the learning processing circuit 1431 generates a learning result of "allowed to learn" (i.e. passed the test) and assigns the source MAC address to the hash address of the hash value that does not have a MAC address. For example, Figure 6 As shown in Table 2, if the hash value generated according to the source MAC address is "0x00", and the fourth hash address "0x00 / 0x3" has not been assigned a MAC address, the learning processing circuit 1431 generates a learning result of "allowing learning" and records the source MAC address in the storage location indicated by the fourth hash address "0x00 / 0x3". In some embodiments, hash addresses of the same hash value are assigned to MAC addresses in sequence. For example, the assignment order is "first hash address, second hash address, third hash address, fourth hash address", but the present case is not limited to this, and can also be assigned in other orders.

[0065] Reference Figure 7 , Figure 71 is a flowchart of the first stage procedure according to some embodiments of the present invention. In some embodiments, the learning processing circuit 1431 is further coupled to the sequence management circuit 128 (not shown). In some embodiments, after generating the learning result, the learning processing circuit 1431 determines the learning result (step S710). If the learning result is determined to be "learning is allowed", the learning processing circuit 1431 executes steps S712, S714 and step S414. If the learning result is determined to be "learning is not allowed", the learning processing circuit 1431 generates a discard symbol corresponding to the packet, and the sequence management circuit 128 discards the packet according to the discard symbol (step S716). Specifically, the sequence management circuit 128 discards the packet when the discard symbol is detected. This saves the storage space of the sequence management circuit 128 and improves the speed of processing packets (for example, in the first stage procedure, it can be determined whether to discard the packet, without having to determine whether to discard the packet after the data segment of the entire packet has been processed). However, the present invention is not limited to this, and the sequence management circuit 128 can also discard the packet after the second stage procedure. In some embodiments, Figure 2 As shown, the decision circuit 126 is further coupled to the learning processing circuit 1431 to assist it in generating a discard symbol.

[0066] In step S712, the learning processing circuit 1431 sets a status flag for an entry (hereinafter referred to as a pending update entry) of the hash address corresponding to the source MAC address in the MAC forwarding table 1411 according to the source MAC address, so as to form a pending confirmation entry, so as to provide the second stage program with confirmation before updating. For example, an update flag, a move flag and / or an establishment flag with a logic value of "1" is set in the entry to form a pending confirmation entry. Figure 6 As shown, entries numbered "5" to "8" are pending entries. On the contrary, if the entry does not have an update flag, a move flag, and / or a create flag set (for example, the update flag, the move flag, and the create flag of the entry are all logical "0"), then this entry is called a pending update entry. Figure 6 As shown, the entries numbered "1" to "4" are the entries to be updated.

[0067] In step S714, the learning processing circuit 1431 generates a corresponding state parameter according to the state flag. For example, the learning processing circuit 1431 generates a state parameter with the same digital logic as the state flag, such as generating a state parameter of logic "1". The state parameter includes an update parameter, a move parameter, a move overrun parameter, and an establishment parameter. The update parameter corresponds to the update flag to indicate that the update check is triggered and the check passes. The move parameter and the move overrun parameter correspond to the move flag to indicate that the input / output port migration check and the input / output port migration overrun check are triggered and the check passes, respectively. The establishment parameter corresponds to the establishment flag to indicate that the learning processing circuit 1431 has established a new entry in the MAC forwarding table 1411.

[0068] Reference Figure 8 , Figure 8 This is a schematic diagram of the MAC forwarding table 1411 according to some embodiments of the present case, which has not yet been subjected to the first stage procedure. In some embodiments of step S712, when the condition that the source MAC address does not have a corresponding entry to be updated in the MAC forwarding table 1411 (that is, the recorded MAC address that does not yet have an entry in the MAC forwarding table 1411 is the same as the source MAC address) is met (referred to as the first condition here), the learning processing circuit 1431 sets an establishment flag for the entry to be updated to form an entry to be confirmed. Next, the learning processing circuit 1431 generates establishment parameters in response to the establishment flag (step S714). An example of satisfying the first condition may be assuming that the source MAC address is "22-11-33-44-55-66", then refer to Figure 8 It can be seen that the MAC forwarding table 1411 does not yet have an entry related to the MAC address "22-11-33-44-55-66".

[0069] Reference Fig. 9 , Fig. 9 1 is a schematic diagram of the MAC forwarding table 1411 after executing the first stage procedure under the first condition according to some embodiments of the present invention. Specifically, if the learning result is that learning is allowed and the first condition is met, the learning processing circuit 1431 creates a new entry to be updated in the MAC forwarding table 1411 according to the source MAC address and the port identifier. For example, continuing the above example, Fig. 9 As shown, the source MAC address and port identifier are used as the recorded MAC address and port identification parameters of the entry with hash address "0x04 / 0x0" to form a new entry to be updated. Afterwards, the learning processing circuit 1431 executes step S712 to form an entry to be confirmed. For example, Fig. 9 As shown, the establishment flag of the entry to be updated (ie, the entry at hash address "0x04 / 0x0") is changed from logic "0" to logic "1".

[0070] In some embodiments, when an entry in the MAC forwarding table 1411 is set with an establishment flag, this entry cannot be forwarded for query. Specifically, when performing a forwarding query, the forwarding processing circuit 125 determines whether the entry in the MAC forwarding table 1411 is set with an establishment flag (for example, whether the establishment flag is logic "1"). If the establishment flag is set, it means that this entry is newly established (for example, a pending entry formed by a newly established entry to be updated) and has not yet been confirmed by the packet verification of the second stage program performed by the update processing circuit 1432. Therefore, the forwarding processing circuit 125 does not need to compare the destination MAC address with the recorded MAC address of this entry. Otherwise, the forwarding processing circuit 125 will still compare this entry.

[0071] Reference Figure 8 . In some embodiments of step S712, when the condition that the source MAC address has a corresponding entry to be updated in the MAC forwarding table 1411 and the port identification parameter of the entry to be updated matches the port identifier (referred to as the second condition here) is met (that is, the source MAC address and the port identifier have been recorded in the MAC forwarding table 1411 and are the same as the recorded entry to be updated), the learning processing circuit 1431 sets an update flag for the entry to be updated to form an entry to be confirmed. Then, the learning processing circuit 1431 generates an update parameter in response to the update flag (step S714). An example of satisfying the second condition is to assume that the source MAC address is "AA-BB-CC-DD-EE-FF" and the port identifier is "port A", refer to Figure 8 It can be seen that the MAC address and port identification parameters are the same as those of the entry at the hash address "0x00 / 0x0" (ie, the entry to be updated).

[0072] Reference Fig.10 , Fig.10 14 is a schematic diagram of the MAC forwarding table 1411 after executing the first stage procedure under the second condition according to some embodiments of the present invention. Specifically, if the second condition is met, the update check is triggered and passed. For example, the input and output ports 16A-16D are still coupled to the electronic devices 20A-20D, and the electronic devices 20A-20D have not been replaced. Based on the above example, an example of step S712 that meets the second condition can be as follows: Fig.10 As shown, the update flag of the entry at the hash address "0x00 / 0x0" (ie, the entry to be updated) is changed from logic "0" to logic "1" (ie, thereby forming an entry to be confirmed).

[0073] Reference Figure 8. In some embodiments of step S712, when the source MAC address has a corresponding entry to be updated in the MAC forwarding table 1411, and the port identification parameter of the entry to be updated does not match the port identifier (referred to as the third condition here) (that is, the source MAC address has been recorded in the MAC forwarding table 1411 and the corresponding output and input ports have been changed), the learning processing circuit 1431 sets a movement flag for the entry to be updated to form an entry to be confirmed. Next, the learning processing circuit 1431 generates a movement parameter or a movement overlimit parameter in response to the movement flag (step S714). An example of satisfying the third condition is to assume that the source MAC address is "AA-BB-CC-DD-EE-FF" and the port identifier is "port B", then refer to Figure 8 It can be seen that it is the same as the MAC address of the entry with hash address "0x00 / 0x0" (ie, the entry to be updated), but is different from the port identification parameter.

[0074] Reference Fig.11 and Fig.12 . Fig.11 FIG. 1 is a schematic diagram of the MAC forwarding table 1411 after executing the first stage procedure according to an embodiment of the present invention when the third condition is met. Fig.12 This is a schematic diagram of the MAC forwarding table 1411 after executing the first stage program under the third condition of another embodiment of the present case. Specifically, if the third condition is met, the output-input port migration check or the output-input port migration over-limit check is triggered and passed. For example, the electronic devices 20A~20D replace their coupled output-input ports 16A~16D. Specifically, the first electronic device 20A is changed from coupling the first output-input port 16A to coupling the second output-input port 16B. Continuing with the above example, an example of step S712 that meets the third condition may be as follows Fig.11 and Fig.12 As shown, the move flag of the entry at the hash address "0x00 / 0x0" (ie, the entry to be updated) is changed from logic "0" to logic "1" (ie, thereby forming an entry to be confirmed).

[0075] In some embodiments of step S712, the learning processing circuit 1431 also accumulates a MAC number corresponding to the port identifier. For example, if the pending entry is formed under the condition that the first condition is met, the learning processing circuit 1431 also increases the MAC number corresponding to the port identifier of the packet header SOP. Figure 8 and Fig. 9As shown, assuming that the port identifier is "portA", the number of MAC addresses corresponding to "port A" increases by one (i.e., the number of MAC addresses of "port A" increases from 2 to 3). In this way, the network switch device 10 can grasp the total number of MAC addresses that each input and output port 16A-16D may correspond to in real time to ensure that the storage space (e.g., MAC forwarding table 1411) can still store new MAC addresses.

[0076] In some embodiments, if the pending entry is formed under the condition that the third condition is met, and the number of MACs corresponding to the port identifier does not reach the upper limit of the number of MACs, the learning processing circuit 1431 generates a movement parameter in response to the movement flag, and the learning processing circuit 1431 also accumulates the number of MACs corresponding to the port identifier of the packet header SOP. Fig.11 As shown, assuming that the port identifier is "port B", the MAC number corresponding to "port B" is increased by one (ie, the MAC number of "port B" increases from 2 to 3).

[0077] In other embodiments, if the pending entry is formed under the condition that the third condition is met, and the number of MACs corresponding to the port identifier has reached the upper limit of the number of MACs, the learning processing circuit 1431 generates a movement limit parameter in response to the movement flag, and the learning processing circuit 1431 does not accumulate the number of MACs corresponding to the port identifier of the header segment SOP. Fig.11 The difference is that in Fig.12 In the example, the number of MAC addresses corresponding to "port B" remains unchanged (that is, the number of MAC addresses of "port B" remains 2).

[0078] Re-reference Figure 5 In some embodiments of step S512, in the second stage procedure, when the packet verification parameter indicates that the verification is passed (for example, the packet verification parameter is a logic "0" to indicate that the verification is passed), the update processing circuit 1432 obtains the corresponding pending entry from the MAC forwarding table 1411 according to the obtained hash address, and performs a timing update, a MAC accumulation update, a port identification update, a flag update, or a combination thereof on the obtained pending entry according to the state parameter obtained from the state buffer circuit 1413.

[0079] The timing update is that the update processing circuit 1432 sets an obsolete parameter of the obtained entry to be confirmed to a preset value. In order to save the storage space of the MAC forwarding table 1411, the network switching device 10 is designed with an aging time upper limit (for example, 300 seconds (s)). The obsolete parameter of each entry is used to accumulate the time that the entry has not been updated. When the obsolete parameter of the entry reaches the aging time upper limit and the entry has not been updated, the entry is removed from the MAC forwarding table 1411. Therefore, when the entry is updated, the update processing circuit 1432 resets the obsolete parameter to the preset value (for example, reset to 0 seconds) to re-accumulate the time that it has not been updated. However, the present case is not limited to this, and the obsolete parameter of each entry can be used to count down the time when the entry will be removed (for example, when it is not updated, it is decremented based on the aging time upper limit). Therefore, when the entry is updated, the update processing circuit 1432 can reset the obsolete parameter to the aging time upper limit (for example, reset to 300 seconds).

[0080] MAC cumulative update means that the update processing circuit 1432 cumulatively reduces the number of MACs corresponding to the port identification parameter of the obtained pending confirmation entry. Port identification update means that the update processing circuit 1432 uses the port identifier of the packet tail EOP as the port identification parameter of the obtained pending confirmation entry. Flag update means that the update processing circuit 1432 clears the status flag of the obtained pending confirmation entry, so that the updated entry can be used as a new pending update entry for the first stage program and the second stage program to be executed by subsequent packets.

[0081] In some embodiments, in the second stage procedure, when the packet check parameter indicates that the check fails (for example, the packet check parameter indicates that the check fails with a logic "1"), the update processing circuit 1432 performs a restoration action on the pending entry according to the obtained hash address and the obtained state parameter. The restoration action includes an action of clearing the state flag of the pending entry, an action of accumulating the number of MACs corresponding to the port identifier of the end segment EOP of the packet, an action of removing the pending entry from the MAC forwarding table 1411, or a combination thereof. In this way, the operations and changes performed on the MAC forwarding table 1411 in the first stage procedure are restored, and the MAC forwarding table 1411 is not updated.

[0082] Reference Fig.13 , Fig.13 14 is a flowchart of the second stage procedure according to some embodiments of the present invention. After obtaining the packet verification parameter, the update processing circuit 1432 determines the packet verification parameter (step S910). If the determination result is "verification failed", the update processing circuit 1432 executes steps S911 to S918 to restore the obtained pending confirmation entry and restore the MAC forwarding table 1411 (such as Figure 8If the determination result is "verification passed", the update processing circuit 1432 executes steps S919 to S929 to update the obtained pending confirmation entry.

[0083] In step S911, the update processing circuit 1432 determines whether the state parameter obtained from the state buffer circuit 1413 (i.e., the state parameter obtained in step S510) is an establishment parameter. If the state parameter is an establishment parameter, it means that a new entry to be updated has been established based on the source MAC address of the packet. Since the check fails, the update processing circuit 1432 removes the obtained entry to be confirmed from the MAC forwarding table 1411 based on the establishment parameter and the obtained hash address (i.e., the hash address obtained in step S510), and decrements the MAC number corresponding to the port identifier of the end segment EOP of the packet (step S912). For example, Fig. 9 The MAC forwarding table 1411 shown is restored to Figure 8 MAC forwarding table 1411 is shown. Specifically, assuming that the hash address obtained in step S510 is "0x04 / 0x0", and the port identifier of the packet tail EOP is "port A", the data recorded in the entry corresponding to the hash address "0x04 / 0x0" (i.e., the obtained pending confirmation entry) is deleted, and the MAC number corresponding to "port A" is reduced by one (for example, from 3 to 2). If the state parameter is not an establishment parameter, step S913 is executed.

[0084] In step S913, the update processing circuit 1432 determines whether the state parameter obtained from the state buffer circuit 1413 is a mobile parameter. If the state parameter is a mobile parameter, it means that the input / output port migration check is triggered and passed. Since the check fails, the update processing circuit 1432 clears the mobile flag of the entry to be confirmed based on the mobile parameter and the obtained hash address, restores the entry to be updated, and decrements the MAC number corresponding to the port identifier of the packet tail EOP (step S914). For example, Fig.11 The MAC forwarding table 1411 shown is restored to Figure 8 MAC forwarding table 1411 is shown. Specifically, assuming that the hash address obtained in step S510 is "0x00 / 0x0", and the port identifier of the packet tail EOP is "port B", the mobile flag of the entry corresponding to the hash address "0x00 / 0x0" (i.e., the obtained pending confirmation entry) is changed from logic "1" to logic "0", and the MAC number corresponding to "port B" is reduced by one (for example, from 3 to 2). If the state parameter is not a mobile parameter, step S915 is executed.

[0085] In step S915, the update processing circuit 1432 determines whether the state parameter obtained from the state buffer circuit 1413 is a move over-limit parameter. If the state parameter is a move over-limit parameter, it means that the input / output port migration over-limit check is triggered and passed. Since the check fails, the update processing circuit 1432 clears the move flag of the entry to be confirmed based on the move over-limit parameter and the obtained hash address, and restores the entry to be updated (step S916). Fig.12 The MAC forwarding table 1411 shown is restored to Figure 8 MAC forwarding table 1411 is shown. Specifically, assuming that the hash address obtained in step S510 is "0x00 / 0x0", the movement flag of the entry corresponding to the hash address "0x00 / 0x0" (i.e., the obtained pending entry) is changed from logic "1" to logic "0". If the state parameter is not a movement overlimit parameter, step S917 is executed.

[0086] In step S917, the update processing circuit 1432 determines whether the state parameter obtained from the state buffer circuit 1413 is an update parameter. If the state parameter is an update parameter, it means that the update check is triggered and passed. Since the check fails, the update processing circuit 1432 clears the update flag of the obtained pending entry according to the update parameter and the obtained hash address, and restores the pending entry (step S918). Fig.10 The MAC forwarding table 1411 shown is restored to Figure 8 MAC forwarding table 1411 is shown. Specifically, assuming that the hash address obtained in step S510 is "0x00 / 0x0", the update flag of the entry corresponding to the hash address "0x00 / 0x0" (i.e., the obtained pending confirmation entry) is changed from logic "1" to logic "0". If the state parameter is not an update parameter, the second stage procedure ends.

[0087] Reference Fig.13 and Fig.14 . Fig.14 This is a schematic diagram of the MAC forwarding table 1411 after the second stage procedure is executed according to the establishment parameters in some examples of the present case. In step S919, if the state parameter is an establishment parameter (indicating that a new entry to be updated has been established according to the source MAC address of the packet), the update processing circuit 1432 executes step S920. If the state parameter is not an establishment parameter, the update processing circuit 1432 executes step S921. In step S920, since the verification is passed, the update processing circuit 1432 performs a timing update and a flag update on the obtained entry to be confirmed according to the establishment parameters. For example, Fig. 9 The MAC forwarding table 1411 shown is updated to Fig.14Specifically, assuming that the hash address obtained in step S510 is "0x04 / 0x0", the establishment flag of the entry corresponding to the hash address "0x04 / 0x0" (ie, the obtained pending entry) is changed from logic "1" to logic "0", and the expiration parameter is set to 0 seconds.

[0088] Reference Fig.13 and Fig.15 . Fig.15 This is a schematic diagram of the MAC forwarding table 1411 after the second stage procedure is executed according to the mobile parameter under the condition that the verification is passed according to some embodiments of the present case. In step S921, if the state parameter is a mobile parameter (indicating that the output and input port migration check is triggered and passed), the update processing circuit 1432 executes step S922. If the state parameter is not a mobile parameter, the update processing circuit 1432 executes step S924. In step S922, since the verification is passed, the update processing circuit 1432 performs timing update, MAC accumulation update, port identification update and flag update on the obtained pending entries according to the mobile parameter. For example, Fig.11 The MAC forwarding table 1411 shown is updated to Fig.15 MAC forwarding table 1411 is shown. Specifically, assuming that the hash address obtained in step S510 is "0x00 / 0x0", and the port identifier of the packet tail EOP is "port B", the mobile flag of the entry corresponding to the hash address "0x00 / 0x0" (i.e., the obtained pending confirmation entry) is changed from logic "1" to logic "0", the expiration parameter is set to 0 seconds, the MAC number corresponding to the port identification parameter ("port A") is reduced by one (for example, the MAC number is reduced from 2 to 1), and "port B" is used as the port identification parameter.

[0089] Reference Fig.13 and Fig.16 . Fig.16This is a schematic diagram of the MAC forwarding table 1411 after the second stage procedure is executed according to the mobile over-limit parameter after the verification is passed according to some embodiments of the present case. In step S924, if the state parameter is a mobile over-limit parameter (indicating that the output-input port migration over-limit check is triggered and passed), the update processing circuit 1432 executes step S925. If the state parameter is not a mobile over-limit parameter, the update processing circuit 1432 executes step S926. In step S925, since the verification is passed and the output-input ports 16A~16D replaced by the electronic devices 20A~20D have a corresponding MAC number that has reached the upper limit of the MAC number, the update processing circuit 1432 removes the obtained pending entries from the MAC forwarding table 1411 according to the mobile over-limit parameter, and performs a MAC cumulative update to ensure the correctness of the MAC forwarding table 1411. For example, Fig.12 The MAC forwarding table 1411 shown is updated to Fig.16 MAC forwarding table 1411 is shown. Specifically, assuming that the hash address obtained in step S510 is "0x00 / 0x0", the entry corresponding to the hash address "0x00 / 0x0" (i.e., the obtained pending entry) is deleted, and the MAC number corresponding to the port identification parameter ("port A") is reduced by one (for example, the MAC number is reduced from 2 to 1).

[0090] Reference Fig.13 and Fig.17 . Fig.17 This is a schematic diagram of the MAC forwarding table 1411 after the second stage procedure is executed according to the update parameters according to some embodiments of the present case when the verification is passed. In step S926, if the state parameter is an update parameter (indicating that the update check is triggered and passed), the update processing circuit 1432 executes steps S927 to S929. If the state parameter is not an update parameter, the second stage procedure ends. In step S929, since the verification is passed, the update processing circuit 1432 performs a timing update and a flag update on the obtained pending entry according to the update parameter. For example, Fig.10 The MAC forwarding table 1411 shown is updated to Fig.17 Specifically, assuming that the hash address obtained in step S510 is "0x00 / 0x0", the update flag of the entry corresponding to the hash address "0x00 / 0x0" (i.e., the obtained pending entry) is changed from logic "1" to logic "0", and the expiration parameter is set to 0 seconds.

[0091] In some embodiments, before executing step S929, the update processing circuit 1432 further determines whether the port identifier of the packet tail EOP matches the port identification parameter of the obtained entry to be confirmed (step S927). In some cases, the first packet and the second packet start the second stage program after the first packet and the second packet have started the first stage program (generally, the first packet starts the first stage program and the second stage program after the first packet starts the first stage program and the second stage program). For example, in an example, if Figure 2 As shown, since there are other components (such as the forwarding processing circuit 125 and the decision circuit 126) between the capture circuit 124 and the output end of the second multiplexer 127 (such as the signal path L1), a delay may occur on the signal path L1. Therefore, the second-stage learning circuit 143 may have the first-stage program activated by the second packet before the second-stage program is activated by the first packet. In another example, since the data volume of the first packet is larger and the data volume of the second packet is smaller, when both the first packet and the second packet have activated the first-stage program, the second-stage program is activated by the first packet only after the second packet activates the second-stage program.

[0092] For example, assuming that the source MAC addresses of the first and second packets are both "15-87-5D-6E-7A-D8", refer to Figure 6 It can be seen that the entry numbered "5" is set with both the update flag and the move flag. That is to say, the first packet and the second packet have already gone through the first stage procedure, while the first packet and the second packet have not yet gone through the second stage procedure. Assume that the first packet and the second packet trigger the output input migration test and the trigger update test respectively. At this time, since the second stage learning circuit 143 may have changed the entry numbered "5" from "port C" to other values ​​before the step S929 is to be performed, it is possible that when the step S929 is to be performed, the port identifier of the packet tail EOP may be different from the port identification parameter of the obtained entry to be confirmed.

[0093] Therefore, in order to avoid the MAC forwarding table 1411 from being incorrectly recorded due to the above situation, when the port identifier of the packet tail EOP is confirmed to match the port identification parameter of the obtained entry to be confirmed, step S929 is executed. When the port identifier of the packet tail EOP does not match the port identification parameter of the obtained entry to be confirmed, the update processing circuit 1432 clears the update flag of the obtained entry to be confirmed according to the update parameter and the obtained hash address (the hash address obtained in step S510), and restores the entry to be updated (step S928). In other words, the MAC forwarding table 1411 is not updated. For example, Fig.10 The MAC forwarding table 1411 is restored to Figure 8MAC forwarding table 1411. Thereby, it is ensured that MAC forwarding table 1411 stores correct entries.

[0094] In summary, according to some embodiments, the network switching device filters out the wrong source MAC address in the MAC address forwarding table in the case of direct forwarding, so that when forwarding packets, only the correct source MAC address can be stored in the MAC address forwarding table. The network switching device of the present invention does not require the coordinated processing of the processor for the entire process of learning the source MAC address into the MAC address forwarding table. In other words, the network switching device can learn the source MAC address into the MAC address forwarding table at line speed (because it is not limited by the processing speed of the processor). According to some embodiments, since the network switching device can perform the source MAC address learning process when receiving the source MAC address in the packet (that is, it is not necessary to store the entire packet before performing the source MAC address learning process), the storage capacity required for the network switching device to process the packet is reduced, and the processing speed of the network switching device to process the packet is improved.

[0095]

Explanation of symbols

[0096] 10: Network switching device

[0097] 12: Transfer Engine

[0098] 120A~120D: Pre-processing circuit

[0099] 121: First Multiplexer

[0100] 122: Select Circuit

[0101] 123: Data segment buffer circuit

[0102] 124: Capture Circuit

[0103] 125: Forwarding processing circuit

[0104] 126: Decision circuit

[0105] 127: Second multiplexer

[0106] 128: Sequence management circuit

[0107] 1281A~1281D: Sequence management subcircuit

[0108] 129: Demultiplexer

[0109] L1, L2: signal path

[0110] SOP: Packet header

[0111] OOP: Intermediate data segment

[0112] EOP: End of Packet

[0113] 14: Two-stage learning engine

[0114] 141: Memory

[0115] 1411: MAC forwarding table

[0116] 1413: Status buffer circuit

[0117] 14131A~14131D: State buffer subcircuit

[0118] 1415: instruction buffer circuit

[0119] 143: Two-stage learning circuit

[0120] 1431: Learning Processing Circuit

[0121] 1432: Update processing circuit

[0122] 1433: Counting circuit

[0123] 14331A~14331D: Counting subcircuit

[0124] 1434: Command circuit

[0125] 1435:Arbitrator

[0126] 16A~16D: Input and output ports

[0127] 20A~20D: Electronic devices

[0128] S310~S316: Steps

[0129] S410~S414: Steps

[0130] S510~S512: Steps

[0131] S710~S716: Steps

[0132] S910~S929: Steps

Claims

1. A network device, comprising: a forwarding engine, for receiving a packet from an input / output port, parsing a packet header and a packet check parameter of the packet, and generating a port identifier corresponding to the input / output port, the forwarding engine forwarding the packet to another input / output port according to a MAC forwarding table, wherein the packet header has a source MAC address; and The first and second stage learning engine includes: a memory storing the MAC forwarding table; and One or two stage learning circuits to: When the packet header is parsed, a first phase procedure is started, wherein: This first phase program includes: Performing a learning process on the source MAC address according to the MAC forwarding table and the port identifier to generate a learning result; Generate a state parameter according to the learning result; and Associating the state parameter, the port identifier, and a hash address corresponding to the source MAC address, and storing them in the memory, wherein, under the first-stage procedure, when the learning result is to allow learning, the second-stage learning circuit sets a state flag for a to-be-updated entry of the hash address corresponding to the source MAC address in the MAC forwarding table according to the source MAC address to form a to-be-confirmed entry, and generates the corresponding state parameter according to the state flag; and When the packet verification parameter is parsed, a second stage procedure is started, wherein the second stage procedure includes: According to the port identifier, obtaining the state parameter and the hash address from the memory; and The MAC forwarding table is updated according to the packet verification parameter, the obtained state parameter and the obtained hash address, wherein, under the second stage procedure, when the packet verification parameter indicates that the verification is passed, the second stage learning circuit obtains the corresponding pending entry from the MAC forwarding table according to the obtained hash address, and performs a timing update, a MAC accumulation update, a port identification update, a flag update, or a combination thereof on the obtained pending entry according to the obtained state parameter.

2. The network device according to claim 1, wherein: When the learning result indicates that learning is not allowed, the two-stage learning circuit generates a discard symbol corresponding to the packet, and the forwarding engine discards the packet according to the discard symbol. 3 . The network device as claimed in claim 1 , wherein the timing update is that the two-stage learning circuit sets an expiration parameter of the obtained pending confirmation entry to a preset value. 4 . The network device as claimed in claim 1 , wherein the MAC cumulative update is that the two-stage learning circuit cumulatively decreases a MAC quantity corresponding to a port identification parameter of the obtained entry to be confirmed. 5 . The network device as claimed in claim 1 , wherein the port identification is updated by the two-stage learning circuit using the port identifier as a port identification parameter of the obtained entry to be confirmed. 6 . The network device as claimed in claim 1 , wherein the flag update is that the two-stage learning circuit clears the status flag of the obtained pending confirmation entry.

7. The network device according to claim 1, wherein: In the first stage procedure, when the learning result is that learning is allowed, the second stage learning circuit accumulates a MAC quantity corresponding to the port identifier.

8. The network device according to claim 7, wherein: Under the second stage procedure, when the packet verification parameter indicates that the verification has failed, the second stage learning circuit performs a restoration action on the pending entry based on the obtained hash address and the obtained status parameter. The restoration action includes clearing the status flag of the pending entry, decrementing the MAC number corresponding to the port identifier, removing the pending entry from the MAC forwarding table, or a combination thereof.

9. A MAC address learning method, suitable for a network device, the MAC address learning method comprising: receiving a packet from an input / output port; generating a port identifier corresponding to the input / output port; When a header of the packet is parsed, a first stage procedure is initiated, wherein the header has a source MAC address; When a packet verification parameter of the packet is parsed, a second stage procedure is initiated; and Forwarding the packet to another of the input and output ports according to a MAC forwarding table in a memory; in, This first phase program includes: Performing a learning process on the source MAC address according to the MAC forwarding table and the port identifier to generate a learning result; Generate a state parameter according to the learning result; and Associating the state parameter, the port identifier, and a hash address corresponding to the source MAC address, and storing them in the memory, wherein, in the first stage procedure, when the learning result is that learning is allowed, according to the source MAC address, in the MAC forwarding table, a state flag is set for a to-be-updated entry of the hash address corresponding to the source MAC address to form a to-be-confirmed entry, and the corresponding state parameter is generated according to the state flag; The second phase of the program includes: According to the port identifier, obtaining the state parameter and the hash address from the memory; and The MAC forwarding table is updated according to the packet verification parameter, the obtained state parameter and the obtained hash address, wherein, under the second stage procedure, when the packet verification parameter indicates that the verification is passed, the corresponding pending entry is obtained from the MAC forwarding table according to the obtained hash address, and according to the obtained state parameter, a timing update, a MAC accumulation update, a port identification update, a flag update, or a combination thereof is performed on the obtained pending entry.

10. The MAC address learning method according to claim 9, wherein: When the learning result indicates that learning is not allowed, a discard symbol corresponding to the packet is generated, and the packet is discarded according to the discard symbol.

11. The MAC address learning method according to claim 9, wherein: The timing update is to set an expiration parameter of the obtained to-be-confirmed entry to a preset value.

12. The MAC address learning method according to claim 9, wherein: The MAC cumulative update is to cumulatively reduce a MAC quantity corresponding to a port identification parameter of the obtained entry to be confirmed.

13. The MAC address learning method according to claim 9, wherein: The port identification update is to use the port identifier as a port identification parameter of the obtained entry to be confirmed.

14. The MAC address learning method according to claim 9, wherein: The flag update is to clear the status flag of the obtained pending confirmation entry.

15. The MAC address learning method according to claim 9, wherein: In the first stage procedure, when the learning result is that learning is allowed, a MAC number corresponding to the port identifier is accumulated.

16. The MAC address learning method according to claim 15, wherein: Under the second stage procedure, when the packet verification parameter indicates that the verification has failed, a restoration action is performed on the pending entry based on the obtained hash address and the obtained status parameter, wherein the restoration action includes clearing the status flag of the pending entry, decrementing the MAC number corresponding to the port identifier, removing the pending entry from the MAC forwarding table, or a combination thereof.

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