Semiconductor Structure and Method of Forming the Same

Abstract

A semiconductor structure and a method for forming the same. The method includes: providing a substrate including a first conductive layer and a device layer; forming a first opening in the substrate, with the surface of the first conductive layer being exposed at the bottom of the first opening; forming a second opening in the substrate, with the surface of a resistance layer being exposed at the bottom of the second opening; using a first selective film formation process to form a second conductive film on the exposed surface of the first conductive layer; using a second selective film formation process to form a third conductive film on the second conductive film and the exposed surface of the resistance layer, where the reaction gases used between the second selective film formation process and the first selective film formation process are different; after forming the third conductive film, forming a fourth conductive structure in the first opening; and after forming the third conductive film, forming a fifth conductive structure in the second opening. Thus, it is possible to reduce the manufacturing process difficulty of the semiconductor structure while enabling the semiconductor structure to have better performance and reliability.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular, to a semiconductor structure and a method for forming the same. Background Art

[0002] Currently, in the process of semiconductor manufacturing, it is a widely used process to form an opening in an interlayer dielectric layer by an etching process, and then deposit a conductive material in the opening to form an electrical connection structure for the electrical connection between semiconductor devices.

[0003] However, the existing semiconductor structures are difficult to balance the performance and reliability of the semiconductor structure while reducing the manufacturing process difficulty of the semiconductor structure. Summary of the Invention

[0004] The technical problem solved by the present invention is to provide a semiconductor structure and a method for forming the same, so as to balance the performance and reliability of the semiconductor structure while reducing the manufacturing process difficulty of the semiconductor structure.

[0005] To solve the above technical problem, the technical solution of the present invention provides a semiconductor structure, including: a substrate, the substrate includes a first conductive layer and a device structure, the substrate further includes a first dielectric layer located between the first conductive layer and the device structure, a second dielectric layer located on the first dielectric layer, and an etch stop layer located between the first dielectric layer and the second dielectric layer, and a resistance layer is provided in the second dielectric layer; a first opening located in the second dielectric layer and the etch stop layer, the bottom of the first opening exposes the first conductive layer; a second opening located in the second dielectric layer, the bottom of the second opening communicates with a resistance opening in the resistance layer; a second conductive film, the second conductive film is located on the top surface of the first conductive layer exposed at the bottom of the first opening; a third conductive film, the third conductive film is located on the surface of the second conductive film in the first opening, and the third conductive film is also located in the resistance opening and the second opening; a fourth conductive structure, the fourth conductive structure is located on the surface of the third conductive film in the first opening; a fifth conductive structure, the fifth conductive structure is located on the surface of the third conductive film in the second opening.

[0006] Optionally, the depth of the resistance opening is less than one-half of the thickness of the resistance layer.

[0007] Optionally, the projection of the first conductive layer on the substrate surface is within a first projection range, and the first projection is the projection of the bottom surface of the first opening on the substrate surface.

[0008] Optionally, the material of the second conductive film includes fluorine-containing tungsten, and the material of the third conductive film includes tungsten without fluorine.

[0009] Optionally, the thickness of the third conductive film is 2 nanometers or more.

[0010] Optionally, the material of the first conductive layer includes cobalt, the material of the fourth conductive structure includes tungsten, and the material of the fifth conductive structure includes tungsten.

[0011] Optionally, the material of the resistance layer includes titanium nitride.

[0012] Correspondingly, the technical solution of the present invention further provides a method for forming a semiconductor structure, including: providing a substrate, the substrate includes a first conductive structure and a device layer, and the projection of the first conductive structure on the substrate surface does not coincide with the projection of the device layer on the substrate surface; forming a first opening in the substrate, the bottom of the first opening exposes the surface of the first conductive layer; forming a second opening in the substrate, the bottom of the second opening exposes the surface of the resistance layer; using a first selective film formation process to form a second conductive film on the exposed surface of the first conductive layer; using a second selective film formation process to form a third conductive film on the second conductive film and the exposed surface of the resistance layer, and the reaction gases used in the second selective film formation process and the first selective film formation process are different; after forming the third conductive film, forming a fourth conductive structure in the first opening; after forming the third conductive film, forming a fifth conductive structure in the second opening.

[0013] Optionally, the material of the second conductive film includes tungsten fluoride.

[0014] Optionally, the first selective film formation process includes a selective metal deposition process.

[0015] Optionally, the reaction gas used in the selective metal deposition process includes tungsten hexafluoride.

[0016] Optionally, the material of the resistance layer includes titanium nitride.

[0017] Optionally, the material of the third conductive film includes tungsten without fluorine.

[0018] Optionally, the second selective film formation process includes a selective atomic layer deposition process.

[0019] Optionally, the reaction gas used in the selective atomic layer deposition process includes tungsten pentachloride.

[0020] Optionally, the parameters of the second selective film formation process further include: the reaction gas used also includes hydrogen; the reaction temperature is 350 °C to 450 °C.

[0021] Optionally, the substrate further includes: a device structure, a first dielectric layer located between the first conductive structure and the device structure, and a second dielectric layer located on the first dielectric layer, and the resistance layer is located in the second dielectric layer.

[0022] Optionally, the substrate further includes an etch stop layer located between the first dielectric layer and the second dielectric layer; the first opening penetrates through the etch stop layer.

[0023] Optionally, the thickness of the second conductive film is above 2 nanometers, and the thickness of the second conductive film is less than the thickness of the resistive layer.

[0024] Optionally, the thickness of the third conductive film is above 2 nanometers, and the thickness of the third conductive film is less than the depth of the first opening and less than the depth of the second opening.

[0025] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0026] In the formation process of the semiconductor structure provided by the technical solution of the present invention, after the first opening and the second opening are formed, the fourth conductive structure and the fifth conductive structure are formed. Therefore, not only can the patterns of the first opening and the second opening be transferred through one mask layer, reducing the number of mask layers and the number of etching steps performed on the second dielectric layer. Moreover, the materials of the fourth conductive structure and the fifth conductive structure can be planarized in one planarization step to form the fourth conductive structure and the fifth conductive structure, thereby reducing the manufacturing process difficulty of the semiconductor structure. On this basis, since before the fourth conductive structure and the fifth conductive structure are formed, the second conductive film is formed on the exposed surface of the first conductive layer by using the first selective film formation process, and the third conductive film is formed on the surface of the second conductive film and the exposed surface of the resistive layer by using the second selective film formation process, and the reaction gases used in the first selective film formation process and the second selective film formation process are different, therefore, not only the formation process steps of the second conductive film and the third conductive film are few, the process window is large and it is easy to implement, at the same time, the second conductive film and the third conductive film can have different characteristics and formation processes to reduce the loss of the first conductive layer and the resistive layer and protect the first conductive layer and the resistive layer, so that the performance and reliability of the semiconductor structure are better.

[0027] Furthermore, since the selective film formation process for forming the tungsten-free fluoride includes a selective atomic layer deposition process, and the reaction gas used in the selective atomic layer deposition process includes tungsten pentachloride, this selective film formation process has high selectivity for materials and is extremely easy to grow on the surfaces of metals such as titanium nitride and tungsten fluoride and aluminum. Therefore, when the material of the resistive layer includes the above materials, the material of the third conductive film can be formed on the surfaces of the second conductive film and the resistive layer with high selectivity through the selective atomic layer deposition process. Thus, the steps of the process for forming the third conductive film are few, the process window is large and it is easy to implement. Description of the Drawings

[0028] Figures 1 to 3It is a schematic cross-sectional structure diagram of the formation process of a semiconductor structure;

[0029] Figures 4 to 8 It is a schematic cross-sectional structure diagram of the formation process of a semiconductor structure according to an embodiment of the present invention. Detailed implementation manners

[0030] As described in the background art, it is difficult for existing semiconductor structures to balance the performance and reliability of the semiconductor structure while reducing the manufacturing process difficulty of the semiconductor structure. The following will be described in detail with reference to the accompanying drawings.

[0031] Figures 1 to 3 It is a schematic cross-sectional structure diagram of each step of a method for forming a semiconductor structure.

[0032] Please refer to Figure 1 , a substrate (not shown) is provided, the substrate includes a dielectric layer 100, and a first conductive layer 110 and a resistance layer 120 are respectively disposed in the dielectric layer 100.

[0033] The material of the first conductive layer 110 is cobalt, and the material of the resistance layer 120 is titanium nitride.

[0034] Please continue to refer to Figure 1 , a first opening 131 and a second opening 132 are formed in the dielectric layer 100. Among them, the top surface of the first conductive layer 110 is exposed at the bottom of the first opening 131, and the top surface of the resistance layer 120 is exposed at the bottom of the second opening 132.

[0035] Please refer to Figure 2 , by using a selective tungsten deposition process, a first plug 140 is formed in the first opening 131, and the first plug 140 is in contact with the top surface of the first conductive layer 110.

[0036] The material of the first plug 140 includes tungsten, and tungsten has a low resistance, which can effectively reduce the parasitic resistance of the semiconductor structure and improve the performance of the semiconductor structure.

[0037] Please refer to Figure 3 , a second plug 150 is formed in the second opening 132.

[0038] As the process node is further reduced, the critical dimensions of the first conductive layer 110 and the resistance layer 120 are reduced, and the device density is increased, resulting in a reduction in the critical dimensions of the first opening 131 and the second opening 132 and a reduction in the spacing between the first opening 131 and the second opening 132. This makes the manufacturing process of forming the first opening 131 and the second opening 132 with different mask layers complex, with a small process window and high process difficulty.

[0039] In the above method, in order to simplify the manufacturing process of the semiconductor structure, the patterns of multiple photolithography layers are transferred to the same mask layer, and the dielectric layer 100 is etched using the same mask layer as a mask to form the first opening 131 and the second opening 132 simultaneously. Thus, on the one hand, the number of mask layers and the number of etching steps for the dielectric layer 100 are reduced. On the other hand, after filling the materials of the first plug 140 and the second plug 150, the materials of the first plug 140 and the second plug 150 can be planarized in one planarization step, making the planarization process have fewer steps and be simple.

[0040] However, since the first opening 131 and the second opening 132 are formed simultaneously, during the process of forming the first plug 140, the surface of the resistor layer 120 is exposed. Therefore, the selective tungsten deposition process damages the resistor layer 120. On the one hand, the performance of the semiconductor structure is poor. On the other hand, it leads to poor contact between the resistor layer 120 and the second plug 150, increasing the risk of abnormal device connection in the semiconductor structure and resulting in poor reliability of the semiconductor structure. Specifically, when preprocessing the top surface of the first conductive layer 110, hydrogen and oxygen used in the preprocessing process react with the material of the resistor layer 120, causing a part of the material of the resistor layer 120 to change from titanium nitride to rich Ti. Thus, the fluorine-containing reaction gas used in the selective tungsten deposition process easily etches and damages the resistor layer 120, causing the resistor layer 120 directly below the second opening 132 (such as Figure 2 region A shown) and on both sides directly below the second opening (such as Figure 2 region B shown in the figure) to be damaged, resulting in poor contact between the second plug 150 and the resistor layer 120 (such as Figure 3 region C shown in the figure), causing poor performance and reliability of the semiconductor structure.

[0041] In summary, it is difficult to balance the performance and reliability of the semiconductor structure while reducing the manufacturing process difficulty of the semiconductor structure.

[0042] To solve the above technical problems, an embodiment of the present invention provides a semiconductor structure and a method for forming the same. Before forming the fourth conductive structure and the fifth conductive structure, a first selective film-forming process is used to form a second conductive film on the exposed surface of the first conductive layer, and a second selective film-forming process is used to form a third conductive film on the second conductive film and the exposed resistor layer surface, which can reduce the manufacturing process difficulty of the semiconductor structure while making the performance and reliability of the semiconductor structure better.

[0043] To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention is provided in conjunction with the accompanying drawings.

[0044] Figures 4 to 8 It is a schematic cross-sectional structure diagram of the semiconductor structure formation process according to an embodiment of the present invention.

[0045] Please refer to Figure 4 , a substrate 200 is provided, the substrate 200 includes a first conductive layer 240 and a resistance layer 250, and the projection of the first conductive layer 240 on the surface of the substrate 200 does not coincide with the projection of the resistance layer 250 on the substrate surface.

[0046] In this embodiment, the material of the first conductive layer 240 includes cobalt.

[0047] In this embodiment, the material of the resistance layer 250 includes titanium nitride.

[0048] In this embodiment, the substrate 200 further includes: a device structure (not shown), a first dielectric layer 210 located between the device structure and the first conductive layer 240, a second dielectric layer 220 located on the first dielectric layer 210, and an etch stop layer 230 located between the first dielectric layer 210 and the second dielectric layer 220, and the resistance layer 250 is located within the second dielectric layer 220.

[0049] The device structure includes one or all of a PMOS transistor and an NMOS transistor.

[0050] In this embodiment, the first conductive layer 240 is electrically interconnected with the device structure.

[0051] The material of the first dielectric layer 210 includes one or a combination of more of silicon oxide, silicon nitride, silicon carbide, silicon carbon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbonitride, and silicon carbon oxynitride.

[0052] In this embodiment, the material of the first dielectric layer 210 includes silicon oxide.

[0053] The material of the second dielectric layer 220 includes one or a combination of more of silicon oxide, silicon nitride, silicon carbide, silicon carbon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbonitride, and silicon carbon oxynitride.

[0054] In this embodiment, the material of the second dielectric layer 220 includes silicon oxide.

[0055] In this embodiment, the resistance layer 250 is also located on the surface of the etch stop layer 230.

[0056] The function of the etch stop layer 230 is, on the one hand, to protect the first dielectric layer 210 and the first conductive layer 240 during the formation of the resistor layer 250, reducing the damage to the first dielectric layer 210 and the first conductive layer 240 caused by the process of forming the resistor layer 250. On the other hand, as an etch stop layer for the subsequent formation of the first opening, it reduces the risk of over-etching the first conductive layer 240.

[0057] The material of the etch stop layer 230 is different from that of the first dielectric layer 210, and the material of the etch stop layer 230 is different from that of the second dielectric layer 220.

[0058] The material of the etch stop layer 230 includes one or a combination of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbonitride, and silicon carbon oxynitride.

[0059] In this embodiment, the material of the etch stop layer 230 includes silicon nitride.

[0060] In this embodiment, the thickness of the etch stop layer 230 is above 10 angstroms.

[0061] If the thickness of the etch stop layer 230 is too small, it is easily consumed during the subsequent etching process of forming the first opening to expose the first conductive layer 240, causing damage to the first conductive layer 240. Therefore, the etch stop layer 230 has an appropriate thickness, that is, choosing the thickness of the etch stop layer 230 to be above 10 angstroms can further reduce the risk of damaging the first conductive layer during the etching process of forming the first opening, improving the performance and reliability of the semiconductor structure.

[0062] In this embodiment, the method of forming the first conductive layer 240 and the etch stop layer 230 includes: forming a first conductive opening (not shown) in the first dielectric layer 210; forming a first conductive film in the first conductive opening and on the surface of the first dielectric layer; planarizing the first conductive film until the surface of the first dielectric layer 210 is exposed to form the first conductive layer 240; forming an etch stop layer 230 on the surface of the first dielectric layer 210 and the surface of the first conductive layer 240.

[0063] The process of forming the first conductive film is at least one of metal electroplating process, chemical vapor deposition process, atomic layer deposition process, and selective metal growth process.

[0064] In this embodiment, the method of forming the resistor layer 250 and the second dielectric layer 220 includes: forming a device material layer (not shown) on the surface of the etch stop layer 230; patterning the device material layer to form the resistor layer 250; forming a second dielectric layer 220 on the surface of the etch stop layer 230 and the surface of the resistor layer 250.

[0065] Please refer to Figure 5 , a first opening 261 is formed in the substrate 200, and the surface of the first conductive layer 240 is exposed at the bottom of the first opening 261; a second opening 262 is formed in the substrate 200, and the surface of the resistor layer 250 is exposed at the bottom of the second opening 262.

[0066] Specifically, the first opening 261 penetrates through the etch stop layer 230 so that the surface of the first conductive layer 240 is exposed by the first opening 261.

[0067] The first opening 261 provides space for subsequent formation of the second conductive film, the third conductive film, and the fourth conductive structure.

[0068] The second opening 262 provides space for subsequent formation of the third conductive film and the fifth conductive structure.

[0069] In this embodiment, by forming the first opening 261 and the second opening 262 before subsequent formation of the fourth conductive structure and the fifth conductive structure, the patterns of the first opening 261 and the second opening 262 can be transferred through one mask layer. Therefore, the number of mask layers in the semiconductor manufacturing process is reduced, and the number of etching steps for the second dielectric layer 220 is reduced. Thus, the manufacturing process difficulty of the semiconductor structure is lowered.

[0070] Specifically, the method for forming the first opening 261 and the second opening 262 includes: forming a mask layer 263 on the surface of the second dielectric layer 220; forming a first opening photoresist layer (not shown) on the surface of the mask layer 263, and the first opening photoresist layer exposes at least part of the surface of the mask layer 263 on the first conductive layer 240; using the first opening photoresist layer as a mask, etching the mask layer 263 until the surface of the second dielectric layer 220 is exposed, and forming a first mask opening 264 in the mask layer 263; forming a second opening photoresist layer (not shown) on the surface of the mask layer 263, and the second opening photoresist layer exposes at least part of the surface of the mask layer 263 on the resistor layer 250; using the second opening photoresist layer as a mask, etching the mask layer 263 until the surface of the second dielectric layer 220 is exposed, and forming a second mask opening 265 in the mask layer 263; after forming the first mask opening 264 and the second mask opening 265, using the mask layer 263 as a mask, etching the second dielectric layer 220 and the etch stop layer 230 until the surfaces of the first conductive layer 240 and the resistor layer 250 are exposed to form the first opening 261 and the second opening 262.

[0071] The process of etching the second dielectric layer 220 and the etch stop layer 230 includes one or a combination of two of a dry etching process and a wet etching process.

[0072] In this embodiment, a dry etching process is used to etch the second dielectric layer 220 and the etch stop layer 230, which is beneficial to improving the morphology of the formed first opening 261 and second opening 262, thereby improving the performance of the formed semiconductor structure.

[0073] It should be understood that according to the actual process step sequence requirements, the first mask opening 264 can be formed before the second mask opening 265, and the first mask opening 264 can also be formed before the second mask opening 265.

[0074] In other embodiments, the method for forming the first opening and the second opening includes: forming a mask layer on the surface of the second dielectric layer; forming an opening photoresist layer on the surface of the mask layer, and the opening photoresist layer exposes at least part of the surface of the mask layer on the first conductive layer and the resistance layer; using the opening photoresist layer as a mask to etch the mask layer until the surface of the second dielectric layer is exposed, and forming a first mask opening and a second mask opening in the mask layer; after forming the first mask opening and the second mask opening, using the mask layer as a mask to etch the second dielectric layer and the etch stop layer until the surfaces of the first conductive layer and the resistance layer are exposed.

[0075] In this embodiment, after forming the first opening 261 and the second opening 262, the mask layer 263 is removed.

[0076] Please continue to refer to Figure 5 , after forming the first opening 261 and the second opening 262, a pretreatment step is performed on the surface of the exposed first conductive layer 240 to remove the native oxide film, residual contaminants, etc. on the surface of the first conductive layer 240.

[0077] In this embodiment, hydrogen and oxygen used in the pretreatment step react with the material of the resistance layer 250, causing a part of the material of the resistance layer 250 to change from titanium nitride to titanium-rich.

[0078] Please refer to Figure 6 , a first selective film formation process is used to form a second conductive film 271 on the surface of the exposed first conductive layer 240.

[0079] The function of the second conductive film 271 is to protect the first conductive layer 240 during the subsequent formation of the third conductive film, so as to avoid damage such as etching and corrosion of the material of the first conductive layer 240 caused by the reaction gas in the process of forming the third conductive film. For example, in the process of forming the third conductive film, when the reaction gas contains chlorine, etching and corrosion of the material (cobalt) of the first conductive layer 240.

[0080] In this embodiment, the material of the second conductive film 271 includes fluorine-containing tungsten. Specifically, the material of the second conductive film 271 includes fluorine-containing tungsten, which means that the material of the second conductive film 271 includes tungsten, and the material of the second conductive film 271 contains fluorine element.

[0081] In this embodiment, the first selective film forming process includes a selective metal deposition process.

[0082] Specifically, the reaction gas used in the selective metal deposition process includes tungsten hexafluoride, so that the material of the second conductive film 271 contains fluorine element.

[0083] In this embodiment, since part of the material of the resistor layer 250 is converted from titanium nitride to titanium-rich, the fluorine in the tungsten hexafluoride is easy to etch and consume the resistor layer 250, and a resistor opening 251 connected to the bottom of the second opening 262 is formed in the resistor layer 250. However, since the purpose of forming the second conductive film 271 is to cover the exposed surface of the first conductive layer 240 by the second conductive film 271, the first conductive layer 240 is protected in the subsequent process of forming the third conductive film. Therefore, the thickness of the second conductive film 271 can be relatively small, and the thickness of the second conductive film 271 can be adjusted according to the degree of consumption of the resistor layer 250 by the fluorine in the tungsten hexafluoride. Therefore, the first selective film forming process has little consumption of the resistor layer 250, the depth of the resistor opening 251 is small, and the material of the resistor layer 250 on both sides directly below the second opening 262 is not easily consumed. As a result, the subsequent resistor layer 250 can form a good contact with the fifth conductive structure, so that the reliability of the semiconductor structure is better. In this embodiment, in a direction perpendicular to the substrate surface, the thickness of the second conductive film 271 is greater than 2 nanometers. Meanwhile, the thickness of the second conductive film 271 is less than the thickness of the resistance layer 250 .

[0084] The thickness of the second conductive film 271 is too small, and the material continuity of the second conductive film 271 formed on the exposed surface of the first conductive layer 240 is poor, which makes it difficult for the second conductive film 271 to completely cover the surface of the first conductive layer 240, resulting in poor protection effect of the second conductive film 271 on the first conductive layer 240. If the thickness of the second conductive film 271 is too large, the first selective film forming process will cause great loss to the resistance layer 250, which is not conducive to forming a good contact between the resistance layer 250 and the fifth conductive structure, and thus, is not conducive to improving the reliability of the semiconductor structure. Therefore, selecting a suitable thickness of the second conductive film 271, that is, selecting the thickness of the second conductive film 271 to be more than 2 nanometers, and the thickness of the second conductive film 271 is less than the thickness of the resistance layer 250, can take into account both the protection effect on the first conductive layer 240 and the reliability of the semiconductor structure.

[0085] Preferably, the thickness of the second conductive film 271 is below 5 nanometers to better reduce the large loss of the first selective film formation process to the resistance layer 250.

[0086] Preferably, the depth D of the resistance opening 251 is less than one-half of the thickness H of the resistance layer 250 (as Figure 5 shown), so as to better reduce the lateral expansion of the resistance opening 251 and better reduce the risk of the material of the resistance layer 250 on both sides directly below the second opening 262 being lost.

[0087] In this embodiment, the process parameters of the first selective film formation process include: the gases used include WF6 and H2. Among them, the flow rate range of WF6 is 20 standard milliliters per minute to 100 standard milliliters per minute, and the flow rate range of H2 is 5000 standard milliliters per minute to 8000 standard milliliters per minute; the temperature range is 300 degrees Celsius to 400 degrees Celsius; the pressure range is 5 Torr to 12 Torr.

[0088] By adopting the process parameters of the first selective film formation process, it is possible to make the thickness of the formed second conductive film 271 within the thickness range of the second conductive film 271. Thus, the protection effect on the first conductive layer 240 and the reliability of the semiconductor structure are taken into account.

[0089] Please refer to Figure 7 , and adopt the second selective film formation process to form a third conductive film 272 on the surface of the second conductive film 271 and the exposed resistance layer 250. The reaction gas used in the second selective film formation process is different from the reaction gas used in the first selective film formation process.

[0090] Since the second conductive film 271 is formed by the first selective film formation process respectively, and the third conductive film 272 is formed by the second selective film formation process, and moreover, the reaction gas used in the second selective film formation process is different from that used in the first selective film formation process. Therefore, not only the formation process steps of the second conductive film 271 and the third conductive film 272 are few, the process window is large and it is easy to implement. At the same time, the second conductive film 271 and the third conductive film 272 can have different characteristics and formation processes, so that the performance and reliability of the semiconductor structure are better.

[0091] Specifically, through the second conductive film 272, the first conductive layer 240 can be protected during the formation of the third conductive film 272, reducing the risk of damage and loss to the first conductive layer 240 caused by the process of forming the third conductive film 272. At the same time, through the third conductive film 272, the resistance layer 250 can be protected during the subsequent formation of the fourth conductive structure and the fifth conductive structure, reducing the risk of damage and loss to the resistance layer 250 caused by the processes of forming the fourth conductive structure and the fifth conductive structure. Thus, on the one hand, the contact resistance of the semiconductor structure is small and the performance of the semiconductor structure is good. On the other hand, the first conductive layer 240 can form good contact with the structure before the fourth conductive structure through the second conductive film 271 and the third conductive film 272. At the same time, the resistance layer 250 can form good contact with the fifth conductive structure through the third conductive film 272, making the reliability of the semiconductor structure good.

[0092] Moreover, since the third conductive film 272 is formed on the surface of the second conductive film 271 and the exposed resistance layer 250, the same base material is provided for the subsequent formation of the fourth conductive structure and the fifth conductive structure, enabling the fourth conductive structure and the fifth conductive structure to be formed simultaneously by the same selective metal deposition process, further simplifying the formation process of the semiconductor structure.

[0093] In this embodiment, the material of the third conductive film 272 includes fluorine-free tungsten (FFW, Fluorine Free W). Specifically, the fact that the material of the third conductive film 272 includes fluorine-free tungsten means that the material of the third conductive film 272 includes tungsten and does not contain fluorine elements.

[0094] In this embodiment, the second selective film formation process includes a selective atomic layer deposition process. The third conductive film 272 formed by the selective atomic layer deposition process has better compactness, so it can better protect the resistance layer 250.

[0095] Specifically, the reaction gas used in the selective atomic layer deposition process includes tungsten pentachloride. Thus, the formation of the material of the third conductive film 272 including fluorine-free tungsten is achieved.

[0096] Moreover, since the selective film-forming process for forming the fluorine-free tungsten includes a selective atomic layer deposition process, and the reaction gas used in the selective atomic layer deposition process includes tungsten pentachloride, this selective film-forming process has high selectivity for materials and is extremely easy to grow on the surfaces of metals such as titanium nitride, fluorine-containing tungsten, and aluminum. Therefore, when the material of the resistance layer 250 includes the above materials, the material of the third conductive film 272 can be formed on the surfaces of the second conductive film 271 and the resistance layer 250 with high selectivity through the selective atomic layer deposition process. Thus, the process for forming the third conductive film 272 has fewer steps, a large process window, and is easy to implement.

[0097] In this embodiment, the thickness of the third conductive film 272 is 2 nanometers or more. Thereby, the material continuity of the third conductive film 272 is ensured, which is beneficial for the third conductive film 272 to completely cover the surface of the resistance layer 250, so as to improve the protection ability of the third conductive film 272 for the resistance layer 250 when the fourth conductive structure and the fifth conductive structure are formed subsequently, and reduce the risk of loss of the resistance layer 250 caused by the processes for forming the fourth conductive structure and the fifth conductive structure subsequently.

[0098] Meanwhile, in this embodiment, the thickness of the third conductive film 272 is less than the depth of the first opening 261, and the thickness of the third conductive film 272 is less than the depth of the second opening 262.

[0099] The deposition rate of the material by the selective atomic layer deposition process is relatively low. If the third conductive film 272 is too thick, it will not only cause material waste, but also increase the process time and reduce the process efficiency. Therefore, when selecting a suitable thickness range for the third conductive film 272, that is, the thickness of the third conductive film 272 is 2 nanometers or more, and the thickness of the third conductive film 272 is less than the depth of the first opening 261 and less than the depth of the second opening 262, it can not only enable the third conductive film 272 to better protect the resistance layer 250, but also avoid material waste and improve the process efficiency.

[0100] In this embodiment, the parameters of the second selective film-forming process further include: the reaction gas used further includes hydrogen; the reaction temperature is 350 °C to 450 °C.

[0101] In this embodiment, the parameters of the selective atomic layer deposition process further include: the gas used further includes nitrogen.

[0102] Specifically, during the selective atomic layer deposition process, tungsten pentachloride is introduced into the cavity several times. Among them, the duration of each introduction of tungsten pentachloride is from 0.1 second to 2 seconds. After each introduction of tungsten pentachloride, nitrogen is introduced for purging to discharge the unadsorbed tungsten pentachloride from the cavity. Among them, the duration of each introduction of nitrogen is from 0.5 second to 3 seconds. After each removal of the unadsorbed tungsten pentachloride, hydrogen is continuously introduced to react with the adsorbed tungsten pentachloride to form a partial third conductive film 272 material including tungsten without fluorine. Among them, the duration of each introduction of hydrogen is from 0.5 second to 3 seconds.

[0103] By adopting the process parameters of the second selective film-forming process, the thickness of the formed third conductive film 272 can be within the thickness range. Thus, the protection effect on the resistance layer 250 and the process efficiency are taken into account.

[0104] Please refer to Figure 8 , after the third conductive film 272 is formed, a fourth conductive structure 281 is formed in the first opening 261, and a fifth conductive structure 282 is formed in the second opening 262.

[0105] Since the fourth conductive structure 281 and the fifth conductive structure 282 are formed after the first opening 261 and the second opening 262 are formed. Therefore, not only can the patterns of the first opening 261 and the second opening 262 be transferred through one mask layer (mask layer 263), reducing the number of mask layers and the number of etching steps for the second dielectric layer 220. And, the materials of the fourth conductive structure 281 and the fifth conductive structure 282 can be planarized in one planarization step to form the fourth conductive structure 281 and the fifth conductive structure 282. Thus, the manufacturing process difficulty of the semiconductor structure is reduced.

[0106] On this basis, since before the fourth conductive structure 281 and the fifth conductive structure 282 are formed, the second conductive film 271 is formed on the exposed surface of the first conductive layer 240 by using the first selective film-forming process, and the third conductive film 272 is formed on the surface of the second conductive film 272 and the exposed surface of the resistance layer 250 by using the second selective film-forming process, and the reaction gases used in the first selective film-forming process and the second selective film-forming process are different. Therefore, not only the formation process steps of the second conductive film 271 and the third conductive film 272 are few, the process window is large and it is easy to implement, but also the second conductive film 271 and the third conductive film 272 can have different characteristics (materials, shapes, thicknesses, etc.) and formation processes, realizing the reduction of the losses of the first conductive layer 240 and the resistance layer 250, as well as the protection of the first conductive layer 240 and the resistance layer 250, making the performance and reliability of the semiconductor structure better.

[0107] In this embodiment, the method for forming the fourth conductive structure 281 and the fifth conductive structure 282 includes: after forming the third conductive film 272, a selective metal deposition process is used to deposit a conductive material layer (not shown) in the first opening 261 and the second opening 262, and the surface of the conductive material layer is higher than the surface of the second dielectric layer 220; a sacrificial layer (not shown) is formed on the surface of the second dielectric layer 220 and the surface of the conductive material layer, and the surface of the sacrificial layer is higher than the surface of the conductive material layer; the sacrificial layer and the conductive material layer are planarized until the surface of the second dielectric layer 220 is exposed.

[0108] The sacrificial layer provides sacrificial material for the planarization process. It should be understood that the sacrificial layer will be removed during the planarization process.

[0109] In this embodiment, the planarization process includes a chemical mechanical polishing process.

[0110] In this embodiment, the materials of the fourth conductive structure 281 and the fifth conductive structure 282 include tungsten.

[0111] Specifically, in the selective metal deposition process for forming the fourth conductive structure 281 and the fifth conductive structure 282 in this embodiment, the reaction gas used includes tungsten hexafluoride, and the materials of the fourth conductive structure 281 and the fifth conductive structure 282 also contain fluorine elements.

[0112] Through the third conductive film 272, the risk of loss of fluorine in the reaction gas tungsten hexafluoride to the resistance layer 250 in the selective metal deposition process for forming the fourth conductive structure 281 and the fifth conductive structure 282 can be reduced, so that a good contact can be formed between the resistance layer 250 and the fifth conductive structure 282.

[0113] In other embodiments, the process for forming the fourth conductive structure and the fifth conductive structure includes: an electroplating process or a chemical vapor deposition process.

[0114] In other embodiments, the materials of the fourth conductive structure and the fifth conductive structure include: one or a combination of copper, cobalt, titanium nitride, titanium, tantalum, tantalum nitride, ruthenium, ruthenium nitride, and aluminum.

[0115] Correspondingly, an embodiment of the present invention further provides a semiconductor structure formed by the above method. Please continue to refer to Figure 8 The semiconductor structure includes: a substrate 200 (such as Figure 3As shown, the substrate 200 includes a first conductive layer 240 and a device structure (not shown). The substrate 200 further includes a first dielectric layer 210 located between the first conductive layer 240 and the device structure, a second dielectric layer 220 located on the first dielectric layer 210, and an etch stop layer 230 located between the first dielectric layer 210 and the second dielectric layer 220. A resistance layer 250 is provided in the second dielectric layer 220; a first opening 261 (as shown in Figure 5 shown) is provided in the second dielectric layer 220 and the etch stop layer 230, and the bottom of the first opening 261 exposes the first conductive layer 240; a second opening 262 (as shown in Figure 5 shown) is provided in the second dielectric layer 220, and the bottom of the second opening 262 communicates with a resistance opening 251 (as shown in Figure 6 shown) in the resistance layer 250; a second conductive film 271 is located on the top surface of the first conductive layer 240 exposed at the bottom of the first opening 261; a third conductive film 272 is located on the surface of the second conductive film 271 in the first opening 261, and the third conductive film 272 is also located in the resistance opening 251 and the second opening 262; a fourth conductive structure 281 is located on the surface of the third conductive film 272 in the first opening 261; a fifth conductive structure 282 is located on the surface of the third conductive film 272 in the second opening 262.

[0116] The device structure includes one or both of a PMOS transistor and an NMOS transistor.

[0117] The projection of the first conductive layer 240 on the surface of the substrate 200 does not coincide with the projection of the resistance layer 250 on the substrate surface.

[0118] In this embodiment, the projection of the first conductive layer 240 on the surface of the substrate 200 is within a first projection range, and the first projection is the projection of the bottom surface of the first opening 261 on the surface of the substrate 200.

[0119] In this embodiment, the depth D (as shown in Figure 6 shown) of the resistance opening 251 is less than one-half of the thickness H (as shown in Figure 5 shown) of the resistance layer 250.

[0120] In this embodiment, the material of the first conductive layer 240 includes cobalt.

[0121] In this embodiment, the resistance layer 250 is also located on the surface of the etch stop layer 230.

[0122] In this embodiment, the material of the resistance layer 250 includes titanium nitride.

[0123] In this embodiment, the first conductive layer 240 is electrically interconnected with the device structure.

[0124] The material of the first dielectric layer 210 includes one or a combination of more than one of silicon oxide, silicon nitride, silicon carbide, silicon carbon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbonitride, and silicon carbon oxynitride.

[0125] In this embodiment, the material of the first dielectric layer 210 includes silicon oxide.

[0126] The material of the second dielectric layer 220 includes one or a combination of more than one of silicon oxide, silicon nitride, silicon carbide, silicon carbon oxide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbonitride, and silicon carbon oxynitride.

[0127] In this embodiment, the material of the second dielectric layer 220 includes silicon oxide.

[0128] In this embodiment, the material of the second conductive film 271 includes fluorine-containing tungsten.

[0129] In this embodiment, in the direction perpendicular to the substrate surface, the thickness of the second conductive film 271 is more than 2 nanometers, and the thickness of the second conductive film 271 is less than the thickness of the resistance layer 250. Preferably, the thickness of the second conductive film 271 is less than 5 nanometers.

[0130] In this embodiment, the material of the third conductive film 272 includes tungsten without fluorine.

[0131] In this embodiment, the thickness of the third conductive film 272 is more than 2 nanometers, and the top surface of the third conductive film 272 is lower than the top surface of the second dielectric layer 220.

[0132] In this embodiment, the materials of the fourth conductive structure 281 and the fifth conductive structure 282 include tungsten.

[0133] Specifically, the materials of the fourth conductive structure 281 and the fifth conductive structure 282 also contain fluorine elements.

[0134] In other embodiments, the process for forming the fourth conductive structure and the fifth conductive structure includes: a metal electroplating process or a chemical vapor deposition process.

[0135] In other embodiments, the materials of the fourth conductive structure and the fifth conductive structure include: one or a combination of more than one of copper, cobalt, titanium nitride, titanium, tantalum, tantalum nitride, ruthenium, ruthenium nitride, and aluminum.

[0136] The material of the etch stop layer 230 is different from the material of the first dielectric layer 210, and the material of the etch stop layer 230 is different from the material of the second dielectric layer 220.

[0137] The material of the etching stop layer 230 includes one or a combination of more of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbonitride, and silicon carbon oxynitride.

[0138] In this embodiment, the material of the etching stop layer 230 includes silicon nitride.

[0139] In this embodiment, the thickness of the etching stop layer 230 is above 10 angstroms.

[0140] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that, Comprising: A substrate, the substrate includes a first conductive layer and a device structure, the substrate further includes a first dielectric layer located between the first conductive layer and the device structure, a second dielectric layer located on the first dielectric layer, and an etch stop layer located between the first dielectric layer and the second dielectric layer. A resistance layer is provided in the second dielectric layer, and the material of the resistance layer includes titanium nitride; A first opening located in the second dielectric layer and the etch stop layer, the bottom of the first opening exposes the first conductive layer; A second opening located in the second dielectric layer, the bottom of the second opening communicates with a resistance opening in the resistance layer; A second conductive film, the second conductive film is located in a part of the first opening, covering the top surface of the first conductive layer exposed at the bottom of the first opening, and the material of the second conductive film includes tungsten fluoride; A third conductive film, the third conductive film is located in a part of the first opening, covering the surface of the second conductive film in the first opening, the third conductive film is also located in the resistance opening and a part of the second opening, and the material of the third conductive film includes tungsten without fluoride; A fourth conductive structure, the fourth conductive structure is located on the surface of the third conductive film in the first opening; A fifth conductive structure, the fifth conductive structure is located on the surface of the third conductive film in the second opening; Wherein, the second conductive film and the third conductive film are formed before the fourth conductive structure and the fifth conductive structure; the fourth conductive structure and the fifth conductive structure are formed by a selective metal deposition process, and the reaction gas includes tungsten hexafluoride.

2. The semiconductor structure according to claim 1, characterized in that, The depth of the resistance opening is less than one-half of the thickness of the resistance layer.

3. The semiconductor structure according to claim 1, characterized in that, The projection of the first conductive layer on the substrate surface is within a first projection range, and the first projection is the projection of the bottom surface of the first opening on the substrate surface.

4. The semiconductor structure according to claim 1, characterized in that, The thickness of the third conductive film is 2 nanometers or more.

5. The semiconductor structure according to claim 1, characterized in that, The material of the first conductive layer includes cobalt, the material of the fourth conductive structure includes tungsten, and the material of the fifth conductive structure includes tungsten.

6. A method for forming a semiconductor structure, characterized in that, Comprising: Providing a substrate, the substrate includes a first conductive layer and a device layer, and there is no overlap between the projection of the first conductive layer on the substrate surface and the projection of the device layer on the substrate surface; Forming a first opening in the substrate, the bottom of the first opening exposes the surface of the first conductive layer; Forming a second opening in the substrate, the bottom of the second opening exposes the surface of the resistance layer, and the material of the resistance layer includes titanium nitride; Using a first selective film formation process, forming a second conductive film on the exposed surface of the first conductive layer. During the process of forming the second conductive film on the exposed surface of the first conductive layer, a resistance opening communicating with the bottom of the second opening is formed in the resistance layer, and the material of the second conductive film includes tungsten fluoride; Using a second selective film formation process, forming a third conductive film on the surface of the second conductive film and the exposed resistance layer. The reaction gas used in the second selective film formation process is different from that in the first selective film formation process, and the material of the third conductive film includes tungsten without fluoride; After forming the third conductive film, forming a fourth conductive structure in the first opening; After forming the third conductive film, forming a fifth conductive structure in the second opening; Among them, the fourth conductive structure and the fifth conductive structure are formed by a selective metal deposition process, and the reaction gas includes tungsten hexafluoride.

7. The method for forming a semiconductor structure according to claim 6, characterized in that, The first selective film formation process includes a selective metal deposition process.

8. The method for forming a semiconductor structure according to claim 7, characterized in that, The reaction gas used in the selective metal deposition process includes tungsten hexafluoride.

9. The method for forming a semiconductor structure according to claim 6, characterized in that, The second selective film formation process includes a selective atomic layer deposition process.

10. The method for forming a semiconductor structure according to claim 9, characterized in that, The reaction gas used in the selective atomic layer deposition process includes tungsten pentachloride.

11. The method for forming a semiconductor structure according to claim 10, characterized in that, The parameters of the second selective film formation process further include: the reaction gas used further includes hydrogen; the reaction temperature is 350 °C to 450 °C.

12. The method for forming a semiconductor structure according to claim 6, characterized in that,The substrate further includes: a device structure, a first dielectric layer located between the first conductive layer and the device structure, and a second dielectric layer located on the first dielectric layer, and the resistance layer is located within the second dielectric layer.

13. The method for forming a semiconductor structure according to claim 12, wherein, The substrate further includes: an etch stop layer located between the first dielectric layer and the second dielectric layer; the first opening penetrates through the etch stop layer.

14. The method for forming a semiconductor structure according to claim 6, wherein, The thickness of the second conductive film is more than 2 nanometers, and the thickness of the second conductive film is less than the thickness of the resistance layer.

15. The method for forming a semiconductor structure according to claim 6, wherein, The thickness of the third conductive film is more than 2 nanometers, and the thickness of the third conductive film is less than the depth of the first opening and less than the depth of the second opening.

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