Virtual space vector elimination method for common mode voltage of H14 structure T-type three-level inverter

Abstract

The method for eliminating the common-mode voltage of the T-type three-level inverter with the H14 structure in the present invention. In this elimination method, two fully controlled switching devices are added to the DC side of the inverter to form a T-type three-level inverter with the H14 structure. By synthesizing new virtual vectors from the vectors with zero common-mode voltage in four modes of the T-type three-level inverter with the H14 structure, a new virtual vector space diagram of the T-type three-level inverter is constructed to judge the position of the reference voltage V ref , obtain the switching state output sequence, and finally control the switching states of the switches in each phase of the T-type three-level inverter according to the switching state output sequence. In the present invention, vectors with non-zero common-mode voltage are avoided, so that the common-mode voltage generated when all virtual vectors act is 0, and the common-mode voltage output by the T-type three-level inverter can be effectively eliminated.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronics, and more specifically relates to a method for eliminating common-mode voltage virtual space vector of an H14 structure T-type three-level inverter. Background Art

[0002] Compared with the NPC type three-level inverter, the T-type three-level inverter has two fewer clamping diodes per phase. When the positive level and negative level output are in progress, the number of devices through which the current flows is reduced, thereby reducing the conduction loss.

[0003] However, the fast switching of the switching power devices of the T-type three-level inverter will generate high-frequency common-mode voltage. In the motor drive system, the high-frequency common-mode voltage will also induce high-frequency bearing voltage under the action of the parasitic capacitance inside the motor. When the bearing voltage is greater than the oil film breakdown threshold voltage, the oil film will be broken down and instantaneous discharge will occur. The large current pulse generated will release huge heat, which will corrode the metal near the breakdown point and even directly damage the bearing.

[0004] In view of the high common-mode voltage problem of T-type three-level inverter, scholars at home and abroad have proposed many improvement methods. They are mainly divided into improved inverter modulation strategy, model predictive control strategy, adding filtering device, and improved topology structure. However, although improved inverter modulation strategies such as RCVDPWM, AZSPWM, NSPWM, etc. can suppress the common-mode voltage, they do not completely suppress the common-mode voltage. The model predictive control strategy also has the problem of reducing system performance and increasing the amount of calculation. Adding filtering devices and improving filters or auxiliary circuits in the topology structure will increase a lot of costs. Therefore, the present invention considers a method for eliminating the common-mode voltage of a T-type three-level inverter. Summary of the invention

[0005] The purpose of the present invention is to propose a virtual space vector elimination method for the common-mode voltage of an H14-structured T-type three-level inverter. The method adds two fully-controlled switching devices on the DC side of the inverter to form an H14-structured T-type three-level inverter, and cooperates with a new virtual space vector modulation strategy to achieve the elimination of the output common-mode voltage of the T-type three-level inverter.

[0006] To achieve the above object, the present invention adopts the following technical solutions:

[0007] A method for eliminating common-mode voltage virtual space vector of an H14 structure T-type three-level inverter, the elimination method comprising the following steps:

[0008] Step 1: Add two fully controlled switching devices on the DC side of the T-type three-level inverter, named S d13 , S d14 According to S d13 , S d14In different switching states, the T-type three-level inverter has four operating modes, which are represented by I, II, III, and IV. The output voltage V of each voltage vector of the inverter in different modes is calculated. A , V B , V C , and calculate the common-mode voltage of each voltage vector of different vector types in different modes,

[0009] Step 2: Select the vector with zero common mode voltage according to the following rules. The specific rules are: ignore the vector with zero common mode voltage in mode 4, select only the zero vector OOOI with zero common mode voltage in mode 1 as the selected zero vector, and then select the small vectors and the middle vector with zero common mode voltage, and list the selected small vectors and the selected middle vector in the order of the sectors. Specifically:

[0010] Selected zero vector: OOOI;

[0011] Selected small vectors: PPOII, NONIII, OPPII, NNOIII, POPII, ONNIII;

[0012] Selected mid-vectors: PONI, OPNI, NPOI, NOPI, ONPI, PNOI;

[0013] In the above, P, O, and N represent the switching state of a phase of the inverter. The three letters represent the switching state of the three phases. I, II, and III represent the modes respectively. "V+switching state+mode" represents the voltage vector under the switching state of this mode.

[0014] The selected zero vector, the selected small vector, and the selected medium vector are used to synthesize a new virtual vector, also called a basic vector of the synthesized virtual vector. The virtual vector is divided into a virtual large vector V according to the size of the virtual vector. VL 、Virtual vector V VM , virtual small vector V VS , virtual small vector V VS The virtual center vector V is composed of the selected center vector of the current sector and the selected small vector adjacent to it in the counterclockwise direction. VM The virtual long vector V is synthesized by two adjacent selected mid vectors. VL is the selected mean vector;

[0015] Step 3: According to the virtual vectors obtained in step 2, a new virtual vector space diagram of the T-type three-level inverter is constructed, wherein the new virtual vector space diagram of the T-type three-level inverter is composed of 6 large sectors, wherein each sector is composed of 4 small sectors constructed by each virtual vector, with a total of V VL1 -V VL6 Six virtual large vectors, VVM1 -V VM6 Six virtual center vectors, V VS1 -V VS6 Six virtual small vectors and V0 a zero vector,

[0016] The newly constructed virtual space vector large sector 1 is defined as:

[0017]

[0018] Step 4: Calculate the boundary judgment conditions of each small sector in each large sector and give the reference voltage V ref The basis for determining the small sector in which it is located; based on the volt-second balance, calculate the synthetic reference voltage V ref The virtual vector action time is determined to determine the switching sequence within the switching cycle and eliminate the output common-mode voltage of the T-type three-level inverter.

[0019] Taking large sector 1 as an example, the boundary judgment conditions of each small sector in each large sector are set as L1, L2, L3, and L4 as the boundary judgment conditions of the small sector, and the boundary judgment conditions of each small sector in large sector 1 are obtained as follows:

[0020]

[0021] Where V α 、V β is the reference voltage V ref Components on the α-axis and the β-axis.

[0022] The reference voltage V ref The basis for determining the small sector is:

[0023]

[0024] The calculated synthetic reference voltage V ref The action time of the virtual vector is as follows: Taking large sector 1 as an example, the action time of the virtual vector in each small sector is as follows:

[0025]

[0026] T3=T s -T1-T2

[0027] Among them, T1, T2, and T3 represent the reference voltage V ref When synthesizing, the action time of the three virtual vectors is θ, which represents the reference voltage V ref Angle,

[0028] Taking the four small sectors in large sector 1 as an example, the switching sequence in two switching cycles is:

[0029] OOOI→PNOI→PONI→PPOII→PONI→PNOI→OOOI

[0030] OOOI→OPNI→PONI→PPOII→PONI→OPNI→OOOI

[0031] PNOI→PONI→OPNI→PPOII→OPNI→PONI→PNOI

[0032] PNOI→PONI→OPNI→PONI→OPNI→PONI→PNOI.

[0033] The present invention has the following beneficial effects:

[0034] The present invention synthesizes new virtual vectors for vectors with zero common-mode voltage in four modes of a T-type three-level inverter with H14 structure, forms a new virtual vector space diagram of a T-type three-level inverter, and determines the reference voltage V ref The position of the switch state output sequence is obtained, and finally the switch state of each switch in each phase of the T-type three-level inverter is controlled according to the switch state output sequence. In the present invention, the vectors with non-zero common-mode voltage are avoided, so that the common-mode voltage generated when all virtual vectors act is 0, which can effectively eliminate the common-mode voltage output by the T-type three-level inverter.

[0035] The present invention aims at eliminating the common mode voltage. The novel virtual space vector design of the present invention can also be applied to a three-level inverter with an H14 topology. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is the topology diagram of the improved T-type three-level inverter;

[0037] Figure 2 It is a flow chart of a common mode voltage elimination method of a T-type three-level inverter with an H14 structure;

[0038] Figure 3 It is a new type of virtual vector space map;

[0039] Figure 4 It is the vector position judgment diagram of large sector 1;

[0040] Figure 5 is the switching sequence diagram of each basic vector in small sector I;

[0041] Figure 6 is a common mode voltage waveform diagram of the inverter output when the present invention is not adopted;

[0042] Figure 7 The figure is a common mode voltage waveform diagram output by the inverter using the present invention. DETAILED DESCRIPTION

[0043] The following will be combined with the accompanying drawings in the implementation of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work should fall within the scope of protection of the present invention.

[0044] Example

[0045] In this embodiment, the T-type three-level inverter is a T-type three-level inverter with an H14 structure, that is, two IGBTs are added to the DC bus of the T-type three-level inverter, named S d13 , S d14 ,like Figure 1 shown.

[0046] Each phase of the T-type three-level inverter has four switch tubes, and the relationship between the output voltage and the switch tube is shown in Table 1. In Table 1, 1 indicates that the switch tube is turned on, and 0 indicates that the switch tube is turned off.

[0047] Table 1 Relationship between phase A output voltage and device conduction

[0048]

[0049] According to the auxiliary switch S d13 and S d14 The T-type three-level inverter has four operating modes in different switching states:

[0050] Mode 1, S d13 and S d14 All are turned on, and the T-type three-level inverter operates in the traditional inverter mode.

[0051] Mode 2, S d13 Shutdown and S d14 The inverter operates when it is disconnected from the DC link point P.

[0052] Mode 3, S d13 On and S d14 Shut down, the inverter operates with point N of the DC link disconnected.

[0053] Point P refers to the relative positive pole of the voltage-dividing capacitor on the inverter DC power supply, and the same applies to point N.

[0054] Mode 4, S d13 and S d14 When the inverter is turned off, the connection between the DC side and the inverter is completely disconnected, and the inverter is only electrically connected to the AC side.

[0055] Among them, four modes switch Sd13 , S d14 The driving signal is determined by the control function F(V a ,V b ,V c ) generates the control function F(V a ,V b ,V c ) is:

[0056]

[0057] Where V i Indicates the i-phase switch change (i = a, b, c), 2, 1, 0 represent the three states of P, O, and N respectively, and the value range of F is

[0058] F(V a ,V b ,V c ,)={0,1,2,3,4,5,6}

[0059] Comparing the switching state and the F value range, the corresponding F when the inverter is in the switching state of six positive small vectors is:

[0060]

[0061] S d13 , S d14 The driving signal is g 13 , g 14 It is expressed as:

[0062]

[0063] For the convenience of expression, the mode 1 under the H14 topology is recorded as the I state; the mode 2 under the H14 topology is recorded as the II state; and the mode 3 under the H14 topology is recorded as the III state. For example, the OOO in the mode 1 is expressed as OOOI, the PPO vector in the mode 2 is expressed as PPOII, and the ONN vector in the mode 3 is expressed as ONNIII.

[0064] Calculate the output voltage V of each voltage vector of the inverter in four modes A , V B , V C .

[0065] Take the PPPII working state as an example. At this time, the auxiliary switch S d13 Shutdown and S d14 The A phase is connected to the midpoint. At this time, the output voltage of the inverter is V A =0, and the same goes for the other two.

[0066] According to the voltage vector output voltage V of the T-type three-level inverterA , V B , V C , calculate the common-mode voltage of each voltage vector, the calculation formula is:

[0067] V CMV =(V A +V B +V C ) / 3

[0068] The following table shows the common mode voltage of the T-type three-level inverter under different switching states.

[0069] Table 2 Common-mode voltage of H14 structure T-type three-level inverter under different switching states

[0070]

[0071] P, O, and N represent the switching state of a phase of the inverter. See Table 1 for details. The combination of three letters represents the switching state of the three phases. At this time, the inverter output voltage V A 、V B 、V C can be determined, so the common-mode voltage in the table can be calculated according to the common-mode voltage formula. Mode 1 is the original common-mode voltage value, and the inverter output voltage V under modes 2, 3, and 4 is A 、V B 、V C The calculation needs to be re-derived, and the specific results are shown in Table 1. dc is the voltage on the DC side of the inverter.

[0072] In order to eliminate the common mode voltage, a vector with a common mode voltage of zero is used to synthesize a new virtual zero vector, a virtual large vector, a virtual small vector, and a virtual middle vector.

[0073] Ignore the vector with zero common-mode voltage in mode 4, select only the zero vector OOOI with zero common-mode voltage in mode 1 as the selected zero vector, and then select the small vectors and the middle vector with zero common-mode voltage remaining, and list the selected small vectors and the selected middle vectors in the order of sectors. In the following, P, O, and N represent the switching state of a phase of the inverter, and the three-letter combination represents the switching state of the three phases. I, II, and III represent the modes respectively.

[0074] Selected zero vector: OOOI;

[0075] Selected small vectors: PPOII, NONIII, OPPII, NNOIII, POPII, ONNIII;

[0076] Selected mid vectors: PONI, OPNI, NPOI, NOPI, ONPI, PNOI.

[0077] The design of the virtual vector is to synthesize a new virtual vector by selecting a vector with a common mode voltage of zero. The virtual vector is synthesized by the basic vector. The above selected vector is called the basic vector of the synthesized virtual vector. According to the size of the virtual vector, the virtual vector is divided into a virtual large vector V VL 、Virtual vector V VM , virtual small vector V VS , virtual small vector V VS The virtual center vector V is composed of the center vector with zero common mode voltage in the current sector and the small vector with zero common mode voltage adjacent to it in the counterclockwise direction. VM The virtual long vector V is synthesized by two adjacent middle vectors with zero common mode voltage. VL The synthesis of the virtual vector avoids the participation of the vector whose common mode voltage is not zero, thus eliminating the common mode voltage.

[0078] The newly constructed virtual space vector large sector 1 is defined as:

[0079]

[0080] Where the virtual small vector V VS1 The selected middle vector PONI and the selected small vector PPOII are synthesized. The common mode voltages generated by the selected middle vector PONI and the selected small vector PPOII are both zero, so the virtual small vector V VS1 The common mode voltage generated is zero. Virtual small vector V VS1 The size of the virtual vector V is 1 / 2 times the selected center vector PONI. VM1 The virtual center vector V is synthesized by the adjacent selected center vector PONI and the selected center vector OPNI. The common mode voltage generated by the selected center vector PONI and the selected center vector OPNI is zero, so the virtual center vector V VM1 The common mode voltage generated is zero. The virtual vector V VM1 The size of the selected mid vector PONI times. Virtual large vector V VL1 For the selected middle vector PONI, the virtual large vector V VL1 The resulting common-mode voltage is also zero.

[0081] According to the obtained virtual vector, a new virtual vector space diagram of the T-type three-level inverter is constructed, wherein the new virtual vector space diagram of the T-type three-level inverter is composed of 6 large sectors, wherein each sector is composed of 4 small sectors constructed by each virtual vector, and a total of V VL1 -V VL6 Six virtual large vectors, V VM1 -V VM6 Six virtual center vectors, V VS1 -VVS6 Six virtual small vectors and one zero vector V0, the new virtual vector space is shown in the figure Figure 3 shown.

[0082] Taking large sector 1 as an example, set L1, L2, L3, and L4 as the boundary judgment conditions of the four small sectors in large sector 1, such as Figure 4 As shown. According to the calculation, the boundary judgment conditions of each small sector can be obtained as follows:

[0083]

[0084] Where V α 、V β is the reference voltage V ref Components on the α-axis and the β-axis.

[0085] Reference voltage V ref The basis for determining the small sector is:

[0086]

[0087] Select the synthetic reference voltage V ref The three virtual vectors and the basic vectors required for the synthetic virtual vector.

[0088] Small sector I: V VM6 , V VS1 ,V0(V PONI , V PNOI , V OOOI , V PPOII )

[0089] Small sector II: V VM1 , V VM6 ,V0(V PONI , V PNOI , V OPNI , V OOOI )

[0090] Small sector III: V VM1 , V VM6 , V VS1 (V PONI , V PNOI , V OPNI , V PPOII )

[0091] Small sector IV: V VM1 , V VM6 , V VL1 (V PONI , V PNOI , V OPNI )

[0092] Taking small sector I as an example, the contents of the brackets are the components of VVM6 , V VS1 , the basic vector used when V0; V VM6 Synthesized from PONI and PNOI, V VS1 It is synthesized by PONI and PPOII, V0 is synthesized by OOOI; V VM6 , V VS1 , V0 is the three synthetic reference voltages V ref The virtual vector is selected to select the basic vectors involved in synthesizing the virtual vector.

[0093] According to the reference voltage V ref The action time of each virtual vector is calculated based on the position of the small sector where it is located. Among them, the action time of each virtual vector corresponding to the large sector 1 is:

[0094]

[0095] T3=T s -T1-T2

[0096] Taking small sector I as an example, the basic vector action times of the synthetic virtual vector are:

[0097]

[0098] Among them, T1, T2, and T3 represent the reference voltage V ref When synthesizing, the action time of the three virtual vectors is θ, which represents the reference voltage V ref Angle, T VM6 , T VS1 , T OOOI Are the corresponding action times of the three virtual vectors respectively.

[0099] Taking the four small sectors in large sector 1 as an example, the switching sequence within two switching cycles

[0100] Small sector I: OOOI→PNOI→PONI→PPOII→PONI→PNOI→OOOI

[0101] Small sector II: OOOI→OPNI→PONI→PPOII→PONI→OPNI→OOI

[0102] Small sector III: PNOI→PONI→OPNI→PPOII→OPNI→PONI→PNOI

[0103] Small sector IV: PNOI→PONI→OPNI→PONI→OPNI→PONI→PNOI

[0104] Figure 6This is a common-mode voltage waveform diagram of the inverter output without using the present invention. At this time, the common-mode voltage peak value output by the H14 structure T-type three-level inverter is ±1 / 6 Vdc . Figure 7 This is a common mode voltage waveform diagram of the inverter output under the present invention. At this time, the common mode voltage is basically eliminated, and only a few narrow pulses caused by the IGBT dead zone effect and switching characteristics remain. This figure shows that the method of the present invention can eliminate the common mode voltage generated when the H14 structure T-type three-level inverter is running.

[0105] Any matters not described in the present invention are applicable to the prior art.

Claims

1. A method for eliminating common-mode voltage virtual space vector of H14 structure T-type three-level inverter, the elimination method comprising the following steps: Step 1: Add two fully controlled switching devices on the DC side of the T-type three-level inverter to form an H14 structure inverter, named S d13 , S d14 According to S d13 , S d14 In different switching states, the T-type three-level inverter has four operating modes, which are represented by I, II, III, and IV. The output voltage V of each voltage vector of the inverter in different modes is calculated. A , V B , V C , and calculate the common mode voltage of each voltage vector of different vector types in different modes; Step 2: Select the vector with zero common mode voltage according to the following rules. The specific rules are: ignore the vector with zero common mode voltage in mode 4, select only the zero vector OOOI with zero common mode voltage in mode 1 as the selected zero vector, and then select the small vectors and the middle vector with zero common mode voltage, and list the selected small vectors and the selected middle vector in the order of the sectors. Specifically: Selected zero vector: OOOI; Selected small vectors: PPOII, NONIII, OPPII, NNOIII, POPII, ONNIII; Selected mid-vectors: PONI, OPNI, NPOI, NOPI, ONPI, PNOI; In the above, P, O, and N represent the switching state of a phase of the inverter. The three-letter combination represents the switching state of the three phases. I, II, and III represent the mode respectively. The selected zero vector, the selected small vector, and the selected medium vector are used to synthesize a new virtual vector, also called a basic vector of the synthesized virtual vector. The virtual vector is divided into a virtual large vector V according to the size of the virtual vector. VL 、Virtual vector V VM , virtual small vector V VS , virtual small vector V VS The virtual center vector V is composed of the selected center vector of the current sector and the selected small vector adjacent to it in the counterclockwise direction. VM The virtual long vector V is synthesized by two adjacent selected mid vectors. VL is the selected mean vector; Step 3: According to the virtual vector obtained in step 2, a virtual vector space diagram of a T-type three-level inverter is constructed. The virtual vector space diagram of the T-type three-level inverter is composed of 6 large sectors, wherein each sector is composed of 4 small sectors constructed by each virtual vector, with a total of V VL1 -V VL6 Six virtual large vectors, V VM1 -V VM6 Six virtual center vectors, V VS1 -V VS6 Six virtual small vectors and one zero vector V0; The newly constructed virtual space vector large sector 1 is defined as: Step 4: Calculate the boundary judgment conditions of each small sector in each large sector and give the reference voltage V ref The basis for determining the small sector in which it is located; based on the volt-second balance, calculate the synthetic reference voltage V ref The virtual vector action time is determined to determine the switching sequence within the switching cycle and eliminate the output common-mode voltage of the T-type three-level inverter.

2. The method for eliminating common mode voltage of a T-type three-level inverter with H14 structure according to claim 1, characterized in that: Taking large sector 1 as an example, the boundary judgment conditions of each small sector in each large sector are set as L1, L2, L3, and L4 as the boundary judgment conditions of the small sector, and the boundary judgment conditions of each small sector in large sector 1 are obtained as follows: Where V α 、V β is the reference voltage V ref Components on the α-axis and the β-axis; The reference voltage V ref The basis for determining the small sector is:

3. The method for eliminating common mode voltage of a T-type three-level inverter with H14 structure according to claim 1, characterized in that: The calculated synthetic reference voltage V ref The action time of the virtual vector is as follows: Taking large sector 1 as an example, the action time of the virtual vector in each small sector is as follows: <h2 style=";text-align:left;direction:ltr">T3=T<h2 style=";text-align:left;direction:ltr"> s <h2 style=";text-align:left;direction:ltr"> -T1-T2 Among them, T1, T2, and T3 represent the reference voltage V ref During synthesis, the action time of the three virtual vectors is θ, which represents the reference voltage V ref Angle, 4. The method for eliminating common mode voltage of a T-type three-level inverter with H14 structure according to claim 1, characterized in that: Taking the four small sectors in large sector 1 as an example, the switching sequence in two switching cycles is: OOOI→PNOI→PONI→PPOII→PONI→PNOI→OOOI OOOI→OPNI→PONI→PPOII→PONI→OPNI→OOOI PNOI→PONI→OPNI→PPOII→OPNI→PONI→PNOI PNOI→PONI→OPNI→PONI→OPNI→PONI→PNOI.

5. The method for eliminating common mode voltage of a T-type three-level inverter with H14 structure according to claim 1, characterized in that: Switch S d13 and S d14 The T-type three-level inverter has four operating modes in different switching states: Mode 1, S d13 and S d14 All are turned on, and the T-type three-level inverter operates in the traditional inverter mode; Mode 2, S d13 Shutdown and S d14 Turn on, the inverter operates with the DC link point P disconnected; Mode 3, S d13 On and S d14 Shutdown, the inverter operates when it is disconnected from point N of the DC link; Point P refers to the relative positive pole of the voltage-dividing capacitor on the inverter DC power supply, and point N refers to the relative negative pole of the voltage-dividing capacitor on the inverter DC power supply; Mode 4, S d13 and S d14 When the inverter is turned off, the connection between the DC side and the inverter is completely disconnected, and the inverter is only electrically connected to the AC side.

6. The method for eliminating common mode voltage virtual space vector of H14 structure T-type three-level inverter according to claim 1, characterized in that: The elimination method can be applied to a three-level inverter with H14 topology.

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