Conversion circuit and electronic chip

Abstract

This invention discloses a conversion circuit and an electronic chip. The conversion circuit includes, in sequence, an input coarse quantization module, a discrete domain amplification module, a continuous domain amplification module, and an output fine quantization module. The discrete domain amplification module pre-amplifies the conversion result of the input coarse quantization module to suppress the gain noise of the continuous domain amplification module. The conversion circuit is a capacitor-to-digital converter or an analog-to-digital converter. This invention achieves the fusion of discrete and continuous domains in analog-to-digital or capacitor-to-digital converters, giving the entire circuit the advantages of both high energy efficiency and high precision.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and more particularly to a conversion circuit and an electronic chip. Background Technology

[0002] With the development of IoT technology, more and more sensor chips are being deployed at IoT nodes. These nodes need to accurately sense environmental parameters. This is usually achieved through high-precision analog-to-digital converters (ADCs) or capacitance-to-digital converters (CDCs).

[0003] ADCs or CDCs are generally divided into two categories: discrete-domain and continuous-domain. Each type has its own advantages and disadvantages. Discrete-domain ADCs typically offer a wide selection of high-efficiency operational amplifiers; however, when designing multi-bit quantization, additional design is usually required to reduce the effects of nonlinearity, which increases system design complexity and power consumption. Continuous-domain ADCs, on the other hand, have more advantages in designing multi-bit quantization, but face the problem of poor noise efficiency in continuous-domain operational amplifiers. Summary of the Invention

[0004] This invention provides a conversion circuit and electronic chip for integrating discrete and continuous domains in analog-to-digital or capacitor-to-digital conversion circuits, so that the entire circuit not only has the advantages of high energy efficiency but also high precision.

[0005] The present invention provides a conversion circuit comprising: an input coarse quantization module, a discrete domain amplification module, a continuous domain amplification module, and an output fine quantization module connected in sequence. The discrete domain amplification module is used to pre-amplify the conversion result of the input coarse quantization module to suppress the gain noise of the continuous domain amplification module. The conversion circuit is a capacitor-to-digital converter or an analog-to-digital converter.

[0006] The present invention also provides an electronic chip, including the conversion circuit described above.

[0007] This invention pre-amplifies the voltage difference of the input for fine quantization by setting a discrete-domain amplifier circuit, thereby increasing the input swing of the ΔΣ modulator and alleviating its quantization pressure. At the same time, because it pre-amplifies the input signal for fine quantization, it is equivalent to improving the pre-amplification capability of the gain transconductance. Moreover, it has high energy efficiency, which is equivalent to improving the energy efficiency of the gain transconductance stage. Therefore, it solves the transconductance energy efficiency problem, thereby improving the system's energy efficiency, ensuring the conversion accuracy of the fine quantization stage, and realizing a discrete-domain and continuous-domain integrated circuit architecture. Attached Figure Description

[0008] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 A schematic diagram of a conversion circuit provided in an embodiment of the present invention;

[0010] Figure 2 This is a schematic diagram of another conversion circuit provided in an embodiment of the present invention;

[0011] Figure 3 for Figure 2 The detailed circuit diagram of the circuit shown is as follows;

[0012] Figure 4 A specific circuit diagram of a discrete domain amplification module provided in an embodiment of the present invention;

[0013] Figure 5 for Figure 4 A schematic diagram of a differential operational amplifier powered by a floating capacitor.

[0014] Figures 6a-6b This is a schematic diagram of a circuit for gain error compensation by adjusting the integrating capacitor, provided in an embodiment of the present invention. Detailed Implementation

[0015] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0016] To make the technical solution of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0017] In existing zoom-scale (ZOOM) based conversion circuits, the first stage typically uses a Successive Approximation Register (SAR) analog-to-digital converter (ADC) to coarsely quantize the detected signal. The output signal is then sent to a second-stage delta-sigma modulator (DSM) for fine quantization. Multi-bit quantization not only reduces quantization error but also increases system stability; therefore, the second-stage DSM generally employs multi-bit quantization. While the second-stage continuous-domain DSM has advantages in multi-bit quantization, the gain transconductance noise of the operational amplifier used to convert the discrete output signal from the previous stage into a continuous signal for fine quantization becomes increasingly significant, severely limiting the overall circuit's energy efficiency. Therefore, before the second-stage fine quantization, it is necessary to suppress the gain transconductance noise to improve the overall circuit's energy efficiency.

[0018] Figure 1 A schematic diagram of a conversion circuit provided in an embodiment of the present invention is shown below. Figure 1 As shown, the circuit of this embodiment includes: an input coarse quantization module 10, a discrete domain amplification module 20, a continuous domain amplification module 30, and an output fine quantization module 40 connected in sequence. The discrete domain amplification module 20 is used to pre-amplify the conversion result of the input coarse quantization module 10 to suppress the gain noise of the continuous domain amplification module 30.

[0019] In this embodiment, the input coarse quantization module 10 is used to perform preliminary quantization on the detection signal, which is generally an analog signal or the detection capacitance value, i.e., to perform analog-to-digital conversion coarse quantization on the detection signal; the output fine quantization module 40 is used to further perform analog-to-digital conversion fine quantization on the quantization result of the input coarse quantization module 10.

[0020] Since continuous-domain analog-to-digital converters have the advantage of multi-bit quantization, in this embodiment of the invention, the output fine quantization module 40 adopts a continuous-domain ΔΣ modulator. Therefore, its input is provided with a continuous-domain amplification module 30 for converting the discrete-domain quantization result output by the input coarse quantization module 10 into a continuous-domain voltage or current. This continuous-domain amplification module can be a gain transconductance module, which is used to further amplify the signal amplified by the discrete-domain amplification module and convert it into voltage or current to control the oscillator in the output fine quantization module. That is, the voltage or current converted into continuous domain can directly drive the oscillator in the output fine quantization module 40.

[0021] In practical applications, the final conversion accuracy of the ZOOM architecture conversion circuit still depends on the driving capability of the transconductance. However, increasing the transconductance gain makes its thermal noise increasingly significant. Therefore, the thermal noise of the transconductance limits the conversion accuracy of the circuit, which is detrimental to improving the overall energy efficiency of the circuit. In other words, improving the gain and transconductance is limited in order to achieve both good energy efficiency and high conversion accuracy. To ensure that the subsequent circuit has a large driving capability without reducing energy efficiency, this embodiment adds a discrete domain amplification module 20 before the continuous domain amplification module 30 to effectively improve the energy efficiency of the continuous domain amplification module and significantly suppress the noise in the continuous domain. At the same time, since the discrete domain amplification module 20 can use a high-efficiency operational amplifier, such as an inverter-type amplifier powered by a floating capacitor, it not only improves the driving capability of the subsequent circuit but also meets the high energy efficiency requirement. Therefore, the entire circuit can achieve high accuracy and low power consumption. For cases with higher accuracy requirements, the gain error of the inverter-type amplifier powered by a floating capacitor can also be compensated, such as by using the charge redistribution correlation level sliding technique in a later embodiment to compensate for the gain error.

[0022] Figure 2 This is a schematic diagram of another conversion circuit provided in an embodiment of the present invention. Figure 3 for Figure 2 The detailed circuit diagram of the circuit shown is as follows: Figure 2 and Figure 3 As shown, the conversion circuit mainly includes a SAR digital-to-analog conversion loop, a discrete-domain amplification and sampling module, and a continuous-domain ΔΣ digital-to-analog conversion loop. The SAR digital-to-analog conversion loop performs the first-stage analog-to-digital conversion on the input detection signal and mainly includes a dynamic comparator, a SAR logic algorithm unit, and a SAR capacitor array. The input detection capacitor C is converted through the SAR loop. CDC Preliminary quantization, in which the input detection capacitor C CDC The difference between the input and the corresponding baseline capacitance in the SAR capacitor array is also input to the DP-CLS FIA in the Discrete Domain Amplification and Sampling (DT) module for computational amplification. The amplified result is stored in the sampling capacitor for fine quantization in the back-end continuous-time (CT) ΔΣ digital-to-analog conversion loop. In the back-end CT ΔΣ CT loop, the gain transconductance Gm first amplifies the voltage input from the front-end sampling capacitor and converts it into a continuous-time voltage or current to drive the back-end fine quantization loop.

[0023] Figure 4 This is a specific circuit diagram of a discrete domain amplification module provided in an embodiment of the present invention. Figure 5 for Figure 4 A schematic diagram of a differential operational amplifier powered by a floating capacitor, i.e. Figure 4The dashed box indicates a floating capacitor-powered differential operational amplifier (Diff.FIA). The type of operational amplifier is selected based on power consumption and product performance requirements in specific applications. For example... Figure 4 As shown, the discrete domain amplification module 20 may include: a first operational amplifier (Diff.FIA), a first sampling capacitor, and a first integrating capacitor (C). INT ) and the relevant level sampling capacitor (C) connected to the output of the first operational amplifier. CLS The first sampling capacitor is connected to the input terminal of the operational amplifier to sample and hold the input signal of the first operational amplifier. During the operation of the first operational amplifier, based on the gain error of the first operational amplifier, a compensation voltage with the same magnitude but opposite direction as the error level corresponding to the gain error is generated by adjusting either the first integrating capacitor or the related level sampling capacitor. The two methods of gain error compensation will be explained in detail later.

[0024] In practical applications, where circuit performance requirements are not very high, discrete-domain amplifier modules can also power traditional floating inverter amplifiers (FIAs) with floating capacitors. For applications requiring higher precision, more advanced amplifiers can be used. Figure 4 The circuit shown.

[0025] In actual circuit operation, to reduce power consumption, the discrete domain amplifier circuit 20 controls the timing of module connections to the circuit through control switches for each module. Generally, at the start of circuit operation, the input sampling capacitor at the input terminal samples the input signal and saves its input information. Then, the first operational amplifier performs operational amplification on the input signal and outputs it. In this embodiment, to improve the circuit's gain performance, the relevant level sampling capacitor at the operational amplifier output and the first integrating capacitor in the feedback loop are adjustable capacitors. They can be adjusted separately or simultaneously, primarily to eliminate the gain error at the circuit's output. This ensures that when the circuit is used for analog-to-digital conversion in an environmental sensing chip, it does not reduce the chip's energy efficiency while maintaining conversion accuracy. During gain error elimination, the control switches ensure that the relevant level sampling capacitor and the first integrating capacitor are connected to the circuit according to the specified timing.

[0026] by Figure 4 and Figure 5 This example illustrates the amplifier's operation. First, by closing control switches φ4 and φ6 and opening φ3 and φ5, the floating capacitor C... RES1 and C RES2 During charging, when the amplifier amplifies the input signal, φ4 is first disconnected to stop the DC power supply, and φ3 is then closed. Afterwards, the floating capacitor C... RES1 Power is supplied to the circuit, and the circuit is disconnected by control switch φ1.IN Closing φ2 brings the circuit into the gain error estimation stage. The voltage requiring compensation is calculated using the capacitor voltage divider relationship. Then, by controlling φ... 8N Disconnect capacitor C CLS The charge on the capacitor is retained, and opening φ7 and closing φ8 allows the capacitor C to remain open. CLS By connecting to the integration loop, charge is transferred to the integration capacitor, thereby compensating for the error level.

[0027] Among them, the first operational amplifier is as follows Figure 5 The high-efficiency floating capacitor powered inverter-type differential operational amplifier shown can charge the floating capacitor and power the operational amplifier through timing control. When the floating capacitor powers the operational amplifier, the voltage on the power supply capacitor will gradually decrease as the amplification process proceeds, thereby gradually turning off the amplifier. In addition, the current demand of the amplifier during the amplification process is also gradually reduced, which can significantly improve the energy efficiency of the amplifier.

[0028] In one embodiment, when a compensation voltage is generated by adjusting a related level sampling capacitor, the related level sampling capacitor is an adjustable capacitor that includes a first capacitor array, which is a series-connected combination of capacitors. The first capacitor array may include... Figure 4 C is connected in the dashed box at the amplifier output. CLS C TRIM By adjusting capacitor C TRIM The voltage divider can compensate for the error level caused by the gain error of the first operational amplifier. Specifically, due to the limited gain of the first operational amplifier, it will generate a certain gain error when generating the output amplified signal based on the input signal. This gain error will affect the analog-to-digital conversion accuracy in subsequent circuits. In this embodiment, to solve this problem, the corresponding error level caused by the gain error is first estimated, and then the voltage divider of the capacitor array in the relevant level sampling capacitor is adjusted to generate a compensation voltage that is the same in magnitude and opposite in direction as the estimated error level. For the entire circuit, its output gain error is compensated, that is, the gain of the circuit is improved, which helps to improve the analog-to-digital conversion accuracy of the downstream circuit.

[0029] In another embodiment, the gain error can also be compensated by adjusting the first integrating capacitor. Figures 6a-6b This diagram illustrates a circuit for gain error compensation by adjusting the first integrating capacitor, as provided in an embodiment of the present invention. Figure 6a This is a circuit diagram for the estimation stage. Figure 6b This is a circuit diagram of the shifting stage, such as... Figures 6a-6bAs shown, the first integrating capacitor includes a second capacitor array. In operation, the error level caused by the gain error is first estimated, and then the capacitor array is adjusted so that the relevant level sampling capacitor generates a compensation voltage, thereby improving the output gain of the circuit.

[0030] In the above embodiments, by adjusting the first integrating capacitor or the related level sampling capacitor according to the gain error of the first operational amplifier, a compensation voltage with the same magnitude but opposite direction as the error level corresponding to the gain error is generated, so that the error level is completely compensated, the output equivalent gain of the operational amplifier circuit is improved, thereby ensuring the conversion accuracy of the back-end analog-to-digital conversion circuit.

[0031] In terms of timing, the gain boost of the first operational amplifier includes three stages: the input sampling capacitor sampling the input voltage stage; the stage of estimating the error level caused by the gain error of the first operational amplifier; and the stage of compensating for and canceling the error level through level sliding. These three stages can be controlled by a timing switch. In the stage of estimating the error level caused by the gain error of the first operational amplifier, the first operational amplifier can be a large-swing operational amplifier; in the stage of compensating for and canceling the error level through level sliding, the first operational amplifier is a high-gain operational amplifier. In the actual circuit, the operating mode of the operational amplifier in the error level estimation stage and the level sliding stage can be switched by a control switch, making it operate in large-swing mode or high-gain mode respectively.

[0032] This invention, through the use of a discrete-domain amplifier circuit to pre-amplify the voltage difference of the input for fine quantization, improves the input swing of the ΔΣ modulator, alleviating its quantization pressure. Simultaneously, because it pre-amplifies the input signal for fine quantization, it effectively improves the pre-amplification capability of the gain transconductance. Furthermore, it has high energy efficiency, effectively improving the energy efficiency of the gain transconductance stage. Therefore, it solves the transconductance energy efficiency problem, thereby improving the system's energy efficiency, ensuring the conversion accuracy of the fine quantization stage, and realizing a discrete-domain and continuous-domain integrated circuit architecture.

[0033] Building upon the above embodiments, in specific applications, to improve overall system performance, the second-stage fine-quantization ΔΣ modulator employs a voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC). Nonlinearity is naturally shaped and averaged out, offering advantages not only in multi-bit quantization but also significantly reducing the oversampling rate of the ΔΣ modulator, and a smaller area. In the ΔΣ modulator loop, a phase frequency detector (PFD) is used as the quantizer. To further improve quantization accuracy, the ΔΣ ADC also employs a dual VCO-based ADC, correspondingly using dual phase frequency detectors for quantization, thereby doubling the quantization accuracy. The VCO can be implemented using a ring inverter chain, such as... Figure 2 and Figure 3 The CCO (Current Controlled Oscillator) shown is shown.

[0034] The embodiments of the present invention employ a VCO-based continuous-time analog-to-digital converter. Due to its inherent characteristic of cyclically traversing DAC units, the nonlinearity of the DAC is naturally shaped and averaged out, thus providing more advantages when designing multi-bit quantization. Furthermore, by using a VCO-based delta-sigma analog-to-digital converter designed based on an inverter chain, the system can have more advantages as the process node shrinks.

[0035] In practical applications, to reduce offset, a system-level chopper can be connected to the input terminal before the input signal coarse quantization module 10 performs coarse quantization.

[0036] The aforementioned floating capacitor, input sampling capacitor, integrating capacitor, and related level sampling capacitor can all be plate capacitors, interdigitated capacitors, or MOS capacitors, depending on the actual situation.

[0037] This invention also provides an electronic chip, including the conversion circuit described above, which features low power consumption and high precision. This electronic chip can be a sensor chip for temperature, humidity, pressure, etc.

[0038] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A conversion circuit, characterized by Comprise: The input end coarse quantization module, the discrete domain amplification module, the continuous domain amplification module and the output end fine quantization module are connected in sequence, the discrete domain amplification module is used for pre-amplifying the conversion result of the input coarse quantization module to suppress the gain noise of the continuous domain amplification module, wherein the conversion circuit is a capacitance digital conversion circuit or an analog digital conversion circuit; the discrete domain amplification module comprises a first operational amplifier, a first sampling capacitor, a first integral capacitor and a related level sampling capacitor connected to the output end of the first operational amplifier, the first sampling capacitor is connected to the input end of the operational amplifier, the input signal of the first operational amplifier is sampled and kept, in the working of the first operational amplifier, according to the gain error of the first operational amplifier, the compensation voltage with the same direction opposite to the error level corresponding to the gain error is generated by adjusting the first integral capacitor or adjusting the related level sampling capacitor.

2. The circuit of claim 1, wherein, The discrete domain amplification module is an inverter type amplifier based on floating capacitance power supply.

3. The circuit of claim 1, wherein, The output end fine quantization module is a delta sigma analog-to-digital converter based on a voltage controlled oscillator.

4. The circuit of claim 3, wherein, The delta sigma analog-to-digital converter is a delta sigma analog-to-digital converter based on a double voltage controlled oscillator.

5. A circuit according to claim 3 or 4, characterised in that, The voltage controlled oscillator is a ring inverter chain structure.

6. The circuit of claim 3, wherein, The continuous domain amplification module is a gain cross transconductance, which is used for amplifying the signal amplified by the discrete domain amplification module into voltage or current to drive the oscillator in the output end fine quantization module.

7. The circuit of claim 1, wherein, It also comprises a system level chopper connected to the input end to reduce the offset.

8. The circuit of claim 1, wherein, The input end coarse quantization module is a successive approximation analog-to-digital conversion circuit based on a successive approximation analog-to-digital conversion circuit, which is used for first stage analog-to-digital conversion of the input detection signal.

9. An electronic chip, characterized by It comprises the conversion circuit according to any one of claims 1-8.

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