Electronic package and electronic equipment including the same

Abstract

The present invention relates to an electronic package. The present invention also relates to an electronic device including the electronic package. According to the present invention, the ends of one or more leads are substantially located in the plane of the semiconductor chip. This plane is parallel to the bottom surface of the thermally conductive substrate. According to the present invention, the thermally conductive substrate includes a groove or cutout below the one or more leads.

Description

Technical Field

[0001] The present invention relates to an electronic package and an electronic device comprising the electronic package. Background Art

[0002] Electronic packages as defined in the preamble of claim 1 are known in the art. These packages typically include a package body and a thermally conductive substrate, the thermally conductive substrate being arranged inside the package body and having a bottom surface exposed to the outside of the package body. The thermally conductive substrate has a minimum bounding box associated with the thermally conductive substrate and surrounding the thermally conductive substrate.

[0003] In these packages, electronic circuitry is disposed within the package body. The circuitry includes a semiconductor chip having a bottom surface and an opposing top surface, with the semiconductor chip mounted on a thermally conductive substrate via the bottom surface. For example, the electronic circuitry may include a power amplifier. This power amplifier may include transistors disposed and / or integrated within the semiconductor chip, and passive circuitry in the form of surface-mounted devices disposed on the thermally conductive substrate. The passive circuitry may similarly be implemented on the semiconductor chip and / or other semiconductor chips disposed within the same package.

[0004] The known electronic package further includes one or more leads that partially extend from outside the package body to inside the package body and extend over a minimum bounding box, each lead having a first end disposed inside the package body, and one or more bonding wires used to connect the first end to the electronic circuit.

[0005] Figures 1A and 1B illustrate a cross-sectional view and a top view of a known package, respectively. The known package includes a package body 3, in which a thermally conductive substrate 1 is arranged. The thermally conductive substrate 1 is connected to the semiconductor chip 2 via an intermediate layer 2A (e.g., a solder layer). In addition, the bottom surface 1A of the thermally conductive substrate 1 is exposed to the outside of the package body 3. Typically, the bottom surface 1A is mounted on a thermally conductive substrate (e.g., a block) in a printed circuit board, and the package is mounted on the printed circuit board. In some embodiments, the semiconductor chip 2 includes a conductive substrate. In this case, the electrical grounding of the circuit on the semiconductor chip 2 can be achieved through the substrate and the thermally conductive substrate 1. In a non-conductive substrate, one or more through holes in the substrate can be used for electrical grounding.

[0006] Leads 4 provide electrical connections to circuits on semiconductor chip 2. At first end 4A, leads 4 are connected to circuits on semiconductor chip 2 via bonding wires 5. Leads 4 and substrate 1 should be spaced apart to avoid accidental electrical shorts.

[0007] A minimum bounding box can be defined around thermally conductive substrate 1. When taken parallel to bottom surface 1A, the cross-section of this bounding box is a quadrilateral E1. As shown in FIG1A and FIG1B , lead 4 extends above this bounding box and quadrilateral E1 and covers them by a length E2.

[0008] One disadvantage of electronic packages of the type described above relates to the inductance associated with the bond wires 5. Typically, bond wires 5 are used to connect the input and output terminals of the electronic package. Consequently, these connections are very sensitive to inductive coupling. Therefore, it is desirable to be able to precisely control the inductance of these bond wires. More specifically, it is preferred to minimize the area between the thermally conductive substrate 1 and the bond wires 5 to avoid inductive coupling as much as possible. Unfortunately, with these known packages, a considerable area still exists. Summary of the Invention

[0009] The object of the present invention is to provide an electronic package in which the above-mentioned problems do not or hardly occur.

[0010] This object is achieved by an electronic package according to claim 1, characterized in that the upper surface of the first end of one or more leads is substantially located in the plane of the upper surface of the semiconductor chip, wherein the plane is parallel to the bottom surface of the thermally conductive substrate; wherein the thermally conductive substrate includes one or more grooves or cutouts located below the one or more leads.

[0011] By providing one or more grooves or cutouts below the one or more leads, the one or more leads can be lowered to the level of the semiconductor chip without risking an electrical short between the one or more leads and the thermally conductive substrate. Furthermore, because the upper surface of the first end portion of the one or more leads is now at substantially the same height as the upper surface of the semiconductor chip, a bond wire shape that is less susceptible to inductive coupling can be used.

[0012] The difference in vertical offset between a) the upper surface of the first end portion of the one or more leads and b) the upper surface of the semiconductor chip relative to the bottom surface of the thermally conductive substrate may be less than 300 microns, preferably less than 150 microns, and more preferably less than 50 microns.

[0013] The one or more leads may include one or more input leads, wherein the electronic circuit includes an input terminal connected to a first end of the one or more input leads, for example, using one or more bonding wires. Additionally or alternatively, the one or more leads may include one or more output leads, wherein the electronic circuit includes an output terminal connected to a first end of the one or more output leads, for example, using one or more bonding wires. The number, shape and / or thickness of the input leads and the output leads may be different. For example, for a power amplifier package, the combined cross-sectional area of ​​the output leads is typically larger than the combined cross-sectional area of ​​the input leads to allow a larger output current to flow. Furthermore, the semiconductor chip may include corresponding bonding pads or bonding strips for bonding one or more bonding wires.

[0014] The one or more grooves or cutouts for the one or more input leads may be formed as a single continuous groove or cutout disposed on a first side of the thermally conductive substrate. Additionally or alternatively, the one or more grooves or cutouts for the one or more output leads may be formed as a single continuous groove or cutout disposed on a second side of the thermally conductive substrate opposite the first side.

[0015] The one or more grooves or cutouts for the one or more input leads and for the one or more output leads may comprise a continuous groove extending along the entire perimeter of the thermally conductive substrate.

[0016] Alternatively, the one or more grooves or cutouts for the one or more input leads can be formed as a plurality of spaced grooves or cutouts arranged on the first side of the thermally conductive substrate, and / or the one or more grooves or cutouts for the one or more output leads can be formed as a plurality of spaced grooves or cutouts arranged on a second side of the thermally conductive substrate opposite the first side. The present invention does not preclude the provision of additional grooves or cutouts on other sides of the thermally conductive substrate, and does not preclude the provision of one or more bonding wires similar to the bonding wires used for the first and second sides of the thermally conductive substrate.

[0017] Each of the one or more leads can be associated with a different one of the one or more grooves or cutouts. Additionally or alternatively, grooves and cutouts can be used simultaneously. For example, grooves can be provided for a subset of leads arranged on the same side of the thermally conductive substrate, while cutouts can be used for another subset of leads arranged on the same side.

[0018] The semiconductor chip may include a bottom surface connected to the thermally conductive substrate and a top surface opposite the bottom surface. The electronic circuit includes one or more transistors, which are integrated in the semiconductor chip at or near the upper surface, and the bottom surface is physically connected to the thermally conductive substrate. This physical connection is typically facilitated by an additional layer (e.g., a solder layer). The one or more transistors may include one or more RF power transistors. The one or more transistors may include: a silicon-based laterally diffused metal oxide semiconductor "LDMOS"; a transistor; and / or a gallium nitride-based field effect transistor "FET".

[0019] The semiconductor chip may include a conductive substrate, so that one or more transistors can be grounded through the conductive substrate and the thermally conductive substrate. Alternatively, the semiconductor chip may include a substrate arranged with one or more through-holes, so that one or more transistors can be grounded through the one or more through-holes and the thermally conductive substrate.

[0020] The thickness of one or more leads is typically greater than the thickness of the semiconductor chip. For example, for RF power applications, the thickness of the leads is in the range of 0.1 mm to 0.4 mm, while the thickness of the semiconductor chip is typically in the range of 50 microns to 200 microns. It should be noted that a smaller thickness of the semiconductor chip facilitates heat transfer from the semiconductor chip to the thermally conductive substrate. Secondly, the semiconductor chip can have a conductive substrate to allow a ground connection to be made to the electronic circuits arranged on the top surface of the semiconductor chip. An example of such a connection is the source ground connection of a transistor. By using a relatively thin semiconductor chip, a low source inductance can be achieved.

[0021] Some or all of the one or more leads may extend substantially completely parallel to the bottom surface of the thermally conductive substrate. Alternatively, some or all of the one or more leads may enter the package body at a height relative to the bottom surface of the thermally conductive substrate that is greater than the height of the first ends of the leads relative to the bottom surface of the thermally conductive substrate. In the latter case, each of some or all of the one or more leads may include: a first lead portion that extends at least partially outside the package body and preferably substantially parallel to the bottom surface of the thermally conductive substrate; and a second lead portion that extends within the package body and substantially parallel to the bottom surface of the thermally conductive substrate. Each lead may also include a curved lead portion that extends at least partially within the package body and connects the first lead portion and the second lead portion. Such a curved lead portion is also referred to as a lead-down portion. However, it should be noted that the present invention also relates to embodiments in which the leads are straight. In these embodiments, the height at which the leads enter the package is the same as the height at which the first ends of the leads are located.

[0022] The first lead portion may have a curved shape to achieve a desired package stand height. For example, the first lead portion may bend downward toward the bottom of the package. For example, the lead may have a gull-wing configuration.

[0023] The package body may include an air cavity in which a semiconductor chip and a first end portion of one or more leads are arranged. Air has a low dielectric constant and therefore exhibits low capacitive coupling. In such a package, a spacer element may be provided to ensure that the one or more leads are spaced apart from the thermally conductive substrate. The spacer element may, for example, comprise a ceramic ring or a thermoplastic ring. Alternatively, the spacer element is formed by a cured molding compound through which the one or more leads extend. In both cases, the package may include a package cover that is connected to the spacer element and defines the air cavity. Additionally or alternatively, the spacer element and / or the cover may be made of a thermosetting material (e.g., Duroplast), a molding compound suitable for injection molding or transfer molding, or a thermoplastic material (e.g., liquid crystal polymer).

[0024] The package body may be formed of a cured molding compound that fills the interior of the package body and contacts the semiconductor chip and the one or more leads.These types of packages have a cost advantage because no additional package lid is required.

[0025] One or more leads are part of a lead frame for manufacturing an electronic package, wherein, before separating the electronic package, the one or more leads and the thermally conductive substrate are connected to the rest of the lead frame. Typically, a lead frame is used to manufacture multiple packages simultaneously. These lead frames include a set of leads (input leads and output leads) and a thermally conductive substrate for each package to be manufactured. Before the package is separated from the lead frame, the thermally conductive substrate is still connected to the rest of the lead frame using so-called tie bars. These tie bars are small metal connectors between the thermally conductive substrate and the rest of the lead frame. Separating the electronic package can include disconnecting the connection between the one or more leads and the rest of the lead frame, as well as disconnecting the connection between the thermally conductive substrate and the rest of the lead frame. After separating the electronic package, the electronic package can include a residual portion of the tie bars connected to the corners of the thermally conductive substrate. It should be noted that the present invention also relates to embodiments in which the thermally conductive substrate is connected to the rest of the lead frame in other ways (e.g., bonding, soldering, or welding).

[0026] According to another aspect, the present invention provides an electronic device comprising: an electronic package as described above, wherein the one or more leads each have a mounting end opposite the first end. The electronic device further comprises a printed circuit board having a ground pad and one or more signal pads, the ground pad being electrically and physically connected to the thermally conductive substrate, and the one or more signal pads being electrically and physically connected to the mounting end of the one or more leads.

[0027] The printed circuit board may comprise a plurality of layers, wherein the ground pads are formed in an inner layer and wherein the signal pads are formed in an outer layer, wherein the ground pads have been exposed to the outside by removing one or more layers above the ground plane. The ground plane may be formed by the top surface of a block integrated in the printed circuit board. In the context of the present invention, the block is made of a material having a much higher thermal conductivity than that of the printed circuit board. For example, the block may be made of copper. In order to arrange the block, the printed circuit board may be provided with openings or grooves for mounting the block. Such an opening may even extend completely through the printed circuit board. The block is preferably connected to the thermally conductive substrate of the electronic package of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Next, the present invention will be described with reference to the accompanying drawings, in which:

[0029] 1A and 1B respectively show a cross-sectional view and a top view of a known electronic package;

[0030] Figure 2A and Figure 2B shows a cross-sectional view of an embodiment of an electronic package according to the present invention, which uses grooves in a thermally conductive substrate for leads with downward portions and straight leads, respectively;

[0031] Figure 3A and Figure 3B They correspond to Figure 2A and Figure 2B A perspective view of an embodiment of the present invention;

[0032] Figure 4A and Figure 4B shows a perspective view of an embodiment of an electronic package according to the present invention, wherein a thermally conductive substrate is provided with a cutout and straight leads and leads having downward portions are used;

[0033] Figure 5A shows a cross-sectional view of an embodiment of an electronic package using an air cavity according to the present invention, Figure 5B The use of the present invention is shown Figure 5A Embodiments of electronic devices comprising electronic packages; and

[0034] Figure 6Ashows a cross-sectional view of another embodiment of an electronic package according to the present invention, wherein the package body is filled with a cured molding compound, Figure 6B Shows the use of Figure 6B Another embodiment of an electronic device according to the present invention is an electronic package. DETAILED DESCRIPTION

[0035] Figure 2A and Figure 2B 1 shows a cross-sectional view of an embodiment of an electronic package according to the present invention, which uses grooves 1B in a thermally conductive substrate 1 for leads 4 with downward portions 4C and straight leads 4, respectively. Figure 2A As shown, the lead 4 includes a first lead portion 4B, a second lead portion 4D, and a downward portion 4C connecting the lead portions 4B and 4D.

[0036] As shown in the figure, the height h1 at which the lead 4 enters the package body is greater than the height h2 of the first end 4A relative to the bottom surface of the thermally conductive substrate 1.

[0037] on the other hand, Figure 2B Lead 4 in the figure is a straight lead. For this package, the package height represented by h1 is lower than Figure 2A As will be described later, for a package that is partially arranged in a groove of a printed circuit board, the package standing height is very important.

[0038] Figure 3A and Figure 3B They correspond to Figure 2A and Figure 2B 1 . A corresponding perspective view of an embodiment of the present invention is shown here. A layer 2A, for example a solder layer, is shown for mounting the semiconductor chip 2 on the heat-conducting substrate 1 . In addition, Figure 3A A portion of a minimum rectangle E1 surrounding the thermally conductive substrate 1 and parallel to the bottom surface 1A of the thermally conductive substrate 1 is shown. Figure 4B A similar rectangle is shown in . In both cases, the lead 4 partially covers the smallest rectangle E1 and partially extends.

[0039] Figure 4A and Figure 4B A perspective view of an embodiment of an electronic package according to the present invention is shown, in which a thermally conductive substrate 1 is provided with a cutout 1C, and straight leads 4 and leads 4 having downward portions 4C are used.

[0040] Figure 4BA minimum rectangle E1 is shown surrounding thermally conductive substrate 1. Rectangle E1 is parallel to bottom surface 1A of thermally conductive substrate 1. The end section of each lead (e.g., lead portion 4D) extends over rectangle E1. In this area, cutouts 1C are used to prevent electrical contact between lead 4 and thermally conductive substrate 1.

[0041] Figure 4B The embodiment shown in the figure may involve a Doherty amplifier, wherein the main amplifier and optionally one or more peak amplifiers are arranged on a first semiconductor chip 2, while the other peak amplifiers are arranged on another semiconductor chip 2'. Figure 4B The lead on the right side of the middle is much wider than the lead 4 on the input side to allow large current to flow.

[0042] like Figure 4B As shown, cutouts 1C may be provided on opposite sides of the package. However, the present invention is not limited to this configuration. For example, a cutout or groove may be provided on only one side. Alternatively, a cutout may be provided on one side and a groove may be provided on the other side.

[0043] Figure 4A and Figure 4B Also shown are the remnants 6 of the tie bars, by which the thermally conductive substrates 1 are connected when forming a plurality of packages simultaneously. Each tie bar is connected to the thermally conductive substrate 1 using a rivet 6A.

[0044] Figure 5A A cross-sectional view showing an embodiment of an electronic package 10 according to the present invention using an air cavity is shown, Figure 5B Shows the use of Figure 5A An embodiment of an electronic device 40 according to the present invention is provided as an electronic package.

[0045] Figure 5A The package 10 shown in FIG. 1 includes an air cavity 7. The package 10 also includes input and output leads 4, a thermally conductive substrate 1, and a semiconductor chip 2. The thermally conductive substrate 1 is spaced apart from the leads 4 by a cured molding compound 8. The package 10 also includes a package lid 11 connected to the cured molding compound 8. The cured molding compound 8, the thermally conductive substrate 1, and the package lid 11 collectively define the outer surface of the package body 3.

[0046] The package 10 includes straight input and output leads 4. As shown, the leads 4 include a first lead portion 4B that extends primarily outside the package body 3, a downward portion 4C disposed within the package body 3, and a second lead portion 4D, with the ends 4A of the leads exposed within the air cavity 7. This enables a bonding wire 5 to be connected between the leads 4 and the circuit on the semiconductor chip 2. As shown in the figure, the ends 4A of the leads 4 are substantially located in the plane of the top surface of the semiconductor chip 2. Therefore, the bonding wire 5 between the ends 4A and the circuit on the semiconductor chip 2 can be arranged with a very low profile. Such a profile results in a lower self-inductance of the bonding wire 5 and reduces sensitivity to electromagnetic coupling with other bonding wires in the package 10.

[0047] exist Figure 5B In the embodiment, package 10 is mounted on a printed circuit board ("PCB") 20 comprising two dielectric layers. A first dielectric layer 21 forms the bottom of PCB 20, and a second dielectric layer 22 forms the top of PCB 20. Metal layers may be used between and within layers 21 and 22. For example, a first metal layer 23 is disposed on dielectric layer 21, a second metal layer 24 is disposed between dielectric layers 21 and 22, and a third metal layer 25 is disposed on second dielectric layer 22. It will be apparent to those skilled in the art that the present invention is not limited to these dielectric and metal layers, and that other PCBs having more or fewer metal and dielectric layers are also possible.

[0048] The PCB 20 is provided with a block 26 made of a material with high thermal conductivity (e.g., copper). The block 26 is disposed in a cavity within the first dielectric layer 21. Another cavity is disposed within the second dielectric layer 22, wherein the package 10 is disposed in the other cavity.

[0049] The back side of the package 10 is formed by the exposed portion of the thermally conductive substrate 1. This substrate is connected to the block 26 defining the ground pad, for example by soldering. At the same time, the leads 4 are connected to the signal pads formed in the third metal layer 25. Figure 5B As shown, the package stand height generally corresponds to the combined thickness of second dielectric layer 22 and third metal layer 25. However, due to the use of downward portion 4C, end 4A of lead 4 can be arranged in the plane of the top surface of semiconductor chip 2.

[0050] Figure 6A A cross-sectional view of another embodiment of an electronic package 30 according to the present invention is shown. Figure 6B An electronic device 50 is shown that includes the electronic package 30. Figure 5ACompared to package 10 in FIG. 1 , package 30 is filled with cured mold compound 8. To manufacture such a package, semiconductor chip 2 must be mounted on thermally conductive substrate 1 before applying the mold compound. Bond wires 5 must also be arranged before applying the mold compound to connect leads 4 to the circuits on semiconductor chip 2.

[0051] exist Figure 6A In the embodiment, the lead 4 has a different non-linear shape. More specifically, the lead 4, more specifically the first lead portion 4B, has a curved shape so that the end of the lead 4 is approximately at the same level as the bottom surface of the package 30. This shape enables the package 30 to be mounted on the PCB 20, such as Figure 6B PCB 20 can be configured with Figure 5B 20 is identical to the PCB 20 in FIG, except that the block 26 extends completely through the PCB 20 through the corresponding cavities in the first dielectric layer 21 and the second dielectric layer 22. In this way, all connections between the electronic package 30 and the PCB 20 are made at the level of the third metal layer 25.

[0052] Figure 6B The PCB 20 in further comprises signal pads connected to the bonding wires 5. The thermal connection between the thermally conductive substrate 1 and the block 26 is ensured by mounting the thermally conductive substrate 1 on the block 26, optionally via one or more mounting layers, the block 26 serving as ground pad.

[0053] like Figure 6A As shown, the end portion 4A and the top surface of the semiconductor chip 2 are located in a plane parallel to the bottom surface of the thermally conductive substrate 1 .

[0054] In the above, the present invention has been explained using the detailed embodiments of the present invention. However, it should be appreciated that the present invention is not limited to these embodiments and that various modifications can be made without departing from the scope of the present invention, which is defined by the appended claims.

[0055] Reference Signs List

[0056] E1. Minimum quadrilateral

[0057] E2. Overlapping leads and minimal quadrilaterals

[0058] 1. Thermally conductive substrate

[0059] 1A. Bottom surface thermal conductive substrate

[0060] 1B, groove

[0061] 1C, incision

[0062] 2,2', semiconductor substrate

[0063] 2A, solder layer

[0064] 3. Package body

[0065] 4A. First end of the lead

[0066] 4B, first lead part

[0067] 4C, downward part

[0068] 4D, second lead part

[0069] 5. Bonding wire

[0070] 6. Remaining part of tie

[0071] 6A, rivets

[0072] 7. Air cavity

[0073] 8. Curing the molding compound

[0074] 10. Electronic packaging

[0075] 11. Package cover

[0076] 20. PCB

[0077] 21. First dielectric layer

[0078] 22. Second dielectric layer

[0079] 23. First metal layer

[0080] 24. Second metal layer

[0081] 25. The third metal layer

[0082] 26. Block

[0083] 30. Electronic packaging

[0084] 40. Electronic devices

[0085] 50. Electronic equipment

Claims

1. An electronic package comprising: a package body; a thermally conductive substrate disposed inside the package body and having a bottom surface exposed outside the package body, the thermally conductive substrate having a minimum bounding box surrounding the thermally conductive substrate associated therewith; an electronic circuit disposed within the package body and including a semiconductor chip having a bottom surface and an opposing upper surface, the semiconductor chip being mounted on the thermally conductive substrate via the bottom surface of the semiconductor chip; one or more leads extending partially from an exterior of the package body to an interior of the package body and extending over the minimum bounding box, each lead having a first end disposed within the interior of the package body; one or more bonding wires for connecting the first end portion to the electronic circuit; wherein the thermally conductive substrate comprises one or more grooves or cutouts, and the one or more grooves or cutouts are located below the one or more leads; It is characterized by: The upper surface of the first end portion of the one or more leads is substantially located in a plane of the upper surface of the semiconductor chip, the plane being parallel to the bottom surface of the thermally conductive substrate; wherein the one or more leads are part of a lead frame used to manufacture the electronic package, wherein the one or more leads and the thermally conductive substrate are connected to a remainder of the lead frame prior to separating the electronic package, and wherein the separating comprises disconnecting the one or more leads from the remainder of the lead frame and disconnecting the thermally conductive substrate from the remainder of the lead frame; wherein the electronic package includes a tie bar remnant connected to a corner of the thermally conductive substrate, wherein before separating the electronic package, the thermally conductive substrate is connected to the remainder of the lead frame using the tie bar; wherein some or all of the one or more leads enter the package body at a height relative to the bottom surface of the thermally conductive substrate that is greater than a height of first ends of the leads relative to the bottom surface of the thermally conductive substrate; and Wherein, each of the some or all of the one or more leads comprises: a first lead portion extending at least partially outside the package body and substantially parallel to a bottom surface of the thermally conductive substrate; a second lead portion extending inside the package body and substantially parallel to a bottom surface of the thermally conductive substrate; and A bent lead portion extends at least partially inside the package body and connects the first lead portion and the second lead portion.

2. The electronic package according to claim 1, wherein: A vertical offset difference between an upper surface of the first end portion of the one or more leads and an upper surface of the semiconductor chip relative to a bottom surface of the thermally conductive substrate is less than 50 micrometers.

3. The electronic package according to claim 1, wherein: The one or more leads include one or more input leads, wherein the electronic circuit includes an input terminal connected to a first end of the one or more input leads.

4. The electronic package according to claim 1, wherein: The one or more leads include one or more output leads, wherein the electronic circuit includes an output terminal connected to a first end of the one or more output leads.

5. The electronic package according to claim 3, wherein: The one or more grooves or cutouts for the one or more input leads are formed as a single continuous groove or cutout arranged at the first side of the thermally conductive substrate.

6. The electronic package according to claim 4, wherein: The one or more grooves or cutouts for the one or more output leads are formed as a single continuous groove or cutout arranged at the second side of the thermally conductive substrate.

7. The electronic package according to claim 5 or 6, wherein: The one or more grooves or cutouts for the one or more input leads and the one or more grooves or cutouts for the one or more output leads comprise continuous grooves extending along the entire perimeter of the thermally conductive substrate.

8. The electronic package according to claim 3, wherein: The one or more grooves or cutouts for the one or more input leads are formed as a plurality of spaced apart grooves or cutouts arranged on the first side of the thermally conductive substrate.

9. The electronic package according to claim 4, wherein: The one or more grooves or cutouts for the one or more output leads are formed as a plurality of spaced apart grooves or cutouts arranged on the second side of the thermally conductive substrate.

10. The electronic package according to claim 1, wherein Each of the one or more leads is associated with a different one of the one or more grooves or cutouts.

11. The electronic package according to claim 1, wherein the electronic circuit comprising one or more transistors, the one or more transistors being integrated in the semiconductor chip at or near the upper surface, and wherein the bottom surface is physically connected to the thermally conductive substrate; The electronic circuit is an RF amplifier circuit, wherein the one or more transistors include one or more RF power transistors, wherein the one or more transistors include: a silicon-based laterally diffused metal oxide semiconductor (LDMOS); a transistor; and / or a gallium nitride-based field effect transistor (FET).

12. The electronic package according to claim 11, wherein The semiconductor chip includes a conductive substrate, so that the one or more transistors can be grounded through the conductive substrate and the thermally conductive substrate, or, wherein the semiconductor chip includes a substrate arranged with one or more through-holes, so that the one or more transistors can be grounded through the one or more through-holes and the thermally conductive substrate.

13. The electronic package according to claim 1, wherein The thickness of the one or more leads is greater than the thickness of the semiconductor chip, wherein the thickness of the one or more leads is in the range of 0.1 mm to 0.4 mm, and wherein the thickness of the semiconductor chip is in the range of 50 μm to 200 μm.

14. The electronic package according to claim 1, wherein The package body includes an air cavity in which the semiconductor chip and the first ends of the one or more leads are arranged. 15 . The electronic package of claim 14 , further comprising a spacing element for ensuring that the one or more leads and the thermally conductive substrate are spaced apart.

16. The electronic package according to claim 15, wherein The spacer element comprises a ceramic ring or a thermoplastic ring, or wherein the spacer element is formed from a cured molding compound through which the one or more leads extend. 17 . The electronic package of claim 16 , further comprising a package cover connected to the spacing element and defining the air cavity.

18. The electronic package of claim 1, wherein: The electronic package body is formed of a cured molding compound that fills an interior of the package body and contacts the semiconductor chip and the one or more leads.

19. An electronic device comprising: The electronic package of claim 1, wherein the one or more leads each have a mounting end opposite the first end; A printed circuit board having a ground pad and one or more signal pads electrically and physically connected to the thermally conductive substrate, and the one or more signal pads electrically and physically connected to the mounting ends of the one or more leads.

20. The electronic device according to claim 19, wherein The printed circuit board comprises a plurality of layers, wherein the ground pad is formed on an inner layer, and wherein the signal pad is formed on an outer layer, wherein the ground pad has been exposed to the outside by removing one or more layers above a ground plane, and / or wherein the ground pad is formed by a top surface of a block integrated in the printed circuit board.

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