CMOS bandgap voltage reference with anti-interference capability

Abstract

Provided is a CMOS bandgap reference voltage source with anti-interference capability, comprising: a power supply terminal VDD; a MOS tube unit connected to the power supply terminal; a transistor unit; a switch capacitor amplifier unit, comprising an amplifier, capacitors C1, C2, switches S3, S4, S5, wherein the positive input terminal of the amplifier comprises amplifier input points IN4 and IN5, the amplifier input point IN4 is arranged beside the input point IN2 of the transistor unit, and the amplifier input point IN5 is connected between the input point IN1 of the transistor Q1; the negative input terminal of the amplifier is connected to the capacitor C1 and then connected between the input point IN2 of the second transistor branch and the transistor Q3; one end of the capacitor C2 is connected to the negative input terminal of the amplifier, and the other end of the capacitor C2 is divided into a first switch branch and a second switch branch, the capacitor C2 in the first switch branch is connected to the switch S4 and then connected to the output terminal of the amplifier, and the capacitor C2 in the second switch branch is connected to the switch S5 and then connected to the positive input terminal of the amplifier; and the two ends of the switch S3 are respectively connected to the negative input terminal and the output terminal of the amplifier.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to a CMOS bandgap reference voltage source with anti-interference capability. Background Art

[0002] Bandgap reference voltage source is an important functional module of most analog integrated circuits, digital-analog hybrid integrated circuits and other systems. It is widely used in analog-to-digital converters (ADCs), digital-to-analog converters (DACs), power management and radio frequency integrated circuits for its high precision, low temperature drift and high stability. Since the high-precision reference voltage source can provide a reference voltage that is less correlated with power supply voltage, process, temperature and other factors, it is crucial to the performance of the entire circuit system. The traditional bandgap reference voltage source circuit usually consists of a base-emitter voltage of a transistor as a voltage inversely proportional to absolute temperature (CTAT), the base-emitter voltage difference of two transistors and a resistor array to generate a voltage proportional to temperature (PTAT) through the virtual short or virtual open characteristics of the two input terminals of the amplifier, and with temperature compensation technology, such as second-order compensation, segmented compensation and other technologies, to reduce the impact of temperature changes on the reference voltage, and finally to generate a high-precision reference voltage by adjusting the ratio of the resistors. However, in traditional bandgap reference circuits, the offset voltage of the amplifier will affect the accuracy of the reference voltage, the proportional mismatch of the bipolar transistors will also have a great impact on the overall system performance of the circuit, the resistors and compensation circuits will occupy too large a layout area, and the power consumption is high and the anti-interference ability is weak, resulting in inaccurate reference voltage output. Nowadays, in application scenarios such as power management chips, PLLs, AD / DA converters, etc., the accuracy, stability, temperature coefficient, power consumption, area, etc. of the bandgap reference voltage source are increasingly required. The bandgap reference voltage source with the above traditional structure can no longer meet the requirements of these fields. Summary of the invention

[0003] 1. Technical issues to be resolved

[0004] Based on the above problems, the present disclosure provides a CMOS bandgap reference voltage source with anti-interference capability to alleviate the technical problems such as the influence of the offset voltage of the amplifier in the reference voltage source on the output voltage accuracy and the error caused by the mismatch of the bipolar transistor in the prior art.

[0005] (II) Technical solution

[0006] The present disclosure provides a CMOS bandgap reference voltage source with anti-interference capability, comprising: a power supply terminal VDD; a MOS tube unit, a triode unit, and a switched capacitor amplifier unit. The MOS tube unit is connected to the power supply terminal, and comprises two MOS tubes, a first MOS tube MP1 and a second MOS tube MP2, wherein the two MOS tubes constitute a common source and common gate current mirror, and the MOS tube unit is provided with a first output point O1 and a second output point O2, wherein the first output point O1 is connected with a first switch S1, and the second output point O2 is connected with a second switch S2; the triode unit comprises a first triode branch and a second triode branch, wherein the first triode branch comprises a first triode Q1 and a second triode Q2, and the second triode branch comprises a third triode Q3 and a fourth triode Q4; the first triode branch is provided with a first input point IN1, and the second triode branch is provided with a second input point IN2 and a third input point IN3 connected to each other; the switched capacitor amplifier unit comprises an amplifier, a first capacitor C1, a second capacitor C2, a third switch S3, a fourth switch S4, and a fifth switch S5, wherein the amplifier The positive input end includes two amplifier input points, a first amplifier input point IN4 and a second amplifier input point IN5, wherein the first amplifier input point IN4 is arranged beside the second input point IN2 of the triode unit, and the second amplifier input point IN5 is connected between the first triode Q1 and the first input point IN1; the negative input end of the amplifier is connected to the first capacitor C1 and then connected between the second input point IN2 of the second triode branch and the third triode Q3; one end of the second capacitor C2 is connected to the negative input end of the amplifier, and the other end of the second capacitor C2 is divided into two switch branches, a first switch branch and a second switch branch, wherein the second capacitor C2 in the first switch branch is connected to the output end of the amplifier after being connected to the fourth switch S4, and the second capacitor C2 in the second switch branch is connected to the positive input end of the amplifier after being connected to the fifth switch S5; and the two ends of the third switch S3 are respectively connected to the negative input end and the output end of the amplifier.

[0007] According to an embodiment of the present disclosure, the first switch S1 can be selectively connected to the first input point IN1 and the third input point IN3 in the transistor unit.

[0008] According to an embodiment of the present disclosure, the second switch S2 can be selectively connected to the second input point IN2 and the first amplifier input point IN4 in the switched capacitor amplifier unit.

[0009] According to an embodiment of the present disclosure, the sources of the first MOS tube and the second MOS tube are both connected to the power supply terminal VDD, the drain and the gate of the first MOS tube are both connected to the first output point O1, and the drain of the second MOS tube is connected to the second output point O2.

[0010] According to an embodiment of the present disclosure, the source of the first transistor Q1 is connected to the first input point IN1, the gate of the first transistor Q1 is connected to the source of the second transistor Q2, and the drain of the first transistor Q1 is connected to the gate and drain of the second transistor Q2 and then grounded GND.

[0011] According to the embodiment of the present disclosure, the current mirror ratio of the cascode current mirror formed by the first MOS transistor MP1 and the second MOS transistor MP2 is 1:N, where N is any integer.

[0012] According to the embodiment of the present disclosure, in the pre-charging mode, the first switch S1 is connected to the first input point IN1, the second switch S2 is connected to the second input point IN2, the third switch S3 and the fifth switch S5 are closed, and the offset voltage of the amplifier can be detected.

[0013] According to an embodiment of the present disclosure, in a stable reference voltage output mode, the third switch S3 is opened, the amplifier offset voltage is stored on the second capacitor C2, and the fourth switch S4 is closed to connect the amplifier offset voltage to the output end of the amplifier to eliminate the offset voltage. The first switch S1 and the second switch S2 are switched to be connected to the third input point IN3 and the first amplifier input point IN4, respectively, to stabilize the output reference voltage.

[0014] According to the embodiment of the present disclosure, a CMOS bandgap reference voltage source with anti-interference capability can achieve a reference voltage output of 2.5V.

[0015] According to the embodiment of the present disclosure, output reference voltages of different magnitudes may be obtained by adjusting the ratio of the first capacitor C1 to the second capacitor C2.

[0016] (III) Beneficial effects

[0017] It can be seen from the above technical solutions that the CMOS bandgap reference voltage source with anti-interference capability disclosed in the present invention has at least one or part of the following beneficial effects:

[0018] (1) Eliminates the influence of the amplifier offset voltage on the output voltage accuracy;

[0019] (2) Eliminates the error caused by bipolar transistor mismatch;

[0020] (3) The circuit structure is simple and occupies a small layout area;

[0021] (4) High precision, adjustable reference voltage, low power consumption and strong anti-interference ability. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a general principle diagram of a bandgap voltage reference;

[0023] Figure 2 It is a schematic diagram of a positive temperature coefficient voltage source;

[0024] Figure 3 This is a schematic diagram of the common bandgap reference source implementation structure;

[0025] Figure 4 A schematic diagram of a circuit principle of a CMOS bandgap reference voltage source according to an embodiment of the present disclosure;

[0026] Figure 5 for Figure 4 The schematic diagram of the circuit principle of the CMOS bandgap reference voltage source working in the precharge mode shown;

[0027] Figure 6 for Figure 4 The circuit principle diagram of the stable reference voltage output mode of the CMOS bandgap reference voltage source shown;

[0028] Figure 7 The present invention is a schematic diagram of the circuit principle of a CMOS bandgap reference voltage source with anti-interference capability and amplifier offset voltage elimination according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The present invention provides a CMOS bandgap reference voltage source with anti-interference capability, adopts a switched capacitor amplifier to achieve a high-precision reference voltage, eliminates the influence of the amplifier's offset voltage on the output voltage accuracy, eliminates the error caused by the mismatch of the bipolar transistor, and achieves a high-precision reference voltage by adjusting the capacitance ratio. The circuit structure is simple, and has the characteristics of high accuracy, adjustable reference voltage, low power consumption, small layout area, strong anti-interference capability, etc.

[0030] The principle of the traditional bandgap reference voltage source is as follows Figure 1 As shown, the basic principle is to add the voltage with positive temperature coefficient and the voltage with negative temperature coefficient with a certain weight to obtain the reference voltage with zero temperature coefficient. The formula can be expressed as:

[0031]

[0032] Where V + is the positive temperature coefficient voltage, V - is a negative temperature coefficient voltage, α and β are weight coefficients, and by selecting appropriate α and β values ​​to make formula (1) valid, a reference voltage with zero temperature coefficient can be obtained. The output reference voltage expression is:

[0033] V REF =α·V + +β·V - (2);

[0034] (1) Negative temperature coefficient voltage

[0035] The voltage between the base and emitter of a bipolar transistor is V BE Has a negative temperature coefficient. For a bipolar device, the collector current I C As shown in formula (3), I S is the saturation current, V T is the thermal voltage, where the saturation current I S and thermal voltage V T and temperature as shown in equations (4) and (5), where Eg is the band gap energy of silicon, k is the Boltzmann constant, m is the coefficient of electron mobility related to temperature, m≈-1.5, q is the electron charge, and T is the absolute temperature.

[0036]

[0037]

[0038]

[0039] From the collector current formula, we can get the base emitter voltage V BE formula:

[0040]

[0041] V BE Take the derivative with respect to temperature:

[0042]

[0043] After taking the derivative of the second term in equation (7), we get:

[0044]

[0045] Combining equations (7) and (8), we get:

[0046]

[0047] When the room temperature T = 300K, V BE ≈750mV, E g =1.12eV, m≈-1.5 is substituted into the above equation (9), and the value obtained in the equation is approximately equal to 1.5mV / ℃.

[0048] (2) Positive temperature coefficient voltage

[0049] The base emitter voltage of a bipolar transistor is V BE It has a negative temperature coefficient. If two bipolar transistors (first transistor Q1, second transistor Q2) are of different sizes and operate at different collector current densities, the base-emitter voltage difference ΔV between the two isBE Appears as a positive temperature coefficient voltage:

[0050]

[0051] Reference Figure 2 , and formula (10), where I0 is the bias current, it can be known that the difference between the base-emitter voltages of the two transistors (i.e., the base-emitter voltage of Q1 is V BE1 The base-emitter voltage of Q2 is V BE2 The difference between ΔV and ΔV is a positive temperature coefficient. BE About 53mV.

[0052] Under the guidance of the traditional bandgap reference source principle, a common bandgap reference source implementation structure is as follows Figure 3 As shown, in Figure 3 In the figure, according to the virtual short characteristics of the positive and negative input terminals of the amplifier, that is, the voltage at point X is equal to the voltage at point Y, it can be obtained that the voltage across R1 is the difference between the base-emitter voltages of the two transistors:

[0053]

[0054] Where N is the ratio of the emitter areas of transistors Q1 and Q2, the current across R1 is V T lnN / R1 is proportional to the temperature. MOS tubes MP1, MP2, and MP3 form a current mirror structure to achieve accurate replication of the current, and finally obtain the reference voltage V OUT for:

[0055]

[0056] Where V BE3 is the base-emitter voltage of transistor Q3. By adjusting the ratio of the two resistors, the output reference voltage V OUT , the general voltage value is around 1.24V.

[0057] From the above analysis, we can see that in the traditional bandgap reference voltage source circuit, the amplifier offset voltage is not eliminated, which will affect the accuracy of the reference source. The ratio of the adjustment resistor will occupy a large layout area. The emitter area of ​​the two bipolar transistors will be mismatched due to different processes, which is not easy to transplant the process, resulting in inaccurate voltage output. The continuous-time bandgap reference voltage source will also have the disadvantage of high power consumption, and the reference circuit can only output a single reference voltage, generally around 1.24V. Finally, at room temperature, ΔV BE The value is generally 53mV. As the input voltage of the amplifier, it may be aliased with the low-frequency noise of the amplifier, resulting in inaccurate output reference voltage and poor resistance to environmental interference.

[0058] The purpose of the present invention is to introduce a novel bandgap reference voltage source structure, which adopts a switched capacitor amplifier to achieve a high-precision reference voltage, eliminates the influence of the amplifier's offset voltage on the output voltage accuracy, eliminates the error caused by the mismatch of the bipolar transistor, and achieves a high-precision reference voltage by adjusting the capacitance ratio and the amplifier's amplification factor. The circuit structure is simple and has the characteristics of high precision, adjustable reference voltage, low power consumption, small layout area, strong anti-interference ability, etc.

[0059] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0060] In an embodiment of the present disclosure, a CMOS bandgap reference voltage source with anti-interference capability is provided, combined with Figures 4 to 7 As shown, the CMOS bandgap reference voltage source with anti-interference capability comprises:

[0061] Power supply terminal VDD;

[0062] A MOS tube unit is connected to the power supply end, and includes two MOS tubes, a first MOS tube MP1 and a second MOS tube MP2, wherein the two MOS tubes form a common-source common-gate current mirror, and the MOS tube unit is provided with a first output point O1 and a second output point O2, wherein the first output point O1 is connected to a first switch S1, and the second output point O2 is connected to a second switch S2;

[0063] The triode unit comprises a first triode branch and a second triode branch, wherein the first triode branch comprises a first triode Q1 and a second triode Q2, and the second triode branch comprises a third triode Q3 and a fourth triode Q4; the first triode branch is provided with a first input point IN1, and the second triode branch is provided with a second input point IN2 and a third input point IN3 connected to each other;

[0064] A switched capacitor amplifier unit comprises an amplifier, a first capacitor C1, a second capacitor C2, a third switch S3, a fourth switch S4, and a fifth switch S5, wherein the positive input end of the amplifier comprises two amplifier input points, namely, a first amplifier input point IN4 and a second amplifier input point IN5, wherein the first amplifier input point IN4 is arranged beside the second input point IN2 of the triode unit, and the second amplifier input point IN5 is connected between the first triode Q1 and the first input point IN1; the negative input end of the amplifier is connected to the first capacitor C1 and then connected between the second input point IN2 of the second triode branch and the third triode Q3; one end of the second capacitor C2 is connected to the negative input end of the amplifier, and the other end of the second capacitor C2 is divided into two switch branches, namely, a first switch branch and a second switch branch; the second capacitor C2 in the first switch branch is connected to the output end of the amplifier after being connected to the fourth switch, and the second capacitor C2 in the second switch branch is connected to the positive input end of the amplifier after being connected to the fifth switch; and the two ends of the third switch S3 are respectively connected to the negative input end and the output end of the amplifier.

[0065] According to an embodiment of the present disclosure, the first switch S1 can be selectively connected to the first input point IN1 and the third input point IN3 in the triode unit. The second switch S2 can be selectively connected to the second input point IN2 and the first amplifier input point IN4 in the switched capacitor amplifier unit.

[0066] According to the embodiment of the present disclosure, the sources of the first MOS transistor and the second MOS transistor are both connected to the power supply terminal VDD, the drain and the gate of the first MOS transistor are both connected to the first output point O1, and the drain of the second MOS transistor is connected to the second output point O2. The source of the first triode Q1 is connected to the first input point IN1, the gate of the first triode Q1 is connected to the source of the second triode Q2, and the drain of the first triode Q1 is connected to the gate and drain of the second triode Q2 and then connected to the ground GND.

[0067] The current mirror ratio of the cascode current mirror formed by the first MOS transistor MP1 and the second MOS transistor MP2 is 1:N, where N is any integer, for example, any integer between 1-200.

[0068] According to an embodiment of the present disclosure, in the pre-charge mode, the bandgap reference voltage source is connected to the first input point IN1 by the first switch S1, the second switch S2 is connected to the second input point IN2, the third switch S3 and the fifth switch S5 are closed, and the offset voltage of the amplifier can be detected. In the stable reference voltage output mode, the third switch S3 is opened, the amplifier offset voltage is stored on the second capacitor C2, the fourth switch S4 is closed, so that the offset voltage of the amplifier is connected to the output end of the amplifier to eliminate the offset voltage, and the first switch S1 and the second switch S2 are switched to be connected to the third input point IN3 and the first amplifier input point IN4 respectively, and the output reference voltage is stabilized. By adjusting the ratio of the first capacitor C1 and the second capacitor C2, different output reference voltages can be obtained. For example, a 2.5V reference voltage output can be achieved.

[0069] In the disclosed embodiment, the transistors (the first transistor Q1 , the second transistor Q2 , the third transistor Q3 , and the fourth transistor Q4 ) are bipolar transistors.

[0070] In the embodiment of the present disclosure, the bipolar transistors Q2 and Q4 are in diode connection form and are stacked on the transistors Q1 and Q3 respectively.

[0071] In the embodiment of the present disclosure, the first switch S1, the second switch S2, and the third switch S3 are clock-controlled switches, and MOS tubes or bipolar transistors may also be used as switches.

[0072] In the embodiment of the present disclosure, the first capacitor C1 and the second capacitor C2 are CMOS process capacitors, usually MIM capacitors or MOM capacitors;

[0073] In the embodiment of the present disclosure, Figure 4-Figure 7 As shown, when the current flowing through transistors Q1 and Q2 is I, the base-emitter voltage difference of Q1 and Q2 is V BE11(I) and V BE12(I) When the current flowing is NI, the base-emitter voltage difference of Q1 and Q2 is V BE12(NI) and V BE12(NI) Similarly, when the current flowing through transistors Q3 and Q4 is I, the base-emitter voltage difference of Q3 and Q4 is V BE21(I) and V BE22(I) When the current flowing is NI, the base-emitter voltage difference of Q3 and Q4 is V BE21(NI) and V BE22(NI) .

[0074] In the embodiment of the present disclosure, the bandgap reference voltage source is in the pre-charge mode, combined with Figure 4 Figure 5As shown, switches S1 and S2 are turned to the left, and switch S3 is closed to short-circuit C2. At this time, the amplifier works like a voltage follower, and the output port voltage of the amplifier is equal to its negative input port voltage. Due to the virtual short-circuit characteristics of the positive and negative input terminals of the amplifier, the output port voltage of the amplifier is V BE11(I) +V BE12(I) At this time, the voltage on the left side of capacitor C1 is V BE11(I) +V BE12(I) , the voltage on the right is V BE21(NI) +V BE22(NI) , capacitor C1 will remain in this powered-on state until the switch switches to the reference voltage output mode of operation.

[0075] In the embodiment of the present disclosure, the bandgap reference voltage source is in a stable reference voltage output mode, combined with Figure 4 and Figure 6 As shown, switch S3 is turned on, C1 saves the voltage of the left and right plates in the pre-power-on mode, and then Figure 4 The switches S1 and S2 are placed on the right side. At this time, the positive input voltage of the amplifier increases by V BE11(NI) +V BE12(NI) -V BE1i(I) -V BE12(I) , the voltage at the left end of capacitor C1 increases by V BE21(NI) +V BE22(NI) -V BE21(I) -V BE22(I) , using the charge conservation law at point A, we can get the output voltage of the amplifier at this time: VOUT = V BE11(I) +V BE12(I) +[(V BE11(NI) +V BE12(NI) )-(V BE11(I) +V BE12(I) )]×(1+C1 / C2)+[(V BE21(NI) +V BE22(NI) )-(V BE21(I) +V BE22(I) )]×C1 / C2)

[0076] =V BE11(NI) +V BE12(NI) +(C1 / C2)×{[(V BE11(NI) +V BE12(NI) )-(V BE11(I) +V BE12(I) )]+[(V BE21(NI) +V BE22(NI) )-(V BE21(I) +V BE22(I) )]} (13)

[0077] Under standard technology, the base-emitter voltage V of the transistor in the circuit is BE, ΔV of the two transistors BE The values ​​of are all equal, then the final output can be expressed as:

[0078]

[0079] Among them, the voltage V BE is a voltage that is inversely proportional to temperature (CTAT), ΔV BE It is a voltage proportional to temperature (PTAT).

[0080] At room temperature, take N = 24, the traditional ΔV BE =V T lnN=(kT / q)lnN=53mV, assuming that the current I is equal to 1uA, NI=24uA, then the total current of the circuit is equal to I+NI=25uA, and this circuit can achieve 4ΔV BE =212mV, the traditional circuit needs to achieve such an equivalent ΔV BE , the total circuit current required is I+N 4 I=(1+24 4 )uA, it is obvious that this circuit greatly reduces the power consumption, and the output of 2.5V reference current can be obtained from the final reference output expression.

[0081] In the embodiment of the present disclosure, the CMOS bandgap reference voltage source with anti-interference capability has the capability of eliminating the amplifier offset voltage. Figure 4 and Figure 7 As shown, when the bandgap reference voltage source is in the pre-power-on state, Figure 4 On the basis of the circuit, switches S4 and S5 are added, so that C2 is no longer directly connected to the output of the amplifier, but connected to the positive input of the amplifier. When switch S3 is closed, switch S5 is closed at the same time to detect the offset voltage of the amplifier. When the circuit is switched to the reference voltage output mode, switch S3 is opened to store the amplifier offset voltage on C2, and S4 is closed to connect the amplifier offset voltage to the output of the amplifier to eliminate the offset voltage. Finally, the circuit starts to switch switches S1 and S2 to work normally.

[0082] In the embodiment of the present disclosure, the reference voltage provided by the CMOS bandgap reference voltage source with anti-interference capability can achieve an output of about 2.5V, which is doubled compared with the reference voltage output of the traditional structure, and the difference voltage is expanded to 4 times, thereby improving the signal-to-noise ratio of the amplifier input port and enhancing the anti-interference capability of the circuit; the reference voltage is realized by a switched capacitor amplifier, which significantly reduces power consumption; compared with the traditional bandgap reference structure, there is no resistor in the circuit of the present invention, which saves the area of ​​the layout; there is no requirement for the ratio of the four transistors in the circuit, which reduces the error caused by the inaccurate matching of the transistor ratios compared with the traditional structure, and the process transplantation is simpler; it can be seen from formula (13) that different output reference voltages can be obtained by adjusting the ratio of the two capacitors; the CMOS bandgap reference voltage source with anti-interference capability disclosed in the present disclosure eliminates the offset voltage of the amplifier and can output a reference voltage with higher accuracy.

[0083] So far, the embodiments of the present disclosure have been described in detail in conjunction with the accompanying drawings. It should be noted that the implementation methods not shown or described in the drawings or the body of the specification are all forms known to ordinary technicians in the relevant technical field and are not described in detail. In addition, the above definitions of each element and method are not limited to the various specific structures, shapes or methods mentioned in the embodiments, and ordinary technicians in the field can simply change or replace them.

[0084] According to the above description, those skilled in the art should have a clear understanding of the CMOS bandgap reference voltage source with anti-interference capability disclosed in the present invention.

[0085] In summary, the present invention provides a CMOS bandgap reference voltage source with anti-interference capability, adopts a switched capacitor amplifier structure, effectively reduces the power consumption of the circuit, and uses the charge conservation law to achieve a high-precision reference output voltage; uses switch switching to achieve a 4-fold base-emitter voltage difference, improves the signal-to-noise ratio at the output end of the amplifier, effectively improves the output accuracy of the reference voltage, and can achieve a 2.5V reference voltage output; the resistance-free bandgap reference voltage structure effectively reduces the layout area; there is no need to set the emitter area ratio of the transistor, which can effectively reduce the influence of the bipolar transistor ratio mismatch in the traditional bandgap reference circuit on the output reference voltage.

[0086] It should also be noted that the above are different embodiments provided by the present disclosure. These embodiments are used to illustrate the technical content of the present disclosure, rather than to limit the scope of protection of the present disclosure. A feature of an embodiment can be applied to other embodiments through appropriate modification, replacement, combination, and separation.

[0087] It should be noted that, in this document, unless otherwise specified, “a” element is not limited to a single element, but may include one or more elements.

[0088] In addition, in this document, unless otherwise specified, ordinal numbers such as "first" and "second" are only used to distinguish multiple components with the same name, and do not indicate that there is a hierarchy, level, execution order, or process order between them. A "first" component and a "second" component may appear together in the same component, or appear in different components. The presence of a component with a larger ordinal number does not necessarily indicate the presence of another component with a smaller ordinal number.

[0089] In this document, unless otherwise specified, the so-called feature A "or" or "and / or" (and / or) feature B means that A exists alone, B exists alone, or A and B exist at the same time; the so-called feature A "and" (and) or "and" (and) or "and" (and) feature B means that A and B exist at the same time; the so-called "includes", "comprising", "has" and "containing" mean including but not limited to these.

[0090] In addition, in this document, the terms "upper", "lower", "left", "right", "front", "back", or "between" are only used to describe the relative positions between multiple elements, and can be extended to include translation, rotation, or mirroring. In addition, in this document, unless otherwise specified, "an element is on another element" or similar descriptions do not necessarily mean that the element contacts the other element.

[0091] In addition, unless the steps are specifically described or must occur in sequence, the order of the above steps is not limited to the above list, and can be changed or rearranged according to the required design. And the above embodiments can be mixed and matched with each other or with other embodiments based on design and reliability considerations, that is, the technical features in different embodiments can be freely combined to form more embodiments.

[0092] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present disclosure. It should be understood that the above description is only a specific embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A CMOS bandgap reference voltage source with anti-interference capability, comprising: Power supply terminal VDD; A MOS tube unit is connected to the power supply end, and includes two MOS tubes, a first MOS tube MP1 and a second MOS tube MP2, wherein the two MOS tubes form a common-source common-gate current mirror, and the MOS tube unit is provided with a first output point O1 and a second output point O2, wherein the first output point O1 is connected to a first switch S1, and the second output point O2 is connected to a second switch S2; The triode unit comprises a first triode branch and a second triode branch, wherein the first triode branch comprises a first triode Q1 and a second triode Q2, and the second triode branch comprises a third triode Q3 and a fourth triode Q4; the first triode branch is provided with a first input point IN1, and the second triode branch is provided with a second input point IN2 and a third input point IN3 connected to each other; A switched capacitor amplifier unit comprises an amplifier, a first capacitor C1, a second capacitor C2, a third switch S3, a fourth switch S4, and a fifth switch S5, wherein the positive input end of the amplifier comprises two amplifier input points, namely, a first amplifier input point IN4 and a second amplifier input point IN5, wherein the first amplifier input point IN4 is arranged beside the second input point IN2 of the triode unit, and the second amplifier input point IN5 is connected between the first triode Q1 and the first input point IN1; the negative input end of the amplifier is connected to the first capacitor C1 and then connected between the second input point IN2 of the second triode branch and the third triode Q3; one end of the second capacitor C2 is connected to the negative input end of the amplifier, and the other end of the second capacitor C2 is divided into two switch branches, namely, a first switch branch and a second switch branch; the second capacitor C2 in the first switch branch is connected to the output end of the amplifier after being connected to the fourth switch S4, and the second capacitor C2 in the second switch branch is connected to the positive input end of the amplifier after being connected to the fifth switch S5; and the two ends of the third switch S3 are respectively connected to the negative input end and the output end of the amplifier. 2 . The CMOS bandgap reference voltage source with anti-interference capability according to claim 1 , wherein the first switch S1 can be selectively connected to the first input point IN1 and the third input point IN3 in the transistor unit. 3 . The CMOS bandgap reference voltage source with anti-interference capability according to claim 2 , wherein the second switch S2 is selectively connectable to the second input point IN2 and the first amplifier input point IN4 in the switched capacitor amplifier unit.

4. The CMOS bandgap reference voltage source with anti-interference capability according to claim 1, wherein the sources of the first MOS transistor and the second MOS transistor are both connected to the power supply terminal VDD, the drain and the gate of the first MOS transistor are both connected to the first output point O1, and the drain of the second MOS transistor is connected to the second output point O2.

5. The CMOS bandgap reference voltage source with anti-interference capability according to claim 1, wherein the source of the first transistor Q1 is connected to the first input point IN1, the gate of the first transistor Q1 is connected to the source of the second transistor Q2, and the drain of the first transistor Q1 is connected to the gate and drain of the second transistor Q2 and then grounded together to GND. 6 . The CMOS bandgap reference voltage source with anti-interference capability according to claim 1 , wherein a current mirror ratio of a cascode current mirror formed by the first MOS transistor MP1 and the second MOS transistor MP2 is 1:N, where N is any integer.

7. According to the CMOS bandgap reference voltage source with anti-interference capability as claimed in claim 1, in the pre-charge mode, the first switch S1 is connected to the first input point IN1, the second switch S2 is connected to the second input point IN2, the third switch S3 and the fifth switch S5 are closed, and the offset voltage of the amplifier can be detected.

8. According to claim 7, the CMOS bandgap reference voltage source with anti-interference capability, in a stable reference voltage output mode, the third switch S3 is opened, the amplifier offset voltage is stored on the second capacitor C2, the fourth switch S4 is closed, so that the amplifier offset voltage is connected to the output end of the amplifier to eliminate the offset voltage, the first switch S1 and the second switch S2 are switched to be connected to the third input point IN3 and the first amplifier input point IN4 respectively, and the output reference voltage is stabilized.

9. The CMOS bandgap reference voltage source with anti-interference capability according to claim 1 can achieve a reference voltage output of 2.5V. 10 . The CMOS bandgap reference voltage source with anti-interference capability according to claim 1 , wherein output reference voltages of different magnitudes can be obtained by adjusting the ratio of the first capacitor C1 to the second capacitor C2 .

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