Microcontroller, protection circuit and protection method capable of avoiding interference from sudden events

Abstract

The present application discloses a microcontroller, a protection circuit, and a protection method. The microcontroller includes an event detection circuit, a protection control circuit, a digital-to-analog converter, a digital-to-analog conversion interface controller, a trigger event controller, and a central processing unit. The event detection circuit detects an emergency event and, based on the emergency event, outputs an interrupt notification and a protection enable signal. The protection control circuit receives the protection enable signal and outputs a protection execution signal. The digital-to-analog conversion interface controller receives the protection execution signal, stops updating the received input data, and stops outputting a confirmation signal. The trigger event controller determines whether to set conversion parameters for the digital-to-analog conversion interface controller based on the confirmation signal. The central processing unit determines and outputs the conversion parameters to the trigger event controller, and receives an interrupt notification to eliminate the emergency event.

Description

Technical Field

[0001] The present invention relates to an electronic device, and in particular to a microcontroller, a protection circuit, and a protection method capable of avoiding interference from sudden events. Background Art

[0002] In existing technologies, when an unexpected event occurs in a microcontroller's operating environment, the microcontroller's internal digital-to-analog converter (DAC) may unexpectedly terminate, resulting in an abnormal output voltage. This can cause unexpected output breakpoints in applications that rely on the DAC's output voltage as an operating voltage reference or control waveforms. When this unexpected DAC output voltage is transmitted to downstream loads, it can pose safety concerns or risks to system applications. Summary of the Invention

[0003] A microcontroller according to an embodiment of the present invention includes: an event detection circuit, a protection control circuit, a digital-to-analog converter, a digital-to-analog conversion interface controller, a trigger event controller, and a central processing unit. The event detection circuit is used to detect an emergency event and, based on the emergency event, outputs an interrupt notification and a protection enable signal. The protection control circuit receives the protection enable signal and, based on the protection enable signal, outputs a protection execution signal. The digital-to-analog conversion interface controller receives the protection execution signal, stops updating the received input data, and stops outputting a confirmation signal, causing the digital-to-analog converter to pause signal conversion. The trigger event controller determines, based on the confirmation signal, whether to set conversion parameters for the digital-to-analog conversion interface controller. The central processing unit determines the conversion parameters, outputs the conversion parameters to the trigger event controller, and receives an interrupt notification to resolve the emergency event.

[0004] The microcontroller further includes a memory and a direct memory access controller. The direct memory access controller reads required input data from the memory and outputs the required input data to the digital-to-analog converter interface controller. When the protection control circuit receives a protection enable signal, the protection control circuit outputs a control signal to the direct memory access controller, causing the direct memory access controller to suspend the transfer of required input data from the memory to the digital-to-analog converter interface controller.

[0005] As in the above-mentioned microcontroller, the central processing unit eliminates the emergency, including: the central processing unit resolves the emergency and clears the interrupt notification; or the central processing unit directly determines that the emergency has been eliminated after a preset time.

[0006] In the microcontroller as mentioned above, when the event detection circuit detects that the emergency event has been resolved, the event detection circuit correspondingly outputs a protection disable signal to the protection control circuit.

[0007] In the microcontroller described above, when the protection control circuit receives a protection disable signal and the central processing unit has eliminated the emergency event, the protection control circuit correspondingly outputs a protection stop signal to the digital-to-analog conversion interface controller and correspondingly outputs an inverted control signal to the direct memory access controller, so that the digital-to-analog conversion interface controller and the direct memory access controller resume normal operation.

[0008] As in the above-mentioned microcontroller, when the central processing unit receives the protection execution signal from the protection control circuit and an automatic switching function corresponding to the conversion parameter of the central processing unit is turned on, the central processing unit outputs the conversion parameter to the trigger event controller.

[0009] For example, in the microcontroller mentioned above, the conversion parameter includes: a trigger period of a trigger event of a peripheral circuit.

[0010] As in the above-mentioned microcontroller, the digital-to-analog conversion interface controller stops updating the received input data, including: the digital-to-analog conversion interface controller stores the last input data before receiving the protection execution signal; the digital-to-analog conversion interface controller records the interface signal before receiving the protection execution signal; and the trigger event controller does not receive the confirmation signal, so that the trigger event controller does not output a trigger signal to the digital-to-analog conversion interface controller.

[0011] According to an embodiment of the present invention, a protection circuit is used to protect a digital-to-analog converter from interference caused by an emergency event, and includes: a protection control circuit, a digital-to-analog conversion interface controller, a trigger event controller, and a central processing unit. The protection control circuit receives a protection enable signal associated with the emergency event and correspondingly outputs a protection execution signal. The digital-to-analog conversion interface controller receives the protection execution signal, stops updating the received input data, and stops outputting a confirmation signal, causing the digital-to-analog converter to pause signal conversion. The trigger event controller determines whether to set conversion parameters for the digital-to-analog conversion interface controller based on the confirmation signal. The central processing unit determines the conversion parameters, outputs the conversion parameters to the trigger event controller, and eliminates the emergency event.

[0012] In the protection circuit described above, when the protection control circuit receives the protection enable signal, the protection control circuit outputs a control signal to a direct memory access controller, causing the direct memory access controller to suspend transferring required input data from a memory to the digital-to-analog conversion interface controller.

[0013] As in the protection circuit described above, the central processing unit eliminates the emergency, including: the central processing unit resolves the emergency and clears an interrupt notification associated with the emergency; or the central processing unit directly determines that the emergency has been eliminated after a preset time.

[0014] In the protection circuit described above, when the protection control circuit receives a protection disable signal associated with the release of an emergency event and the central processing unit has eliminated the emergency event, the protection control circuit correspondingly outputs a protection stop signal to the digital-to-analog conversion interface controller and correspondingly outputs an inverted control signal to the direct memory access controller, so that the digital-to-analog conversion interface controller and the direct memory access controller resume normal operation.

[0015] In the protection circuit described above, when the central processing unit receives a protection execution signal from the protection control circuit and an automatic switching function corresponding to a conversion parameter of the central processing unit is turned on, the central processing unit outputs the conversion parameter to the trigger event controller.

[0016] For example, in the protection circuit described above, the conversion parameter includes a trigger period of a trigger event of the peripheral circuit.

[0017] As in the protection circuit mentioned above, the digital-to-analog conversion interface controller stops updating the received input data, including: the digital-to-analog conversion interface controller stores the last input data before receiving the protection execution signal; the digital-to-analog conversion interface controller records the interface signal before receiving the protection execution signal; and the trigger event controller does not receive the confirmation signal, so that the trigger event controller does not output a trigger signal to the digital-to-analog conversion interface controller.

[0018] A protection method for a digital-to-analog converter according to an embodiment of the present invention is applicable to a microcontroller having an event detection circuit, a protection control circuit, a digital-to-analog conversion interface controller, a digital-to-analog converter, a trigger event controller, and a central processing unit. The method includes: detecting an emergency event and, based on the emergency event, outputting an interrupt notification and a protection enable signal accordingly; receiving the protection enable signal and, based on the protection enable signal, outputting a protection execution signal accordingly; receiving the protection execution signal, stopping updating the received input data and stopping outputting a confirmation signal, thereby causing the digital-to-analog converter to suspend signal conversion; determining and outputting conversion parameters of the digital-to-analog converter, and receiving an interrupt notification for eliminating the emergency event; and determining, based on the confirmation signal, whether to set the conversion parameters.

[0019] In the protection method described above, when the protection enable signal is received, the transfer of required input data from a memory to the digital-to-analog conversion interface controller is suspended.

[0020] As in the above-mentioned protection method, eliminating the emergency event includes: resolving the emergency event and clearing the interruption notification associated with the emergency event; or directly determining that the emergency event has been eliminated after a preset time has passed.

[0021] In the protection method described above, when the protection execution signal is received and an automatic switching function corresponding to the conversion parameter is turned on in the central processing unit, the conversion parameter is output to the trigger event controller.

[0022] As in the protection method mentioned above, stopping updating the received input data includes: storing the last input data before receiving the protection execution signal; recording the interface signal before receiving the protection execution signal; and not receiving the confirmation signal, thereby not outputting a trigger signal to the digital-to-analog conversion interface controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 FIG. 1 is a schematic diagram of a microcontroller 100 according to an embodiment of the present invention.

[0024] Figure 2 FIG. 2 is a schematic diagram of a protection circuit 200 according to an embodiment of the present invention.

[0025] Figure 3 Flowchart of a protection method for a digital-to-analog converter according to an embodiment of the present invention.

[0026]

Explanation of symbols

[0027] 100: Microcontroller

[0028] 102: event detection circuit

[0029] 104: Protection control circuit

[0030] 106: Digital-to-analog conversion interface controller

[0031] 108: Trigger event controller

[0032] 110: Central Processing Unit

[0033] 112: Digital-to-Analog Converter

[0034] 114: Direct Memory Access Controller

[0035] 116: Memory

[0036] 130: External Events

[0037] 132: Internal Event

[0038] 134: Emergency

[0039] 140: Interruption notification

[0040] 142: Protection enable signal

[0041] 144: Protection disable signal

[0042] 146: Indication signal

[0043] 150: Protection execution signal

[0044] 152: Protection stop signal

[0045] 154: Control signal

[0046] 156: Inverting control signal

[0047] 160,162: Indication signal

[0048] 164,166: data signal

[0049] 168: Trigger signal

[0050] 170,172: Select signal

[0051] 180,182,184: Multiplexer

[0052] 186: Noise filter

[0053] 188,190: AND gate

[0054] 189:Event Counter

[0055] 191: Interruption event

[0056] 192: Block

[0057] 193: Initial Settings

[0058] 194:Reload time

[0059] 195: Timer / Pulse Width Modulator Conversion Parameter Setting Group

[0060] 196: Timer / Pulse Width Modulator Initial Conversion Parameters

[0061] 200: Protection circuit

[0062] 204: Protection control circuit

[0063] 206: Digital-to-analog conversion interface controller

[0064] 208: Trigger event controller

[0065] 210: Central Processing Unit

[0066] 212: Digital-to-Analog Converter

[0067] 214: Direct Memory Access Controller

[0068] 216: Memory

[0069] 280,282,284: Multiplexer

[0070] 288,290: AND gate

[0071] 289:Event Counter

[0072] S300, S302, S304, S306, S308: Steps DETAILED DESCRIPTION

[0073] The present invention is described with reference to the accompanying drawings, in which like reference numerals throughout the drawings designate similar or identical elements. The drawings are not drawn to scale and are provided solely to illustrate the present invention. Some embodiments of the invention are described below as references to illustrative applications. This means that many specific details, relationships, and methods are set forth to provide a complete understanding of the invention. However, those skilled in the art will recognize that the invention can still be practiced without one or more of the specific details or with alternative methods.

[0074] In other examples, well-known structures or operations are not described in detail to avoid obscuring the present invention. The present invention is not limited by the order of the acts or events described; some acts may occur in a different order or concurrently with other acts or events. Furthermore, not all acts or events described need to be performed in the same manner as in the prior invention.

[0075] Figure 1 FIG. 1 is a schematic diagram of a microcontroller 100 according to an embodiment of the present invention. Figure 1 As shown, the microcontroller 100 includes an event detection circuit 102, a protection control circuit 104, a digital-to-analog conversion interface controller 106, a trigger event controller 108, a central processing unit 110, a digital-to-analog converter 112, a direct memory access controller 114, a memory 116, a multiplexer 180, a multiplexer 182, a multiplexer 184, a noise filter 186, an AND gate 188, an AND gate 190, and an event counter 189.

[0076] In some embodiments, the event detection circuit 102 can detect an emergency event 134 and, based on the emergency event 134, output an interrupt notification 140 to the central processing unit 110 and a protection enable signal 142 to the protection control circuit 104. In some embodiments, the emergency event 134 can be an external event 130 or an internal event 132. For example, the external event 130 can be an emergency event caused by an external physical attack on the microcontroller 100. The internal event 132 can be an event such as a clock drift exceeding an allowable range, a parity error in a memory (e.g., memory 116), a system reset caused by a low voltage, or an event generated by peripheral circuits such as a comparator, a timer, and a pulse width modulator.

[0077] The multiplexer 180 receives the external event 130 or the internal event 132 based on a selection signal EVENSEL. For example, when the selection signal EVENSEL is at a logic low level (e.g., "0"), the multiplexer 180 allows the external event 130 to pass through, causing the external event 130 to pass through the noise filter 186 and become the burst event 134. Conversely, when the selection signal EVENSEL is at a logic high level (e.g., "1"), the multiplexer 180 allows the internal event 132 to pass through, causing the internal event 132 to pass through the noise filter 186 and become the burst event 134.

[0078] In some embodiments, noise filter 186 may be a digital filter comprised of three flip-flops connected in series, driven by the clock signal CLK, but the present invention is not limited thereto. In other words, noise filter 186 may filter out burst events with a data length less than three clock cycles and only pass burst events with a data length greater than or equal to three clock cycles.

[0079] In some embodiments, the event detection circuit 102 can detect the emergency event 134 by detecting the rising edge or falling edge of a signal, but the present invention is not limited thereto. The protection control circuit 104 receives the protection enable signal 142 from the event detection circuit 102 and, in response, outputs a protection execution signal 150 to the digital-to-analog conversion interface controller 106 and, in response, outputs the protection execution signal 150 to the AND gate 190. Upon receiving the protection execution signal 150, the digital-to-analog conversion interface controller 106 stops updating the received input data and stops outputting an acknowledgment signal ACK to the trigger event controller 108, causing the digital-to-analog converter 112 to suspend signal conversion.

[0080] Generally speaking, only when the trigger event controller 108 receives the acknowledgment signal ACK will the trigger event controller 108 set or update the conversion parameters for the DAC interface controller 106. Therefore, when the DAC interface controller 106 receives the protection execution signal 150 and stops outputting the acknowledgment signal ACK to the trigger event controller 108, the trigger event controller 108 does not output a trigger signal 168 to the DAC interface controller 106. In other words, the trigger event controller 108 determines whether to set the conversion parameters for the DAC interface controller 106 based on the acknowledgment signal ACK.

[0081] In some embodiments, when the DAC interface controller 106 receives the protection execution signal 150 and stops updating the received input data, the DAC interface controller 106 further stores the last input data before receiving the protection execution signal 150 and records the interface signal before receiving the protection execution signal 150. This maintains the original level of the input interface signal required for DAC, thereby preventing leakage current. The DAC interface controller 106 then automatically shuts down the clock required by the digital circuit.

[0082] In some embodiments, the direct memory access controller 114 reads required input data from the memory 116 and outputs the required input data to the digital-to-analog converter interface controller 106. The memory 116 may be, for example, a static random access memory (SRAM), but the present invention is not limited thereto. When the protection control circuit 104 receives the protection enable signal 142, the protection control circuit 104 outputs a control signal 154 to the direct memory access controller 114, causing the direct memory access controller 114 to suspend the transfer of required input data from the memory 116 to the digital-to-analog converter interface controller 106.

[0083] Specifically, when the DMA controller 114 receives the control signal 154, it turns off the clock signal corresponding to the DMA trigger source, thereby blocking the trigger request of the DMA controller 114 and thereby suspending the transfer of input data to the DAC interface controller 106. In some embodiments, if the DMA controller 114 receives the control signal 154 while the input data is being transferred (i.e., a sudden event occurs), the DMA conversion of the data will not be completed and the DMA controller 114 will have to wait until the sudden event is resolved before transferring the data again.

[0084] After receiving the interrupt notification 140 from the event detection circuit 102, the central processing unit 110 generates an interrupt event 191 corresponding to the emergency event 134, and the central processing unit 110 resolves the interrupt event 191 associated with the emergency event 134 and clears the interrupt event 191 (i.e., Figure 1 At this time, the central processing unit 110 will correspondingly output an indication signal 160 to the multiplexer 182.

[0085] When the CPU 110's resources are prioritized and it is inconvenient to directly process the interrupt event 191 associated with the emergency event 134, the CPU 110 may determine that the emergency event 134 has been resolved after a predetermined time has passed, based on a reload time 194 configured in its initial settings 193 (e.g., a predetermined time). After the predetermined time has passed, the CPU 110 accordingly outputs an indication signal 162 to the multiplexer 182.

[0086] The multiplexer 182 receives the indication signal 160 or the indication signal 162 according to a selection signal LOADEN. For example, when the selection signal LOADEN is at a logic low level (e.g., "0"), the multiplexer 182 passes the indication signal 160, causing the indication signal 160 to be output to the AND gate 188. When the selection signal LOADEN is at a logic high level (e.g., "1"), the multiplexer 182 passes the indication signal 162, causing the indication signal 162 to be output to the AND gate 188.

[0087] In some embodiments, when the protection control circuit 104 receives the protection enable signal 142 from the event detection circuit 102, the protection control circuit 104 correspondingly outputs a protection execution signal 150 to the AND gate 190. When an automatic switching function corresponding to the conversion parameter in the central processing unit 110 is enabled, that is, the enable signal AUTOEN is at a logic high level (e.g., "1") and the protection execution signal 150 is also at a logic high level (e.g., "1"), the central processing unit 110 outputs the conversion parameter to the trigger event controller 108.

[0088] Specifically, when the enable signal AUTOEN is at a logic high level (e.g., "1") and the protection execution signal 150 is also at a logic high level (e.g., "1"), the AND gate 190 outputs the select signal 170, which is also at a logic high level. The event counter 189 counts the select signal 170. In the initial settings 193 of the central processing unit 110, a timer / pulse width modulator (PWM) conversion parameter setting group 195 records conversion parameters corresponding to different count values. Typically, the timer / pulse width modulator (PWM) conversion parameter setting group is stored in a buffer, but the present invention is not limited thereto.

[0089] For example, when the count value of the event counter 189 is 1 (corresponding to the event detection circuit 102 detecting one burst event 134), the central processing unit 110 selects the first set of conversion parameters from the timer / pulse width modulator conversion parameter setting set 195 according to the selection signal 172. When the count value of the event counter 189 is 2 (corresponding to the event detection circuit 102 detecting two burst events 134), the central processing unit 110 selects the second set of conversion parameters from the timer / pulse width modulator conversion parameter setting set 195 according to the selection signal 172, and so on. At this time, the central processing unit 110 correspondingly outputs the data signal 164 associated with the selected conversion parameters to the multiplexer 184.

[0090] In some embodiments, the conversion parameters may include, for example, a trigger period of a trigger event of a peripheral circuit. The peripheral circuit may be, for example, a timer, a pulse width modulator, and a comparator, but the present invention is not limited thereto. In some embodiments, the central processing unit 110 may set initial timer / pulse width modulator conversion parameters 196 and correspondingly output a data signal 166 associated with the initial conversion parameters to the multiplexer 184.

[0091] The multiplexer 184 receives either the data signal 164 or the data signal 166 based on a selection signal 170. For example, when the selection signal 170 is at a logic high level, the multiplexer 184 passes the data signal 164, causing the multiplexer 184 to output a trigger signal 168 carrying information about the selected conversion parameters (from the timer / pulse width modulator conversion parameter setting group 195) to the trigger event controller 108. When the selection signal 170 is at a logic low level, the multiplexer 184 passes the data signal 166, causing the multiplexer 184 to output a trigger signal 168 carrying information about the initial conversion parameters (from the timer / pulse width modulator initial conversion parameters 196) to the trigger event controller 108.

[0092] In some embodiments, the event detection circuit 102 can not only detect the rising edge or falling edge of the output signal of the noise filter 186 to determine whether the emergency event 134 has occurred, but also determine whether the emergency event 134 has been resolved. When the event detection circuit 102 detects that the emergency event 134 has been resolved, the event detection circuit 102 will correspondingly output a protection disable signal 144 to the protection control circuit 104. Figure 1 In the embodiment of FIG. 1 , the event detection circuit 102 outputs the protection disable signal 144 to the AND gate 188 .

[0093] Therefore, when the protection control circuit 104 receives the protection disable signal 144 (i.e., the protection disable signal 144 is at a logic high level “1”), and the central processing unit 110 has eliminated the emergency event (i.e., the indication signal 160 or the indication signal 162 is also at a logic high level “1”), that is, the indication signal 146 is also at a logic high level, the protection control circuit 104 correspondingly outputs a protection stop signal 152 to the digital-to-analog conversion interface controller 106, and correspondingly outputs an inverting control signal 156 to the direct memory access controller 114, so that the digital-to-analog conversion interface controller 106 and the direct memory access controller 114 resume normal operation.

[0094] After receiving the protection stop signal 152 from the protection control circuit 104, the DAC controller 106 begins updating the received input data and outputting an acknowledgment signal ACK. The trigger event controller 108 then outputs a trigger signal 168 to the DAC controller 106 to update the received input data. The DAC controller 106 then outputs the updated input data to the digital-to-analog converter 112 for digital-to-analog conversion. After receiving the inverted control signal 156 from the protection control circuit 104, the DMA controller 114 begins transferring the required input data from the memory 116 to the DAC controller 106.

[0095] In some embodiments, when the protection control circuit 104 receives the protection disable signal 144 and the central processing unit 110 has resolved the emergency event (i.e., the indication signal 146 is also at a logic high level), the protection control circuit 104 correspondingly outputs a protection stop signal 152 to the AND gate 190. In this case, since the protection stop signal 152 is at a logic low level, the selection signal 170 will be at a logic low level regardless of whether the enable signal AUTOEN is at a logic high or logic low level. Therefore, the central processing unit 110 outputs a trigger signal 168 carrying the initial conversion parameters (from the timer / pulse width modulator initial conversion parameters 196) to the trigger event controller 108. Subsequently, upon receiving the acknowledgment signal ACK, the trigger event controller 108 outputs the trigger signal 168 carrying the initial conversion parameters to the digital-to-analog conversion interface controller 106 to initialize the conversion parameters.

[0096] Figure 2 FIG is a schematic diagram of a protection circuit 200 according to an embodiment of the present invention. Figure 2 As shown, the protection circuit 200 includes a protection control circuit 204, a digital-to-analog conversion interface controller 206, a trigger event controller 208, a central processing unit 210, a multiplexer 282, a multiplexer 284, an AND gate 288, an AND gate 290, and an event counter 289. The protection control circuit 204 receives a signal associated with an emergency event (e.g., Figure 1 In some embodiments, the protection enable signal 142 may be generated by, for example, Figure 1 The event detection circuit 102 outputs after detecting the emergency event 134, but the present invention is not limited thereto.

[0097] Upon receiving the protection execution signal 150, the DAC interface controller 206 stops updating the received input data and stops outputting an acknowledgment signal ACK to the trigger event controller 208, causing a DAC 212 electrically connected downstream of the DAC interface controller 206 to pause signal conversion. Generally, the trigger event controller 208 will only set or update conversion parameters for the DAC interface controller 206 when it receives the acknowledgment signal ACK.

[0098] Therefore, when the DAC controller 206 receives the protection execution signal 150 and stops outputting the acknowledgment signal ACK to the trigger event controller 208, the trigger event controller 208 does not output a trigger signal 168 to the DAC controller 206. In other words, the trigger event controller 208 determines whether to set the conversion parameters for the DAC controller 206 based on the acknowledgment signal ACK.

[0099] In some embodiments, when the DAC interface controller 206 receives the protection execution signal 150 and stops updating the received input data, the DAC interface controller 206 further stores the last input data before receiving the protection execution signal 150 and records the interface signal before receiving the protection execution signal 150. This maintains the original level of the input interface signal required for DAC, thereby preventing leakage current. The DAC interface controller 206 then automatically shuts down the clock required by the digital circuit.

[0100] In some embodiments, a direct memory access controller 214 is electrically connected to the DAC controller 206 and the protection control circuit 204. The direct memory access controller 214 reads required input data from a memory 216 and outputs the required input data to the DAC controller 206. The memory 216 may be, for example, a static random access memory (SRAM), but the present invention is not limited thereto. When the protection control circuit 204 receives the protection enable signal 142, the protection control circuit 204 outputs a control signal 154 to the direct memory access controller 214, causing the direct memory access controller 214 to suspend the transfer of required input data from the memory 216 to the DAC controller 206.

[0101] Specifically, when the DMA controller 214 receives the control signal 154, it turns off the clock signal corresponding to the DMA trigger source, thereby blocking the trigger request of the DMA controller 214 and thereby suspending the transfer of input data to the DAC interface controller 206. In some embodiments, if the DMA controller 214 receives the control signal 154 while the input data is being transferred (i.e., a sudden event occurs), the DMA conversion of the data will not be completed and the DMA controller 214 will have to wait until the sudden event is resolved before transferring the data again.

[0102] Figure 2 The central processing unit 210 may receive, for example, Figure 1The interrupt notification 140 output by the event detection circuit 102 generates an interrupt event 191 corresponding to the emergency event 134, and the central processing unit 210 resolves the interrupt event 191 associated with the emergency event 134 and clears the interrupt event 191 (i.e., Figure 2 At this time, the central processing unit 210 will correspondingly output an indication signal 160 to the multiplexer 282.

[0103] When the CPU 210's resources are prioritized and it is inconvenient to directly process the interrupt event 191 associated with the emergency event 134, the CPU 210 can directly determine that the emergency event 134 has been resolved after a predetermined time has passed, based on the reload time 194 set in its initial settings 193 (e.g., a predetermined time). After the predetermined time has passed, the CPU 210 accordingly outputs an indication signal 162 to the multiplexer 282.

[0104] The multiplexer 282 receives the indication signal 160 or the indication signal 162 according to a selection signal LOADEN. For example, when the selection signal LOADEN is at a logic low level (e.g., "0"), the multiplexer 282 passes the indication signal 160, causing the indication signal 160 to be output to the AND gate 288. When the selection signal LOADEN is at a logic high level (e.g., "1"), the multiplexer 282 passes the indication signal 162, causing the indication signal 162 to be output to the AND gate 288.

[0105] In some embodiments, when the protection control circuit 204 receives Figure 1 The protection control circuit 204 accordingly outputs the protection execution signal 150 to the AND gate 290 based on the protection enable signal 142 of the event detection circuit 102. When an automatic switching function corresponding to the conversion parameter in the central processing unit 210 is enabled, that is, the enable signal AUTOEN is at a logic high level (e.g., "1") and the protection execution signal 150 is also at a logic high level (e.g., "1"), the central processing unit 210 outputs the conversion parameter to the trigger event controller 208.

[0106] Specifically, when the enable signal AUTOEN is at a logic high level (e.g., "1") and the protection execution signal 150 is also at a logic high level (e.g., "1"), the AND gate 290 outputs the select signal 170, which is also at a logic high level. The event counter 289 counts the select signal 170. In the initialization 193 of the central processing unit 210, the timer / pulse width modulator (PWM) conversion parameter setting group 195 records the conversion parameters corresponding to different count values. Typically, the timer / pulse width modulator (PWM) conversion parameter setting group is stored in a buffer, but the present invention is not limited thereto.

[0107] For example, when the count value of the event counter 289 is 1 (which may correspond to Figure 1 If the event detection circuit 102 detects one burst event 134), the central processing unit 210 selects the third set of conversion parameters from the timer / pulse width modulator conversion parameter setting set 195 according to the selection signal 172. If the event counter counts to 2 (which may correspond to the event detection circuit 102 detecting two burst events 134), the central processing unit 210 selects the fourth set of conversion parameters from the timer / pulse width modulator conversion parameter setting set 195 according to the selection signal 172, and so on. At this point, the central processing unit 210 correspondingly outputs the data signal 164 associated with the selected conversion parameters to the multiplexer 284.

[0108] In some embodiments, similarly, Figure 2 The conversion parameters may include, for example, a trigger period of a trigger event of a peripheral circuit. The peripheral circuit may be, for example, a timer, a pulse width modulator, and a comparator, but the present invention is not limited thereto. In some embodiments, the central processing unit 210 may set the timer / pulse width modulator initial conversion parameters 196 and correspondingly output the data signal 166 associated with the initial conversion parameters to the multiplexer 284.

[0109] The multiplexer 284 receives either the data signal 164 or the data signal 166 based on a selection signal 170. For example, when the selection signal 170 is at a logic high level, the multiplexer 284 passes the data signal 164, causing the multiplexer 284 to output a trigger signal 168 carrying information about the selected conversion parameters (from the timer / pulse width modulator conversion parameter setting group 195) to the trigger event controller 208. When the selection signal 170 is at a logic low level, the multiplexer 284 passes the data signal 166, causing the multiplexer 284 to output a trigger signal 168 carrying information about the initial conversion parameters (from the timer / pulse width modulator initial conversion parameters 196) to the trigger event controller 208.

[0110] exist Figure 2 In the embodiment, when Figure 1 The event detection circuit 102 detects that the emergency event 134 has been resolved, Figure 1 The event detection circuit 102 will correspondingly output a protection disable signal 144 to the protection control circuit 204. Figure 2 In the embodiment, AND gate 288 receives the Figure 1 The protection disable signal 144 is output by the event detection circuit 102. Therefore, when the protection control circuit 204 receives the protection disable signal 144 (i.e., the protection disable signal 144 is at a logic high level “1”), and the central processing unit 210 has eliminated the emergency event (i.e., the indication signal 160 or the indication signal 162 is also at a logic high level “1”), that is, the indication signal 146 is also at a logic high level, the protection control circuit 204 correspondingly outputs a protection stop signal 152 to the digital-to-analog converter interface controller 206, and correspondingly outputs an inverted control signal 156 to the direct memory access controller 214, so that the digital-to-analog converter interface controller 206 and the direct memory access controller 214 resume normal operation.

[0111] After receiving the protection stop signal 152 from the protection control circuit 204, the DAC controller 206 begins updating the received input data and outputting an acknowledgment signal ACK. The trigger event controller 208 is then able to output a trigger signal 168 to the DAC controller 206 to update the received input data. The DAC controller 206 then outputs the updated input data to the digital-to-analog converter 212 for digital-to-analog conversion. After receiving the inverted control signal 156 from the protection control circuit 204, the DMA controller 214 begins transferring the required input data from the memory 216 to the DAC controller 206.

[0112] In some embodiments, when the protection control circuit 204 receives the protection disable signal 144 and the central processing unit 210 has eliminated the emergency event, that is, the indication signal 146 is also at a logic high level, the protection control circuit 104 correspondingly outputs the protection stop signal 152 to the AND gate 290. In this case, since the protection stop signal 152 is at a logic low level, the selection signal 170 will be at a logic low level regardless of whether the enable signal AUTOEN is at a logic high level or a logic low level. Therefore, the central processing unit 210 outputs the trigger signal 168 carrying the initial conversion parameters (from the timer / pulse width modulator initial conversion parameters 196) to the trigger event controller 208. Subsequently, after receiving the acknowledgment signal ACK, the trigger event controller 208 outputs the trigger signal 168 carrying the initial conversion parameters to the digital-to-analog conversion interface controller 206 to initialize the conversion parameters.

[0113] Figure 3 Flowchart of a protection method for a digital-to-analog converter according to an embodiment of the present invention. Figure 3 The protection method is applicable to a microcontroller (e.g., a microcontroller) having an event detection circuit, a protection control circuit, a digital-to-analog conversion interface controller, a digital-to-analog converter, a trigger event controller, and a central processing unit. Figure 1 The protection method of the present invention includes: detecting an emergency event and, based on the emergency event, outputting an interrupt notification and a protection enable signal accordingly (step S300); receiving the protection enable signal and, based on the protection enable signal, outputting a protection execution signal accordingly (step S302); receiving the protection execution signal, stopping updating received input data and stopping outputting a confirmation signal, thereby causing the digital-to-analog converter to suspend signal conversion (step S304); determining and outputting conversion parameters of the digital-to-analog converter, and receiving an interrupt notification to eliminate the emergency event (step S306); and determining, based on the confirmation signal, whether to set the conversion parameters (step S308).

[0114] In some embodiments, step S300 is performed by Figure 1 The event detection circuit 102 is executed. Step S302 is performed by Figure 1 The protection control circuit 104 and Figure 2 Step S304 is performed by the protection control circuit 204. Figure 1 The digital-to-analog conversion interface controller 106 and Figure 2 The digital-to-analog conversion interface controller 206 executes the step S306. Figure 1 The central processing unit 110 and Figure 2 Step S308 is performed by the central processing unit 210. Figure 1 The trigger event controller 108 and Figure 2 The trigger event controller 208 executes.

[0115] In some embodiments, the protection method of the present invention further comprises: Figure 1 When the protection control circuit 104 receives the protection enable signal, Figure 1 The direct memory access controller 114 of the present invention suspends the transfer of required input data from a memory 116 to the digital-to-analog conversion interface controller 106. In step S306 of the protection method of the present invention, the emergency event is eliminated, including resolving the emergency event and clearing the interrupt notification associated with the emergency event; or, after a predetermined time has passed, the emergency event is directly determined to have been eliminated.

[0116] In step S306 of the protection method of the present invention, when a protection execution signal is received and an automatic switching function corresponding to the conversion parameter is enabled in the central processing unit 110, the conversion parameter is output to the trigger event controller 108. In step S304 of the protection method of the present invention, stopping updating the received input data includes: storing the last input data before receiving the protection execution signal; recording the interface signal before receiving the protection execution signal; and not outputting a trigger signal 168 to the digital-to-analog conversion interface controller 106 if no confirmation signal is received.

[0117] The microcontroller 100, protection circuit 200, and protection method of the present invention use hardware detection to determine whether to operate or suspend the digital-to-analog converter interface. They automatically restore the system to operating mode, cutting off or restoring power to each block to achieve energy conservation. In addition to serving as a hardware response measure to withstand unexpected events, hardware-triggered control events can also be designed to suspend the digital-to-analog converter output when a hardware response occurs. In back-end load applications such as motor control, this can temporarily halt motor operation to maintain system safety.

[0118] In the microcontroller 100, protection circuit 200, and protection method of the present invention, upon detecting an external / internal emergency event, the central processing unit is notified as to whether or not to process the event. If CPU resource priority is a concern, hardware can be selected to handle the emergency event, thereby preventing the CPU from occupying resources. The microcontroller 100, protection circuit 200, and protection method of the present invention can further utilize a time interval during which the digital-to-analog converter (DAC) stops updating its output, allowing the hardware to automatically update the trigger event frequency of the DAC. Once the hardware trigger event is resolved, the DAC can resume operation at the updated trigger frequency.

[0119] For a digital-to-analog converter (DAC) capable of latching its output voltage when its input interface signal remains unchanged, the automatic detection and protection mechanism featured in this invention can temporarily hold the DAC's output at a certain level and automatically switch to normal operating mode. This feature protects back-end applications that rely on the DAC from the immediate risk of unexpected events triggered by external physical attacks on the chip or its peripheral circuitry.

[0120] Although embodiments of the present invention have been described above, it should be understood that these are presented by way of example only and not limitation. Many variations of the exemplary embodiments described above may be implemented without departing from the spirit and scope of the invention. Therefore, the breadth and scope of the present invention should not be limited by the embodiments described above. Rather, the scope of the present invention is defined by the claims and their equivalents.

[0121] Although the invention has been illustrated and described above with reference to one or more embodiments, equivalent changes and modifications will occur to others skilled in the art based on the above specification and drawings. In addition, although a particular feature of an embodiment of the invention has been demonstrated with reference to one of the multiple embodiments, that feature may be combined with one or more other features as may be desirable and useful for any known or particular application.

[0122] Unless otherwise defined, all terms used herein (including technical or scientific terms) are generally understood by persons skilled in the art to which the present invention pertains. It should be understood that these terms, as defined in commonly used dictionaries, should be interpreted in the context of the relevant art. Unless otherwise specifically defined herein, these terms are not to be interpreted in an idealized or overly formal sense.

Claims

1. A microcontroller, characterized in that: include: an event detection circuit for detecting an emergency event and outputting an interruption notification and a protection enabling signal accordingly according to the emergency event; a protection control circuit, receiving the protection enable signal and correspondingly outputting a protection execution signal; a digital-to-analog converter; a digital-to-analog conversion interface controller, which receives the protection execution signal, stops updating the received input data, and stops outputting a confirmation signal, so that the digital-to-analog converter suspends signal conversion; a trigger event controller, which determines whether to set conversion parameters for the digital-to-analog conversion interface controller according to the confirmation signal; and A central processing unit determines the conversion parameter, outputs the conversion parameter to the trigger event controller, and receives the interrupt notification to eliminate the emergency event.

2. The microcontroller according to claim 1, wherein: Also includes: a memory; as well as a direct memory access controller, which reads required input data from the memory and outputs the required input data to the digital-to-analog conversion interface controller; When the protection control circuit receives the protection enable signal, the protection control circuit outputs a control signal to the direct memory access controller, causing the direct memory access controller to suspend transferring required input data from the memory to the digital-to-analog conversion interface controller.

3. The microcontroller according to claim 2, wherein: The central processing unit eliminates the emergency event, including: The central processing unit resolves the emergency event and clears the interrupt notification; or The central processing unit directly determines that the emergency event has been eliminated after a preset time has passed.

4. The microcontroller according to claim 3, wherein: When the event detection circuit detects that the emergency event has been resolved, the event detection circuit correspondingly outputs a protection disable signal to the protection control circuit.

5. The microcontroller according to claim 4, characterized in that When the protection control circuit receives the protection disable signal and the central processing unit has eliminated the emergency event, the protection control circuit correspondingly outputs a protection stop signal to the digital-to-analog conversion interface controller and correspondingly outputs an inverted control signal to the direct memory access controller, so that the digital-to-analog conversion interface controller and the direct memory access controller resume normal operation.

6. A protection circuit, characterized in that: Used to protect a digital-to-analog converter from interference caused by an unexpected event, including: a protection control circuit that receives a protection enable signal associated with the emergency event and outputs a protection execution signal accordingly; a digital-to-analog conversion interface controller, which receives the protection execution signal, stops updating the received input data, and stops outputting a confirmation signal, so that the digital-to-analog converter suspends signal conversion; a trigger event controller, which determines whether to set conversion parameters for the digital-to-analog conversion interface controller according to the confirmation signal; and A central processing unit determines the conversion parameter, outputs the conversion parameter to the trigger event controller, and eliminates the emergency event.

7. The protection circuit according to claim 6, characterized in that: When the central processing unit receives the protection execution signal from the protection control circuit and an automatic switching function of the central processing unit corresponding to the conversion parameter is turned on, the central processing unit outputs the conversion parameter to the trigger event controller.

8. The protection circuit according to claim 6, wherein: The digital-to-analog conversion interface controller stops updating the received input data, comprising: The digital-to-analog conversion interface controller stores the last input data before receiving the protection execution signal; The digital-to-analog conversion interface controller records the interface signal before receiving the protection execution signal; and The trigger event controller does not receive the confirmation signal, so that the trigger event controller does not output a trigger signal to the digital-to-analog conversion interface controller.

9. A protection method for a digital-to-analog converter, characterized in that: A microcontroller having an event detection circuit, a protection control circuit, a digital-to-analog conversion interface controller, a digital-to-analog converter, a trigger event controller, and a central processing unit, including: The event detection circuit detects an emergency event and outputs an interruption notification and a protection enable signal accordingly according to the emergency event; The protection control circuit receives the protection enable signal and correspondingly outputs a protection execution signal; The digital-to-analog conversion interface controller receives the protection execution signal, stops updating the received input data, and stops outputting a confirmation signal, so that the digital-to-analog converter suspends signal conversion action; The central processing unit determines and outputs the conversion parameters of the digital-to-analog conversion interface controller, and receives the interrupt notification to eliminate the emergency event; The trigger event controller determines whether to set the conversion parameters according to the confirmation signal.

10. The protection method according to claim 9, characterized in that: Stops updating received input data, including: The digital-to-analog conversion interface controller stores the last input data before receiving the protection execution signal; The digital-to-analog conversion interface controller records the interface signal before receiving the protection execution signal; and The trigger event controller does not receive the confirmation signal, and thus does not output a trigger signal to the digital-to-analog conversion interface controller.

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