Data storage method and device of flash memory, terminal equipment and storage medium

Abstract

The application discloses a data storage method and device of a flash memory, a terminal equipment and a storage medium. The data storage method of the flash memory comprises the following steps: calculating the first error bit number and the basic error bit number of each storage block in the initialized flash memory; adding the basic error bit number and the first error bit number to the wear table of the flash memory, wherein the wear table comprises the erasing number of each storage block; determining the target storage block in each storage block according to the wear table, wherein the sum of the second error bit number and the basic error bit number of the target storage block is the minimum in the wear table, and the second error bit number is the product of the first error bit number and the erasing number; and performing the data storage of the flash memory according to the target storage block. The application avoids the slow reading speed caused by the excessive error bit number and the excessive erasing number of the data in the storage block.

Description

Technical Field

[0001] This invention relates to the field of memory technology, and in particular to a data storage method, apparatus, terminal device, and computer storage medium for flash memory. Background Technology

[0002] Error correction in data stored in flash memory can be performed using either hardware or software decoding. Hardware decoding is suitable when the number of erroneous bits is small, but software decoding is used when the number exceeds a certain threshold. Software decoding requires multiple matching operations from the controller and hardware decoding module; therefore, when the number of erroneous bits in a block of data in the flash memory is too high, it can slow down the read speed.

[0003] When data in a flash memory needs to be erased, it is often necessary to erase all data in the block containing that data. Each block has a limited number of erase cycles. Repeatedly erasing the same block will cause it to wear out excessively, resulting in an increase in the number of erroneous bits in the block's data. At the same time, excessive block wear will also slow down the read speed.

[0004] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] The main objective of this invention is to provide a data storage method, apparatus, terminal device, and computer storage medium for flash memory, aiming to solve the technical problems of excessive block wear and excessive number of erroneous bits in the data stored on the block, which leads to slow read speed.

[0006] To achieve the above objectives, the present invention provides a data storage method for a flash memory, wherein the data storage of the flash memory includes the following steps:

[0007] Calculate the number of first error bits and the number of basic error bits for each storage block in the initialized flash memory;

[0008] The base error bit count and the first error bit count are added to the wear table of the flash memory, wherein the wear table includes the number of erases for each of the memory blocks;

[0009] The target storage block in each storage block is determined according to the wear table, wherein the sum of the second error bit number and the base error bit number of the target storage block is the smallest in the wear table, and the second error bit number is the product of the first error bit number and the number of erases;

[0010] Data is stored in the flash memory according to the target storage block.

[0011] Optionally, the first error bit count is the number of error bits present in every 2KB of data on the storage block, and the step of calculating the first error bit count for each storage block in the initialized flash memory includes:

[0012] Erase the data on each of the storage blocks in the initialized flash memory and rewrite the data on the storage blocks;

[0013] The rewritten data is read from each of the storage blocks to obtain the basic error bit count for each of the storage blocks;

[0014] After repeatedly performing a preset number of erase operations on each of the storage blocks, data is rewritten on each of the storage blocks, and the rewritten data is read from each of the storage blocks to obtain the third error bit count for each of the storage blocks.

[0015] For each of the aforementioned storage blocks, the difference between the base number of error bits and the third number of error bits is calculated. The absolute value of the difference is divided by the preset quantity to calculate the average number of error bits for the storage block. The average number of error bits is then used to calculate the number of error bits per 2KB of data.

[0016] Optionally, after the step of storing data in the flash memory according to the target storage block, the flash memory data storage method further includes:

[0017] The wear table is updated according to each of the memory blocks in the flash memory to determine the target memory block in each memory block based on the updated wear table.

[0018] Optionally, the data storage method of the flash memory further includes:

[0019] Monitor the usage time of the flash memory;

[0020] The step of updating the wear table based on each of the storage blocks in the flash memory includes:

[0021] For each of the aforementioned storage blocks, when the detected usage duration is equal to the preset duration, after performing the first erase operation on the storage block after the usage duration is equal to the preset duration, the fourth error bit count of the storage block is calculated.

[0022] The wear table is updated using the fourth error bit count.

[0023] Optionally, the step of updating the wear table based on each of the storage blocks in the flash memory includes:

[0024] When it is determined that there is a worn block in each of the memory blocks of the flash memory with an erase count equal to the preset count, after performing the first erase operation on the worn block with an erase count equal to the preset count, the fifth error bit count of the worn block is calculated;

[0025] Update the wear table using the fifth error bit count.

[0026] Optionally, before the step of calculating the fifth error bit count of the wear block, the data storage method of the flash memory further includes:

[0027] Data exchange is performed on the worn blocks within each storage block of the flash memory.

[0028] The step of calculating the fifth error bit count of the worn block includes:

[0029] Calculate the number of the fifth error bits of the worn block after data exchange.

[0030] Optionally, the data storage method of the flash memory further includes:

[0031] Determine the data storage capacity of the flash memory;

[0032] The step of updating the wear table based on each of the storage blocks in the flash memory includes:

[0033] For each of the storage blocks, when the data storage amount of the flash memory reaches a preset storage amount threshold, after performing the first erase operation on the storage block after the data storage amount reaches the storage amount threshold, the sixth error bit count of each storage block is calculated;

[0034] The wear table is updated using the sixth error bit count.

[0035] To achieve the above objectives, the present invention also provides a data storage device for a flash memory, the data storage device for the flash memory comprising:

[0036] The calculation module is used to calculate the first error bit count and the basic error bit count for each storage block in the initialized flash memory;

[0037] An addition module is used to add the base error bit count and the first error bit count to the wear table of the flash memory, wherein the wear table includes the number of erases for each of the memory blocks;

[0038] The determination module is used to determine the target storage block in each of the storage blocks according to the wear table, wherein the sum of the second error bit number of the target storage block and the base error bit number is the smallest in the wear table, and the second error bit number is the product of the first error bit number and the number of erases;

[0039] The determining module is also used to store data in the flash memory according to the target storage block.

[0040] To achieve the above objectives, the present invention also provides a terminal device, the terminal device comprising: a memory, a processor, and a data storage program for a flash memory stored on the memory and executable on the processor, wherein the data storage program for the flash memory, when executed by the processor, implements the steps of the data storage method for the flash memory as described above.

[0041] Furthermore, to achieve the above objectives, the present invention also proposes a computer storage medium storing a data storage program for a flash memory, wherein the data storage program for the flash memory, when executed by a processor, implements the steps of the data storage method for the flash memory as described above.

[0042] In this invention, the first error bit count and basic error bit count of each storage block in the initialized flash memory are calculated, and then added to the flash memory's wear table. The wear table includes the erase count for each storage block. A target storage block is determined based on the wear table, where the sum of the second error bit count and the basic error bit count of the target storage block is the smallest in the wear table. The second error bit count is the product of the first error bit count and the erase count. Data is then stored in the flash memory based on the target storage block. Thus, this invention ensures that the storage block used for each data storage operation has the smallest sum of the second error bit count and the basic error bit count, resulting in balanced use of all storage blocks. This avoids data storage on some storage blocks with excessive first error bits and erase counts, thereby preventing slow read speeds caused by excessive error bits and erase counts in the data of a storage block. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the structure of the terminal device in the hardware operating environment involved in the embodiments of the present invention;

[0044] Figure 2 This is a flowchart illustrating the first embodiment of the data storage method for the flash memory of the present invention;

[0045] Figure 3This is a schematic diagram of the functional modules of a data storage device embodiment of the flash memory of the present invention.

[0046] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0047] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0048] like Figure 1 As shown, Figure 1 This is a schematic diagram of the hardware operating environment of the terminal device involved in the embodiment of the present invention.

[0049] It should be noted that, Figure 1 This can be a schematic diagram of the hardware operating environment of the terminal device. Specifically, the terminal device can be a mobile terminal, a data storage and control terminal, a PC, or a portable computer, etc.

[0050] like Figure 1 As shown, the terminal device may include: a processor 1001, such as a CPU; a network interface 1004; a user interface 1003; a memory 1005; and a communication bus 1002. The communication bus 1002 is used to enable communication between these components. The user interface 1003 may include a display screen and an input unit such as a keyboard. Optionally, the user interface 1003 may also include a standard wired interface or a wireless interface. The network interface 1004 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface). The memory 1005 may be non-volatile memory (such as flash memory), high-speed RAM, or stable memory (such as disk storage). Optionally, the memory 1005 may also be a storage device independent of the aforementioned processor 1001.

[0051] Those skilled in the art will understand that Figure 1 The terminal device structure shown does not constitute a limitation on the terminal device and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0052] like Figure 1 As shown, the memory 1005, which serves as a computer storage medium, may include a communication bus interface, a main control chip, storage chips, and a data storage program for flash memory. The main control chip contains firmware for managing and controlling the hardware and software resources of the sample terminal device.

[0053] exist Figure 1In the terminal device shown, the user interface 1003 is mainly used for data communication with various terminals; the network interface 1004 is mainly used for connecting to the backend server and communicating with the backend server; and the processor 1001 can be used to call the data storage program in the flash memory stored in the memory 1005 and perform the following operations:

[0054] Calculate the number of first error bits and the number of basic error bits for each storage block in the initialized flash memory;

[0055] The base error bit count and the first error bit count are added to the wear table of the flash memory, wherein the wear table includes the number of erases for each of the memory blocks;

[0056] The target storage block in each storage block is determined according to the wear table, wherein the sum of the second error bit number and the base error bit number of the target storage block is the smallest in the wear table, and the second error bit number is the product of the first error bit number and the number of erases;

[0057] Data is stored in the flash memory according to the target storage block.

[0058] Furthermore, the processor 1001 can call the data storage program of the flash memory stored in the memory 1005, and also perform the following operations:

[0059] Erase the data on each of the storage blocks in the initialized flash memory and rewrite the data on the storage blocks;

[0060] The rewritten data is read from each of the storage blocks to obtain the basic error bit count for each of the storage blocks;

[0061] After repeatedly performing a preset number of erase operations on each of the storage blocks, data is rewritten on each of the storage blocks, and the rewritten data is read from each of the storage blocks to obtain the third error bit count for each of the storage blocks.

[0062] For each of the aforementioned storage blocks, the difference between the base number of error bits and the third number of error bits is calculated. The absolute value of the difference is divided by the preset quantity to calculate the average number of error bits for the storage block. The average number of error bits is then used to calculate the number of error bits per 2KB of data.

[0063] Furthermore, the processor 1001 can call the data storage program of the flash memory stored in the memory 1005, and also perform the following operations:

[0064] The wear table is updated according to each of the memory blocks in the flash memory to determine the target memory block in each memory block based on the updated wear table.

[0065] Furthermore, the processor 1001 can call the data storage program of the flash memory stored in the memory 1005, and also perform the following operations:

[0066] Monitor the usage time of the flash memory;

[0067] The operation of updating the wear table based on each of the storage blocks in the flash memory includes:

[0068] For each of the aforementioned storage blocks, when the detected usage duration is equal to the preset duration, after performing the first erase operation on the storage block after the usage duration is equal to the preset duration, the fourth error bit count of the storage block is calculated.

[0069] The wear table is updated using the fourth error bit count.

[0070] Furthermore, the processor 1001 can call the data storage program of the flash memory stored in the memory 1005, and also perform the following operations:

[0071] When it is determined that there is a worn block in the flash memory that has been erased an equal number of times as preset, after performing the first erase operation on the worn block after the number of erases equals the preset number of times, the fifth error bit count of the worn block is calculated;

[0072] Update the wear table using the fifth error bit count.

[0073] Furthermore, the processor 1001 can call the data storage program of the flash memory stored in the memory 1005, and also perform the following operations:

[0074] Data exchange is performed on the worn blocks within each storage block of the flash memory.

[0075] The operation of calculating the fifth error bit count of the worn block includes:

[0076] Calculate the number of the fifth error bits of the worn block after data exchange.

[0077] Furthermore, the processor 1001 can call the data storage program of the flash memory stored in the memory 1005, and also perform the following operations:

[0078] Determine the data storage capacity of the flash memory;

[0079] The operation of updating the wear table based on each of the storage blocks in the flash memory includes:

[0080] For each of the storage blocks, when the data storage amount of the flash memory reaches a preset storage amount threshold, after performing the first erase operation on the storage block after the data storage amount reaches the storage amount threshold, the sixth error bit count of each storage block is calculated;

[0081] The wear table is updated using the sixth error bit count.

[0082] Based on the above structure, various embodiments of the data storage method of the flash memory of the present invention are proposed. It should be noted that when errors occur in the data stored in the flash memory, hardware decoding or software decoding can be used to correct the errors. When the number of erroneous bits in the data stored in the flash memory is small, hardware decoding can be used for error correction. However, when the number of erroneous bits in the data stored in the flash memory exceeds a certain number, software decoding is used for error correction. Software decoding requires the main controller to cooperate with the hardware decoding module to perform multiple matching operations. Since the flash memory performs data reading operations in blocks, when the number of erroneous bits in the data stored in a block of the flash memory is too large, the number of erroneous bits will affect the decoding speed, and the main controller will need to perform error correction, thereby slowing down the reading speed of that block.

[0083] Flash memory performs data erasure operations on a block-by-block basis. When data in flash memory needs to be erased, it is often necessary to erase all data in the block containing that data. The number of erase cycles for each block is limited. Repeatedly erasing the same block will cause excessive wear on that block, resulting in an increase in the number of erroneous bits in the data of that block. Due to excessive block wear, the decoding time increases, which in turn slows down the read speed.

[0084] To address the above issues, this embodiment proposes a data storage method for flash memory. By calculating the number of error bits in each block (hereinafter referred to as a storage block for distinction) of the initial flash memory, and adding the error bit count to a wear table, when selecting a storage block for storing data, the storage block with the smallest product of error bit count and erase count is selected from all storage blocks based on the error bit count and erase count in the wear table. This avoids slowing down data reading speeds due to excessive error bits and erase counts in the storage block. For ease of description, the storage block with the smallest product of error bit count and erase count is referred to as the target storage block.

[0085] Please refer to Figure 2 , Figure 2This is a flowchart illustrating a first embodiment of a data storage method for a flash memory according to the present invention. It should be noted that although a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than that shown here. In this embodiment, the data storage method for the flash memory includes:

[0086] Step S100: Calculate the number of first error bits and the number of basic error bits for each storage block in the initialized flash memory;

[0087] In this embodiment, the average number of error bits per erase operation for each storage block in the initialized flash memory is calculated (hereinafter referred to as the first error bit count for distinction), and the number of error bits present in each storage block in the initialized flash memory is calculated (hereinafter referred to as the basic error bit count for distinction). In a specific implementation, the error bit count of a storage block can be the number of error bits per 2KB of data in the storage block, or the number of error bits when the storage block is full of data. The specific value can be set according to actual needs and is not limited here.

[0088] Step S200: Add the basic error bit count and the first error bit count to the wear table of the flash memory, wherein the wear table includes the number of erases for each of the memory blocks;

[0089] To extend the lifespan of flash memory, wear leveling algorithms are typically used to ensure a balanced number of erase cycles across all blocks. This prevents excessive wear on any single block, which could degrade the flash memory's performance. Wear leveling works by creating a wear table that records the cumulative number of erase cycles for each block. During each write or erase operation, the block with the lowest erase count in the wear table is selected for the operation, ensuring that each block is fully utilized.

[0090] In this embodiment, the first error bit count and the basic error bit count corresponding to each storage block are added to the wear table to obtain a new wear table. The wear table after adding the first error bit count and the basic error bit count is used as the basis for selecting data to be stored.

[0091] Step S300: Determine the target storage block in each of the storage blocks according to the wear table, wherein the sum of the second error bit number and the basic error bit number of the target storage block is the smallest in the wear table, and the second error bit number is the product of the first error bit number and the number of erases;

[0092] In this embodiment, the product of the first number of error bits and the number of erase operations in each storage block is calculated to obtain the second number of error bits. It can be understood that the second number of error bits is the number of error bits generated by the storage block erase operation.

[0093] The target memory block with the smallest sum of the second error bit count and the basic error bit count is selected based on the wear table.

[0094] Specifically, in one embodiment, the wear table can pre-contain the sum of the second error bit count and the basic error bit count for each storage block, and the storage block with the smallest sum can be directly selected when selecting the target storage block. In another embodiment, the sum of the second error bit count and the basic error bit count can be calculated when data needs to be stored, and the storage block with the smallest sum of the second error bit count and the basic error bit count can be selected as the target storage block. The specific settings can be configured according to the actual situation and are not limited here.

[0095] Step S400: Data is stored in the flash memory according to the target storage block.

[0096] When data needs to be stored in flash memory, select the target storage block for data storage.

[0097] Further, in one embodiment, the first number of error bits is the number of error bits present in every 2KB of data on the storage block, and step S100 includes...

[0098] Step S101: Erase the data on each storage block in the initialized flash memory and rewrite the data on the storage blocks;

[0099] In this embodiment, the first number of error bits is calculated for the initialized flash memory. Since data may have been pre-stored in the initialized flash memory, an erase operation is performed on each storage block in the flash memory to re-store the data.

[0100] Rewriting data into each storage block can be done in specific implementations. This can be done by writing an equal amount of data into each storage block, for example, filling each storage block with data, or by writing unequal amounts of data into each storage block. There are no specific restrictions here, and the settings can be made according to actual needs.

[0101] Step S102: Read the rewritten data from each of the storage blocks to obtain the basic error bit count for each of the storage blocks;

[0102] Read the rewritten data from each storage block, and calculate the total number of error bits in each storage block's data based on the written and read data, which is also the basic number of error bits.

[0103] Step S103: After repeatedly performing a preset number of erase operations on each of the storage blocks, data is rewritten on each of the storage blocks, and the rewritten data is read from each of the storage blocks to obtain the third error bit count of each of the storage blocks.

[0104] After calculating the basic error bit count, a preset number of erase operations are repeated on each storage block. After repeating the preset number of erase operations on each storage block, data is rewritten on each storage block, and the rewritten data is read from each storage block to obtain the total number of error bits in the data of each storage block (hereinafter referred to as the third error bit count for distinction).

[0105] In a specific implementation, the preset quantity can be set according to actual needs. For example, in one implementation, the preset quantity can be set to 10.

[0106] Step S104: For each of the storage blocks, calculate the difference between the basic number of error bits and the third number of error bits, divide the absolute value of the difference by the preset quantity to calculate the average number of error bits of the storage block, and use the average number of error bits to calculate the number of error bits in every 2KB of data.

[0107] For each memory block, calculate the difference between the base error bit count and the third error bit count. Divide the absolute value of the difference by a preset number to calculate the average error bit count for the memory block. Use the average error bit count to calculate the number of error bits per 2KB of data, thus obtaining the first error bit count.

[0108] In this embodiment, the first error bit count and basic error bit count of each storage block in the initialized flash memory are calculated, and then added to the flash memory's wear table. The wear table includes the erase count for each storage block. A target storage block is determined based on the wear table, where the sum of the second error bit count and the basic error bit count of the target storage block is the smallest in the wear table. The second error bit count is the product of the first error bit count and the erase count. Data is then stored in the flash memory based on the target storage block. This ensures that the storage block used for each data storage operation is the one with the smallest sum of the second error bit count and the basic error bit count, resulting in balanced usage across all storage blocks. This avoids data storage on some storage blocks with excessive first error bits and erase counts, preventing slow read speeds caused by excessive error bits and erase counts in the data of a storage block.

[0109] Furthermore, based on the first embodiment described above, a second embodiment of the data storage method for the flash memory of the present invention is proposed.

[0110] In this embodiment, after step S400 described above, the data storage method of the flash memory of the present invention further includes:

[0111] Step S500: Update the wear table according to each of the memory blocks in the flash memory, so as to determine the target memory block in each memory block according to the updated wear table.

[0112] Due to factors such as the usage time of the flash memory, the amount of data stored, and the performance of the flash memory itself, the number of first error bits in each storage block of the flash memory will change after data is stored in the flash memory compared to the initial flash memory.

[0113] In this embodiment, by updating the wear table, a target storage block is determined based on the updated wear table for data storage. This allows data storage to be performed according to the actual usage of the flash memory, ensuring that each storage block in the flash memory can be used in a balanced manner.

[0114] Furthermore, in one embodiment, the data storage method of the flash memory of the present invention further includes:

[0115] Step S600: Monitor the usage time of the flash memory;

[0116] In this embodiment, the usage time of the flash memory is detected, and the wear table is updated based on the usage time of the flash memory.

[0117] In this embodiment, step S500 includes:

[0118] Step S501: For each of the storage blocks, when the detected usage duration is equal to the preset duration, after performing the first erase operation on the storage block after the usage duration is equal to the preset duration, calculate the fourth error bit count of the storage block.

[0119] Step S502: Update the wear table using the fourth error bit count.

[0120] In this embodiment, for each storage block, when it is detected that the usage time of the flash memory is equal to the preset time, after performing the first erase operation on the storage block after the usage time is equal to the preset time, the average number of error bits generated per erase operation of the storage block (hereinafter referred to as the fourth error bit number for distinction) is calculated. Specifically, the calculation of the fourth error bit number can refer to steps S101 to S104 in the first embodiment, which will not be repeated here.

[0121] After obtaining the fourth error bit count, the error bit count of the corresponding storage block in the wear table is replaced with the fourth error bit count to update the wear table. The target storage block can then be determined based on the updated wear table for data storage.

[0122] Specifically, in one embodiment, the number of preset durations can be one, that is, the wear table is updated only once; in another embodiment, the number of preset durations can also be multiple, that is, the wear table is updated at certain time intervals. The specific settings can be made according to actual needs and are not limited here.

[0123] It should be noted that by calculating the number of fourth error bits for each memory block of a flash memory with a certain usage time to update the wear table, the number of calculations can be reduced, thereby ensuring operating performance.

[0124] Further, in one embodiment, step S500 includes:

[0125] Step S503: When it is determined that there is a worn block in the flash memory that has been erased an equal number of times as preset, after performing the first erase operation on the worn block after the number of erases equals the preset number of times, calculate the fifth error bit count of the worn block;

[0126] Step S504: Update the wear table using the fifth error bit count.

[0127] In this embodiment, a memory block whose erase count equals a preset number is called a wear block. When a wear block is determined to exist in the flash memory, after the first erase operation on the wear block with an erase count equal to the preset number, the average number of error bits generated per erase operation of the wear block is calculated (hereinafter referred to as the fifth error bit count for distinction). Specifically, the calculation of the fifth error bit count can refer to steps S101 to S104 in the first embodiment, which will not be elaborated here.

[0128] After obtaining the fifth error bit count, the error bit count of the corresponding worn block in the wear table is replaced with the fifth error bit count to update the wear table. The target storage block can then be determined based on the updated wear table for data storage.

[0129] It should be noted that by calculating the number of fifth error bits in the worn blocks of the flash memory to update the wear table, the number of calculations can be reduced, thereby ensuring operational performance.

[0130] Furthermore, in one embodiment, before the step of calculating the fifth error bit count of the second storage block in step S503, the method further includes:

[0131] Step S505: Data exchange is performed on the worn blocks in each of the memory blocks of the flash memory;

[0132] When a storage block is erased a lot, it can be determined that the data on the storage block is frequently updated. The data on the storage block that is erased a lot is called hot data, and the data in the storage block that is erased a little is called cold data to distinguish them.

[0133] In this embodiment, data exchange is performed on worn blocks that have reached a preset number of erase cycles within each storage block. Specifically, hot data on the worn blocks is exchanged with cold data on storage blocks with fewer erase cycles. This reduces the number of erase cycles on the worn blocks, thereby extending the lifespan of the flash memory.

[0134] The step of calculating the fifth error bit count of the second storage block in step S503 includes:

[0135] Step S5031: Calculate the number of fifth error bits of the worn block after data exchange;

[0136] After data exchange, the fifth error bit count of the worn block is calculated. The error bit count of the corresponding worn block in the wear table is replaced with the fifth error bit count to update the wear table. The target storage block can then be determined based on the updated wear table for data storage.

[0137] It should be noted that by exchanging data with worn blocks in each storage block that have reached a preset number of erase cycles, the number of erase cycles for worn blocks can be reduced, thereby extending the lifespan of the flash memory.

[0138] By updating the wear table using the fifth error bit count of the worn block after data exchange, the values ​​in the wear table can be made to match the actual usage of the flash memory, so that the various storage blocks in the flash memory can be used in a balanced manner.

[0139] Furthermore, in one embodiment, the data storage method of the flash memory of the present invention further includes:

[0140] Step S700: Determine the data storage capacity of the flash memory;

[0141] In this embodiment, the data storage capacity of the flash memory is determined, and based on the data storage capacity, it is determined whether to erase invalid data in the flash memory, so that the flash memory can store more useful data and extend the service life of the flash memory.

[0142] In this embodiment, step S500 includes:

[0143] Step S506: For each of the storage blocks, when the data storage amount of the flash memory reaches a preset storage amount threshold, after performing the first erase operation on the storage block after the data storage amount reaches the storage amount threshold, calculate the sixth error bit count of each of the second storage blocks.

[0144] In this embodiment, for each storage block, when the data storage amount of the flash memory reaches a preset storage amount threshold, after the first erase operation after the data storage amount reaches the storage amount threshold is performed on the storage block, the average number of error bits generated per erase operation for each storage block (hereinafter referred to as the sixth error bit number for distinction) is calculated. Specifically, the calculation of the sixth error bit number can refer to steps S101 to S104 in the first embodiment, which will not be repeated here.

[0145] Step S507: Update the wear table using the sixth error bit count.

[0146] The wear table is updated by replacing the error bits of the corresponding memory blocks with the sixth error bit number. The target memory block can then be determined based on the updated wear table for data storage.

[0147] It should be noted that by updating the wear table using the sixth error bit, the values ​​in the wear table can be made to match the actual usage of the flash memory, so that the various storage blocks in the flash memory can be used in a balanced manner.

[0148] In this embodiment, by updating the wear table of flash memory under different usage conditions, a target storage block is determined based on the updated wear table and used for data storage. This allows data storage to be performed according to the actual usage of the flash memory, so that each storage block in the flash memory can be used in a balanced manner.

[0149] The present invention also provides a data storage device for a flash memory, with reference to... Figure 3 The data storage device of the flash memory includes:

[0150] Calculation module 10 is used to calculate the number of first error bits and the number of basic error bits for each storage block in the initialized flash memory;

[0151] Adding module 20 is used to add the basic error bit count and the first error bit count to the wear table of the flash memory, wherein the wear table includes the number of erases for each of the memory blocks;

[0152] The determination module 30 is used to determine the target storage block in each of the storage blocks according to the wear table, wherein the sum of the second error bit number of the target storage block and the basic error bit number is the smallest in the wear table, and the second error bit number is the product of the first error bit number and the number of erases;

[0153] The determining module 30 is also used to store data in the flash memory according to the target storage block.

[0154] Furthermore, the first number of error bits is the number of error bits present in every 2KB of data on the storage block, and the calculation module 10 is further configured to:

[0155] Erase the data on each of the storage blocks in the initialized flash memory and rewrite the data on the storage blocks;

[0156] The rewritten data is read from each of the storage blocks to obtain the basic error bit count for each of the storage blocks;

[0157] After repeatedly performing a preset number of erase operations on each of the storage blocks, data is rewritten on each of the storage blocks, and the rewritten data is read from each of the storage blocks to obtain the third error bit count for each of the storage blocks.

[0158] For each of the aforementioned storage blocks, the difference between the base number of error bits and the third number of error bits is calculated. The absolute value of the difference is divided by the preset quantity to calculate the average number of error bits for the storage block. The average number of error bits is then used to calculate the number of error bits per 2KB of data.

[0159] Furthermore, the data storage device of the flash memory also includes an update module, the update module being used for:

[0160] The wear table is updated according to each of the memory blocks in the flash memory to determine the target memory block in each memory block based on the updated wear table.

[0161] Furthermore, the data storage device of the flash memory also includes a monitoring module, which is used for:

[0162] Monitor the usage time of the flash memory;

[0163] The update module is also used for:

[0164] For each of the aforementioned storage blocks, when the detected usage duration is equal to the preset duration, after performing the first erase operation on the storage block after the usage duration is equal to the preset duration, the fourth error bit count of the storage block is calculated.

[0165] The wear table is updated using the fourth error bit count.

[0166] Furthermore, the update module is also used for:

[0167] When it is determined that there is a worn block in the flash memory that has been erased an equal number of times as preset, after performing the first erase operation on the worn block after the number of erases equals the preset number of times, the fifth error bit count of the worn block is calculated;

[0168] Update the wear table using the fifth error bit count.

[0169] Furthermore, the update module is also used for:

[0170] Data exchange is performed on the worn blocks within each storage block of the flash memory.

[0171] The step of calculating the fifth error bit count of the worn block includes:

[0172] Calculate the number of the fifth error bits of the worn block after data exchange.

[0173] Furthermore, the monitoring module is also used for:

[0174] Determine the data storage capacity of the flash memory;

[0175] The update module is also used for:

[0176] For each of the storage blocks, when the data storage amount of the flash memory reaches a preset storage amount threshold, after performing the first erase operation on the storage block after the data storage amount reaches the storage amount threshold, the sixth error bit count of each storage block is calculated;

[0177] The wear table is updated using the sixth error bit count.

[0178] The various embodiments of the data storage device of the flash memory of the present invention can be referred to the various embodiments of the data storage method of the flash memory of the present invention, and will not be repeated here.

[0179] Furthermore, embodiments of the present invention also propose a computer storage medium storing a data storage program for a flash memory, wherein the data storage program for the flash memory, when executed by a processor, implements the steps of the data storage method for the flash memory as described above.

[0180] All embodiments of the computer storage medium of the present invention can refer to the various embodiments of the data storage method of the flash memory of the present invention, and will not be repeated here.

[0181] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0182] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0183] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a computer storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the embodiments of the present invention.

[0184] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

Claims

1. A data storage method for a flash memory, characterized in that, The data storage method of the flash memory includes the following steps: Calculate the number of first error bits and the number of basic error bits for each storage block in the initialized flash memory; The base error bit count and the first error bit count are added to the wear table of the flash memory, wherein the wear table includes the number of erases for each of the memory blocks; The target storage block in each storage block is determined according to the wear table, wherein the sum of the second error bit number and the base error bit number of the target storage block is the smallest in the wear table, and the second error bit number is the product of the first error bit number and the number of erases; Data is stored in the flash memory according to the target storage block; Wherein, the first error bit count is the number of error bits present in every 2KB of data on the storage block, and the step of calculating the first error bit count and the basic error bit count for each storage block in the initialized flash memory includes: Erase the data on each of the storage blocks in the initialized flash memory and rewrite the data on the storage blocks; The rewritten data is read from each of the storage blocks to obtain the basic error bit count for each of the storage blocks; After repeatedly performing a preset number of erase operations on each of the storage blocks, data is rewritten on each of the storage blocks, and the rewritten data is read from each of the storage blocks to obtain the third error bit count for each of the storage blocks. For each of the aforementioned storage blocks, the difference between the base number of error bits and the third number of error bits is calculated. The absolute value of the difference is divided by the preset quantity to calculate the average number of error bits for the storage block. The average number of error bits is then used to calculate the number of error bits per 2KB of data.

2. The data storage method of the flash memory as described in claim 1, characterized in that, Following the step of storing data in the flash memory according to the target storage block, the flash memory data storage method further includes: The wear table is updated according to each of the memory blocks in the flash memory to determine the target memory block in each memory block based on the updated wear table.

3. The data storage method of the flash memory as described in claim 2, characterized in that, The data storage method of the flash memory further includes: Monitor the usage time of the flash memory; The step of updating the wear table based on each of the storage blocks in the flash memory includes: For each of the aforementioned storage blocks, when the detected usage duration is equal to the preset duration, after performing the first erase operation on the storage block after the usage duration is equal to the preset duration, the fourth error bit count of the storage block is calculated. The wear table is updated using the fourth error bit count.

4. The data storage method of the flash memory as described in claim 2, characterized in that, The step of updating the wear table based on each of the storage blocks in the flash memory includes: When it is determined that there is a worn block in each of the memory blocks of the flash memory with an erase count equal to the preset count, after performing the first erase operation on the worn block with an erase count equal to the preset count, the fifth error bit count of the worn block is calculated; Update the wear table using the fifth error bit count.

5. The data storage method of the flash memory as described in claim 4, characterized in that, Before the step of calculating the fifth error bit count of the wear block, the data storage method of the flash memory further includes: Data exchange is performed on the worn blocks within each storage block of the flash memory. The step of calculating the fifth error bit count of the worn block includes: Calculate the number of the fifth error bits of the worn block after data exchange.

6. The data storage method of the flash memory as described in claim 2, characterized in that, The data storage method of the flash memory further includes: Determine the data storage capacity of the flash memory; The step of updating the wear table based on each of the storage blocks in the flash memory includes: For each of the storage blocks, when the data storage amount of the flash memory reaches a preset storage amount threshold, after performing the first erase operation on the storage block after the data storage amount reaches the storage amount threshold, the sixth error bit count of each storage block is calculated; The wear table is updated using the sixth error bit count.

7. A data storage device for a flash memory, characterized in that, The data storage device of the flash memory includes: The calculation module is used to calculate the first error bit count and the basic error bit count for each storage block in the initialized flash memory; An addition module is used to add the base error bit count and the first error bit count to the wear table of the flash memory, wherein the wear table includes the number of erases for each of the memory blocks; The determination module is used to determine the target storage block in each of the storage blocks according to the wear table, wherein the sum of the second error bit number of the target storage block and the base error bit number is the smallest in the wear table, and the second error bit number is the product of the first error bit number and the number of erases; The determining module is further configured to perform data storage of the flash memory based on the target storage block; Wherein, the first error bit count is the number of error bits present in every 2KB of data on the storage block. The calculation module is further configured to: erase the data on each storage block in the initialized flash memory and rewrite the data on the storage block; read the rewritten data from each storage block to obtain the basic error bit count of each storage block; after repeatedly performing a preset number of erase operations on each storage block, rewrite the data on each storage block and read the rewritten data from each storage block to obtain the third error bit count of each storage block; for each storage block, calculate the difference between the basic error bit count and the third error bit count, divide the absolute value of the difference by the preset number to calculate the average error bit count of the storage block, and use the average error bit count to calculate the number of error bits in every 2KB of data.

8. A terminal device, characterized in that, The terminal device includes: a memory, a processor, and a data storage program for a flash memory stored on the memory and executable on the processor. When the data storage program for the flash memory is executed by the processor, it implements the steps of the data storage method for the flash memory as described in any one of claims 1 to 6.

9. A computer storage medium, characterized in that, The computer storage medium stores a computer program, which, when executed by a processor, implements the steps of the data storage method of the flash memory as described in any one of claims 1 to 6.

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