Test structure, method of forming a test structure and method of operating a test structure

Abstract

A test structure, a method of forming the test structure, and a method of testing the test structure, wherein the structure comprises: a plurality of first conductive plug structures on the first electrode and the second electrode of the first region; a plurality of second conductive plug structures on the first electrode of the second region, the second conductive plug structures arranged along the second direction; a plurality of third conductive plug structures on the second electrode of the second region, the third conductive plug structures arranged along the second direction; a second conductive layer on the second conductive plug structures, the second conductive layer parallel to the second direction; and a third conductive layer on the third conductive plug structures, the third conductive layer parallel to the second direction, and the third conductive layer spaced apart from the second conductive layer along the first direction by a distance greater than a spacing between adjacent first conductive plug structures along the second direction, which facilitates improving accuracy of a time-dependent breakdown performance test.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a test structure, a method for forming the test structure, and a method for operating the test structure. Background Technology

[0002] With the continuous development of integrated circuit manufacturing technology, in order to achieve faster computing speed, larger data storage capacity and more functions, integrated circuit chips are developing towards higher device density and higher integration.

[0003] As the size of Ultra Large Scale Integrated Circuit (ULSI) chips continues to shrink, the size of the gate dielectric layer in semiconductor devices (MOS) is also constantly shrinking to achieve higher performance. When a constant voltage is applied to the device, causing it to accumulate charge, the dielectric layer will break down after a period of time, especially the inter-metal dielectric (IMD) layer. The time elapsed during this breakdown is called the lifetime under that condition, also known as time-dependent dielectric breakdown (TDDB). In the back-end of line (BEOL) process, TDDB performance is one of the key factors in evaluating the stability of the inter-metal dielectric layer and the semiconductor device. To improve device reliability, TDDB performance needs to be considered and tested in the back-end of line process.

[0004] However, the existing test structures for the breakdown performance of metallic dielectric layers over time need further improvement. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a test structure, a method for forming the test structure, and a working method thereof, so as to improve the performance of the formed test structure.

[0006] To solve the above-mentioned technical problems, the present invention provides a test structure, comprising: a substrate; a first conductive layer on the substrate, the first conductive layer including a plurality of first electrodes and a plurality of second electrodes, the plurality of first electrodes and the plurality of second electrodes being parallel to a first direction and arranged along a second direction, each second electrode being located between two adjacent first electrodes, the first direction being perpendicular to the second direction, the first conductive layer having a first region and a second region adjacent to each other and arranged along the first direction; a plurality of first conductive plug structures on the first electrodes and second electrodes in the first region, the first conductive plug structures being arrayed along the first direction; a plurality of second conductive plug structures on the first electrodes in the second region, the second conductive plug structures being arranged along the second direction; a plurality of third conductive plug structures on the second electrodes in the second region, the third conductive plug structures being arranged along the second direction; a second conductive layer on the second conductive plug structures, the second conductive layer being parallel to the second direction; a third conductive layer on the third conductive plug structures, the third conductive layer being parallel to the second direction, and the distance between the third conductive layer and the second conductive layer along the first direction being greater than the spacing between adjacent first conductive plug structures along the second direction.

[0007] Optionally, it further includes: a fourth conductive layer electrically connected to the second conductive layer, the fourth conductive layer being parallel to the first direction; and a fifth conductive layer electrically connected to the third conductive layer, the fifth conductive layer being parallel to the first direction.

[0008] Optionally, the distance between the third conductive layer and the second conductive layer is less than the distance between the second conductive layer and the adjacent first conductive plug structure.

[0009] Optionally, the distance between the third conductive layer and the second conductive layer is less than the distance between the third conductive layer and the adjacent first conductive plug structure.

[0010] Optionally, the distance between adjacent first conductive plug structures along the second direction is less than the distance between adjacent first conductive plug structures along the first direction.

[0011] Optionally, the spacing between adjacent first conductive plug structures along the second direction is the target test size.

[0012] Accordingly, the technical solution of the present invention also provides a method for forming a test structure, comprising: providing a substrate; forming a first conductive layer on the substrate, the first conductive layer comprising a plurality of first electrodes and a plurality of second electrodes, the plurality of first electrodes and the plurality of second electrodes being parallel to a first direction and arranged along a second direction, each second electrode being located between two adjacent first electrodes, the first direction being perpendicular to the second direction, the first conductive layer having a first region and a second region being adjacent and arranged along the first direction; forming a plurality of first conductive plug structures on the first electrodes and second electrodes of the first region, the first conductive plug structures being arrayed along the first direction; forming a plurality of second conductive plug structures on the first electrodes of the second region, the second conductive plug structures being arranged along the second direction; forming a plurality of third conductive plug structures on the second electrodes of the second region, the third conductive plug structures being arranged along the second direction; forming a second conductive layer on the second conductive plug structures, the second conductive layer being parallel to the second direction; forming a third conductive layer on the third conductive plug structures, the third conductive layer being parallel to the second direction, and the spacing between the third conductive layer and the second conductive layer along the first direction being greater than the spacing between adjacent first conductive plug structures along the second direction.

[0013] Optionally, it further includes: forming a fourth conductive layer electrically connected to the second conductive layer, the fourth conductive layer being parallel to the first direction; and forming a fifth conductive layer electrically connected to the third conductive layer, the fifth conductive layer being parallel to the first direction.

[0014] Optionally, the substrate includes a base and a device structure located on the base; the device structure is electrically connected to the first conductive layer.

[0015] Optionally, the method for forming the first conductive layer includes: forming a first dielectric layer and a first opening located within the first dielectric layer on the substrate; forming a first metal material film on the first opening and the surface of the first dielectric layer; planarizing the first metal material film until the first dielectric layer is exposed, thereby forming the first electrode and the second electrode.

[0016] Optionally, the method includes: after forming the first conductive layer, forming a second dielectric layer on the surface of the first dielectric layer and the surface of the first conductive layer; forming the first conductive plug structure, the second conductive plug structure, and the third conductive plug structure within the second dielectric layer; after forming the first conductive plug structure, the second conductive plug structure, and the third conductive plug structure, forming a third dielectric layer and a second opening located within the third dielectric layer on the second dielectric layer; forming a second metal material film on the second opening and the surface of the third dielectric layer; planarizing the second metal material film until the surface of the third dielectric layer is exposed, thereby forming the second conductive layer and the third conductive layer.

[0017] Optionally, the second conductive layer and the fourth conductive layer are electrically connected through a fourth conductive plug structure located on the second conductive layer; the third conductive layer and the fifth conductive layer are electrically connected through a fifth conductive plug structure located on the third conductive layer.

[0018] Optionally, the method for forming the fourth conductive plug structure and the fifth conductive plug structure includes: forming a fourth dielectric layer on the second conductive layer, the third conductive layer and the third dielectric layer; and forming the fourth conductive plug structure and the fifth conductive plug structure within the fourth dielectric layer.

[0019] Optionally, the method for forming the fourth conductive layer and the fifth conductive layer includes: forming a fifth dielectric layer and a third opening located within the fifth dielectric layer on the fourth dielectric layer, the fourth conductive plug structure and the fifth conductive plug structure; forming a third metal material film within the third opening and on the surface of the fifth dielectric layer; planarizing the third metal material film until the surface of the fifth dielectric layer is exposed, thereby forming the fourth conductive layer and the fifth conductive layer.

[0020] Accordingly, the technical solution of the present invention also provides a method for operating a test structure, comprising: a method for operating a test structure, characterized in that it includes: providing a test structure, the test structure comprising: a substrate; a first conductive layer located on the substrate, the first conductive layer comprising a plurality of first electrodes and a plurality of second electrodes, the plurality of first electrodes and the plurality of second electrodes being parallel to a first direction and arranged along a second direction, each second electrode being located between two adjacent first electrodes, the first direction being perpendicular to the second direction, the first conductive layer having a first region and a second region adjacent to each other and arranged along the first direction; a plurality of first conductive plug structures located on the first electrodes and second electrodes in the first region, the first conductive plug structures being arrayed along the first direction; and a plurality of first conductive plug structures located on the first electrodes and second electrodes in the first region. A plurality of second conductive plug structures are located on the first electrode of the second region, the second conductive plug structures being arranged along the second direction; a plurality of third conductive plug structures are located on the second electrode of the second region, the third conductive plug structures being arranged along the second direction; a second conductive layer is located on the second conductive plug structures, the second conductive layer being parallel to the second direction; a third conductive layer is located on the third conductive plug structures, the second conductive layer being parallel to the second direction, and the distance between the third conductive layer and the second conductive layer along the first direction is greater than the spacing between adjacent first conductive plug structures along the second direction; a first bias voltage is applied to the second conductive layer; a second bias voltage is applied to the third conductive layer, the first bias voltage and the second bias voltage being different.

[0021] Optionally, the test structure further includes: a fourth conductive layer electrically connected to the second conductive layer, the fourth conductive layer being parallel to the first direction; and a fifth conductive layer electrically connected to the third conductive layer, the fifth conductive layer being parallel to the first direction.

[0022] Optionally, the fourth conductive layer is connected to the stress voltage, and the fifth conductive layer is grounded.

[0023] Optionally, the fifth conductive layer is connected to the stress voltage, and the fourth conductive layer is grounded.

[0024] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0025] In the method for forming the test structure provided by the present invention, a third conductive layer is formed on the third conductive plug structure. The third conductive layer is parallel to the second direction, and the distance between the third conductive layer and the second conductive layer along the first direction is greater than the distance between adjacent first conductive plug structures along the second direction. When the test structure is in use, a test voltage is applied to the second conductive layer and the third conductive layer respectively. The dielectric layer between the third conductive layer and the second conductive layer is less likely to be broken down than the dielectric layer between adjacent first conductive plug structures in the second direction. Therefore, the breakdown performance over time is the breakdown performance of the dielectric layer between adjacent first conductive plug structures, thereby improving the accuracy of the breakdown performance test over time.

[0026] Furthermore, the distance between the third conductive layer and the second conductive layer is less than the distance between the second conductive layer and the adjacent first conductive plug structure. The dielectric layer between the second conductive layer and the adjacent first conductive plug structure is less likely to be broken down than the dielectric layer between the third conductive layer and the second conductive layer, thus improving the accuracy of the breakdown performance test over time.

[0027] Furthermore, the distance between the third conductive layer and the second conductive layer is less than the distance between the third conductive layer and the adjacent first conductive plug structure. The third conductive layer and the adjacent first conductive plug structure are less likely to be broken down relative to the dielectric layer between the third conductive layer and the second conductive layer, thus improving the accuracy of the breakdown performance test over time.

[0028] In the test structure provided by the present invention, when using the test structure, the test voltage is applied to the second conductive layer and the third conductive layer respectively. The dielectric layer between the third conductive layer and the second conductive layer is not easily broken down compared to the dielectric layer between the adjacent first conductive plug structures in the second direction. Therefore, the breakdown performance over time is the breakdown performance of the dielectric layer between the adjacent first conductive plug structures in the first region, thus improving the accuracy of the breakdown performance test over time. Attached Figure Description

[0029] Figures 1 to 6 This is a schematic diagram of a test structure;

[0030] Figures 7 to 15 This is a schematic diagram of the steps in the method for forming a test structure according to an embodiment of the present invention. Detailed Implementation

[0031] As described in the background section, existing test structures for the time-dependent breakdown performance of metallic dielectric layers need further improvement. A test structure will now be described and analyzed.

[0032] It should be noted that the terms "surface" and "on" in this specification are used to describe the relative spatial position and are not limited to whether there is direct contact.

[0033] Figures 1 to 6 This is a schematic diagram of a test structure.

[0034] Please refer to Figure 1 , Figure 1 yes Figure 2 The top view of the first dielectric layer is omitted. Figure 2 yes Figure 1 A cross-sectional view along D1D2 shows the test structure, which includes: a substrate 100, comprising a first region I, a second region II, and a third region III arranged along a first direction X, wherein the second region II is located between the first region I and the third region III; a plurality of first conductive layers 101 formed within the first region I, wherein the first conductive layers 101 are parallel to the second direction Y and arranged along the first direction X, and the first direction X is perpendicular to the second direction Y; a first dielectric layer 102 formed on the substrate 100 and a plurality of first conductive plugs 103 located within the first dielectric layer 102, wherein the first conductive plugs 103 are electrically connected to the first conductive layers 101, and the first conductive plugs 103 on adjacent first conductive layers 101 are staggered, and the plurality of first conductive plugs 103 on each first conductive layer 101 are uniformly distributed along the second direction Y.

[0035] Please refer to Figures 3 to 5 , Figure 3 yes Figure 4 and Figure 5 The top view of the fourth dielectric layer is omitted. Figure 4 yes Figure 3 A schematic cross-sectional view of the structure along the central axis D1D2. Figure 5 yes Figure 3A cross-sectional view along E1E2 shows a second dielectric layer 104 formed on the first dielectric layer 102 and a second conductive structure located within the second dielectric layer 104 on the second region II. The second conductive structure includes multiple staggered first electrodes 105 and second electrodes 106. The first electrodes 105 and second electrodes 106 are parallel to the first direction X and arranged along the second direction Y. The first electrodes 105 are located on the second region II and extend to the first region I, and the second electrodes 106 are located on the second region II and extend to the third region III. A third dielectric layer 107 is formed on the second dielectric layer 104 and the second conductive structure, and multiple conductive structures are located within the third dielectric layer 107. A second conductive plug structure 108 is formed, located on the first region I and the second region II, and electrically connected to the first electrode 105 and the second electrode 106, respectively; a fourth dielectric layer 109 is formed on the second conductive plug structure 108 and the third dielectric layer 107, and a third conductive structure 110 and a fourth conductive structure 111 are formed within the fourth dielectric layer 109, the third conductive structure 110 and the fourth conductive structure 111 are parallel to the second direction Y, the third conductive structure 110 is electrically connected to the second conductive plug structure 108 on the first region I, and the fourth conductive structure 111 is electrically connected to the second conductive plug structure 108 on the third region III.

[0036] The test structure formed by the above method is used to test the time-dependent breakdown performance of the dielectric layer between the first conductive plugs 103. Specifically, the distance between adjacent first conductive plugs 103 on the same first conductive layer 101 is greater than the distance between the first conductive plugs 103 on the first conductive layer 101 and the first conductive plugs 103 on the adjacent first conductive layer 101. That is, the test structure is used to test the time-dependent breakdown performance between the first conductive plugs 103 on the first conductive layer 101 and the first conductive plugs 103 on the adjacent first conductive layer 101.

[0037] When the test structure is in use, test voltages are applied to the third conductive structure 110 and the fourth conductive structure 111, respectively, which is equivalent to test voltages being applied to the first electrode 105 and the second electrode 106, respectively. (Refer to...) Figure 6 ( Figure 6 for Figure 3 (A partial enlarged view of the portion marked by the dashed line) shows that the distance n between the first electrode 105 and the second electrode 106 is less than the distance between the first conductive plug 103 on the first conductive structure 101 and the adjacent first conductive plug 103 on the first conductive structure 101. Figure 6The distance m between the first electrode 105 and the second electrode 106 is such that the dielectric layer between the first conductive plug 103 on the first conductive structure 101 breaks down before the dielectric layer between the first conductive plug 103 on the first conductive structure 101 and the adjacent first conductive plug 103 on the first conductive structure 101. This makes it impossible to accurately measure the time-dependent breakdown performance of the dielectric layer between the first conductive plugs 103.

[0038] To address the aforementioned issues, the present invention provides a method for forming a test structure, wherein a third conductive layer is formed on the third conductive plug structure. The third conductive layer is parallel to the second direction, and the distance between the third conductive layer and the second conductive layer along the first direction is greater than the distance between adjacent first conductive plug structures along the second direction. When the test structure is in use, a test voltage is applied to the second conductive layer and the third conductive layer respectively. The dielectric layer between the third conductive layer and the second conductive layer is less likely to be broken down compared to the dielectric layer between adjacent first conductive plugs in the second direction. Therefore, the obtained breakdown performance over time is the breakdown performance of the dielectric layer between adjacent first conductive plugs, thus improving the accuracy of the breakdown performance test over time.

[0039] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0040] Figures 7 to 15 This is a schematic diagram of the steps in the method for forming a test structure according to an embodiment of the present invention.

[0041] Please refer to Figure 7 and Figure 8 , Figure 7 for Figure 8 and Figure 9 The top view of the first dielectric layer is omitted. Figure 8 for Figure 7 A cross-sectional structural schematic diagram along the F1F2 direction is provided, showing a substrate 200; a first conductive layer 201 is formed on the substrate 200, the first conductive layer 201 includes multiple first electrodes 201a and multiple second electrodes 201b, the multiple first electrodes 201a and the multiple second electrodes 201b are all parallel to a first direction X and arranged along a second direction Y, each second electrode 201b is located between two adjacent first electrodes 201a, the first direction X is perpendicular to the second direction Y, and the first conductive layer 201 has a first region I and a second region II that are adjacent and arranged along the first direction X.

[0042] In this embodiment, the substrate 200 further includes a substrate (not shown in the figure) and a device structure (not shown in the figure) located on the substrate. The device structure includes one or more combinations of transistors, diodes, triodes, capacitors, inductors, and conductive structures. The first conductive layer 201 is electrically connected to the device structure.

[0043] The method for forming the first conductive layer 201 includes: forming a first dielectric layer 202 and a first opening (not shown in the figure) located in the first dielectric layer 202 on the substrate 200; forming a first metal material film (not shown in the figure) on the first opening and the surface of the first dielectric layer 202; planarizing the first metal material film until the first dielectric layer 202 is exposed, and forming the first electrode 201a and the second electrode 201b.

[0044] In this embodiment, the substrate further includes a third region A, a fourth region B, and a fifth region C arranged along the second direction Y, with the fourth region B adjacent to the third region A and the fifth region B on both sides, respectively. The first conductive layer 201 is located on the fourth region B. Subsequently, a test area will be formed on the fourth region B, while a lead area will be formed on the third region A and the fifth region C, i.e., forming the fourth and fifth conductive layers as leads.

[0045] Please refer to Figures 9 to 11 , Figure 9 for Figure 10 and Figure 11 The top view of the second dielectric layer and the first dielectric layer is omitted. Figure 10 for Figure 9 A schematic diagram of the cross-sectional structure along the F1F2 direction. Figure 11 for Figure 9 A cross-sectional structural diagram along the F3F4 direction shows that a plurality of first conductive plug structures 203 are formed on the first electrode 201a and the second electrode 201b of the first region I, and the first conductive plug structures 203 are distributed in an array along the first direction X; a plurality of second conductive plug structures 204 are formed on the first electrode 201a of the second region II, and the second conductive plug structures 204 are arranged along the second direction Y; a plurality of third conductive plug structures 205 are formed on the second electrode 201b of the second region II, and the third conductive plug structures 205 are arranged along the second direction Y.

[0046] Specifically, in this embodiment, after the first conductive layer 201 is formed, a second dielectric layer 206 is formed on the surface of the first dielectric layer 202 and the surface of the first conductive layer 201; the first conductive plug structure 203, the second conductive plug structure 204 and the third conductive plug structure 205 are formed in the second dielectric layer 206.

[0047] The method for forming the first conductive plug structure 203, the second conductive plug structure 204 and the third conductive plug structure 205 further includes: forming a through hole (not shown in the figure) in the second dielectric layer 206; forming a conductive material film (not shown in the figure) in the through hole and on the surface of the second dielectric layer 206; and planarizing the conductive material film until the surface of the second dielectric layer 206 is exposed.

[0048] In this embodiment, each of the second conductive plug structures 204 includes two second conductive plugs (not shown in the figure) arranged along the first direction X. The number and distribution of the second conductive plugs are determined by the actual circuit design and are not particularly limited here.

[0049] In this embodiment, each of the third conductive plug structures 205 includes two third conductive plugs (not shown in the figure) arranged along the first direction X. The number and distribution of the third conductive plugs are determined by the actual circuit design and are not particularly limited here.

[0050] Please refer to Figure 12 and Figure 13 , Figure 12 for Figure 13 The top view of the third dielectric layer, the second dielectric layer, and the first dielectric layer is omitted. Figure 13 for Figure 12 A cross-sectional view along the F3F4 direction shows a second conductive layer 207 formed on the second conductive plug structure 204, which is parallel to the second direction Y; and a third conductive layer 208 formed on the third conductive plug structure 205, which is parallel to the second direction Y, and the distance S2 between the third conductive layer 208 and the second conductive layer 207 along the first direction X is greater than the distance S1 between the adjacent first conductive plug structures 203 along the second direction Y.

[0051] When the formed test structure is used, the test voltage is applied to the second conductive layer 207 and the third conductive layer 208 respectively. The dielectric layer between the third conductive layer 208 and the second conductive layer 207 is not easily broken down compared to the dielectric layer between the adjacent first conductive plug structures 203 in the second direction Y. Therefore, the breakdown performance over time is the breakdown performance of the dielectric layer between the adjacent first conductive plug structures 203, which can improve the accuracy of the breakdown performance test over time.

[0052] Subsequently, the second conductive layer 207 needs to be led out through the fourth conductive layer to connect with an external circuit; the third conductive layer 208 needs to be led out through the fifth conductive layer to connect with an external circuit. In this embodiment, for ease of leading out, the second conductive layer 207 is located on the fourth region B and extends to the third region A; the third conductive layer 208 is located on the fourth region B and extends to the fifth region C.

[0053] In this embodiment, specifically, after forming the first conductive plug structure 203, the second conductive plug structure 204, and the third conductive plug structure 205, a third dielectric layer 209 and a second opening (not shown in the figure) located in the third dielectric layer 209 are formed on the second dielectric layer 206; a second metal material film (not shown in the figure) is formed on the second opening and the surface of the third dielectric layer 209; the second metal material film is planarized until the surface of the third dielectric layer 209 is exposed, forming the second conductive layer 207 and the third conductive layer 208.

[0054] The distance S2 between the third conductive layer 208 and the second conductive layer 207 is less than the distance S3 between the second conductive layer 207 and the adjacent first conductive plug structure 203. The dielectric layer between the second conductive layer 207 and the adjacent first conductive plug structure 203 is less likely to be broken down than the dielectric layer between the third conductive layer 208 and the second conductive layer 207, thus improving the accuracy of the breakdown performance test over time.

[0055] The distance S2 between the third conductive layer 208 and the second conductive layer 207 is less than the distance between the third conductive layer 208 and the adjacent first conductive plug structure 203. The dielectric layer between the third conductive layer 208 and the second conductive layer 207 is less prone to breakdown relative to the adjacent first conductive plug structure 203, thus improving the accuracy of the breakdown performance test over time.

[0056] In this embodiment, the second conductive layer 207 is obviously closer to the first conductive plug structure 203. In other embodiments, the positions of the second conductive layer 207 and the second conductive layer 208 can be interchanged.

[0057] The distance S1 between adjacent first conductive plug structures 203 along the second direction Y is less than the distance S4 between adjacent first conductive plug structures 203 along the first direction X.

[0058] In this embodiment, the distance S1 between adjacent first conductive plug structures 203 along the second direction Y is the target test size.

[0059] Please refer to Figure 14 and Figure 15 , Figure 14 for Figure 15 The top view of the fifth, fourth, third, second, and first dielectric layers is omitted. Figure 15 for Figure 14 A cross-sectional structural diagram along the F3F4 direction shows that a fourth conductive layer 210 is formed that is electrically connected to the second conductive layer 207, and the fourth conductive layer 210 is parallel to the first direction X; a fifth conductive layer 211 is formed that is electrically connected to the third conductive layer 208, and the fourth conductive layer 210 is parallel to the first direction X.

[0060] Specifically, the second conductive layer 207 and the fourth conductive layer 210 are electrically connected through a fourth conductive plug structure 212 located on the second conductive layer 207; the third conductive layer 208 and the fifth conductive layer 211 are electrically connected through a fifth conductive plug structure (not shown in the figure) located on the third conductive layer 208.

[0061] In this embodiment, the fourth conductive layer 210 and the fifth conductive layer 212 are located in the test area. Specifically, the fourth conductive layer 210 is located on the third region A; the fourth conductive plug structure 212 is located on the third region A; the fourth conductive layer 210 is located on the fifth region C; and the fifth conductive plug structure is located on the fifth region C.

[0062] The method for forming the fourth conductive plug structure 212 and the fifth conductive plug structure includes: forming a fourth dielectric layer 213 on the second conductive layer 207, the third conductive layer 208 and the third dielectric layer 209; and forming the fourth conductive plug structure 212 and the fifth conductive plug structure within the fourth dielectric layer 213.

[0063] The method for forming the fourth conductive layer 210 and the fifth conductive layer 211 includes: forming a fifth dielectric layer 214 and a third opening (not shown in the figure) located in the fifth dielectric layer 214 on the fourth dielectric layer 213, the fourth conductive plug structure 212 and the fifth conductive plug structure; forming a third metal material film (not shown in the figure) in the third opening and on the surface of the fifth dielectric layer 214; planarizing the third metal material film until the surface of the fifth dielectric layer 214 is exposed, thereby forming the fourth conductive layer 213 and the fifth conductive layer 211.

[0064] Accordingly, one embodiment of the present invention also provides a semiconductor structure formed using the above method. Please refer to [the original text]. Figure 14 and Figure 15The system includes: a substrate 200; a first conductive layer 201 located on the substrate 200, the first conductive layer 201 including multiple first electrodes 201a and multiple second electrodes 201b, the multiple first electrodes 201a and the multiple second electrodes 201b being parallel to a first direction X and arranged along a second direction Y, each second electrode 201b being located between two adjacent first electrodes 201a, the first direction X being perpendicular to the second direction Y, the first conductive layer 201 having a first region I and a second region II adjacent to each other and arranged along the first direction X; a plurality of first conductive plug structures 203 located on the first electrodes 201a and second electrodes 201b in the first region I, the first conductive plug structures 203 being arrayed along the first direction X; and a plurality of first conductive plug structures 203 located on the first electrodes 201a and second electrodes 201b in the second region II. A plurality of second conductive plug structures 203 on an electrode 201a, the second conductive plug structures 203 being arranged along the second direction Y; a plurality of third conductive plug structures 205 on a second electrode 201b located in the second region II, the third conductive plug structures 205 being arranged along the second direction Y; a second conductive layer 207 on the second conductive plug structures 205, the second conductive layer 207 being parallel to the second direction Y; a third conductive layer 208 on the third conductive plug structures 205, the third conductive layer 208 being parallel to the second direction Y, and the distance S2 between the third conductive layer 208 and the second conductive layer 207 along the first direction X being greater than the distance S1 between adjacent first conductive plug structures 203 along the second direction Y.

[0065] When the test structure is in use, the test voltage is applied to the second conductive layer 207 and the third conductive layer 208 respectively. The dielectric layer between the third conductive layer 208 and the second conductive layer 207 is less likely to be broken down than the dielectric layer between the adjacent first conductive plug structures 203 in the second direction Y. Therefore, the breakdown performance obtained is the breakdown performance of the dielectric layer between the adjacent first conductive plug structures 203, which can improve the accuracy of the breakdown performance test.

[0066] The test structure further includes: a fourth conductive layer 210 electrically connected to the second conductive layer 207, the fourth conductive layer 210 being parallel to the first direction X; and a fifth conductive layer 211 electrically connected to the third conductive layer 208, the fifth conductive layer 211 being parallel to the first direction X.

[0067] The distance S2 between the third conductive layer 208 and the second conductive layer 207 is less than the distance S3 between the second conductive layer 207 and the adjacent first conductive plug structure 203. The dielectric layer between the second conductive layer 207 and the adjacent first conductive plug structure 203 is less likely to be broken down than the dielectric layer between the third conductive layer 208 and the second conductive layer 207, thus improving the accuracy of the breakdown performance test over time.

[0068] The distance S2 between the third conductive layer 208 and the second conductive layer 207 is less than the distance between the third conductive layer 208 and the adjacent first conductive plug structure 203. The dielectric layer between the third conductive layer 208 and the second conductive layer 207 is less prone to breakdown relative to the adjacent first conductive plug structure 203, thus improving the accuracy of the breakdown performance test over time.

[0069] The distance S1 between adjacent first conductive plug structures 203 along the second direction Y is less than the distance S4 between adjacent first conductive plug structures 203 along the first direction X.

[0070] In this embodiment, the distance S1 between adjacent first conductive plug structures 203 along the second direction Y is the target test size.

[0071] Accordingly, one embodiment of the present invention also provides a method for testing a structure, comprising:

[0072] A test structure is provided; please refer to the following for details. Figure 14 and Figure 15The system includes: a substrate 200; a first conductive layer 201 located on the substrate 200, the first conductive layer 201 including multiple first electrodes 201a and multiple second electrodes 201b, the multiple first electrodes 201a and the multiple second electrodes 201b being parallel to a first direction X and arranged along a second direction Y, each second electrode 201b being located between two adjacent first electrodes 201a, the first direction X being perpendicular to the second direction Y, the first conductive layer 201 having a first region I and a second region II adjacent to each other and arranged along the first direction X; a plurality of first conductive plug structures 203 located on the first electrodes 201a and second electrodes 201b in the first region I, the first conductive plug structures 203 being arrayed along the first direction X; and a plurality of first conductive plug structures 203 located on the first electrodes 201a and second electrodes 201b in the second region II. A plurality of second conductive plug structures 203 on an electrode 201a, the second conductive plug structures 203 being arranged along the second direction Y; a plurality of third conductive plug structures 205 on a second electrode 201b located in the second region II, the third conductive plug structures 205 being arranged along the second direction Y; a second conductive layer 207 on the second conductive plug structures 205, the second conductive layer 207 being parallel to the second direction Y; a third conductive layer 208 on the third conductive plug structures 205, the third conductive layer 208 being parallel to the second direction Y, and the distance S2 between the third conductive layer 208 and the second conductive layer 207 along the first direction X being greater than the distance S1 between adjacent first conductive plug structures 203 along the second direction Y;

[0073] A first bias voltage is applied to the second conductive layer 207;

[0074] A second bias voltage is applied to the third conductive layer 208, and the first bias voltage is different from the second bias voltage.

[0075] In this embodiment, the test structure further includes: a fourth conductive layer 210 electrically connected to the second conductive layer 207, the fourth conductive layer 210 being parallel to the first direction X; and a fifth conductive layer 211 electrically connected to the third conductive layer 208, the fifth conductive layer 211 being parallel to the first direction X.

[0076] In this embodiment, the fourth conductive layer 210 is connected to the stress voltage, and the fifth conductive layer 211 is grounded. In other embodiments, the fifth conductive layer 211 is connected to the stress voltage, and the fourth conductive layer 210 is grounded.

[0077] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A test structure, characterized in that, include: Substrate; A first conductive layer is located on the substrate. The first conductive layer includes a plurality of first electrodes and a plurality of second electrodes. The plurality of first electrodes and the plurality of second electrodes are parallel to a first direction and arranged along a second direction. Each second electrode is located between two adjacent first electrodes. The first direction is perpendicular to the second direction. The first conductive layer has a first region and a second region that are adjacent to each other and arranged along the first direction. A plurality of first conductive plug structures are located on the first electrode and the second electrode of the first region. The first conductive plug structures are arrayed along the first direction, and the plurality of first conductive plug structures on the first electrode of the first region are arranged along the second direction relative to the plurality of first conductive plug structures on the second electrode of the adjacent first region. A plurality of second conductive plug structures are located on the first electrode of the second region, and the second conductive plug structures are arranged along the second direction; A plurality of third conductive plug structures are located on the second electrode in the second region, the third conductive plug structures being arranged along the second direction; A second conductive layer is located on the second conductive plug structure, and the second conductive layer is parallel to the second direction; A third conductive layer is located on the third conductive plug structure, the third conductive layer is parallel to the second direction, and the distance between the third conductive layer and the second conductive layer along the first direction is greater than the spacing between adjacent first conductive plug structures along the second direction.

2. The test structure as described in claim 1, characterized in that, Also includes: A fourth conductive layer electrically connected to the second conductive layer, the fourth conductive layer being parallel to the first direction; A fifth conductive layer electrically connected to the third conductive layer, the fifth conductive layer being parallel to the first direction.

3. The test structure as described in claim 1, characterized in that, The distance between the third conductive layer and the second conductive layer is less than the distance between the second conductive layer and the adjacent first conductive plug structure.

4. The test structure as described in claim 1, characterized in that, The distance between the third conductive layer and the second conductive layer is less than the distance between the third conductive layer and the adjacent first conductive plug structure.

5. The test structure as described in claim 1, characterized in that, The distance between adjacent first conductive plug structures along the second direction is less than the distance between adjacent first conductive plug structures along the first direction.

6. The test structure as described in claim 1, characterized in that, The spacing between adjacent first conductive plug structures along the second direction is the target test size.

7. A method for forming a test structure, characterized in that, include: Provide substrate; A first conductive layer is formed on the substrate. The first conductive layer includes a plurality of first electrodes and a plurality of second electrodes. The plurality of first electrodes and the plurality of second electrodes are parallel to a first direction and arranged along a second direction. Each second electrode is located between two adjacent first electrodes. The first direction is perpendicular to the second direction. The first conductive layer has a first region and a second region that are adjacent to each other and arranged along the first direction. A plurality of first conductive plug structures are formed on the first electrode and the second electrode of the first region. The first conductive plug structures are arrayed along the first direction, and the plurality of first conductive plug structures on the first electrode of the first region are arranged along the second direction relative to the plurality of first conductive plug structures on the second electrode of the adjacent first region. A plurality of second conductive plug structures are formed on the first electrode of the second region, and the second conductive plug structures are arranged along the second direction; A plurality of third conductive plug structures are formed on the second electrode of the second region, and the third conductive plug structures are arranged along the second direction; A second conductive layer is formed on the second conductive plug structure, the second conductive layer being parallel to the second direction; A third conductive layer is formed on the third conductive plug structure, the third conductive layer is parallel to the second direction, and the distance between the third conductive layer and the second conductive layer along the first direction is greater than the distance between adjacent first conductive plug structures along the second direction.

8. The method for forming the test structure as described in claim 7, characterized in that, Also includes: A fourth conductive layer is formed that is electrically connected to the second conductive layer, the fourth conductive layer being parallel to the first direction; A fifth conductive layer is formed that is electrically connected to the third conductive layer, and the fifth conductive layer is parallel to the first direction.

9. The method for forming the test structure as described in claim 8, characterized in that, The substrate includes a base and a device structure located on the base; the device structure is electrically connected to the first conductive layer.

10. The method for forming the test structure as described in claim 8, characterized in that, The method for forming the first conductive layer includes: forming a first dielectric layer and a first opening located within the first dielectric layer on the substrate; forming a first metal material film on the first opening and the surface of the first dielectric layer; planarizing the first metal material film until the first dielectric layer is exposed, and forming the first electrode and the second electrode.

11. The method for forming the test structure as described in claim 10, characterized in that, include: After the first conductive layer is formed, a second dielectric layer is formed on the surface of the first dielectric layer and the surface of the first conductive layer. The first conductive plug structure, the second conductive plug structure, and the third conductive plug structure are formed within the second dielectric layer; After forming the first conductive plug structure, the second conductive plug structure and the third conductive plug structure, a third dielectric layer and a second opening located in the third dielectric layer are formed on the second dielectric layer; A second metal material film is formed on the surface of the second opening and the third dielectric layer; the second metal material film is planarized until the surface of the third dielectric layer is exposed, thereby forming the second conductive layer and the third conductive layer.

12. The method for forming the test structure as described in claim 11, characterized in that, include: The second conductive layer and the fourth conductive layer are electrically connected through a fourth conductive plug structure located on the second conductive layer; The third conductive layer and the fifth conductive layer are electrically connected through a fifth conductive plug structure located on the third conductive layer.

13. The method for forming the test structure as described in claim 12, characterized in that, The method for forming the fourth conductive plug structure and the fifth conductive plug structure includes: forming a fourth dielectric layer on the second conductive layer, the third conductive layer and the third dielectric layer; and forming the fourth conductive plug structure and the fifth conductive plug structure within the fourth dielectric layer.

14. The method for forming the test structure as described in claim 13, characterized in that, The method for forming the fourth conductive layer and the fifth conductive layer includes: forming a fifth dielectric layer and a third opening located within the fifth dielectric layer on the fourth dielectric layer, the fourth conductive plug structure and the fifth conductive plug structure; forming a third metal material film within the third opening and on the surface of the fifth dielectric layer; planarizing the third metal material film until the surface of the fifth dielectric layer is exposed, thereby forming the fourth conductive layer and the fifth conductive layer.

15. A method for testing a structure, characterized in that, include: A test structure is provided, the test structure comprising: Substrate; A first conductive layer is located on the substrate. The first conductive layer includes a plurality of first electrodes and a plurality of second electrodes. The plurality of first electrodes and the plurality of second electrodes are parallel to a first direction and arranged along a second direction. Each second electrode is located between two adjacent first electrodes. The first direction is perpendicular to the second direction. The first conductive layer has a first region and a second region that are adjacent to each other and arranged along the first direction. A plurality of first conductive plug structures are located on the first electrode and the second electrode of the first region. The first conductive plug structures are arrayed along the first direction, and the plurality of first conductive plug structures on the first electrode of the first region are arranged along the second direction relative to the plurality of first conductive plug structures on the second electrode of the adjacent first region. A plurality of second conductive plug structures are located on the first electrode of the second region, and the second conductive plug structures are arranged along the second direction; A plurality of third conductive plug structures are located on the second electrode in the second region, the third conductive plug structures being arranged along the second direction; A second conductive layer is located on the second conductive plug structure, and the second conductive layer is parallel to the second direction; A third conductive layer is located on the third conductive plug structure, the third conductive layer is parallel to the second direction, and the distance between the third conductive layer and the second conductive layer along the first direction is greater than the spacing between adjacent first conductive plug structures along the second direction. A first bias voltage is applied to the second conductive layer; A second bias voltage is applied to the third conductive layer, the first bias voltage being different from the second bias voltage.

16. The method of operating the test structure as described in claim 15, characterized in that, The test structure further includes: a fourth conductive layer electrically connected to the second conductive layer, the fourth conductive layer being parallel to the first direction; and a fifth conductive layer electrically connected to the third conductive layer, the fifth conductive layer being parallel to the first direction.

17. The method of operating the test structure as described in claim 16, characterized in that, The fourth conductive layer is connected to the stress voltage, and the fifth conductive layer is grounded.

18. The method of operating the test structure as described in claim 16, characterized in that, The fifth conductive layer is connected to the stress voltage, and the fourth conductive layer is grounded.

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