Circuit board and electronic device

Abstract

Embodiments of the present application provide a circuit board and an electronic device, the circuit board comprising a plurality of signal hole units, each signal hole unit comprising a first signal hole and a second signal hole, the circuit board having a first surface and a second surface, the first surface having a first signal pad and a second signal pad, the first signal pad being electrically connected to the first signal hole, the second signal pad being electrically connected to the second signal hole, the first signal pad and the second signal pad being used to be electrically connected to signal units of a BGA chip; a center distance between the first signal hole and the second signal hole is less than a distance between the first signal pad and the second signal pad. The circuit board provided by the embodiments of the present application has less crosstalk when the signal hole units transmit signals, so that the signal-to-noise ratio of signal transmission is higher.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of servers, and in particular to a circuit board and an electronic device. BACKGROUND

[0002] Electronic devices can include servers, controllers, and various other electronic devices.

[0003] With increasing requirements for the packaging density of electronic devices, BGA (Ball Grid Array) packaged chips are increasingly used in electronic devices, and the pitch of the solder balls of the BGA chips is becoming smaller and smaller. The BGA soldering area on the circuit board has a plurality of pads and vias in one-to-one communication with the pads, and the solder balls on the BGA chip are electrically connected to the pads and vias. The pitch of the solder balls of the BGA chip becomes smaller, resulting in a smaller pitch between the vias on the circuit board and an increase in crosstalk between the vias.

[0004] The increase in crosstalk between the vias reduces the signal-to-noise ratio of high-speed signal transmission on the circuit board. SUMMARY

[0005] The embodiments of the present application provide a circuit board and an electronic device, and the crosstalk of the signal hole unit in the circuit board is small when transmitting signals, so that the signal-to-noise ratio of signal transmission is high.

[0006] The first aspect of the embodiments of the present application provides a circuit board, comprising a plurality of signal hole units, the plurality of signal hole units are arranged in an array on the circuit board, the signal hole units located on the same row are arranged at equal intervals along a first direction, each signal hole unit comprises a first signal hole and a second signal hole, the first signal hole and the second signal hole are arranged along a second direction, the second direction is perpendicular to the first direction, the first signal hole and the second signal hole both extend along a third direction, the third direction is perpendicular to both the first direction and the second direction; the circuit board has a first surface and a second surface oppositely arranged along the third direction, the first surface has a first signal pad and a second signal pad, the first signal pad is electrically connected to the first signal hole, the second signal pad is electrically connected to the second signal hole, the first signal pad and the second signal pad are used to electrically connect to the signal unit of a BGA chip; the center distance between the first signal hole and the second signal hole is smaller than the distance between the first signal pad and the second signal pad.

[0007] The circuit board provided by the embodiment of the present application is provided with a plurality of signal hole units, the plurality of signal hole units are arranged in an array on the circuit board, the signal hole units on the same row are arranged at equal intervals along a first direction, each signal hole unit comprises a first signal hole and a second signal hole, the first surface of the circuit board is provided with a first signal pad and a second signal pad, the first signal pad is electrically connected with the first signal hole, the second signal pad is electrically connected with the second signal hole, and the first signal pad and the second signal pad are used for electrical connection with the signal unit of the BGA chip. By offsetting the first signal hole relative to the first signal pad towards the second signal pad and offsetting the second signal hole relative to the second signal pad towards the first signal pad, the center distance between the first signal hole and the second signal hole is smaller than the interval between the first signal pad and the second signal pad, the center distance between the first signal hole and the second signal hole is reduced, and the interval between the signal hole units on the circuit board is increased, thereby reducing the crosstalk when the signal hole units transmit signals and making the signal-to-noise ratio of signal transmission higher.

[0008] In a possible implementation, the center distance between the center of the first signal hole and the center of the first signal pad is 0.05-0.13 mm, and the center distance between the center of the second signal hole and the center of the second signal pad is 0.05-0.13 mm. In this way, the crosstalk between the signal hole units can be reduced, and the electrical connection between the signal hole and the signal pad can be reliable.

[0009] In a possible implementation, the circuit board provided by the embodiment of the present application comprises a plurality of signal hole units, the plurality of signal hole units are arranged in an array on the circuit board, the signal hole units on the same row are arranged at equal intervals along a first direction, each signal hole unit comprises a first signal hole and a second signal hole, the first surface of the circuit board is provided with a first signal pad and a second signal pad, the first signal pad is electrically connected with the first signal hole, the second signal pad is electrically connected with the second signal hole, and the first signal pad and the second signal pad are used for electrical connection with the signal unit of the BGA chip. By offsetting the first signal hole relative to the first signal pad towards the second signal pad and offsetting the second signal hole relative to the second signal pad towards the first signal pad, the center distance between the first signal hole and the second signal hole is smaller than the interval between the first signal pad and the second signal pad, the center distance between the first signal hole and the second signal hole is reduced, and the interval between the signal hole units on the circuit board is increased, thereby reducing the crosstalk when the signal hole units transmit signals and making the signal-to-noise ratio of signal transmission higher.

[0010] In a possible implementation, the circuit board provided by the embodiment of the present application further comprises a plurality of signal lead units, the plurality of signal lead units comprise a plurality of sending lead units and a plurality of receiving lead units, the sending lead units and the receiving lead units are in one-to-one correspondence with the sending signal hole units and the receiving signal hole units, respectively, the circuit board further comprises a wire outlet layer, the wire outlet layer comprises a first wire outlet layer and a second wire outlet layer, the first wire outlet layer and the second wire outlet layer are both located between the first surface and the second surface along a third direction, the sending lead units extend along a second direction on the first wire outlet layer, and the receiving lead units extend along the second direction on the second wire outlet layer. The wiring of the signal lead units can be completed by only two layers of wiring, thereby reducing the number of layers of the circuit board and reducing the manufacturing cost of the circuit board.

[0011] In a possible implementation, the circuit board provided by the embodiment of the present application further includes a plurality of ground via units, the ground via units are arranged along the first direction and are spaced apart from the signal hole units, and the ground via units are configured to be electrically connected to ground units of the BGA chip to ground the BGA chip.

[0012] In a possible implementation, the circuit board provided by the embodiment of the present application includes a first ground via and a second ground via, the first ground via and the second ground via are arranged along a second direction; the ground units of the BGA chip include a first ground solder ball, a second ground solder ball, and a third ground solder ball, the first ground solder ball is opposite to the first ground via and is electrically connected to the first ground via, the second ground solder ball is opposite to the second ground via and is electrically connected to the second ground via, and the third ground solder ball is located between the first ground solder ball and the second ground solder ball along the second direction; the circuit board further includes a plurality of connectors, the connectors are arranged one-to-one corresponding to the ground via units, the first ground via and the second ground via are electrically connected to the connectors, and the connectors are configured to electrically connect the third ground solder ball. By connecting the third ground solder ball through the connector, the number of ground vias in the circuit board can be reduced, the space between the first ground via and the second ground via can be used by the signal lead units, thereby increasing the distance between the signal lead units and the signal hole units and reducing the crosstalk between the signal lead units and the signal hole units.

[0013] In a possible implementation, the circuit board provided by the embodiment of the present application includes a first ground via and a second ground via, the first ground via and the second ground via are arranged along a second direction; the ground units of the BGA chip include a first ground solder ball, a second ground solder ball, and a third ground solder ball, the first ground solder ball is opposite to the first ground via and is electrically connected to the first ground via, the second ground solder ball is opposite to the second ground via and is electrically connected to the second ground via, and the third ground solder ball is located between the first ground solder ball and the second ground solder ball along the second direction; the circuit board further includes a plurality of connectors, the connectors are arranged one-to-one corresponding to the ground via units, the first ground via and the second ground via are electrically connected to the connectors, and the connectors are configured to electrically connect the third ground solder ball. By connecting the third ground solder ball through the connector, the number of ground vias in the circuit board can be reduced, the space between the first ground via and the second ground via can be used by the signal lead units, thereby increasing the distance between the signal lead units and the signal hole units and reducing the crosstalk between the signal lead units and the signal hole units.

[0014] In a possible implementation, the circuit board provided by the embodiment of the present application includes a first ground via and a second ground via, the first ground via and the second ground via are arranged along a second direction; the ground units of the BGA chip include a first ground solder ball, a second ground solder ball, and a third ground solder ball, the first ground solder ball is opposite to the first ground via and is electrically connected to the first ground via, the second ground solder ball is opposite to the second ground via and is electrically connected to the second ground via, and the third ground solder ball is located between the first ground solder ball and the second ground solder ball along the second direction; the circuit board further includes a plurality of connectors, the connectors are arranged one-to-one corresponding to the ground via units, the first ground via and the second ground via are electrically connected to the connectors, and the connectors are configured to electrically connect the third ground solder ball. By connecting the third ground solder ball through the connector, the number of ground vias in the circuit board can be reduced, the space between the first ground via and the second ground via can be used by the signal lead units, thereby increasing the distance between the signal lead units and the signal hole units and reducing the crosstalk between the signal lead units and the signal hole units.

[0015] In a possible implementation, the circuit board provided by the embodiment of the present application further includes a power supply layer and a power supply via, the power supply layer is located between the wire-out layer and the ground layer along the third direction, and the power supply via is configured to electrically connect the power supply layer and the wire-out layer to supply power to the first wire-out layer and the second wire-out layer.

[0016] A second aspect of this application provides an electronic device, including an electronic device body and the aforementioned circuit board.

[0017] These and other aspects, embodiments, and advantages of the exemplary embodiments will become apparent from the accompanying drawings and the examples described below. However, it should be understood that the specification and drawings are for illustrative purposes only and are not intended to limit the scope of this application; details are provided in the appended claims. Other aspects and advantages of this application will be set forth in the following description, and in part will be obvious from the description or may be learned by practice of the application. Furthermore, various aspects and advantages of this application may be realized and obtained by means and combinations particularly pointed out in the appended claims. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application;

[0019] Figure 2 This is a schematic diagram of the structure of a BGA chip in an electronic device provided in an embodiment of this application;

[0020] Figure 3 This is a schematic diagram of the circuit board structure in related technologies;

[0021] Figure 4 for Figure 3 Enlarged view of point A in the middle;

[0022] Figure 5 A schematic diagram of the circuit board structure provided in the embodiments of this application. Figure 1 ;

[0023] Figure 6 for Figure 5 Top view;

[0024] Figure 7 for Figure 6 Enlarged view of point B in the middle;

[0025] Figure 8 This is a schematic diagram illustrating interference between signal hole units in a circuit board provided in an embodiment of this application.

[0026] Figure 9 A schematic diagram of the circuit board structure provided in the embodiments of this application. Figure 2 ;

[0027] Figure 10 A schematic diagram of the circuit board structure provided in the embodiments of this application. Figure 3 ;

[0028] Figure 11 for Figure 10 Side view;

[0029] Figure 12Structure diagram of the circuit board provided by the embodiment of the present application Figure 4 ;

[0030] Figure 13 Structure diagram of the circuit board provided by the embodiment of the present application Figure 12 ;

[0031] Figure 14 Structure diagram of the connection between the ground via unit in the circuit board provided by the embodiment of the present application and the ground unit in the BGA chip

[0032] Figure 15 Structure diagram of the circuit board provided by the embodiment of the present application Figure 5 ;

[0033] Figure 16 Structure diagram of the circuit board provided by the embodiment of the present application Figure 15 ;

[0034] Figure 17 Structure diagram of the signal-to-noise ratio of the near-end crosstalk during signal transmission in the circuit board provided by the embodiment of the present application

[0035] Figure 18 Structure diagram of the signal-to-noise ratio of the near-end crosstalk during signal transmission in the circuit board in the related art

[0036] Figure 19 Structure diagram of the signal-to-noise ratio of the far-end crosstalk during signal transmission in the circuit board provided by the embodiment of the present application

[0037] Figure 20 Structure diagram of the signal-to-noise ratio of the far-end crosstalk during signal transmission in the circuit board in the related art

[0038] Figure 21 Structure diagram of the circuit board provided by the embodiment of the present application Figure 6 .

[0039] Explanation of reference signs:

[0040] 10, electronic device

[0041] 100, electronic device body

[0042] 200n, circuit board; 210n, pad; 220n, via; 221n, signal via; 222n, ground via; 223n, signal via pair

[0043] 200, circuit board; 200a, first region; 200b, second region

[0044] 210, signal hole unit; 210a, sending signal hole unit; 210a1, first sending signal hole unit; 210a2, second sending signal hole unit; 210a3, third sending signal hole unit; 210a4, fourth sending signal hole unit; 210a5, fifth sending signal hole unit; 210b, receiving signal hole unit; 210b1, first receiving signal hole unit; 210b2, second receiving signal hole unit; 210b3, third receiving signal hole unit; 210b4, fourth receiving signal hole unit; 210b5, fifth receiving signal hole unit; 210Vi, interfered signal hole unit; 210Ag, interference source signal hole unit; 211, first signal hole; 212, second signal hole;

[0045] 220, first surface; 221, pad; 2211, first signal pad; 2212, second signal pad;

[0046] 230, second surface;

[0047] 240, signal lead unit; 241, sending lead unit; 242, receiving lead unit;

[0048] 250, outgoing line layer; 251, first outgoing line layer; 252, second outgoing line layer;

[0049] 260, ground via unit; 261, first ground via; 262, second ground via;

[0050] 270, connecting piece; 271, surface copper layer; 271a, first face; 271b, second face; 272, ground blind hole;

[0051] 280, ground layer;

[0052] 290, power supply layer; 291, power supply via; 2911, first power supply via; 2912, second power supply via;

[0053] 300, cable;

[0054] 400, BGA chip; 410, BGA device body; 420, solder ball; 430, signal unit; 440, ground unit; 441, first ground solder ball; 442, second ground solder ball; 443, third ground solder ball;

[0055] X, first direction;

[0056] Y, second direction;

[0057] Z, third direction;

[0058] D1, first pitch;

[0059] D2, second pitch;

[0060] D3, third distance;

[0061] D4, fourth distance;

[0062] R1, first coverage area;

[0063] R2, second coverage area. DETAILED DESCRIPTION

[0064] The terms used in the embodiments of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0065] Figure 1 The structural schematic diagram of the electronic device provided in the embodiments of the present application is shown in FIG. 1. As shown in FIG. 1, the electronic device 10 includes an electronic device body 100 and a circuit board 200 located in the electronic device body 100. Figure 1 The electronic device body 100 can be a shell, and the circuit board 200 is installed in the shell.

[0066] The electronic device body 100 can be a shell, and the circuit board 200 is installed in the shell. Figure 1 The electronic device body shown in FIG. 1 removes the upper cover to clearly see the structure in the shell. The electronic device 10 can include a plurality of circuit boards 200, and the circuit boards 200 can be installed on the side wall or the bottom wall of the electronic device body 100 by fasteners, which is specifically set according to the number and layout of the circuit boards 200 in the electronic device 10. Figure 1 In the embodiment shown in FIG. 1, the electronic device 10 includes two circuit boards 200, and the two circuit boards 200 are both installed on the bottom wall of the electronic device body 100, and the circuit boards 200 are electrically connected by the cable 300.

[0067] The electronic device can include servers, controllers and various electronic devices, and in the embodiments of the present application, the server is taken as an example for illustration. The electronic device 10 also includes various electronic devices, and each electronic device is electrically connected with the circuit board. With the increasing requirement of the packaging density of the electronic device 10, the BGA (Ball Grid Array, Ball Grid Array packaging) chip (hereinafter referred to as BGA chip 400) is more and more used in the electronic device. Figure 2 The structural schematic diagram of the BGA chip in the electronic device provided in the embodiments of the present application is shown in FIG. 2. As shown in FIG. 2, the BGA chip 400 includes a plurality of BGA pins 410, and the BGA pins 410 are arranged in a grid array. Figure 2As shown, the BGA chip 400 includes a BGA chip body 410 and a plurality of solder balls 420 located at the bottom of the BGA chip body 410, and the plurality of solder balls 420 are arranged in an array at the bottom of the BGA chip body 410. The spacing between the solder balls 420 is becoming smaller and smaller to meet the packaging density requirements of the electronic device 10, and currently, the spacing between the BGA solder balls 420 is gradually reduced from 1mm to 0.94mm, 0.9mm, 0.8mm.

[0068] The soldering area of the BGA chip 400 on the circuit board 200 has a plurality of pads and vias in one-to-one communication with the pads, and the solder balls 420 on the BGA chip 400 are electrically connected through the pads and the vias. The increasingly smaller spacing between the solder balls 420 results in a smaller spacing between the vias on the circuit board 200, and the crosstalk between the vias increases, ultimately resulting in a decrease in the signal-to-noise ratio of high-speed signal transmission on the circuit board 200.

[0069] Specifically, Figure 3 is a structural schematic diagram of a circuit board in the related art; Figure 4 is Figure 3 is an enlarged view of A in FIG. 8. In the related art, the circuit board is denoted as 200n, and each component in the circuit board 200n is also suffixed with n to distinguish from the circuit board 200 in the embodiments of the present application. Referring to Figure 3 and Figure 4 As shown, the circuit board 200n has a plurality of pads 210n corresponding to the solder balls 420 one by one, and the solder balls 420 are arranged one by one corresponding to the pads 210n. When the BGA chip 400 is soldered to the circuit board 200n, the solder balls 420 correspond one by one to the pads 210n to electrically connect the BGA chip 400 and the circuit board 200n. The circuit board 200n further includes a plurality of vias 220n, and the vias 220n are arranged one by one corresponding to the pads 210n. In the related art, the vias 220n are arranged concentrically with the pads 210n, and the vias 220n are used to connect the BGA chip 400 to the inside of the circuit board 200.

[0070] High-speed signals are generally transmitted using differential pairs to ensure the accuracy of signal transmission. In the following, taking a differential pair as an example, the process of increasing crosstalk between vias as the spacing between BGA solder balls 420 decreases is described. The via 220n includes a signal via 221n and a ground via 222n, and two adjacent signal vias 221n form a signal via pair 223n to transmit a differential signal, Figure 4The signal via pair 223n is shown in a dashed box. One ground via 222n can be arranged between the signal via pair 223n, or more than one ground via 222n, for example, two or three ground vias 222n. As the spacing between the solder balls 420 becomes smaller, the spacing between the pads 210n on the circuit board 200 also becomes smaller. The vias 220n are concentrically arranged with the pads 210n. Therefore, the spacing between the signal via pair 223n and other signal via pairs 223n also becomes smaller. As a result, the crosstalk between the signal via pair 223n increases when transmitting a differential signal, which eventually leads to a decrease in the signal-to-noise ratio of the differential signal transmission on the circuit board 200.

[0071] Figure 5 Structure of the circuit board provided by the embodiment of the present application Figure 1 ; Figure 6 For Figure 5 the top view. As shown in Figure 5 and Figure 6 , the circuit board 200 includes a plurality of signal hole units 210, which are arranged in an array on the circuit board 200. The signal hole units 210 located in the same row are arranged at equal intervals along a first direction X. Each signal hole unit 210 includes a first signal hole 211 and a second signal hole 212. The first signal hole 211 and the second signal hole 212 are arranged along a second direction Y, which is perpendicular to the first direction X. The first signal hole 211 and the second signal hole 212 both extend along a third direction Z, which is perpendicular to both the first direction X and the second direction Y. The circuit board 200 has a first surface 220 and a second surface 230 arranged oppositely along the third direction Z. The first surface 220 has a first signal pad 2211 and a second signal pad 2212. The first signal pad 2211 is electrically connected to the first signal hole 211, and the second signal pad 2212 is electrically connected to the second signal hole 212. The first signal pad 2211 and the second signal pad 2212 are used to electrically connect to the signal unit 430 of the BGA chip 400. The center distance between the first signal hole 211 and the second signal hole 212 is smaller than the center distance between the first signal pad 2211 and the second signal pad 2212.

[0072] Please continue to refer to Figure 5 , for the convenience of description, the length direction (or width direction) of the circuit board 200 is referred to as the first direction X, the direction perpendicular to the first direction X along the extension plane of the circuit board 200 is referred to as the second direction Y, and the thickness direction of the circuit board 200 is referred to as the third direction Z, which is perpendicular to both the first direction X and the second direction Y.

[0073] The signal hole units 210 can be arranged in a rectangular array on the circuit board 200, or can be arranged in a Figure 5 and Figure 6The staggered array arrangement is set according to the number of signal hole units 210 and the arrangement of solder balls 420 on the BGA chip 400. In Figure 5 and Figure 6 , the signal hole units 210 form rows along the first direction X and columns along the second direction Y, the signal hole units 210 in the same row are arranged at equal intervals along the first direction X, and the intervals between the signal hole units 210 in the same column can be the same or different.

[0074] Figure 7 For Figure 6 , the enlarged view of B. Referring to Figure 6 and Figure 7 , the signal hole unit 210 can be a differential pair to transmit a differential signal. In this embodiment, the signal hole unit 210 includes a first signal hole 211 and a second signal hole 212, the first signal hole 211 and the second signal hole 212 form a differential signal pair, and the first signal hole 211 and the second signal hole 212 are aligned along the second direction Y. When the BGA chip 400 is soldered to the circuit board 200, the side of the circuit board 200 facing the BGA chip 400 is called the first surface 220, and the side opposite to the first surface 220 along the third direction Z is called the second surface 230. In Figure 5 , the first surface 220 is schematically shown by a dashed line to facilitate observation of the components below the first surface 220. Both the first signal hole 211 and the second signal hole 212 extend from the first surface 220 of the circuit board 200 to the interior of the circuit board 200.

[0075] Please continue to refer to Figure 5 , the first surface 220 has a plurality of pads 221, which are one-to-one corresponding to the positions of the solder balls 420 on the BGA chip 400 and are soldered to the solder balls 420 on the BGA chip 400. Please continue to refer to Figure 6 and Figure 7 , the pad 221 electrically connected to the first signal hole 211 is called the first signal pad 2211, and the pad 221 electrically connected to the second signal hole 212 is called the second signal pad 2212. Please continue to refer to Figure 7 , the center distance between the first signal pad 2211 and the second signal pad 2212 is the distance between the solder balls 420 on the BGA chip 400, which is called the first distance D1. It should be noted that in Figure 2 , the signal unit 430 on the BGA chip 400 is composed of two solder balls 420, one of which is opposite to the first signal pad 2211 and the other of which is opposite to the second signal pad 2212. The two solder balls 420 are respectively soldered to the first signal pad 2211 and the second signal pad 2212, thereby electrically connecting the signal unit 430 and the signal hole unit 210.

[0076] Please continue to refer to Figure 7 As shown in the figure, the first signal hole 211 is offset relative to the first signal pad 2211 along the second direction Y towards the second signal pad 2212, the first signal hole 211 is not concentric with the first signal pad 2211, the second signal hole 212 is offset relative to the second signal pad 2212 along the second direction Y towards the first signal pad 2211, and the second signal hole 212 is not concentric with the second signal pad 2212. The center distance between the first signal hole 211 and the second signal hole 212 is called the second distance D2, and the second distance D2 is smaller than the first distance D1.

[0077] Figure 8 The interference schematic diagram between the signal hole units in the circuit board provided by the embodiment of the present application is shown. Please continue to refer to Figure 8 As shown in the figure, one of the signal hole units 210 is called the interfered signal hole unit 210Vi, and the other signal hole units 210 are called the interference source signal hole units 210Ag. It can be understood that the distinction between the interfered signal hole unit 210Vi and the interference source signal hole unit 210Ag is only for the convenience of description. The same signal hole unit 210 is both the interference source signal hole unit 210Ag, which interferes with other signal hole units 210, and the interfered signal hole unit 210Vi, which is interfered by other signal hole units 210.

[0078] A circle with the first distance D1 as the diameter and the midpoint between the first signal pad 2211 and the second signal pad 2212 as the center is drawn, which is called the first coverage area R1. A circle with the second distance D2 as the diameter and the midpoint between the first signal hole 211 and the second signal hole 212 as the center is drawn, which is called the second coverage area R2.

[0079] Please continue to refer to Figure 8 As shown in the figure, the distance between the edge of the first coverage area R1 of the interfered signal hole unit 210Vi and the edge of the first coverage area R1 of the interference source signal hole unit 210Ag is called the third distance D3; the distance between the edge of the second coverage area R2 of the interfered signal hole unit 210Vi and the edge of the second coverage area R2 of the interference source signal hole unit 210Ag is called the fourth distance D4. In the embodiment of the present application, the distance between the interfered signal hole unit 210Vi and the interference source signal hole unit 210Ag is the fourth distance D4, and the distance between the interfered signal hole unit 210Vi and the interference source signal hole unit 210Ag in the related art is D3. Since the second distance D2 is smaller than the first distance D1, the fourth distance D4 is greater than the third distance D3. In the embodiment of the present application, the distance between the interfered signal hole unit 210Vi and the interference source signal hole unit 210Ag is larger, which reduces the crosstalk when the interfered signal hole unit 210Vi and the interference source signal hole unit 210Ag transmit signals, thereby increasing the signal-to-noise ratio of signal transmission.​

[0080] The offset of the first signal hole 211 relative to the first signal pad 2211 can be determined according to the magnitude of the required reduced crosstalk, and is also affected by the interval between the first signal pad 2211 and the second signal pad 2212 (i.e. the interval between the pins 420 on the BGA chip 400). If the offset of the first signal hole 211 relative to the first signal pad 2211 is too small, the requirement of reducing crosstalk cannot be met, and if the offset of the first signal hole 211 relative to the first signal pad 2211 is too large, the first signal hole 211 is offset out of the first signal pad 2211, and the first signal hole 211 is difficult to electrically connect to the first signal pad 2211. Therefore, the interval between the center of the first signal hole 211 and the center of the first signal pad 2211 is 0.05-0.13 mm. The interval between the center of the second signal hole 212 and the center of the second signal pad 2212 is also 0.05-0.13 mm. In addition, in the embodiment of the present application, in order to facilitate the layout of the circuit board 200, the offset of the first signal hole 211 relative to the first signal pad 2211 can be the same as the offset of the second signal hole 212 relative to the second signal pad 2212.

[0081] Figure 9 Structure of the circuit board provided in the embodiment of the present application Figure 2 As shown in Figure 9 , the transmission of signals is divided into two parts: sending and receiving. Therefore, the signal hole unit 210 includes a plurality of sending signal hole units 210a and a plurality of receiving signal hole units 210b, and the number of the sending signal hole units 210a is the same as that of the receiving signal hole units 210b. The sending signal hole units 210a are located in the first area 200a, and the receiving signal hole units 210b are located in the second area 200b.

[0082] The number of the sending signal hole units 210a and the receiving signal hole units 210b can be set according to the types of signals to be transmitted. The first area 200a and the second area 200b are represented by the rectangular dashed lines in Figure 9 . It can be understood that the division of the first area 200a and the second area 200b is only to facilitate the distinction of the specific positions of the sending signal hole units 210a and the receiving signal hole units 210b in the circuit board 200.

[0083] Please continue to refer to Figure 9As shown in the embodiment of this application, there are five transmitting signal hole units 210a and five receiving signal hole units 210b, respectively referred to as the first transmitting signal hole unit 210a1, the second transmitting signal hole unit 210a2, the third transmitting signal hole unit 210a3, the fourth transmitting signal hole unit 210a4 and the fifth transmitting signal hole unit 210a5; and the first receiving signal hole unit 210b1, the second receiving signal hole unit 210b2, the third receiving signal hole unit 210b3, the fourth receiving signal hole unit 210b4 and the fifth receiving signal hole unit 210b5.

[0084] The transmitting signal hole unit 210a and the receiving signal hole unit 210b also need to be electrically connected to the circuit board 200 via leads. Figure 10 A schematic diagram of the circuit board structure provided in the embodiments of this application. Figure 3 ; Figure 11 for Figure 10 The side view, in which, Figure 5 Based on the embodiments shown, Figure 10 The first surface 220 and the second surface 230 are omitted to clearly show the signal lead unit 240 and the lead layer 250. Figure 11 The first outgoing layer 251 and the second outgoing layer 252 are schematically shown within dashed boxes. See also Figure 10 and Figure 11 As shown, the circuit board 200 also includes a plurality of signal lead units 240. Each signal lead unit 240 includes a plurality of transmitting lead units 241 and a plurality of receiving lead units 242 of the same number. The transmitting lead units 241 are electrically connected to the transmitting signal hole units 210a in a one-to-one correspondence, and the receiving lead units 242 are electrically connected to the receiving signal hole units 210b in a one-to-one correspondence. The circuit board 200 also includes a wiring layer 250, which includes a first wiring layer 251 and a second wiring layer 252. Both the first wiring layer 251 and the second wiring layer 252 are located between the first surface 220 and the second surface 230 along a third direction Z. The transmitting lead unit 241 extends along the second direction Y on the first wiring layer 251, and the receiving lead unit 242 extends along the second direction Y on the second wiring layer 252.

[0085] The signal lead unit 240 is the wiring in the circuit board 200, and the signal hole unit 210 is electrically connected to other electronic devices on the circuit board 200 through the signal lead unit 240.

[0086] The signal lead unit 240 electrically connected with the transmitting signal hole unit 210a is a transmitting lead unit 241, and the signal lead unit 240 electrically connected with the receiving signal hole unit 210b is a receiving lead unit 242. The signal is transmitted from the transmitting signal hole unit 210a, and reaches the receiving signal hole unit 210b via the transmitting lead unit 241 and the receiving lead unit 242, forming a loop of signal transmission.

[0087] In the related art, in order to reduce the crosstalk of signal transmission, the transmitting lead unit 241 needs two layers of wiring in the circuit board 200, and the receiving lead unit 242 also needs two layers of wiring in the circuit board 200, and a total of four layers of wiring are needed to complete the wiring of the signal lead unit 240. In the embodiment of the present application, since the second spacing D2 between the first signal hole 211 and the second signal hole 212 in the same signal hole unit 210 is reduced, the fourth spacing D4 between different signal hole units 210 is increased, and the crosstalk between different signal hole units 210 is reduced. Therefore, the transmitting lead unit 241 only needs one layer of wiring in the circuit board 200, and the transmitting lead unit 241 is arranged on the first lead-out layer 251, the receiving lead unit 242 only needs one layer of wiring in the circuit board 200, and the receiving lead unit 242 is arranged on the second lead-out layer 252, and only two layers of wiring are needed to complete the wiring of the signal lead unit 240, thereby reducing the number of layers of the circuit board 200 and reducing the manufacturing cost of the circuit board 200.

[0088] Figure 12 Structure diagram of the circuit board provided in the embodiment of the present application Figure 4 ; Figure 13 For Figure 12 is a top view. As shown in Figure 12 and Figure 13 , the circuit board 200 further comprises a plurality of ground via units 260, the ground via units 260 are arranged at intervals along the first direction X with the signal hole units 210, and the ground via units 260 are used to be electrically connected with the ground units 440 of the BGA chip 400 in the circuit board 200. Figure 2 The ground units 440 of the BGA chip 400 are electrically connected with the circuit board 200 through the ground via units 260, so as to ground the BGA chip 400. The signal hole units 210 are arranged at equal intervals along the first direction X, and the ground via units 260 are located between two adjacent signal hole units 210 along the first direction X.

[0089] Please continue to refer to

[0090] and Figure 12 , the ground via unit 260 comprises a first ground via 261 and a second ground via 262, and the first ground via 261 and the second ground via 262 are arranged along the second direction Y. Figure 13 Figure 2 ​The ground unit 440 of the BGA chip 400 in the figure includes a first ground solder ball 441, a second ground solder ball 442, and a third ground solder ball 443. When the BGA chip 400 is soldered to the circuit board 200, the first ground solder ball 441 is opposite to and electrically connected with the first ground via hole 261, the second ground solder ball 442 is opposite to and electrically connected with the second ground via hole 262, and the third ground solder ball 443 is located between the first ground solder ball 441 and the second ground solder ball 442 along the second direction Y; Figure 12 and Figure 13 The ground unit 440 is shown on one of the ground via hole units 260 in the figure. The circuit board 200 further includes a plurality of connectors 270, which are arranged one-to-one with the ground via hole units 260, and the first ground via hole 261 and the second ground via hole 262 are both electrically connected with the connectors 270, and the connectors 270 are used for electrical connection of the third ground solder ball 443.

[0091] The first ground solder ball 441 is soldered with the first ground via hole 261 through a pad on the circuit board 200, and the second ground solder ball 442 is soldered with the second ground via hole 262 through a pad on the circuit board 200. Since the first ground via hole 261 and the second ground via hole 262 are arranged along the second direction Y, the center distance between the first ground solder ball 441 and the second ground solder ball 442 is the same as the center distance between the first ground via hole 261 and the second ground via hole 262.

[0092] Please continue to refer to Figure 12 and Figure 13 The third ground solder ball 443 is further arranged between the first ground solder ball 441 and the second ground solder ball 442, and the circuit board 200 does not have a ground via hole corresponding to the third ground solder ball 443. In the related art, the number of the solder balls 420 in the ground unit 440 corresponds one-to-one to the number of the ground via holes 222n in the circuit board 200n, and the ground via holes 222n occupy a large space in the circuit board 200n, so that the distance between the lead and the signal via hole pair 223n is small, and the crosstalk between the lead and the signal via hole pair 223n is large. In the embodiment of the present application, the ground via hole opposite to the third ground solder ball 443 is removed, so that the space between the first ground via hole 261 and the second ground via hole 262 can be used by the signal lead unit 240, thereby increasing the distance between the signal lead unit 240 and the signal hole unit 210 and reducing the crosstalk between the signal lead unit 240 and the signal hole unit 210.

[0093] In the embodiment of the present application, the electrical connection of the third ground solder ball 443 with the circuit board 200 is achieved through the connector 270. The specific structure of the connector 270 is described below.

[0094] Figure 14 Structure diagram of the connection between the ground via unit in the circuit board and the ground unit in the BGA chip provided by the embodiment of the present application Figure 1 . Referring to FIG. 2, in the first embodiment, the connecting member is a surface copper layer 271, the surface copper layer 271 is located in the first surface 220 of the circuit board 200, one side of the surface copper layer 271 is electrically connected with the first ground via 261 and the second ground via 262, and the other side of the surface copper layer 271 is used for electrically connecting with the third ground solder ball 443. Figure 14 Figure 5 Specifically, the surface copper layer 271 is arranged one-to-one with the ground via unit 260, the surface copper layer 271 extends along the second direction Y, and the length L of the surface copper layer 271 is greater than or equal to the interval between the first ground via 261 and the second ground via 262. One side of the surface copper layer 271 facing the ground via unit 260 is referred to as the first side 271a, and the other side of the surface copper layer 271 facing the BGA chip 400 is referred to as the second side 271b.

[0095] On the first side 271a, both ends of the surface copper layer 271 along the second direction Y are electrically connected with the first ground via 261 and the second ground via 262 respectively. On the second side 271b, both ends of the surface copper layer 271 along the second direction Y are soldered with the first ground solder ball 441 and the second ground solder ball 442 respectively, and the center of the surface copper layer 271 along the second direction Y is soldered with the third ground solder ball 443, so as to realize the electrical connection between all the ground solder balls (the first ground solder ball 441, the second ground solder ball 442 and the third ground solder ball 443) in the ground unit 440 of the BGA chip 400 and the ground via unit 260 in the circuit board 200 through the surface copper layer 271.

[0096] Structure diagram of the circuit board provided by the embodiment of the present application

[0097] ; Figure 15 Structure diagram of the circuit board provided by the embodiment of the present application Figure 5 ; Figure 16 Structure diagram of the circuit board provided by the embodiment of the present application Figure 15 ; Figure 16 and Figure 16 , in the second embodiment, the connecting member 270 is a ground blind hole 272, the ground blind hole 272 is located between the first ground via 261 and the second ground via 262 along the second direction Y, the ground blind hole 272 is opposite to and electrically connected with the third ground solder ball 443; the circuit board 200 further comprises a ground layer 280 shown in FIG. 4, the ground layer 280 is located between the outgoing layer 250 and the first surface 220 along the third direction Z, and the ground blind hole 272, the first ground via 261 and the second ground via 262 are electrically connected with the ground layer 280. Figure 16

[0098] ​The ground blind hole 272 extends along the third direction Z, one end of the ground blind hole 272 is located on the first surface 220 of the circuit board 200, and the ground blind hole 272 is welded with the third ground solder ball 443 through the solder pad on the circuit board 200, and the other end of the ground blind hole 272 is electrically connected with the ground layer 280, so as to realize the electrical connection between the third ground solder ball 443 and the ground layer 280 in the circuit board 200.

[0099] It is known that the first ground via hole 261 and the second ground via hole 262 are welded with the first ground solder ball 441 and the second ground solder ball 442 respectively, and the ground blind hole 272, the first ground via hole 261 and the second ground via hole 262 are all electrically connected with the ground layer 280, so that all the ground solder balls (the first ground solder ball 441, the second ground solder ball 442 and the third ground solder ball 443) in the ground unit 440 of the BGA chip 400 are electrically connected with the ground layer 280 of the circuit board 200.

[0100] It should be noted that the ground layer 280 needs to be arranged between the outgoing line layer 250 and the first surface 220, so that the ground blind hole 272 occupies the space on the outgoing line layer 250, so that the distance between the signal lead unit 240 and the signal hole unit 210 on the outgoing line layer 250 is increased, and the crosstalk between the signal lead unit 240 and the signal hole unit 210 is reduced.

[0101] Next, taking the pin pitch of the BGA chip 400 as 0.9mm, the first signal hole 211 and the second signal hole 212 are both offset by 0.11mm, the connecting member is the surface copper layer 271, the second receiving signal hole unit 210b2 is taken as the interfered signal hole unit 210Vi, and the remaining signal hole units 210 are taken as the interference source signal hole units 210Ag as an example, the crosstalk suffered by the interfered signal hole unit 210Vi is simulated.

[0102] Figure 17 The simulation result diagram of the signal-to-noise ratio of the near-end crosstalk in the signal transmission in the circuit board provided by the embodiment of the present application; Figure 18 The simulation result diagram of the signal-to-noise ratio of the near-end crosstalk in the signal transmission in the circuit board in the related art. The near-end crosstalk refers to the crosstalk generated by the sending signal hole unit 210a to the interfered signal hole unit 210Vi. In Figure 17 and Figure 18 In the and, the abscissa represents the frequency during signal transmission, the unit is GHz, and the ordinate represents the signal-to-noise ratio after the near-end crosstalk suffered by the interfered signal hole unit 210Vi, the unit is dB.

[0103] Figure 17 and Figure 18The different curves in FIG. 10 respectively represent the signal-to-noise ratio values of the first sending signal hole unit 210a1, the second sending signal hole unit 210a2, the third sending signal hole unit 210a3, the fourth sending signal hole unit 210a4, and the fifth sending signal hole unit 210a5 after causing crosstalk to the interfered signal hole unit 210Vi. It can be understood that the closer the distance to the interfered signal hole unit 210Vi, the greater the crosstalk caused to the interfered signal hole unit 210Vi, and the lower the signal-to-noise ratio. The farther the distance to the interfered signal hole unit 210Vi, the smaller the crosstalk caused to the interfered signal hole unit 210Vi, and the higher the signal-to-noise ratio. Figure 17 In FIG. 10, when the frequency is 28 GHz, the absolute value of the signal-to-noise ratio is 49.39 dB at the minimum, and Figure 18 In FIG. 10, when the frequency is 28 GHz, the absolute value of the signal-to-noise ratio is 42.4 dB at the minimum. The signal-to-noise ratio of the signal transmission in the circuit board provided by the embodiment of the present application is improved by 7 dB relative to the related art.

[0104] Figure 19 The simulation result diagram of the signal-to-noise ratio of the far-end crosstalk in the signal transmission in the circuit board provided by the embodiment of the present application is shown in FIG. 11. Figure 20 The simulation result diagram of the signal-to-noise ratio of the far-end crosstalk in the signal transmission in the circuit board provided by the related art is shown in FIG. 12. The far-end crosstalk refers to the crosstalk caused by the receiving signal hole unit 210b to the interfered signal hole unit 210Vi. Figure 19 Figure 20 In FIG. 12, the abscissa represents the frequency during the signal transmission, and the unit is GHz. The ordinate represents the signal-to-noise ratio after the far-end crosstalk is caused to the interfered signal hole unit 210Vi, and the unit is dB. Figure 19 Figure 20 The different curves in FIG. 12 respectively represent the signal-to-noise ratio values of the first receiving signal hole unit 210b1, the third receiving signal hole unit 210b3, the fourth receiving signal hole unit 210b4, and the fifth receiving signal hole unit 210b5 after causing crosstalk to the interfered signal hole unit 210Vi. It can be understood that the closer the distance to the interfered signal hole unit 210Vi, the greater the crosstalk caused to the interfered signal hole unit 210Vi, and the lower the signal-to-noise ratio. The farther the distance to the interfered signal hole unit 210Vi, the smaller the crosstalk caused to the interfered signal hole unit 210Vi, and the higher the signal-to-noise ratio. Figure 19 In FIG. 12, when the frequency is 28 GHz, the absolute value of the signal-to-noise ratio is 39.38 dB at the minimum, and Figure 20 In FIG. 12, when the frequency is 28 GHz, the absolute value of the signal-to-noise ratio is 32.99 dB at the minimum. The signal-to-noise ratio of the signal transmission in the circuit board provided by the embodiment of the present application is improved by 6 dB relative to the related art.

[0105] Figure 21 The structure diagram of the circuit board provided by the embodiment of the present application is shown in FIG. 13. Figure 6 Referring to FIG. 13, in the Figure 21 Figure 16 ​​​Based on the embodiment shown, the circuit board 200 further comprises a power supply layer 290 and a power supply via 291, the power supply layer 290 is located between the outgoing line layer 250 and the grounding layer 280 along the third direction Z, and the power supply via 291 is used to electrically connect the power supply layer 290 and the outgoing line layer 250.

[0106] The power supply layer 290 is used to supply power to the first outgoing line layer 251, the second outgoing line layer 252 and other layers in the circuit board 200. The power supply layer 290 can be arranged close to the first outgoing line layer 251 and the second outgoing line layer 252, and the power supply layer 290 is electrically connected to the outgoing line layer 250 through the power supply via 291. Specifically, the power supply via 291 comprises a first power supply via 2911 and a second power supply via 2912, one end of the first power supply via 2911 is electrically connected to the power supply layer 290, and the other end is electrically connected to the first outgoing line layer 251; one end of the second power supply via 2912 is electrically connected to the power supply layer 290, and the other end is electrically connected to the second outgoing line layer 252.

[0107] In the description of the embodiments of the present application, it should be explained that, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting" should be understood in a broad sense, for example, it can be fixedly connected, or indirectly connected through an intermediate medium, or the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0108] The terms "first", "second", "third", "fourth" and the like (if any) in the specification and claims of the embodiments of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence.

[0109] Finally, it should be pointed out that: the above embodiments are only used to illustrate the technical solutions of the embodiments of the present application, and not to limit them; although the embodiments of the present application have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A circuit board, characterized in that, The circuit board includes multiple signal hole units arranged in an array on the circuit board. The signal hole units located in the same row are equally spaced along a first direction. Each signal hole unit includes a first signal hole and a second signal hole. The first signal hole and the second signal hole are arranged along a second direction, which is perpendicular to the first direction. The first signal hole and the second signal hole both extend along a third direction, which is perpendicular to both the first direction and the second direction. The circuit board has a first surface and a second surface disposed opposite to each other along the third direction. The first surface has a first signal pad and a second signal pad. The first signal pad is electrically connected to the first signal hole, and the second signal pad is electrically connected to the second signal hole. The first signal pad and the second signal pad are used to be electrically connected to the signal unit of the BGA chip. The center distance between the first signal hole and the second signal hole is smaller than the spacing between the first signal pad and the second signal pad; The circuit board also includes a plurality of grounding via units, which are spaced apart from the signal via units along the first direction, and are used to electrically connect to the grounding unit of the BGA chip; The grounding via unit includes a first grounding via and a second grounding via, wherein the first grounding via and the second grounding via are arranged along the second direction; The grounding unit of the BGA chip includes a first grounding solder ball, a second grounding solder ball, and a third grounding solder ball. The first grounding solder ball is opposite to and electrically connected to the first grounding via. The second grounding solder ball is opposite to and electrically connected to the second grounding via. The third grounding solder ball is located between the first grounding solder ball and the second grounding solder ball along the second direction. The circuit board also includes multiple connectors, each of which is provided in a one-to-one correspondence with the grounding via unit. The first grounding via and the second grounding via are both electrically connected to the connectors, and the connectors are used for the electrical connection of the third grounding solder ball.

2. The circuit board according to claim 1, characterized in that, The distance between the center of the first signal hole and the center of the first signal pad is 0.05-0.13 mm, and the distance between the center of the second signal hole and the center of the second signal pad is 0.05-0.13 mm.

3. The circuit board according to claim 1 or 2, characterized in that, The signal aperture unit includes an equal number of transmitting signal aperture units and a plurality of receiving signal aperture units, wherein the plurality of transmitting signal aperture units are located in a first region and the plurality of receiving signal aperture units are located in a second region.

4. The circuit board according to claim 3, characterized in that, The circuit board also includes multiple signal lead units, each signal lead unit comprising an equal number of transmitting lead units and a receiving lead unit. The transmitting lead units are electrically connected to the transmitting signal hole units one-to-one, and the receiving lead units are electrically connected to the receiving signal hole units one-to-one. The circuit board further includes a wiring layer, which includes a first wiring layer and a second wiring layer. Both the first wiring layer and the second wiring layer are located between the first surface and the second surface along the third direction. The transmitting lead unit extends on the first wiring layer along the second direction, and the receiving lead unit extends on the second wiring layer along the second direction.

5. The circuit board according to claim 4, characterized in that, The connector is a surface copper layer located on the first surface. The first grounding via and the second grounding via are both electrically connected to one side of the surface copper layer, and the other side of the surface copper layer is used to electrically connect to the third grounding solder ball.

6. The circuit board according to claim 4, characterized in that, The connector is a grounding blind hole, which is located between the first grounding via and the second grounding via along the second direction. The grounding blind hole is opposite to and electrically connected to the third grounding solder ball. The circuit board also includes a ground layer, which is located between the outgoing layer and the first surface along the third direction. The grounding blind via, the first grounding via, and the second grounding via are all electrically connected to the ground layer.

7. The circuit board according to claim 6, characterized in that, The circuit board also includes a power layer and power supply vias. The power layer is located between the outgoing layer and the ground layer along the third direction. The power supply vias are used to electrically connect the power layer and the outgoing layer.

8. An electronic device, characterized in that, It includes the electronic device body and the circuit board as described in any one of claims 1 to 7.

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