A method for manufacturing a circuit board and a circuit board

Abstract

The application discloses a manufacturing method of a circuit board and the circuit board, and comprises the following steps: S100, testing the impedance of an inner layer impedance line before pressing a semi-cured sheet, and obtaining a current inner layer impedance value; S200, obtaining an outer layer predicted impedance value according to the corresponding relationship between the inner layer impedance value and an outer layer impedance value; S300, judging whether the current inner layer impedance value needs to be corrected according to the outer layer predicted impedance value; if yes, correcting the impedance of the current inner layer impedance line; and if no, not correcting the impedance of the current inner layer impedance line. The manufacturing method of the circuit board can timely correct and adjust the inner layer impedance, improve the qualified rate, reduce the cost, and avoid the problem of scrapping unqualified circuit boards.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit board manufacturing, and in particular to a circuit board manufacturing method and circuit board. BACKGROUND

[0002] The circuit board can be referred to as a printed wiring board or a printed circuit board, and the English name is (Printed Circuit Board) PCB. The circuit board is divided into three major categories according to the number of layers: single-sided board, double-sided board, and multi-layer board. With the rapid increase in signal transmission speed, higher requirements are placed on circuit boards. The circuit performance provided by the circuit board must be able to prevent signal reflection during transmission, maintain signal integrity, reduce transmission loss, and match impedance, so that complete, reliable, and accurate transmission signals can be obtained.

[0003] The inner layer impedance of the circuit board cannot be tested until the outer layer etching circuit is completed in the traditional circuit board manufacturing process. However, at this time, the impedance cannot be corrected. Circuit boards with unqualified impedance can only be discarded, resulting in high costs and low pass rates. SUMMARY

[0004] The present application provides a circuit board manufacturing method and circuit board, which can correct the inner layer impedance of the circuit board in a timely manner, reduce costs, and improve pass rates.

[0005] The present application discloses a circuit board manufacturing method, comprising the steps of:

[0006] Before pressing the semi-cured sheet, the impedance of the inner layer impedance line is tested to obtain the current inner layer impedance value;

[0007] According to the corresponding relationship between the inner layer impedance value and the outer layer impedance value, an outer layer predicted impedance value is obtained.

[0008] According to the outer layer predicted impedance value, it is determined whether the current inner layer impedance value needs to be corrected. If so, the impedance of the current inner layer impedance line is corrected. If not, the impedance of the current inner layer impedance line is not corrected.

[0009] Optionally, the determination of whether the current inner layer impedance value needs to be corrected based on the outer layer predicted impedance value specifically comprises the steps of:

[0010] According to the outer layer predicted impedance value and the outer layer impedance value, the target value and the tolerance of the inner layer impedance value are deduced.

[0011] The current inner layer impedance value and the target value are compared. If the current inner layer impedance value is outside the tolerance range of the target value, the impedance of the current inner layer impedance line is corrected. If the current inner layer impedance value is within the tolerance range of the target value, the impedance of the current inner layer impedance line is not corrected.

[0012] Optionally, if the current inner layer impedance value is outside the tolerance range of the target value, the step of adjusting the impedance of the current inner layer impedance line is specifically:

[0013] If the current inner layer impedance value is less than the minimum value of the tolerance range of the target value, the line width and / or the line thickness of the current inner layer impedance line is reduced;

[0014] If the current inner layer impedance value is greater than the maximum value of the tolerance range of the target value, the line width and / or the line thickness of the current inner layer impedance line is increased.

[0015] Optionally, the manufacturing method further comprises the step of:

[0016] adjusting the line width and / or the line thickness of the current inner layer impedance line to correct the impedance of the current inner layer impedance line.

[0017] Optionally, the step of adjusting the line width and / or the line thickness of the current inner layer impedance line to correct the impedance of the current inner layer impedance line is specifically:

[0018] If the impedance of the current inner layer impedance line is too small, the line width and / or the line thickness of the current inner layer impedance line is reduced;

[0019] If the impedance of the current inner layer impedance line is too large, the line width and / or the line thickness of the current inner layer impedance line is increased.

[0020] Optionally, the step of reducing the line width and / or the line thickness of the current inner layer impedance line is specifically:

[0021] etching the current inner layer impedance line to reduce the line width and / or the line thickness of the current inner layer impedance line;

[0022] The step of increasing the line width and / or the line thickness of the current inner layer impedance line is specifically:

[0023] electroplating the current inner layer impedance line to increase the line width and / or the line thickness of the current inner layer impedance line.

[0024] Optionally, the manufacturing method further comprises the step of:

[0025] adjusting the trace of the current inner layer impedance line to correct the impedance of the current inner layer impedance line.

[0026] Optionally, the step of adjusting the trace of the current inner layer impedance line to correct the impedance of the current inner layer impedance line is specifically:

[0027] If the impedance of the current inner layer impedance line is too small, the trace of the inner layer impedance line is increased;

[0028] If the impedance of the current inner layer impedance line is too large, the trace of the inner layer impedance line is shortened.

[0029] Optionally, the corresponding relationship between the inner layer impedance value and the outer layer impedance value satisfies the following formula:

[0030]

[0031] Wherein, Z0 is outer layer impedance value, Z1 is inner layer impedance value, D is medium thickness after circuit board lamination, A is medium thickness in outer layer impedance test, ε is dielectric constant, ε r is the relative dielectric constant of the impedance line material.

[0032] The application further discloses a circuit board made by the manufacturing method, which comprises at least two layers and is internally provided with an impedance line.

[0033] The manufacturing method of the circuit board can timely correct and adjust the inner layer impedance, improve the qualified rate, reduce the cost, and avoid the problem of scrapping unqualified circuit boards. BRIEF DESCRIPTION OF DRAWINGS

[0034] The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and constitute a part of the specification, illustrate the embodiments of the application and serve to explain the principles of the application together with the text. It is obvious that the accompanying drawings below are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor. In the drawings:

[0035] Figure 1 is a flow chart of the manufacturing method of the circuit board of the embodiment of the application;

[0036] Figure 2 is a schematic diagram of the outer layer test impedance of the embodiment of the application;

[0037] Figure 3 is a schematic diagram of the inner layer test impedance of the embodiment of the application;

[0038] Figure 4 is another flow chart of the manufacturing method of the circuit board of the embodiment of the application;

[0039] Figure 5 is another flow chart of the manufacturing method of the circuit board of the embodiment of the application;

[0040] Figure 6 is another flow chart of the manufacturing method of the circuit board of the embodiment of the application;

[0041] Figure 7is another flow chart of the method for manufacturing a circuit board according to an embodiment of the present application. DETAILED DESCRIPTION

[0042] It is to be understood that the terminology used herein is for the purpose of describing specific embodiments only and is not intended to be limiting, and that the scope of the application can be implemented in numerous alternative forms, all of which are intended to be within the scope of the present application.

[0043] The present application will be described in detail below with reference to the accompanying drawings and alternative embodiments.

[0044] As shown in Figure 1 , as an embodiment of the present application, a method for manufacturing a circuit board is disclosed, comprising the steps of:

[0045] S100: Before pressing the prepreg, test the impedance of the inner layer impedance line to obtain the current inner layer impedance value;

[0046] S200: Obtain the outer layer predicted impedance value according to the corresponding relationship between the inner layer impedance value and the outer layer impedance value;

[0047] S300: Determine whether the current inner layer impedance value needs to be corrected according to the outer layer predicted impedance value; if yes, correct the impedance of the current inner layer impedance line; if no, do not correct the impedance of the current inner layer impedance line.

[0048] In the manufacturing process of the circuit board, the prepreg (PP sheet) needs to be pressed to finally manufacture the outer layer circuit board. Before pressing, the prepreg first manufactures the inner layer circuit, and if there is an impedance line in the inner layer, the impedance line is etched in the inner layer, but at this time, the impedance value of the impedance line cannot be accurately tested in the outer layer of the PCB. As shown in Figure 1 , as a test diagram of the outer layer impedance line, in the traditional manufacturing process of the circuit board, the inner layer impedance value of the PCB is generally not tested in the inner layer, and the impedance value test is only performed when the PCB is manufactured to the outer layer etching. However, by the time of the outer layer impedance test, the line width and copper thickness of the inner layer impedance line cannot be adjusted because the inner layer impedance line has been pressed on the prepreg. At this time, the circuit board with unqualified impedance can only be scrapped.

[0049] The method for manufacturing a circuit board according to the present application tests the inner layer impedance value before pressing the prepreg, obtains the outer layer predicted impedance value through the corresponding relationship between the inner layer impedance value and the outer layer impedance value, determines whether the current inner layer impedance value needs to be corrected according to the outer layer predicted impedance value, and corrects the impedance line before pressing the prepreg when correction is needed, so as to reach the required impedance value. The method for manufacturing a circuit board according to the present application can timely correct and adjust the inner layer impedance, improve the qualified rate, reduce the cost, and avoid the problem of scrapping the unqualified circuit board.

[0050] When testing the outer layer impedance, the impedance of the first part of the PCB can be tested by making the first part. In step 100, the impedance of the inner layer impedance line can be tested before the prepreg is pressed, and the same method as the outer layer impedance test can be used.

[0051] Specifically, in step 200, the corresponding relationship between the inner layer impedance value and the outer layer impedance value is shown in Figure 2 , which is an outer layer impedance test model. The corresponding calculation formula is:

[0052]

[0053] Where Z0 is the outer layer impedance value, A is the dielectric thickness of the outer layer impedance test, ε r is the relative dielectric constant of the impedance line material, W is the line width of the impedance line, and T is the line thickness of the impedance line.

[0054] As shown in Figure 3 , which is an inner layer impedance test model. The corresponding calculation formula is:

[0055]

[0056] Where Z1 is the inner layer impedance value, ε r is the relative dielectric constant of the impedance line material, A is the dielectric thickness of the inner layer impedance test, W is the line width of the impedance line, T is the line thickness of the impedance line, D is the dielectric thickness after the circuit board is laminated, and ε is the dielectric constant.

[0057] As can be seen from the above two formulas, the main factors affecting impedance are the dielectric constant εr, the impedance line width W, the impedance line thickness T, and the dielectric thickness A. The relative dielectric constant εr is a constant, and the dielectric thickness A also changes relatively little, so it has little effect on impedance. Therefore, the impedance line width W, the impedance line thickness T, especially the uniformity of the plating thickness of the impedance line on the plating layer, have a great effect on impedance.

[0058] As can be seen from formula (1) and formula (2), there is an additional variable D in the inner layer impedance test. As mentioned earlier, the dielectric thickness of the circuit board is relatively stable, so it has a relatively small effect on impedance. By comparing formula (1) and formula (2), we can get:

[0059]

[0060] As can be seen from formula (3), the relationship between Z0 and Z1 is related to ε r , D, and A. For a specific circuit board, D, A, and the material ε r are constants, so the relationship between Z0 and Z1 is determined. Therefore, the outer layer impedance value Z 0，The outer layer predicted impedance value is obtained, and it is determined whether the current inner layer impedance value needs to be corrected according to the outer layer predicted impedance value.

[0061] Specifically, as shown in the figure, the step S300 of determining whether the current inner layer impedance value needs to be corrected according to the outer layer predicted impedance value specifically includes: Figure 4

[0062] S310: The target value and the tolerance of the inner layer impedance value are deduced according to the outer layer predicted impedance value and the outer layer impedance value.

[0063] S320: The current inner layer impedance value is compared with the target value. If the current inner layer impedance value is outside the tolerance range of the target value, the impedance of the current inner layer impedance line is corrected. If the current inner layer impedance value is within the tolerance range of the target value, the impedance of the current inner layer impedance line is not corrected.

[0064] In S310, the target value of the inner layer impedance value and the tolerance of the inner layer impedance value are deduced by comparing the outer layer predicted impedance value and the outer layer impedance value, so as to determine when the inner layer impedance value is, the obtained outer layer predicted impedance value is equal to the actual outer layer impedance value, or in the tolerance range of the actual outer layer impedance value.

[0065] Specifically, as shown in the figure, if the current inner layer impedance value is outside the tolerance range of the target value in the step S320, the step of correcting the impedance of the current inner layer impedance line specifically includes: Figure 5

[0066] S321: If the current inner layer impedance value is less than the minimum value of the tolerance range of the target value, the line width and / or the line thickness of the current inner layer impedance line are reduced.

[0067] S322: If the current inner layer impedance value is greater than the maximum value of the tolerance range of the target value, the line width and / or the line thickness of the current inner layer impedance line are increased.

[0068] Specifically, as shown in the figure, the manufacturing method further includes the steps of: Figure 6

[0069] ​​​S400: adjust the line width and / or line thickness of the current inner layer impedance line, and correct the impedance of the current inner layer impedance line. The impedance value of the inner layer impedance line is greatly affected by the line width and the line thickness. In the present solution, the impedance line is adjusted to the required impedance by adjusting the line width and / or line thickness of the current inner layer impedance line. In the specific adjustment, only the line width of the current inner layer impedance line can be adjusted, only the line thickness of the current inner layer impedance line can be adjusted, or both the line width and the line thickness of the current inner layer impedance line can be adjusted. In the present solution, the adjustment refers to increasing or decreasing the line width and / or line thickness. In the process of adjustment, only the local part of the impedance line can be adjusted, or the whole of the impedance line can be adjusted. When the impedance value to be adjusted is large, the whole of the impedance line can be adjusted. When the impedance value to be adjusted is small, the local part of the impedance line can be adjusted. The line width and / or line thickness of the impedance line can be reduced by etching or other similar means, and the line width and / or line thickness of the impedance line can be increased by electroplating or other similar means.

[0070] More specifically, as shown in Figure 7 S400 adjusts the line width and / or line thickness of the current inner layer impedance line, and corrects the impedance of the current inner layer impedance line. The specific steps are as follows:

[0071] S410: if the impedance of the current inner layer impedance line is too small, decrease the line width and / or line thickness of the current inner layer impedance line.

[0072] S420: if the impedance of the current inner layer impedance line is too large, increase the line width and / or line thickness of the current inner layer impedance line.

[0073] The wider the line width of the impedance line, the thicker the line thickness of the impedance line, and the smaller the impedance value of the impedance line. In the present solution, the line width and / or line thickness of the impedance line is increased or decreased according to whether the impedance of the current inner layer impedance line is too small or too large, so as to adjust the impedance of the inner layer impedance line. Increasing or decreasing the line width and / or line thickness is an easy-to-implement means in actual production, and the change of the line width and / or line thickness will not change the line of the impedance line, and has little effect on the layout design of the original circuit.

[0074] The specific steps of decreasing the line width and / or line thickness of the current inner layer impedance line are etching the current inner layer impedance line to decrease the line width and / or line thickness of the current inner layer impedance line. The specific steps of increasing the line width and / or line thickness of the current inner layer impedance line are electroplating the current inner layer impedance line to increase the line width and / or line thickness of the current inner layer impedance line. Etching and electroplating can conveniently change the line width and / or line thickness of the inner layer impedance line.

[0075] In the aspect of adjusting the resistance of the impedance line, the manufacturing method further comprises the step of adjusting the trace of the current inner layer impedance line to correct the impedance of the current inner layer impedance line. The longer the impedance line is, the greater the resistance is, and the shorter the impedance line is, the smaller the resistance is. In the present solution, the length of the impedance line is changed by adjusting the trace of the impedance line, so as to adjust the resistance of the impedance line. While adjusting the trace of the impedance line, the width and / or thickness of the impedance line can also be adjusted. That is, in the present solution, only one of the trace, width and thickness can be adjusted, or any two of them can be adjusted, or all of them can be adjusted. Specifically, the specific adjustment solution can be selected according to the degree of resistance adjustment or the specific design of the circuit board. For example, when the adjustment degree is small, only one of the trace, width and thickness is adjusted; when the adjustment degree is slightly large, any two of the trace, width and thickness are adjusted; when the adjustment degree is large, all of the trace, width and thickness are adjusted. For another example, when the layout design space of the circuit board is small, the space for adjusting the trace is small, and only the width and thickness can be adjusted. Or the impedance line itself is relatively straight, the trace is close to a straight line, and the space for further shortening is small, and the width and thickness can be adjusted. Or the layout design space of the circuit board is small, and it is difficult to further bend the trace to increase the length, and the width and thickness can be adjusted.

[0076] Specifically, the step of adjusting the trace of the current inner layer impedance line to correct the impedance of the current inner layer impedance line specifically comprises the following steps: if the impedance of the current inner layer impedance line is too small, the trace of the inner layer impedance line is increased; if the impedance of the current inner layer impedance line is too large, the trace of the inner layer impedance line is shortened.

[0077] The circuit board manufacturing method of the present application can be applied to high-precision tolerance impedance lines, such as conventional circuit boards with impedance control within ±10%. The circuit board manufacturing method of the present application can make the impedance tolerance reach ±5%, or even ±3%. In addition, in high-end special field circuit boards, the cost of circuit board materials is very high, and the cost of scrap caused by unqualified impedance values is very high. In an emergency, there is no time to correct the width of the line to reach the qualified second batch impedance value according to the unqualified impedance value of the first batch of circuit boards. The circuit board manufacturing method of the present application has obvious advantages.

[0078] As another embodiment of the present application, a circuit board is disclosed, which is manufactured by the manufacturing method described above. The circuit board comprises at least two layers, and an impedance line is arranged inside the circuit board. The circuit board manufactured by the manufacturing method described above has high qualification rate and low cost.

[0079] It should be noted that the definitions of the steps involved in the present scheme do not limit the order of the steps without affecting the implementation of the specific scheme. The steps written in the front can be executed first, or executed later, or even executed simultaneously, as long as the scheme can be implemented, it should be considered to belong to the protection scope of the present application.

[0080] The above is a further detailed description of the present application in combination with specific optional embodiments, which cannot be considered as limiting the specific implementation of the present application to these descriptions. For ordinary skilled persons in the art to which the present application belongs, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, which should be considered to belong to the protection scope of the present application.

Claims

1. A method for manufacturing a circuit board, characterized in that: Including steps: Before laminating the prepreg, test the impedance of the inner layer impedance line to obtain the current inner layer impedance value; According to the corresponding relationship between the inner layer impedance value and the outer layer impedance value, the outer layer predicted impedance value is obtained; Determine whether the current inner layer impedance value needs to be corrected based on the outer layer predicted impedance value; if so, correct the impedance of the current inner layer impedance line; if not, do not correct the impedance of the current inner layer impedance line; The corresponding relationship between the inner layer impedance value and the outer layer impedance value satisfies the following formula: Among them, Z0 is the outer layer impedance value, Z1 is the inner layer impedance value, D is the dielectric thickness after the circuit board is stacked, A is the dielectric thickness in the outer layer impedance test, ε is the dielectric constant, ε r is the relative dielectric constant of the impedance line material.

2. The method for manufacturing a circuit board according to claim 1, wherein: The method of judging whether the current inner layer impedance value needs to be corrected based on the outer layer predicted impedance value specifically includes the following steps: The target value and tolerance of the inner layer impedance value are deduced based on the outer layer predicted impedance value and the outer layer impedance value; Compare the current inner layer impedance value with the target value. If the current inner layer impedance value is outside the tolerance range of the target value, the impedance of the current inner layer impedance line is corrected. If the current inner layer impedance value is within the tolerance range of the target value, the impedance of the current inner layer impedance line is not corrected.

3. The method for manufacturing a circuit board according to claim 2, wherein: If the current inner layer impedance value is outside the tolerance range of the target value, the steps for correcting the impedance of the current inner layer impedance line are specifically as follows: If the current inner layer impedance value is less than the minimum value of the target value tolerance range, reduce the line width and / or line thickness of the current inner layer impedance line; If the current inner layer impedance value is greater than the maximum value of the target value tolerance range, the line width and / or line thickness of the current inner layer impedance line is increased.

4. The method for manufacturing a circuit board according to claim 1, wherein: The production method further comprises the steps of: Adjust the line width and / or line thickness of the current inner layer impedance line to correct the impedance of the current inner layer impedance line.

5. The method for manufacturing a circuit board according to claim 4, wherein: The steps of adjusting the line width and / or line thickness of the current inner layer impedance line and correcting the impedance of the current inner layer impedance line are specifically as follows: If the impedance of the current inner layer impedance line is too small, reduce the line width and / or line thickness of the current inner layer impedance line; If the impedance of the current inner layer impedance line is too large, increase the line width and / or line thickness of the current inner layer impedance line.

6. The method for manufacturing a circuit board according to claim 3 or 5, wherein: The step of reducing the line width and / or line thickness of the current inner layer impedance line is specifically as follows: Etching the current inner layer impedance line to reduce the line width and / or line thickness of the current inner layer impedance line; The step of increasing the line width and / or line thickness of the current inner layer impedance line is specifically as follows: Electroplating the current inner layer impedance line to increase the line width and / or line thickness of the current inner layer impedance line.

7. The method for manufacturing a circuit board according to claim 1, wherein: The production method further comprises the steps of: Adjust the routing of the current inner layer impedance line and correct the impedance of the current inner layer impedance line.

8. The method for manufacturing a circuit board according to claim 7, wherein: The steps of adjusting the routing of the current inner layer impedance line and correcting the impedance of the current inner layer impedance line are specifically as follows: If the impedance of the current inner layer impedance line is too small, increase the routing of the inner layer impedance line; If the impedance of the current inner layer impedance line is too large, shorten the routing of the inner layer impedance line.

9. A circuit board manufactured by the manufacturing method according to any one of claims 1 to 8, characterized in that: The circuit board includes at least two layers, and an impedance line is arranged inside the circuit board.

Images