A low dropout linear regulator with fast transient response

Abstract

In view of the limitations of the prior art, the present invention provides a low-dropout linear regulator with fast transient response. The solution of the present invention adds a transient enhancement circuit using a Class AB structure as a fast transient response loop between the error amplifier and the power tube, which reduces the load capacitance, reduces the layout area, and improves the utilization rate; and generates a main pole by increasing the Miller capacitance for loop compensation; it can quickly stabilize the output voltage when the load changes suddenly, and at the same time obtain a higher gain and a better phase margin, and achieve lower power consumption. When the load jumps within 1us and 0-50mA, under different process angles, the overshoot and undershoot are both within 113mV, and the response time is within 1.13us.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronic conversion, and more particularly to a low voltage difference linear regulator with fast transient response. Background Art

[0002] LDO (Low Dropout Regulator) is a power chip used in portable electronic devices. It has outstanding features such as low voltage drop, low noise, low static power consumption and large output current. Since the error amplifier in the LDO cannot work stably due to the change of the LDO output current, the error amplifier needs to be compensated for its frequency.

[0003] See also Figure 1 , the traditional low voltage dropout linear regulator, due to the large capacitor connected to the chip, fixes the main pole of the system at the output end, and relies on the large capacitor and its equivalent series resistance (ESR resistance) to generate a left half plane zero point to compensate the system frequency and maintain system stability. However, with the advancement of technology and the improvement of LDO performance requirements, the traditional LDO connected with a large capacitor is not conducive to the reduction of chip size and consumes the area of ​​PCB board.

[0004] The Chinese invention patent with the announcement date of March 29, 2017: In a fast transient response low-dropout linear regulator, a transient response enhancement circuit is added to the traditional LDO linear regulator circuit, aiming to speed up the transient response of the converter device. It claims that the transient response enhancement module only requires a very small current, which can be ignored, and thus will not increase the static current of the system circuit. At the same time, it aims to make the core amplifier circuit produce only one pole in order to obtain good stability, and the stability requirements can be met without adding a compensation circuit in the output part of the circuit. However, this solution still has certain limitations. Summary of the invention

[0005] The present invention solves the limitation of the prior art and provides a low voltage difference linear regulator with fast transient response.

[0006] In order to achieve the above invention purpose, the technical solution adopted is:

[0007] A low-dropout linear regulator with fast transient response, comprising an error amplifier EA, a power tube and a feedback circuit, and also comprising a bandgap reference Bandgap and a transient enhancement circuit Enhancement circuit;

[0008] The transient enhancement circuit is a fast transient response loop using a Class AB structure; the power tube is a MOS driver tube MP, and the MOS driver tube MP performs loop compensation by adding a Miller capacitor to generate a main pole in the transient enhancement circuit; wherein:

[0009] Input voltage V IN Respectively connected to the input end of the bandgap reference Bandgap and the drain of the MOS driving tube MP;

[0010] The bandgap reference Bandgap is connected to the inverting input terminal of the error amplifier EA to provide the error amplifier EA with a reference voltage V generated by the bandgap reference Bandgap. REF ;

[0011] The non-inverting input terminal of the error amplifier EA is connected to the feedback circuit, and the output terminal of the error amplifier EA is connected to the gate of the MOS driving tube MP and one end of the transient enhancement circuit;

[0012] The other end of the transient enhancement circuit is connected to the feedback circuit, the source of the MOS driver MP and the output voltage V OUT ; The feedback circuit is grounded.

[0013] Compared with the prior art, the solution of the present invention adds a transient enhancement circuit using a Class AB structure as a fast transient response loop between the error amplifier and the power tube, which reduces the load capacitance, reduces the layout area, and improves the utilization rate; and generates a main pole by increasing the Miller capacitance for loop compensation; it can quickly stabilize the output voltage when the load changes suddenly, and at the same time obtain a higher gain and a better phase margin, and achieve lower power consumption. When the load jumps within 1us and 0-50mA, under different process angles, the overshoot and undershoot are both within 113mV, and the response time is within 1.13us.

[0014] As a preferred solution, the transient enhancement circuit includes a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a resistor R3, a resistor R4, a transistor M 15 , transistor M 16 , transistor M 17 , transistor M 18 , transistor M 19 , transistor M 20 , transistor M 21 and transistor M22 ;in:

[0015] One end of the capacitor C1 is connected to the output voltage V OUT The other end is connected to one end of the resistor R3 and the transistor M 15 The gate of the transistor M 15 The collector connection voltage V DD , the transistor M 15 The emitter of the transistor M is connected to the other end of the resistor R3 and the 16 The gate of transistor M 18 The collector of the transistor M 16 The collector connection voltage V DD , the transistor M 16 The emitter of the MOS driver MP is connected to the gate V G and the transistor M 22 The collector;

[0016] One end of the capacitor C2 is connected to the output voltage V OUT , the other end is connected to the transistor M 17 The gate of the transistor M 18 The gate of the bias current source I B Connect the transistor M 17 The collector of the transistor M 17 The emitter of the transistor M is grounded; 18 The emitter is grounded;

[0017] One end of the capacitor C3 is connected to the output voltage V OUT , the other end is connected to the transistor M 19 The gate of the transistor M 20 The gate of the transistor M 19 The collector of the transistor M is grounded. 19 The emitter of the device is connected to a bias current source I B The transistor M 20 The collector of is grounded;

[0018] One end of the capacitor C4 is connected to the output voltage V OUT The other end is connected to one end of the resistor R4 and the transistor M 21 The other end of the resistor R4 is connected to the transistor M 20 The emitter of the transistor M 21 The collector of the transistor M 22 The gate of the transistor M 21 The emitter of the transistor M is grounded; 22 The emitter is grounded.

[0019] Furthermore, in the transient enhancement circuit, the transistor M 16 and transistor M 22 The initial gate voltage is determined by the bias circuit source I B , resistor R3 and resistor R4 provide.

[0020] Furthermore, in the transient enhancement circuit, the capacitor C1, the capacitor C2, the capacitor C3, and the capacitor C4 are coupled to change the transistor M 16 and transistor M 22 The initial gate voltage.

[0021] Furthermore, when the load undergoes a transient change, the output voltage V is stabilized by quickly adjusting the voltage of the MOS driver MP. OUT .

[0022] Furthermore, when the load changes transiently, the output voltage V OUT When the transistor M 22 The gate V of the MOS driver MP G Absorbs current to discharge.

[0023] Furthermore, when the load changes transiently, the output voltage V OUT When the transistor M 16 To the gate V of the MOS driver MP G Release current to charge.

[0024] As a preferred solution, the feedback circuit includes a resistor R f1 , resistor R f2 , resistor R L And the capacitor C L ;

[0025] The resistor R f1 Connect one end of the resistor R L One end of the capacitor C L one end, the transient enhancement circuit Enhancement circuit, the source of the MOS drive tube MP and the output voltage V OUT , the resistor R f1 The other end is connected to the non-inverting input terminal of the error amplifier EA and the resistor R f2 one end of f2 The other end of the resistor R L The other end of the capacitor C L The other ends are grounded.

[0026] The present invention also includes the following contents:

[0027] A power chip in a portable electronic device is the aforementioned low voltage difference linear regulator with fast transient response.

[0028] A portable electronic device is provided with a power chip, the aforementioned low voltage difference linear regulator with fast transient response. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a circuit diagram of a traditional low voltage drop linear regulator;

[0030] Figure 2 A circuit diagram of a low-dropout linear regulator with fast transient response provided by Embodiment 1 of the present invention;

[0031] Figure 3 A circuit diagram of a transient enhancement circuit in a low-dropout linear regulator with fast transient response provided in Embodiment 1 of the present invention;

[0032] Figure 4 The simulation results of the load transient response of the low-dropout linear regulator with fast transient response under different process angles provided in Example 1 of the present invention;

[0033] Description of reference numerals:

[0034] V IN Indicates input voltage; V OUT Indicates the output voltage; V REF represents reference voltage; C represents capacitance; M represents transistor; R represents resistance; MP represents MOS driver tube. DETAILED DESCRIPTION

[0035] The drawings are for illustrative purposes only and should not be construed as limiting the present patent;

[0036] It should be clear that the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the embodiments of the present application.

[0037] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the embodiments of the present application. The singular forms of "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0038] When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims. In the description of the present application, it should be understood that the terms "first", "second", "third", etc. are only used to distinguish similar objects, and do not have to be used to describe a specific order or sequence, nor can they be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0039] In addition, in the description of this application, unless otherwise specified, "multiple" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0040] The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0041] Example 1

[0042] See also Figure 2 A low-dropout linear regulator with fast transient response includes an error amplifier EA, a power tube and a feedback circuit, and also includes a bandgap reference Bandgap and a transient enhancement circuit Enhancement circuit;

[0043] The transient enhancement circuit is a fast transient response loop using a Class AB structure; the power tube is a MOS driver tube MP, and the MOS driver tube MP performs loop compensation by adding a Miller capacitor to generate a main pole in the transient enhancement circuit; wherein:

[0044] Input voltage V INRespectively connected to the input end of the bandgap reference Bandgap and the drain of the MOS driving tube MP;

[0045] The bandgap reference Bandgap is connected to the inverting input terminal of the error amplifier EA to provide the error amplifier EA with a reference voltage V generated by the bandgap reference Bandgap. REF ;

[0046] The non-inverting input terminal of the error amplifier EA is connected to the feedback circuit, and the output terminal of the error amplifier EA is connected to the gate of the MOS driving tube MP and one end of the transient enhancement circuit;

[0047] The other end of the transient enhancement circuit is connected to the feedback circuit, the source of the MOS driver MP and the output voltage V OUT ; The feedback circuit is grounded.

[0048] Compared with the prior art, the solution of this embodiment adds a transient enhancement circuit using a Class AB structure as a fast transient response loop between the error amplifier and the power tube, which reduces the load capacitance, reduces the layout area, and improves the utilization rate; and generates a main pole by increasing the Miller capacitance for loop compensation; it can quickly stabilize the output voltage when the load changes suddenly, and at the same time obtain a higher gain and a better phase margin, and achieve lower power consumption. When the load jumps within 1us and 0-50mA, under different process angles, the overshoot and undershoot are both within 113mV, and the response time is within 1.13us.

[0049] As a preferred embodiment, please refer to Figure 3 The transient enhancement circuit includes a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a resistor R3, a resistor R4, and a transistor M 15 , transistor M 16 , transistor M 17 , transistor M 18 , transistor M 19 , transistor M 20 , transistor M 21 and transistor M 22 ;in:

[0050] One end of the capacitor C1 is connected to the output voltage V OUT The other end is connected to one end of the resistor R3 and the transistor M 15 The gate of the transistor M 15 The collector connection voltage V DD , the transistor M15 The emitter of the transistor M is connected to the other end of the resistor R3 and the 16 The gate of transistor M 18 The collector of the transistor M 16 The collector connection voltage V DD , the transistor M 16 The emitter of the MOS driver MP is connected to the gate V G and the transistor M 22 The collector;

[0051] One end of the capacitor C2 is connected to the output voltage V OUT , the other end is connected to the transistor M 17 The gate of the transistor M 18 The gate of the bias current source I B Connect the transistor M 17 The collector of the transistor M 17 The emitter of the transistor M is grounded; 18 The emitter is grounded;

[0052] One end of the capacitor C3 is connected to the output voltage V OUT , the other end is connected to the transistor M 19 The gate of the transistor M 20 The gate of the transistor M 19 The collector of the transistor M is grounded. 19 The emitter of the device is connected to a bias current source I B The transistor M 20 The collector of is grounded;

[0053] One end of the capacitor C4 is connected to the output voltage V OUT The other end is connected to one end of the resistor R4 and the transistor M 21 The other end of the resistor R4 is connected to the transistor M 20 The emitter of the transistor M 21 The collector of the transistor M 22 The gate of the transistor M 21 The emitter of the transistor M is grounded; 22 The emitter is grounded.

[0054] Furthermore, in the transient enhancement circuit, the transistor M 16 and transistor M 22 The initial gate voltage is determined by the bias circuit source I B , resistor R3 and resistor R4 provide.

[0055] Furthermore, in the transient enhancement circuit, the capacitor C1, the capacitor C2, the capacitor C3, and the capacitor C4 are coupled to change the transistor M 16 and transistor M 22 The initial gate voltage.

[0056] Furthermore, when the load undergoes a transient change, the output voltage V is stabilized by quickly adjusting the voltage of the MOS driver MP. OUT .

[0057] Furthermore, when the load changes transiently, the output voltage V OUT When the transistor M 22 The gate V of the MOS driver MP G Absorbs current to discharge.

[0058] Furthermore, when the load changes transiently, the output voltage V OUT When the transistor M 16 To the gate V of the MOS driver MP G Release current to charge.

[0059] As a preferred embodiment, the feedback circuit includes a resistor R f1 , resistor R f2 , resistor R L And the capacitor C L ;

[0060] The resistor R f1 Connect one end of the resistor R L One end of the capacitor C L one end, the transient enhancement circuit Enhancement circuit, the source of the MOS drive tube MP and the output voltage V OUT , the resistor R f1 The other end is connected to the non-inverting input terminal of the error amplifier EA and the resistor R f2 one end of f2 The other end of the resistor R L The other end of the capacitor C L The other ends are grounded.

[0061] See also Figure 4, which is the transient response of the low-voltage difference linear regulator with fast transient response provided by this embodiment when switching between heavy load and light load at the load end, and the simulation results under TT, FF, and SS process corners. In the absence of external capacitance, the load jumps from 50μA to 50mA within 1us, and the undershoot voltage and overshoot voltage under the TT process corner are 113mV and 78mV respectively, and the undershoot and overshoot response stabilization times are 1.04μs and 1.13μs respectively. From the transient response situation, it can be seen that the low-voltage difference linear regulator with fast transient response provided by this embodiment has a faster response capability.

[0062] Example 2

[0063] A power chip in a portable electronic device is the low voltage difference linear regulator with fast transient response described in Example 1.

[0064] Compared with the prior art, the solution of this embodiment adds a transient enhancement circuit using a Class AB structure as a fast transient response loop between the error amplifier and the power tube, which reduces the load capacitance, reduces the layout area, and improves the utilization rate; and generates a main pole by increasing the Miller capacitance for loop compensation; it can quickly stabilize the output voltage when the load changes suddenly, and at the same time obtain a higher gain and a better phase margin, and achieve lower power consumption. When the load jumps within 1us and 0-50mA, under different process angles, the overshoot and undershoot are both within 113mV, and the response time is within 1.13us.

[0065] Example 3

[0066] A portable electronic device is provided with a power chip, wherein the power chip is the low-dropout linear regulator with fast transient response described in Example 1.

[0067] Compared with the prior art, the solution of this embodiment adds a transient enhancement circuit using a Class AB structure as a fast transient response loop between the error amplifier and the power tube, which reduces the load capacitance, reduces the layout area, and improves the utilization rate; and generates a main pole by increasing the Miller capacitance for loop compensation; it can quickly stabilize the output voltage when the load changes suddenly, and at the same time obtain a higher gain and a better phase margin, and achieve lower power consumption. When the load jumps within 1us and 0-50mA, under different process angles, the overshoot and undershoot are both within 113mV, and the response time is within 1.13us.

[0068] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. A low-dropout linear regulator with fast transient response, comprising an error amplifier EA, a power tube and a feedback circuit, characterized in that: It also includes a bandgap reference Bandgap and a transient enhancement circuit Enhancement circuit; The transient enhancement circuit is a fast transient response loop using a Class AB structure; the power tube is a MOS driver tube MP, and the MOS driver tube MP performs loop compensation by adding a Miller capacitor to generate a main pole in the transient enhancement circuit; wherein: Input voltage V IN Respectively connected to the input end of the bandgap reference Bandgap and the drain of the MOS driving tube MP; The bandgap reference Bandgap provides the error amplifier EA with a reference voltage generated by the bandgap reference Bandgap by connecting to the inverting input terminal of the error amplifier EA. V REF ; The non-inverting input terminal of the error amplifier EA is connected to the feedback circuit, and the output terminal of the error amplifier EA is connected to the gate of the MOS driving tube MP and one end of the transient enhancement circuit; The other end of the transient enhancement circuit is connected to the feedback circuit, the source of the MOS driver MP and the output voltage V OUT ; The feedback circuit is grounded; The transient enhancement circuit includes a capacitor C 1. Capacitor C 2. Capacitor C 3. Capacitor C 4. Resistance R 3. Resistance R 4. Transistor M 15 ,transistor M 16 ,transistor M 17 ,transistor M 18 ,transistor M 19 ,transistor M 20 ,transistor M 21 and transistors M 22 ;in: The capacitor C 1 is connected to the output voltage V OUT , the other end is connected to the resistor R 3 and the transistor M 15 a gate of the transistor M 15 The drain connection voltage V DD , the transistor M 15 The source of the resistor is connected R 3, the other end of the transistor M 16 The gate and transistor M 18 The drain of the transistor M 16 The drain connection voltage V DD , the transistor M 16 The source of the MOS driver MP is connected to the gate of the MOS driver MP. V G And the transistor M 22 The drain; The capacitor C 2. Connect one end of the output voltage V OUT , the other end connects the transistor M 17 The gate of the transistor M 18 The gate of I B Connect the transistor M 17 The drain of the transistor M 17 The source of the transistor is grounded; M 18 The source is grounded; The capacitor C One end of 3 is connected to the output voltage V OUT , the other end connects the transistor M 19 The gate of the transistor M 20 a gate of the transistor M 19 The drain of the transistor is grounded. M 19 The source of the bias current source I B The transistor M 20 The drain is grounded; The capacitor C One end of 4 is connected to the output voltage V OUT , the other end is connected to the resistor R 4 and the transistor M 21 The gate of the resistor R 4. Connect the other end of the transistor M 20 The source of the transistor M 21 The drain of the transistor M 22 a gate of the transistor M 21 The source of the transistor is grounded; M 22 The source is grounded.

2. The low dropout linear regulator with fast transient response according to claim 1, characterized in that: In the transient enhancement circuit, the transistor M 16 and transistors M 22 The initial gate voltage is determined by the bias current source I B ,resistance R 3 and resistor R 4 provided.

3. The low dropout linear regulator with fast transient response according to claim 2, characterized in that: In the transient enhancement circuit, the capacitor C 1. Capacitor C 2. Capacitor C 3. Capacitor C 4 Coupling changes transistor M 16 and transistors M 22 The initial gate voltage.

4. The low dropout linear regulator with fast transient response according to claim 2, characterized in that: When the load changes transiently, the output voltage is stabilized by quickly adjusting the voltage of the MOS driver MP. V OUT .

5. The low dropout linear regulator with fast transient response according to claim 4, characterized in that: When the load changes transiently, the output voltage V OUT falls, the transistor M 22 Current is absorbed from the gate of the MOS driving tube MP for discharge.

6. The low dropout linear regulator with fast transient response according to claim 4, characterized in that: When the load changes transiently, the output voltage V OUT rises, the transistor M 16 Current is released to the gate of the MOS driving tube MP for charging.

7. The low dropout linear regulator with fast transient response according to claim 1, characterized in that: The feedback circuit includes a resistor R f1 ,resistance R f2 ,resistance R L And capacitor C L ; The resistance R f1 Connect one end of the resistor R L One end of the capacitor C L one end, the transient enhancement circuit Enhancement circuit, the source of the MOS drive tube MP and the output voltage V OUT , the resistor R f1 The other end is connected to the non-inverting input terminal of the error amplifier EA and the resistor R f2 one end of R f2 The other end of the resistor R L The other end of the capacitor C L The other ends are grounded.

8. A power chip in a portable electronic device, characterized in that: It is a low voltage drop linear regulator with fast transient response as claimed in any one of claims 1 to 7.

9. A portable electronic device, provided with a power chip, characterized in that: The power chip is a low-dropout linear regulator with fast transient response as described in any one of claims 1 to 7.

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