Electronic detonator chip for improving networking ability and its working method

Abstract

The present invention provides an electronic detonator chip for improving networking ability and its working method, including: a programmable low-voltage linear voltage regulator, a reference voltage circuit, a charge and discharge circuit, an oscillator circuit, a power-on reset circuit, a digital logic circuit, a communication circuit, an EEPROM, and a MOS transistor high-voltage drive circuit. The present invention uses an EEPROM as a memory and performs dynamic power management in combination with the application scenario of the electronic detonator. Only when the EEPROM needs to be programmed during the production process of the detonator, the internal digital power supply of the electronic detonator chip works at a higher voltage; after the detonator is finished and during on-site use, it always works at a low voltage, realizing the minimization of power consumption in the normal communication state of the electronic detonator chip, which is beneficial to the realization of long-distance and large-scale electronic detonator communication networking.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic detonators, and in particular, to an electronic detonator chip with improved networking ability and its working method. Background Art

[0002] Electronic detonator chips are applied to the blasting industry. When electronic detonators are actually detonated, networking is required. The on-site networking distance usually needs to reach more than 1 km, and the number of detonators in the network reaches more than 500.

[0003] The access standard for electronic detonators requires that the communication voltage of the detonator network must be lower than the non-firing voltage of the electronic detonator primer, and the lowest can reach 6V. The voltage at the entrance of the electronic detonator is the voltage after the output voltage of the initiator bus is lost through the line. The loss on the line mainly depends on the line length and the number of detonators. The more the number of detonators, the greater the total dynamic current on the line, the greater the loss through the line, and the lower the input voltage of the corresponding electronic detonator. When the input and output voltage is too low, the electronic detonator cannot work properly. Thus, it can be seen that the dynamic power consumption of a single electronic detonator under normal communication conditions directly affects the number of electronic detonators in the network, that is, the load-carrying capacity of the initiator.

[0004] After the electronic detonators are networked, on-line detection will be carried out. The initiator completes the in-network detection of each detonator by scanning, and each detonator returns information through the current feedback method. When the electronic detonator feeds back the current, the bus of the detonator is de-energized. The electronic detonator needs to be charged through a communication capacitor, and this communication capacitor must use a high-voltage capacitor to meet the high-voltage withstand requirements during subsequent charging of the electronic detonator. The power consumption of the detonator is relatively high, and the required capacitance of the capacitor is relatively large, and the cost of the module is high.

[0005] During the production process of industrial electronic detonators, it is required that the UID code, initiation password, and detonator shell code of the detonator must be three-code bound through a working code encryption upload device to generate a working code and then uploaded to the national industrial electronic detonator password center. The working code must be applied for and downloaded before it can be used during the actual detonation of the electronic detonator to complete the identity verification of the detonator to be detonated and ensure safety. Then, during the three-code binding, since programming operations need to be performed on the memory (writing the UID code, initiation password, and shell code, the programming voltage requirement of the memory is generally at least above 2.8V, resulting in a relatively high working voltage of the electronic detonator chip, which limits the lowest working voltage of the entire electronic detonator, and thus increases the standby power consumption after the electronic detonator is networked. Summary of the Invention

[0006] Aiming at the deficiencies in the prior art, the purpose of the present invention is to provide an electronic detonator chip with improved networking ability and its working method.

[0007] An electronic detonator chip for improving networking ability provided by the present invention includes: a programmable low-voltage linear regulator, a reference voltage circuit, a charge and discharge circuit, an oscillator circuit, a power-on reset circuit, a digital logic circuit, a communication circuit, and an EEPROM;

[0008] The electronic detonator chip includes a high-voltage power input port VDD, communication ports A and B, a VB port, and a FIRE port. The VIN pin of the programmable low-voltage linear regulator, the VIN pin of the reference voltage circuit, and the VIN pin of the charge and discharge circuit are connected to the VDD port. The VOUT pin of the programmable low-voltage linear regulator is connected to the IN2 pin of the power-on reset circuit, and the VOUT pin is respectively connected to the oscillator circuit, the digital logic circuit, the communication circuit, and the EEPROM for power supply. The LDO_CFG pin of the programmable low-voltage linear regulator is connected to the LDO_CFG pin of the digital logic circuit. The programmable low-voltage linear regulator is connected to the REF1 pin of the reference voltage circuit. The REF_1V pin of the reference voltage circuit is connected to the IN1 pin of the power-on reset circuit. The power-on reset circuit is connected to the RESET pin of the digital logic circuit. The CHG_EN pin of the charge and discharge circuit is connected to the CHG pin of the digital logic circuit. The DSG_EN pin of the charge and discharge circuit is connected to the DSG pin of the digital logic circuit. The VOUT pin of the charge and discharge circuit is connected to the VB port to provide power for the detonation of the electronic detonator. The CLK pin of the oscillator circuit is connected to the CLK pin of the digital logic circuit. The communication circuit is connected to communication ports A and B. The communication circuit is connected to the LIN pin of the digital logic circuit. The EEPROM is connected to the digital logic circuit. The FIRE port of the digital logic circuit is connected to the MOS high-voltage drive circuit. The power supply of the MOS high-voltage drive circuit is connected to the VOUT of the charge and discharge circuit. The output OUT of the MOS high-voltage drive circuit is connected to the FIRE port of the chip, which is used to connect the gate of the firing MOS transistor to control whether the electronic detonator detonates.

[0009] Preferably, the programmable low-voltage linear regulator converts the high-voltage power supply into a low-voltage power supply, and the output range of the low-voltage power supply is from 1.8V to 3.3V. The MOS high-voltage drive circuit is used to output a driving voltage to the gate of the MOS transistor when the electronic detonator chip ignites and detonates, and the voltage is not less than 5V.

[0010] Preferably, the power-on reset circuit generates a full-chip reset signal POR after the electronic detonator chip is powered on, and the valid level of the POR signal is low level.

[0011] Preferably, the oscillator circuit provides a clock CLK for the digital logic circuit, and the clock frequency is greater than 100KHz.

[0012] A working method of an electronic detonator provided by the present invention includes the following steps:

[0013] Step S1: The electronic detonator chip is powered on and initialized, and the default output voltage of the programmable low-voltage linear regulator is low voltage;

[0014] Step S2: After the chip is initialized, data is loaded through the EEPROM, including UID, detonation password, delay configuration, and three-code binding flag;

[0015] Step S3: The programmable low-voltage linear regulator obtains the three-code binding flag information through LDO_CFG. When the three-code binding flag is low, it means not bound, and the VOUT pin of the programmable low-voltage linear regulator outputs high voltage; when the three-code binding flag is high, it means bound, and the VOUT pin of the programmable low-voltage linear regulator maintains low-voltage operation;

[0016] Step S4: The electronic detonator chip enters the standby state, waiting to receive an externally input instruction. If the instruction is a three-code binding flag locking instruction, after binding, the EEPROM can only be read and cannot be rewritten again, and at the same time, the electronic detonator chip enters the standby state. If the instruction is other instructions, the corresponding instructions are executed, and after execution, it enters the standby state.

[0017] Preferably, the typical value of the low voltage is 1.8V, and the typical value of the high voltage is 3V.

[0018] Preferably, the three-code binding flag locking instruction includes an instruction code and a CRC;

[0019] The instruction code is the instruction encoding of the three-code binding representation locking instruction, and 2 bytes are used;

[0020] The CRC is the CRC check value of the instruction word, which is used to check the correctness of the instruction, and 1 byte is used.

[0021] An electronic detonator provided by the present invention includes the above-mentioned electronic detonator chip for improving networking ability.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] 1. The present invention uses the EEPROM as a memory and combines dynamic power management with the application scenario of the electronic detonator. Only when programming the EEPROM is required during the production process of the detonator (three-code binding), the internal digital power supply of the electronic detonator chip works at a higher voltage; after the detonator is finished and used on-site, it always works at low voltage, realizing the minimization of power consumption in the normal communication state of the electronic detonator chip, which is beneficial to realizing long-distance and large-scale electronic detonator communication networking.

[0024] 2. Under normal communication conditions, the dynamic power consumption of electronic detonators is usually evenly split between analog and digital power supplies. Compared with a single digital power supply (typical value: 3V), using a dynamic buck digital power supply (3V, 1.8V) reduces the power consumption by nearly two-thirds, and the overall power consumption of the detonator can be reduced by nearly one-third. The load-carrying capacity of the same initiator is increased by 30%.

[0025] 3. After the overall power consumption of the electronic detonator chip is reduced, less energy needs to be replenished, and accordingly, the capacity requirement for the communication capacitor is lower. The smaller the capacity, the lower the price, which improves the overall cost performance of the electronic detonator.

[0026] 4. Using the energy storage capacitor VB voltage as the working power supply for the MOS high-voltage drive circuit, even when the digital power supply is in an ultra-low power consumption mode of 1.8V, the gate drive voltage output of the firing MOS transistor can be increased to more than 5V, significantly reducing the on-resistance of the firing MOS transistor, and thus ensuring the reliable firing of the electronic detonator. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Other features, objectives, and advantages of the present invention will become more apparent by reading the detailed description of the non-limiting embodiments with reference to the following drawings:

[0028] Figure 1 It is a schematic circuit diagram of an electronic detonator chip for improving networking ability disclosed by the present invention;

[0029] Figure 2 It is a flowchart of the operation of an electronic detonator chip for improving networking ability disclosed by the present invention; DETAILED DESCRIPTION OF THE EMBODIMENTS

[0030] The present invention will be described in detail below with reference to specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but do not limit the present invention in any form. It should be noted that those of ordinary skill in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0031] The present invention discloses an electronic detonator chip for improving networking ability, including:

[0032] A programmable low-dropout linear regulator (LDO): It realizes the conversion from a high-voltage power supply to a low-voltage power supply, and has a configurable low-voltage power supply output, which can be switched between 1.8V and 3.3V;

[0033] A reference voltage circuit: It generates some reference voltages required by the power-on reset circuit and the programmable low-dropout linear regulator;

[0034] A charge and discharge circuit: It includes a current-limiting resistor and charge and discharge transistors, and realizes the charge and discharge management of the energy storage capacitor;

[0035] Oscillator circuit: Provides a stable clock CLK for the digital logic circuit, and the clock frequency is usually above 100K;

[0036] Power-on reset circuit: A circuit that generates a full-chip reset signal POR after the electronic detonator chip is powered on. The effective level of the POR signal is low level;

[0037] Digital logic circuit: A logic circuit that completes the external communication of the electronic detonator chip, the internal state conversion of the chip, and the delay control;

[0038] EEPROM: Electrically Erasable Programmable Read-Only Memory, which is used to store the user identification code UID, the detonation password, the delay value, and other user configuration information of the detonator;

[0039] MOS transistor high-voltage drive circuit: Uses the energy storage capacitor voltage VB as the working voltage to generate a drive voltage above 5V to turn on the firing switch when the electronic detonator detonates. By raising the gate drive voltage output of the firing MOS transistor above 5V, the on-resistance of the firing MOS transistor is significantly reduced, thereby ensuring the reliable detonation of the electronic detonator.

[0040] For a conventional electronic detonator, the MOS transistor gate drive voltage is the same as the LDO output voltage, fixed at 1.8V or 3.3V. Taking the 1.8V power supply of the low-voltage LDO in the present invention as an example, while significantly reducing the power consumption, if the MOS transistor drive voltage is not increased, the on-resistance of the MOS transistor increases by nearly one time compared with the 5V drive, which will cause the detonator to fail to detonate normally.

[0041] Communication circuit: Realizes writing the two-wire signal into data to complete the internal digital logic signal of the detonator chip, and when reading data from the detonator chip by the two-wire, it realizes short-circuiting A and B to provide a feedback current.

[0042] Refer to Figure 1 , the connection relationships of each circuit are as follows:

[0043] The electronic detonator chip includes a high-voltage power input port VDD, communication ports A and B, a VB port, and a FIRE port. The VIN pin of the programmable low-voltage linear regulator, the VIN pin of the reference voltage circuit, and the VIN pin of the charge and discharge circuit are connected to the VDD port. The VOUT pin of the programmable low-voltage linear regulator is connected to the IN2 pin of the power-on reset circuit, and the VOUT pin is respectively connected to the oscillator circuit, the digital logic circuit, the communication circuit, and the EEPROM for power supply. The LDO_CFG pin of the programmable low-voltage linear regulator is connected to the LDO_CFG pin of the digital logic circuit. The programmable low-voltage linear regulator is connected to the REF1 pin of the reference voltage circuit. The REF_1V pin of the reference voltage circuit is connected to the IN1 pin of the power-on reset circuit. The power-on reset circuit is connected to the RESET pin of the digital logic circuit. The CHG_EN pin of the charge and discharge circuit is connected to the CHG pin of the digital logic circuit. The DSG_EN pin of the charge and discharge circuit is connected to the DSG pin of the digital logic circuit. The VOUT pin of the charge and discharge circuit is connected to the VB port to provide power for the detonation of the electronic detonator. The CLK pin of the oscillator circuit is connected to the CLK pin of the digital logic circuit. The communication circuit is connected to communication ports A and B and is connected to the LIN pin of the digital logic circuit. The EEPROM is connected to the digital logic circuit. The FIRE port of the digital logic circuit is connected to the high-voltage drive circuit of the MOS transistor. The power supply of the high-voltage drive circuit of the MOS transistor is connected to the VOUT of the charge and discharge circuit. The output OUT of the high-voltage drive circuit of the MOS is connected to the FIRE port of the chip, which is used to connect the gate of the firing MOS transistor to control whether the electronic detonator detonates.

[0044] According to the above-mentioned electronic detonator chip for improving networking ability, as shown in Figure 2 shown, its working principle is as follows:

[0045] Step S1: The electronic detonator chip is powered on and initialized, and the programmable low-voltage linear regulator defaults to output a low voltage (typical value 1.8V).

[0046] Step S2: After the electronic detonator chip completes initialization, it loads data through the EEPROM, including UID (user identification), detonation password, delay configuration, and three-code binding flag; and loads them into the corresponding registers. At this time, the low voltage can implement all read operations of the EEPROM.

[0047] When binding the three codes, the UID, detonation password, and shell code need to be written into the EEPROM memory. At this time, programming of the EEPROM is required, which requires a higher voltage; while when the detonator becomes a finished product and is used on-site after three-code binding, there is no longer a need to program the EEPROM, and only read operations on the EEPROM are required. At this time, the EEPROM only needs to work in the low-voltage mode.

[0048] Step S3: The programmable low-voltage linear regulator obtains the three-code binding flag information through LDO_CFG. When the three-code binding flag is low, it indicates unbound, and the VOUT pin of the programmable low-voltage linear regulator outputs a high voltage (typical value 3V); when the three-code binding flag is high, it indicates bound, and the VOUT pin of the programmable low-voltage linear regulator operates at a low voltage.

[0049] Step S4: The electronic detonator chip enters the standby state, waiting to receive an externally input instruction. If the instruction is a three-code binding flag locking instruction, after binding, the EEPROM can only be read and cannot be rewritten again, and at the same time, the electronic detonator chip enters the standby state. If the instruction is other instructions, the corresponding instructions are executed, and after execution, it enters the standby state.

[0050] The three-code binding flag locking instruction includes an instruction code and a CRC; the instruction code is the instruction encoding of the three-code binding representation locking instruction, and 2 bytes are used; the CRC is the CRC check value of the instruction word, which is used to check the correctness of the instruction, and 1 byte is used.

[0051] The present invention also discloses an electronic detonator, which adopts the electronic detonator chip with improved networking ability disclosed above.

[0052] The specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Without conflict, the embodiments of the present application and the features in the embodiments can be arbitrarily combined with each other.

Claims

1. An electronic detonator chip for improving networking ability, characterized in that Comprising: A programmable low-voltage linear voltage regulator, a reference voltage circuit, a charge and discharge circuit, an oscillator circuit, a power-on reset circuit, a digital logic circuit, a communication circuit, an EEPROM, and a high-voltage drive circuit for MOS transistors; The electronic detonator chip includes a high-voltage power input port VDD, a communication port A and a communication port B, a VB port and a FIRE port. The VIN pin of the programmable low-voltage linear voltage regulator, the VIN pin of the reference voltage circuit, and the VIN pin of the charge and discharge circuit are connected to the VDD port. The VOUT pin of the programmable low-voltage linear voltage regulator is connected to the IN2 pin of the power-on reset circuit, and the VOUT pin is respectively connected to the oscillator circuit, the digital logic circuit, the communication circuit, and the EEPROM for power supply. The LDO_CFG pin of the programmable low-voltage linear voltage regulator is connected to the LDO_CFG pin of the digital logic circuit. The programmable low-voltage linear voltage regulator is connected to the REF1 pin of the reference voltage circuit. The REF_1V pin of the reference voltage circuit is connected to the IN1 pin of the power-on reset circuit. The power-on reset circuit is connected to the RESET pin of the digital logic circuit. The CHG_EN pin of the charge and discharge circuit is connected to the CHG pin of the digital logic circuit. The DSG_EN pin of the charge and discharge circuit is connected to the DSG pin of the digital logic circuit. The VOUT pin of the charge and discharge circuit is connected to the VB port to provide power for the detonation of the electronic detonator. The CLK pin of the oscillator circuit is connected to the CLK pin of the digital logic circuit. The communication circuit is connected to the communication port A and the communication port B. The communication circuit is connected to the LIN pin of the digital logic circuit. The EEPROM is connected to the digital logic circuit. The FIRE port of the digital logic circuit is connected to the high-voltage drive circuit for MOS transistors. The power supply of the high-voltage drive circuit for MOS transistors is connected to the VOUT of the charge and discharge circuit. The output OUT of the high-voltage drive circuit for MOS is connected to the FIRE port of the chip for connecting the gate of the firing MOS transistor, thereby controlling whether the electronic detonator detonates; The programmable low-voltage linear voltage regulator converts the high-voltage power supply into a low-voltage power supply, and the output range of the low-voltage power supply is 1.8V to 3.3V; The high-voltage drive circuit for MOS is used to output a driving voltage to the gate of the MOS transistor when the electronic detonator chip is ignited and detonated, and the driving voltage is not less than 5V; The oscillator circuit provides a clock CLK for the digital logic circuit, and the clock frequency is greater than 100KHz.

2. The electronic detonator chip for improving networking ability according to claim 1, characterized in that: The power-on reset circuit generates a full-chip reset signal POR after the electronic detonator chip is powered on, and the effective level of the POR signal is low level.

3. A working method of an electronic detonator, based on the electronic detonator chip for improving networking ability according to any one of claims 1-2, characterized in that: Including the following steps: Step S1: The electronic detonator chip is powered on and initialized, and the programmable low-voltage linear voltage regulator defaults to output a low voltage; Step S2: After the chip is initialized, data is loaded through the EEPROM, including UID, detonation password, delay configuration, and three-code binding flag; Step S3: The programmable low-voltage linear regulator obtains the three-code binding flag information through LDO_CFG. When the three-code binding flag is low, it indicates unbound, and the VOUT pin of the programmable low-voltage linear regulator outputs high voltage; when the three-code binding flag is high, it indicates bound, and the VOUT pin of the programmable low-voltage linear regulator maintains low-voltage operation. Step S4: The electronic detonator chip enters the standby state, waiting to receive an externally input instruction. If the instruction is a three-code binding flag locking instruction, after binding, the EEPROM can only be read and cannot be rewritten again, and at the same time, the electronic detonator chip enters the standby state. If the instruction is other instructions, the corresponding instructions are executed, and after execution, it enters the standby state.

4. The working method of the electronic detonator according to claim 3, characterized in that: The low voltage is 1.8V and the high voltage is 3V.

5. The working method of the electronic detonator according to claim 3, characterized in that: The three-code binding flag locking instruction includes an instruction code and a CRC. The instruction code is the instruction encoding of the three-code binding representation locking instruction, and 2 bytes are used. The CRC is the CRC check value of the instruction word, which is used to check the correctness of the instruction, and 1 byte is used.

6. An electronic detonator, characterized in that: The electronic detonator includes the electronic detonator chip for improving networking ability according to any one of claims 1-2.

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