Hetero-substrate structure and method of making the same

Abstract

The application is a kind of heterogeneous substrate structure and its manufacturing method. The heterogeneous substrate structure includes a glass substrate, an electrode layer, a first sub-circuit board and a first rewiring layer. The electrode layer is on the glass substrate. The first sub-circuit board is on the glass substrate and the electrode layer. The first sub-circuit board has a conductive via. The conductive via is in the first sub-circuit board and on the electrode layer. The first rewiring layer is on the first sub-circuit board and the conductive via. The conductive via electrically connects the electrode layer and the first rewiring layer.

Description

Technical Field

[0001] This disclosure relates to a heterogeneous substrate structure and a method for fabricating a heterogeneous substrate structure. Background Technology

[0002] In the manufacturing process of Micro LED displays, when thin-film transistors (TFTs) are to be bonded to LED chips (such as pixel units), there is a problem of low adhesion between the electrode layer of the TFT and the metal of the chip, resulting in insufficient structural reliability. In addition, the electrode layer of the TFT is relatively thin, differing from the thickness of the chip's electroplated pads by several times. This can cause uneven stress distribution during bonding, making the chip less stable. Summary of the Invention

[0003] One of the technical features disclosed herein is a heterogeneous substrate structure.

[0004] According to one embodiment of this disclosure, a heterogeneous substrate structure includes a glass substrate, an electrode layer, a first sub-circuit board, and a first redistribution layer. The electrode layer is located on the glass substrate. The first sub-circuit board is located on the thin-film transistor layer and the electrode layer. The first sub-circuit board has conductive vias. The conductive vias are located in the first sub-circuit board and on the electrode layer. The first redistribution layer is located on the first sub-circuit board and the conductive vias. The conductive vias electrically connect the electrode layer and the first redistribution layer.

[0005] In one embodiment of this disclosure, the heterogeneous substrate structure further includes an antioxidant layer, pixel units, and a molding material. The antioxidant layer is located on the first redistribution layer. The antioxidant layer is made of gold. The pixel units are located on the antioxidant layer. The molding material is located on the pixel units, the antioxidant layer, and the first sub-circuit board.

[0006] In one embodiment of this disclosure, the heterogeneous substrate structure further includes a dielectric layer, a second redistribution layer, an antioxidant layer, pixel units, and a molding compound. The dielectric layer is located on the first sub-circuit board and the first redistribution layer. The second redistribution layer is located on the dielectric layer and extends to the first redistribution layer. The antioxidant layer is located on the second redistribution layer. The antioxidant layer is made of gold. The pixel units are located on the antioxidant layer. The molding compound is located on the pixel units, the antioxidant layer, and the dielectric layer.

[0007] In one embodiment of this disclosure, the heterogeneous substrate structure further includes a thin-film transistor layer. The thin-film transistor layer is located between the glass substrate and the electrode layer.

[0008] One of the technical features disclosed herein is a method for fabricating a heterogeneous substrate structure.

[0009] According to one embodiment of this disclosure, a method for fabricating a heterogeneous substrate structure includes: forming a glass substrate, wherein the glass substrate has an electrode layer located on the glass substrate; forming a first sub-circuit board, wherein the first sub-circuit board has conductive vias; and pressing the glass substrate, the first sub-circuit board, and a first redistribution layer together, such that the first sub-circuit board is located between the glass substrate and the first redistribution layer, wherein the conductive vias are electrically connected to the electrode layer and the first redistribution layer.

[0010] In one embodiment of this disclosure, the first sub-circuit board is in a semi-cured, flexible state before the glass substrate, the first sub-circuit board, and the first redistribution layer are laminated. The method further includes applying a heat treatment to cure the first sub-circuit board after the glass substrate, the first sub-circuit board, and the first redistribution layer are laminated.

[0011] In one embodiment of this disclosure, the method further includes: patterning a first overlay layer; forming an antioxidant layer on the first overlay layer by chemical plating, wherein the antioxidant layer is made of gold; disposing pixel units on the antioxidant layer; and forming a molding material on the pixel units, the antioxidant layer, and the first sub-circuit board.

[0012] In one embodiment of this disclosure, before laminating the glass substrate, the first sub-circuit board, and the redistribution layer, the method further includes: patterning the first redistribution layer; forming a dielectric layer on the first redistribution layer; forming an opening in the dielectric layer; and forming a second redistribution layer on the dielectric layer, wherein the second redistribution layer extends into the first redistribution layer in the opening.

[0013] In one embodiment of this disclosure, the method further includes: forming an antioxidant layer on a second redistribution layer by chemical plating, wherein the antioxidant layer is made of gold; disposing pixel units on the antioxidant layer; and forming a molding material on the pixel units, the antioxidant layer, and the dielectric layer.

[0014] In one embodiment of this disclosure, the step of forming the first sub-circuit board includes: laser drilling the first sub-circuit board to give the first sub-circuit board a through hole; and filling the through hole with conductive metal adhesive to form a conductive through hole in the first sub-circuit board.

[0015] In the embodiments disclosed above, the first sub-circuit board of the heterogeneous substrate structure can bond the electrode layer and the first redistribution layer. That is, the first sub-circuit board can be considered a connection structure used to bond the electrode layer and the first redistribution layer, thereby improving the bonding strength between the interfaces. Furthermore, since the conductive vias of the first sub-circuit board only need to be filled with conductive metal paste to connect with the electrode layer and the first redistribution layer, and do not require electroplating, the manufacturing cost of using electroplating equipment can be saved, which is more environmentally friendly. Moreover, since the conductive vias of the first sub-circuit board are connected with the electrode layer and the first redistribution layer by filling with conductive metal paste, rather than by electroplating, the stress during the bonding of the first sub-circuit board with the electrode layer and the first redistribution layer can be reduced, thus preventing bending of the glass substrate. The first sub-circuit board and the first redistribution layer can serve as pads to provide a stable effect for the pixel units. Compared with conventional technologies, the first redistribution layer has better bonding strength to metals, and since it can serve as a pad, the structural reliability between the first redistribution layer and the pixel units can be increased. Attached Figure Description

[0016] One embodiment of this disclosure is best understood by reading in conjunction with the accompanying drawings and by the following detailed description. It should be emphasized that, according to standard industry practice, the various features are not drawn to scale and are for illustrative purposes only. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of explanation.

[0017] Figure 1 A cross-sectional view of a heterogeneous substrate structure according to an embodiment of the present disclosure is shown.

[0018] Figure 2 A cross-sectional view of a heterogeneous substrate structure according to another embodiment of this disclosure is shown.

[0019] Figure 3 A flowchart illustrating a method for fabricating a heterogeneous substrate structure according to an embodiment of the present disclosure is shown.

[0020] Figures 4 to 6 Cross-sectional views are shown at different stages of a method for fabricating a heterogeneous substrate structure according to an embodiment of this disclosure.

[0021] Figures 7 to 8 Cross-sectional views are shown at different stages of a method for fabricating a heterogeneous substrate structure according to another embodiment of this disclosure.

[0022] Figures 9 to 13 Cross-sectional views are shown at different stages of a method for fabricating a heterogeneous substrate structure according to yet another embodiment of this disclosure.

[0023] Figure 14 A cross-sectional view of a heterogeneous substrate structure according to yet another embodiment of the present disclosure is shown.

[0024] Figure 15 A cross-sectional view of a heterogeneous substrate structure according to yet another embodiment of the present disclosure is shown.

[0025] Figure 16 A cross-sectional view of a heterogeneous substrate structure according to yet another embodiment of the present disclosure is shown.

[0026] [Explanation of Key Component Symbols]

[0027] 100, 100a, 100b, 100c, 100d, 100e: Heterogeneous substrate structure

[0028] 110: Thin-film transistor substrate

[0029] 112: Glass substrate

[0030] 114: Thin Film Transistor Layer

[0031] 116: Electrode layer

[0032] 120: First sub-circuit board

[0033] 122: Conductive via

[0034] 130: First routing layer

[0035] 130a: Second Rewiring Layer

[0036] 140, 140a: Antioxidant layer

[0037] 150, 150a: Pixel unit

[0038] 160: Molding material

[0039] 170: Dielectric layer

[0040] 200: Pressure-sensitive adhesive layer

[0041] 210: PET adhesive layer

[0042] O: Opening

[0043] S1: Steps

[0044] S2: Steps

[0045] S3: Steps

[0046] V: Through hole Detailed Implementation

[0047] The following disclosure of embodiments provides many different implementations, or examples, for carrying out various features of the provided object. Specific examples of elements and arrangements are described below to simplify the subject matter. Of course, these examples are merely illustrative and are not intended to be limiting. Furthermore, element symbols and / or letters may be repeated in various examples. This repetition is for simplicity and clarity and does not, in itself, specify a relationship between the various embodiments and / or configurations discussed.

[0048] Spatial relative terms such as “below,” “under,” “lower,” “above,” and “upper” are used herein for descriptive purposes to describe the relationship between one element or feature and another, as shown in the accompanying drawings. Spatial relative terms are intended to cover different orientations of the apparatus in use or manufacturing methods other than those shown in the accompanying drawings. The apparatus may be oriented in other ways (rotated 90 degrees or otherwise), and the spatial relative descriptors used herein shall be interpreted accordingly.

[0049] Figure 1 A cross-sectional view of a heterogeneous substrate structure 100 according to an embodiment of the present disclosure is shown. The heterogeneous substrate structure 100 includes a glass substrate 112, an electrode layer 116, a first sub-circuit board 120, and a first redistribution layer 130. For example, the glass substrate 112 may be made of silicon, ceramic, or sapphire, but is not limited thereto. The electrode layer 116 is located on the glass substrate 112. The electrode layer 116 may be made of a transparent conductive film (Indium Tin Oxide, ITO), copper, or aluminum, but is not limited thereto. The heterogeneous substrate structure 100 also includes a thin-film transistor layer 114. The thin-film transistor layer 114 is located between the glass substrate 112 and the electrode layer 116. In this disclosure, the combination of the glass substrate 112, the thin-film transistor layer 114, and the electrode layer 116 can be considered as a thin-film transistor substrate 110. The first sub-circuit board 120 is located on the thin-film transistor layer 114 and the electrode layer 116, and the first sub-circuit board 120 has conductive vias 122. Conductive via 122 is located in the first sub-circuit board 120 and on the electrode layer 116. In this embodiment, the material of the first sub-circuit board 120 may include insulating materials, such as prepreg (PP), Ajinomoto buildup film (ABF), BT (Bimaleimide Triazine) resin, photosensitive dielectric (PID), or any kind of semi-cured (B-Stage) polymer, but this is not intended to limit the present disclosure.

[0050] The conductive vias 122 of the first sub-circuit board 120 can be made of conductive metal paste, manufactured using Transient Liquid Phase Sintering (TLPS) coating. The conductive vias 122 have both electrical and thermal conductivity, making them suitable for bonding with metal materials, and they will not revert to a liquid state upon heating. A first superwiring layer 130 is located on the first sub-circuit board 120 and the conductive vias 122, and the conductive vias 122 electrically connect the electrode layer 116 and the first superwiring layer 130. The first superwiring layer 130 can be made of copper. Specifically, the first superwiring layer 130 can be copper foil, which can be etched using a tenting process to form a shape such as... Figure 1 The first rewiring layer 130 is shown.

[0051] Specifically, the first sub-circuit board 120 of the heterogeneous substrate structure 100 can be bonded to the electrode layer 116 and the first redistribution layer 130. In other words, the first sub-circuit board 120 can be considered a connection structure used to bond the electrode layer 116 and the first redistribution layer 130, thereby improving the bonding strength between the interfaces. Furthermore, since the conductive vias 122 of the first sub-circuit board 120 only need to be filled with conductive metal paste to connect with the electrode layer 116 and the first redistribution layer 130, and do not require electroplating, the manufacturing cost of using electroplating equipment can be saved, which is more environmentally friendly. Moreover, since the conductive vias 122 of the first sub-circuit board 120 are connected to the electrode layer 116 and the first redistribution layer 130 by filling with conductive metal paste, rather than by electroplating, the stress during the bonding of the first sub-circuit board 120 with the electrode layer 116 and the first redistribution layer 130 can be reduced, thus preventing the glass substrate 112 from bending. The first sub-circuit board 120 and the first secondary wiring layer 130 can serve as solder pads to provide a stable effect for the pixel unit 150. Compared with conventional technology, the first secondary wiring layer 130 has better adhesion to metals and can serve as a solder pad, thus increasing the structural reliability between the first secondary wiring layer 130 and the pixel unit 150.

[0052] In this embodiment, the heterogeneous substrate structure 100 further includes an antioxidant layer 140, pixel units 150, and molding material 160. The antioxidant layer 140 is located on the first redistribution layer 130, and the antioxidant layer 140 may be made of gold. The antioxidant layer 140 covers the top surface of the first redistribution layer 130 to provide antioxidant effects. The pixel units 150 are located on the antioxidant layer 140, and the pixel units 150 are electrically connected to the first redistribution layer 130 and the antioxidant layer 140. The molding material 160 is located on the first sub-circuit board 120, the antioxidant layer 140, and the pixel units 150. The molding material 160 covers the first sub-circuit board 120, the antioxidant layer 140, and the pixel units 150 to provide insulation and protection effects.

[0053] It should be understood that the component connections and functions already described will not be repeated, but will be stated in the preceding text. Other forms of heterogeneous substrate structures will be described in the following description.

[0054] Figure 2 A cross-sectional view of a heterogeneous substrate structure 100a according to another embodiment of this disclosure is shown. The heterogeneous substrate structure 100a includes a glass substrate 112, an electrode layer 116, a first sub-circuit board 120, and a first redistribution layer 130. The heterogeneous substrate structure 100a also includes a thin-film transistor layer 114. The combination of the glass substrate 112, the thin-film transistor layer 114, and the electrode layer 116 can be considered as a thin-film transistor substrate 110. The first sub-circuit board 120 has conductive vias 122. Figure 1 The implementation differs in that the heterogeneous substrate structure 100a further includes a dielectric layer 170 and a second redistribution layer 130a. The dielectric layer 170 is located on the first sub-circuit board 120 and the first redistribution layer 130. For example, the dielectric layer 170 may be made of a dielectric material. The second redistribution layer 130a is located on the dielectric layer 170 and extends into the first redistribution layer 130 in the opening O; that is, the conductive via 122, the first redistribution layer 130, and the second redistribution layer 130a are electrically connected to each other. For example, the first redistribution layer 130 and the second redistribution layer 130a may be made of the same material.

[0055] The heterogeneous substrate structure 100a also includes an antioxidant layer 140a, a pixel unit 150a, and a molding material 160. The antioxidant layer 140a is located on the second redistribution layer 130a, and the material of the antioxidant layer 140a can be gold. The antioxidant layer 140a can be formed on the second redistribution layer 130a by chemical plating. The pixel unit 150a is located on the antioxidant layer 140a. The molding material 160 is located on the antioxidant layer 140a, the pixel unit 150a, and the dielectric layer 170. The first sub-circuit board 120 of the heterogeneous substrate structure 100a can bond the electrode layer 116 and the first redistribution layer 130 to improve the bonding force between the interfaces, and the conductive vias 122, the first redistribution layer 130, and the second redistribution layer 130a of the first sub-circuit board 120 can form a multilayer interconnect structure. The conductive via 122 of the first sub-circuit board 120 electrically connects the electrode layer 116, the first redistribution layer 130, and the second redistribution layer 130a.

[0056] The heterogeneous substrate structure 100 (see below) will be described in the following description. Figure 1 ) and heterogeneous substrate structure 100a (see Figure 2 The manufacturing method of ) will be described. The component connections and materials already described will not be repeated, but will be stated in advance.

[0057] Figure 3 A flowchart illustrating a method for fabricating a heterogeneous substrate structure according to an embodiment of the present disclosure is provided. The method for fabricating the heterogeneous substrate structure includes the following steps: First, in step S1, a glass substrate is formed, wherein the glass substrate has an electrode layer located on the glass substrate. Next, in step S2, a first sub-circuit board is formed, wherein the first sub-circuit board has conductive vias. Then, in step S3, the glass substrate, the first sub-circuit board, and a first redistribution layer are laminated, such that the first sub-circuit board is located between the glass substrate and the redistribution layer, wherein the conductive vias electrically connect the electrode layer and the redistribution layer. The above steps will be described in detail below.

[0058] Figures 4 to 6 Cross-sectional views are shown at different stages of a method for fabricating a heterogeneous substrate structure according to an embodiment of this disclosure. (See also...) Figure 4 A glass substrate 112 and a thin-film transistor layer 114 are formed, wherein the glass substrate 112 has an electrode layer 116, the thin-film transistor layer 114 is located on the glass substrate 112, and the electrode layer 116 is located on the thin-film transistor layer 114. In this disclosure, the combination of the glass substrate 112, the thin-film transistor layer 114, and the electrode layer 116 can be regarded as a thin-film transistor substrate 110. Next, a first sub-circuit board 120 is formed. Before heat treatment, the first sub-circuit board 120 is in a semi-cured flexible state, and holes can be drilled in the first sub-circuit board 120 and filled with conductive metal paste to form conductive vias 122.

[0059] Next, a first superconducting layer 130 is formed. In some embodiments, the first superconducting layer 130 may be made of copper. Specifically, the first superconducting layer 130 may be copper foil, thus exhibiting high coplanarity. Since the first sub-circuit board 120 is in a semi-cured, flexible, and adhesive state before laminating the glass substrate 112, the first sub-circuit board 120, and the first superconducting layer 130, the first sub-circuit board 120 can be used to bond the thin-film transistor substrate 110 and the first superconducting layer 130.

[0060] See Figure 5 Next, the glass substrate 112, the first sub-circuit board 120, and the first redistribution layer 130 are laminated, with the first sub-circuit board 120 positioned between the thin-film transistor substrate 110 and the first redistribution layer 130. Conductive vias 122 electrically connect the electrode layer 116 and the first redistribution layer 130. After laminating the glass substrate 112, the first sub-circuit board 120, and the first redistribution layer 130, a heat treatment can be applied to solidify the first sub-circuit board 120. In this way, the first sub-circuit board 120 is securely connected to the thin-film transistor substrate 110 and the first redistribution layer 130, thereby increasing structural reliability.

[0061] See Figure 6In some embodiments, the method further includes patterning the first rewiring layer 130 and forming an antioxidant layer 140 on the patterned first rewiring layer 130 by chemical plating, wherein the antioxidant layer 140 is made of gold. The antioxidant layer 140 covers the top surface of the first rewiring layer 130 to provide an antioxidant effect.

[0062] Next, return to Figure 1 The method further includes forming pixel units 150 on the antioxidant layer 140, and forming a molding material 160 on the pixel units 150, the antioxidant layer 140, and the first sub-circuit board 120 to form a heterogeneous substrate structure 100. The molding material 160 covers the first sub-circuit board 120, the antioxidant layer 140, and the pixel units 150 to provide insulation and protection, and increase the structural reliability of the heterogeneous substrate structure 100. Specifically, the manufacturing method of this embodiment does not require the use of solder and primer, which can effectively reduce the manufacturing cost of the heterogeneous substrate structure 100. In addition, since no solder is used, the bonding yield between the thin-film transistor substrate 110, the first sub-circuit board 120, and the first redistribution layer 130 can be effectively improved, thereby improving the structural reliability of the heterogeneous substrate structure 100.

[0063] Figures 7 to 8 Cross-sectional views are shown at different stages of a method for fabricating a heterogeneous substrate structure according to another embodiment of this disclosure. (See also...) Figure 7 ,and Figure 4 The implementation differs in that, prior to laminating the glass substrate 112, the first sub-circuit board 120, and the first redistribution layer 130, the method further includes patterning the first redistribution layer 130, forming a dielectric layer 170 on the first redistribution layer 130, forming an opening O in the dielectric layer 170, and forming a second redistribution layer 130a on the dielectric layer 170, wherein the second redistribution layer 130a extends into the first redistribution layer 130 in the opening O. Furthermore, the method further includes forming an antioxidant layer 140a on the second redistribution layer 130a by chemical plating, wherein the antioxidant layer 140a is made of gold. The antioxidant layer 140a covers the top surface of the second redistribution layer 130a to provide an antioxidant effect.

[0064] Next, refer to Figure 8 A glass substrate 112, a first sub-circuit board 120, and a first redistribution layer 130 are laminated together, with the first sub-circuit board 120 positioned between the thin-film transistor substrate 110 and the first redistribution layer 130. Conductive vias 122 electrically connect the electrode layer 116, the first redistribution layer 130, and the second redistribution layer 130a to form a multilayer interconnect structure. Since the first sub-circuit board 120 is in a semi-cured, flexible state, it can bond to the thin-film transistor substrate 110 and the first redistribution layer 130.

[0065] Next, return to Figure 2 In some embodiments, the method further includes forming pixel units 150a on the antioxidant layer 140a, and forming a molding material 160 on the antioxidant layer 140a, pixel units 150a, and dielectric layer 170. In this way, a result can be obtained as shown... Figure 2 The heterogeneous substrate structure 100a is shown. Specifically, the fabrication method of the heterogeneous substrate structure 100a does not require solder or primer, which can effectively reduce the manufacturing cost of the heterogeneous substrate structure 100a. In addition, since no solder is used, the bonding yield between the thin-film transistor substrate 110, the first sub-circuit board 120 and the first redistribution layer 130 can be effectively improved, thereby improving the structural reliability of the heterogeneous substrate structure 100a.

[0066] In this embodiment, the first sub-circuit board 120 of the heterogeneous substrate structure 100a can be bonded to the electrode layer 116 and the first redistribution layer 130 to improve the bonding force between the interfaces. The conductive vias 122 of the first sub-circuit board 120 are electrically connected to the electrode layer 116, the first redistribution layer 130 and the second redistribution layer 130a. Therefore, the heterogeneous substrate structure 100a has a multilayer connection structure.

[0067] The following description will illustrate another method for fabricating a heterogeneous substrate structure. The component connections and materials already described will not be repeated hereafter.

[0068] Figures 9 to 13 Cross-sectional views are shown at different stages of a method for fabricating a heterogeneous substrate structure according to yet another embodiment of this disclosure. (See also...) Figure 9 A first redistribution layer 130 and a pressure-sensitive adhesive (PSA) layer 200 are formed on opposite sides of the first sub-circuit board 120. Next, a PET (polyethylene terephthalate, PET) layer 210 is adhered to the PSA layer 200 of the first sub-circuit board 120. Then, laser drilling is performed on the first sub-circuit board 120, the PSA layer 200, and the PET layer 210 to create through-holes V in the first sub-circuit board 120, forming a structure as shown in the image. Figure 9 The structure shown.

[0069] See also Figure 9 and Figure 10 Conductive metal adhesive is filled into the through-hole V to form a conductive through-hole 122 in the first sub-circuit board 120. After forming the conductive through-hole 122, the PET adhesive layer 210 can be removed to form a... Figure 10 The structure shown.

[0070] See Figure 11Next, a glass substrate 112 is formed, wherein the glass substrate 112 has an electrode layer 116 located on the glass substrate 112. Then, Figure 10 The structure shown is flipped 90 degrees up and down, so that the conductive via 122 is closer to the electrode layer 116 than the first redistribution layer 130.

[0071] See also Figure 11 and Figure 12 After removing the pressure-sensitive adhesive layer 200 of the first sub-circuit board 120, the glass substrate 112, the first sub-circuit board 120 and the first redistribution layer 130 are pressed together, so that the first sub-circuit board 120 is located between the glass substrate 112 and the first redistribution layer 130, wherein the conductive via 122 electrically connects the electrode layer 116 and the first redistribution layer 130.

[0072] See Figure 13 Next, the first overlay layer 130 is etched to form circuits. After the circuits are formed on the first overlay layer 130, pixel units 150 are formed on the first overlay layer 130 to form, as shown in the image. Figure 13 The heterogeneous substrate structure 100b is shown. Next, a structure such as... can be formed on the pixel unit 150 and the first sub-circuit board 120. Figure 1 The molded material 160 shown covers the pixel unit 150 and the first sub-circuit board 120.

[0073] Other forms of heterogeneous substrate structures will be described in the following description. The component connections and materials already described will not be repeated, but will be stated in the preceding text.

[0074] Figure 14 A cross-sectional view of a heterogeneous substrate structure 100c according to yet another embodiment of this disclosure is shown. (See also...) Figure 14 ,and Figure 1 The implementation differs in that the thin-film transistor layer 114 has a thin-film transistor structure for active actuation, and the conductive via 122, in addition to electrically connecting the electrode layer 116 and the first redistribution layer 130, extends into the thin-film transistor layer 114 to electrically connect the thin-film transistor layer 114 for active actuation. The combination of the glass substrate 112, the thin-film transistor layer 114, and the electrode layer 116 can be considered as the thin-film transistor substrate 110. Furthermore, the heterogeneous substrate structure 100c is similar in manufacturing process to the glass substrate 112 and the thin-film transistor layer 114, except for the difference in the manufacturing process of the glass substrate 112 and the thin-film transistor layer 114. Figures 4 to 6 The manufacturing process.

[0075] Figure 15 A cross-sectional view of a heterogeneous substrate structure 100d according to yet another embodiment of this disclosure is shown. (See also...) Figure 15 ,and Figure 2The implementation differs in that the thin-film transistor layer 114 has a thin-film transistor structure for active actuation, and the conductive via 122, in addition to electrically connecting the electrode layer 116 and the first redistribution layer 130, extends into the thin-film transistor layer 114. The conductive via 122 electrically connects the thin-film transistor layer 114, the electrode layer 116, the first redistribution layer 130, and the second redistribution layer 130a to form a multilayer interconnection structure. Furthermore, the heterogeneous substrate structure 100d is similar in its manufacturing process to the glass substrate 112, except for the manufacturing processes of the thin-film transistor layer 114. Figure 7 and Figure 8 The manufacturing process.

[0076] Specifically, since the conductive vias 122 of the first sub-circuit board 120 only need to be filled with conductive metal paste to connect with the thin film transistor layer 114, electrode layer 116 and first redistribution layer 130, the first sub-circuit board 120 does not need to use an electroplating process to fill the vias, which can save the manufacturing cost of using electroplating equipment and is more environmentally friendly.

[0077] Figure 16 A cross-sectional view of a heterogeneous substrate structure 100e according to yet another embodiment of this disclosure is shown. (See also...) Figure 16 ,and Figure 2 The implementation differs in that the glass substrate 112 does not have a thin-film transistor layer 114 (see...). Figure 2 Furthermore, the electrode layer 116 has a multilayer structure and can be considered a redistribution structure. The heterogeneous substrate structure 100e can be applied in passive drive circuits. In addition, except for the manufacturing processes of the glass substrate 112 and the electrode layer 116, the manufacturing processes of the heterogeneous substrate structure 100e are similar to those of [other types of circuits]. Figure 7 and Figure 8 The manufacturing process.

[0078] Specifically, the conductive vias 122 of the first sub-circuit board 120 are connected to the thin film transistor layer 114, electrode layer 116 and first redistribution layer 130 by filling them with conductive metal paste, rather than by electroplating. Therefore, the stress when the first sub-circuit board 120 is bonded to the thin film transistor layer 114, electrode layer 116 and first redistribution layer 130 can be reduced to avoid bending of the glass substrate 112.

[0079] The foregoing outlines the features of several embodiments to enable those skilled in the art to better understand the nature of this disclosure. Those skilled in the art should understand that they can readily use this disclosure as the basis for designing or modifying other processes and structures to achieve the same purposes and / or advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and alterations can be made to them without departing from the spirit and scope of this disclosure.

Claims

1. A heterogeneous substrate structure, characterized in that, Include: Glass substrate; The electrode layer is located on the glass substrate; A first sub-circuit board is located on the glass substrate and the electrode layer, wherein the first sub-circuit board has a conductive via, which is located in the first sub-circuit board and on the electrode layer. The first wiring layer is located on the first sub-circuit board and the conductive via, wherein the conductive via is electrically connected to the electrode layer and the first wiring layer. The conductive vias of the first sub-circuit board are connected to the electrode layer and the first redistribution layer by filling them with conductive metal paste. An antioxidant layer is located on the first redistribution layer, wherein the antioxidant layer is made of gold. as well as The pixel unit is located on the antioxidant layer.

2. The heterogeneous substrate structure according to claim 1, characterized in that, It also includes: molding material located on the pixel unit, the antioxidant layer, and the first sub-circuit board.

3. The heterogeneous substrate structure according to claim 1, characterized in that, It also includes: A dielectric layer is located on the first sub-circuit board and the first rewiring layer; The second wiring layer is located on the dielectric layer and extends to the first wiring layer; The antioxidant layer is located on the second rewiring layer, and the material of the antioxidant layer is gold. This pixel unit is located on the antioxidant layer; as well as The molding material is located on the pixel unit, the antioxidant layer, and the dielectric layer.

4. The heterogeneous substrate structure according to claim 1, characterized in that, It also includes: A thin-film transistor layer is located between the glass substrate and the electrode layer.

5. A method for fabricating a heterogeneous substrate structure, characterized in that, Include: A glass substrate is formed, wherein the glass substrate has an electrode layer located on the glass substrate; A first sub-circuit board is formed, wherein the first sub-circuit board has conductive vias; The glass substrate, the first sub-circuit board, and the first redistribution layer are pressed together, such that the first sub-circuit board is located between the glass substrate and the first redistribution layer, wherein the conductive via is electrically connected to the electrode layer and the first redistribution layer. Pattern the first wiring layer; An antioxidant layer, made of gold, is formed on the first redistribution layer by chemical plating; and Pixel units are set on this antioxidant layer.

6. The method for fabricating a heterogeneous substrate structure according to claim 5, characterized in that, Before laminating the glass substrate, the first sub-circuit board, and the first redistribution layer, the first sub-circuit board is in a semi-cured, flexible state. The method further includes: After laminating the glass substrate, the first sub-circuit board, and the first redistribution layer, a heat treatment is applied to solidify the first sub-circuit board.

7. The method for fabricating a heterogeneous substrate structure according to claim 5, characterized in that, It further includes forming a molding material on the pixel unit, the antioxidant layer, and the first sub-circuit board.

8. The method for fabricating a heterogeneous substrate structure according to claim 5, characterized in that, Before laminating the glass substrate, the first sub-circuit board, and the first redistribution layer, the following is further included: Pattern the first wiring layer; A dielectric layer is formed on this first wiring layer; An opening is formed in the dielectric layer; and A second wiring layer is formed on the dielectric layer, characterized in that the second wiring layer extends into the first wiring layer in the opening.

9. The method for fabricating a heterogeneous substrate structure according to claim 8, characterized in that, It also includes: The antioxidant layer is formed on the second redistribution layer by chemical plating, wherein the antioxidant layer is made of gold; The pixel unit is disposed on the antioxidant layer; and A molding material is formed on the pixel unit, the antioxidant layer, and the dielectric layer.

10. The method for fabricating a heterogeneous substrate structure according to claim 5, characterized in that, The first sub-circuit board comprises: Laser drilling is performed on the first sub-circuit board to give the first sub-circuit board through-holes; and Conductive metal adhesive is filled into the through hole to form the conductive through hole in the first sub-circuit board.

Images