RGB array chip preparation method and chip

Abstract

The present invention relates to the field of chip preparation and discloses a method for preparing an RGB array chip and a chip. In the RGB array chip prepared by the method disclosed in the present invention, a single epitaxial structure and green and red quantum dot patterns are used to directly create an RGB array chip. The RGB array chip can be directly connected and packaged with a corresponding display module, significantly improving the efficiency of the micro full-color LED chip integration solution and significantly reducing the display cost of full-color micro.

Description

Technical Field

[0001] The present invention relates to the field of chip preparation and provides a method for preparing an RGB array chip and a chip. Background Art

[0002] In recent years, with the continuous advancement of Micro LED technology, Micro LED displays have been facing huge challenges in achieving full color through RGB.

[0003] One existing solution is to achieve full-color display through the integration of gallium phosphide-based red LEDs. However, this solution has problems such as high cost, poor temperature stability, and incompatibility between light efficiency and driving with blue and green Micro LEDs. In addition, as the size of traditional RGB LED chips decreases to less than 100 microns, the complexity of the RGB packaging process also increases.

[0004] Another approach, achieving full-color display, requires three chips with different epitaxial structures. Using a pick-and-place method, these chips—blue (GaN), green (GaN), and red (GaAs)—are integrated into a single pixel unit. This approach suffers from relatively low production efficiency. Furthermore, when achieving micro full-color display size, the increased resolution and pixel count significantly increase integration costs. Summary of the Invention

[0005] The present invention provides a method for preparing an RGB array chip and a chip to solve the problems existing in the background technology, and provides a chip preparation method that reduces process complexity and integration cost, improves production efficiency and can realize a full-color display solution.

[0006] According to a first aspect of the present invention, a method for preparing an RGB array chip is provided, comprising:

[0007] S1: Providing a DPSS substrate, the DPSS substrate comprising a growth substrate and a patterned mask layer located on the growth substrate, and performing epitaxial growth on the patterned mask layer of the DPSS substrate to form an epitaxial layer; the epitaxial layer comprises a transition layer, an N-type epitaxial layer, a light-emitting layer, and a P-type epitaxial layer sequentially formed on the DPSS substrate from bottom to top;

[0008] S2: performing etching on the epitaxial layer to form a plurality of steps and a first trench on the epitaxial layer; the first trench penetrates the epitaxial layer and the mask layer to the growth substrate to form a plurality of LED pixel units;

[0009] S3: forming a first conductive layer on the step, and forming a first P-electrode on the first conductive layer;

[0010] S4: bonding the second conductive layer to a temporary substrate and removing the growth substrate;

[0011] S5: performing a thinning process on the epitaxial layer;

[0012] S6: bonding the thinned epitaxial layer to the primary and secondary substrates;

[0013] S7: etching the secondary substrate to form a second trench on the secondary substrate; a position of the second trench is staggered with a position of the first trench on the epitaxial layer;

[0014] S8: preparing a reflective mirror on the inner wall of the second groove, and filling the second groove with quantum dot material;

[0015] S9: removing the temporary substrate;

[0016] S10: preparing a plurality of first N electrodes on the edge of the step and the edge of the epitaxial layer;

[0017] S11: providing a CMOS substrate, wherein the CMOS substrate includes a plurality of second P electrodes and a plurality of second N electrodes; and correspondingly bonding the first P electrodes to the second P electrodes, and correspondingly bonding the first N electrodes to the second N electrodes, to obtain an RGB array chip.

[0018] Optionally, in step S3, the first conductive layer is a transparent conductive layer, and the second conductive layer is a metal conductive layer.

[0019] Optionally, the material of the transparent conductive layer is: a metal film material, an oxide film material, or a polymer film material;

[0020] The material of the metal conductive layer is: metal material, alloy material or composite metal material.

[0021] Optionally, in step S4, the first P electrode is bonded to the temporary substrate by using organic glue.

[0022] Optionally, in step S5, the patterned mask layer on the DPSS substrate and the transition layer on the mask layer are removed by polishing or ICP thinning.

[0023] Optionally, in step S6, the material of the secondary substrate is: glass material or quartz material.

[0024] Optionally, in step S7, the shape of the second groove is a truncated cone, and the side close to the epitaxial layer is the lower bottom surface, and the side away from the epitaxial layer is the upper bottom surface, and the area of the upper bottom surface is larger than the area of the lower bottom surface; the angle formed by the busbar of the truncated cone and the epitaxial layer is greater than 45 degrees and less than 85 degrees; and the shapes of each second groove are consistent.

[0025] Optionally, in step S9 , the temporary substrate is removed by at least one of the following methods: heating, laser, and dissolution.

[0026] Optionally, in step S6 and step S11, the bonding method includes at least one of the following: high temperature bonding, high pressure bonding, and vacuum bonding.

[0027] According to a second aspect of the present invention, there is further provided an RGB array chip, which is manufactured according to the RGB array chip manufacturing method described in the first aspect of the present invention.

[0028] The RGB array chip fabrication method provided by the present invention directly produces an RGB three-color array chip through a single epitaxial structure combined with green and red quantum dots. The chip fabricated by this method can be directly connected and packaged with the corresponding display module, significantly improving the efficiency of the micro full-color LED chip integration solution and significantly reducing the cost of full-color micro displays.

[0029] Furthermore, the RGB array chip preparation method provided by the present invention can solve the defects of the traditional pick-and-place integrated three-color full-color display solution, making the process solution simpler and more efficient, while significantly reducing production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0031] Figure 1 This is a schematic flow chart of a method for preparing an RGB array chip provided by an embodiment of the present invention;

[0032] Figure 2 This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 1 ;

[0033] Figure 3This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 2 ;

[0034] Figure 4 This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 3 ;

[0035] Figure 5 This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 4 ;

[0036] Figure 6 This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 5 ;

[0037] Figure 7 This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 6 ;

[0038] Figure 8 This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 7 ;

[0039] Figure 9 This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 8 ;

[0040] Figure 10 This is a schematic diagram of the structure of devices at different process stages manufactured according to a method for manufacturing an RGB array chip provided by an embodiment of the present invention. Figure 9 ;

[0041] Description of the accompanying drawings:

[0042] 100-DPSS substrate;

[0043] 101-production substrate;

[0044] 102-patterned mask layer;

[0045] 200-epitaxial layer;

[0046] 201-transition layer;

[0047] 202-N type epitaxial layer;

[0048] 203-luminescent layer;

[0049] 204-P type epitaxial layer;

[0050] 205 - first N electrode;

[0051] 300-first conductive layer;

[0052] 301-first P electrode;

[0053] 400-temporary substrate;

[0054] 500-secondary substrate;

[0055] 501-reflector;

[0056] 502-Quantum dot materials;

[0057] 600-CMOS substrate;

[0058] 601- second P electrode;

[0059] 602 - second N electrode. DETAILED DESCRIPTION

[0060] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0061] The terms "first," "second," "third," "fourth," and the like (if any) in the description and claims of the present invention and in the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. In addition, the terms "including" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions, e.g., a process, method, system, product, or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to these processes, methods, products, or apparatus.

[0062] The following specific embodiments are used to describe the technical solution of the present invention in detail. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0063] Before filing this application, the applicant conducted a thorough study of the existing RGB array chips that achieve full color: In the prior art, there are two solutions to achieve full color display. The first solution is to achieve full color display through a gallium phosphide-based red LED integration solution. This solution has problems such as high cost, poor temperature stability, and incompatibility of light efficiency and driving with blue and green Micro LEDs. In addition, when the size of traditional RGB LED chips is less than 100 microns, the complexity of the RGB packaging process is also increasing. In the second solution, the full color display solution requires three chips with different epitaxial structures. Through the method of pick and place, the three different materials of blue (GaN), green (GaN), and red (gallium arsenide) chips are integrated into one pixel unit. The production efficiency of this solution is relatively low. And when the size is achieved to a micro full color solution, the cost of integration is greatly increased due to the increase in resolution and the increase in pixels.

[0064] In summary, please refer to Figure 1 In one embodiment of the present invention, a method for preparing an RGB array chip is provided, comprising:

[0065] S1: Provide a DPSS substrate, wherein the DPSS substrate includes a growth base and a patterned mask layer located on the growth base, and perform epitaxial growth on the patterned mask layer of the DPSS substrate to form an epitaxial layer; the epitaxial layer includes a transition layer, an N-type epitaxial layer, a light-emitting layer and a P-type epitaxial layer formed in sequence from bottom to top on the DPSS substrate.

[0066] In one embodiment, the growth substrate may be, for example, sapphire. Of course, the present invention is not limited thereto, and other growth substrates are also within the scope of protection of the present invention. Figure 2 .

[0067] S2: Etching is performed on the epitaxial layer to form a plurality of steps and a first groove on the epitaxial layer; the first groove penetrates the epitaxial layer and the mask layer to the growth substrate to form a plurality of LED pixel units. For the device structure of the LED pixel unit formed by etching, please refer to Figure 3 .

[0068] As a specific embodiment, etching steps on the epitaxial layer specifically includes: first, etching three protrusions on the epitaxial layer, specifically on the P-type epitaxial layer, by photolithography technology or ICP etching technology, and the shape of the protrusions can be a rectangular parallelepiped or a cube; then etching the first groove between the protrusions, wherein the width of the first groove is greater than 0.5um, and the width of the first groove is less than one tenth of the pixel unit.

[0069] S3: Prepare a first conductive layer on the step, and prepare a first P electrode on the first conductive layer. Please refer to the schematic diagram of the device structure after preparing the first conductive layer. Figure 4 , please refer to the schematic diagram of the device structure after preparing the first P electrode Figure 5 .

[0070] Specifically, the protrusion of the epitaxial layer is covered with the first conductive layer material, and the first P electrode is bonded on the first conductive layer material.

[0071] The first conductive layer is a transparent conductive layer. Specifically, the material of the transparent conductive layer is a metal film material, an oxide film material, or a polymer film material. Of course, the present invention is not limited to the above materials, and other forms of transparent conductive layer materials are within the scope of protection of the present invention.

[0072] S4: Bond the first P electrode to a temporary substrate and remove the growth substrate; In step S4, bond the second conductive layer to the temporary substrate using organic glue. Figure 6 .

[0073] The organic glue may be UV glue. The present invention is not limited to the materials of the above glue, and other organic glue materials that can realize the embodiments of the present invention are within the protection scope of the present invention.

[0074] In a specific embodiment of the present invention, the growth substrate is removed by chemical wet stripping technology, and in this embodiment of the present invention, through the design of the first groove, when using chemical wet stripping technology, the problem of uneven stress release in different areas of the chip during the stripping process, which leads to cracking of large-size chips, can be solved.

[0075] S5: thinning the epitaxial layer; in step S5, the patterned mask layer on the DPSS substrate and the transition layer on the mask layer are removed by polishing or ICP thinning.

[0076] Specifically, the thinning process in the embodiment of the present invention can be achieved by polishing or ICP technology. Specifically, the patterned mask layer on the DPSS substrate and the transition layer on the mask layer are removed by polishing or ICP technology to achieve the thinning process of the N-type epitaxial layer.

[0077] S6: Bonding the thinned epitaxial layer to the primary and secondary substrates.

[0078] Among them, in an embodiment of the present invention, the secondary substrate can be used for processing, such as etching the secondary substrate, and the material of the secondary substrate is: glass material or quartz material. Of course, it can be understood that the secondary substrate in the present invention is not limited to the above two materials. Secondary substrates formed by other materials are within the scope of protection of the present invention as long as the secondary substrate can be processed.

[0079] The secondary substrate and the epitaxial layer are bonded under high temperature or high pressure conditions.

[0080] S7: Etching the secondary substrate to form a second trench on the secondary substrate; the position of the second trench is staggered with the position of the first trench on the epitaxial layer; the schematic diagram of the device structure after etching the second trench is shown in FIG. Figure 7 .

[0081] In step S7, the shape of the second groove is a truncated cone, and the side close to the epitaxial layer is the lower bottom surface, and the side away from the epitaxial layer is the upper bottom surface, the area of the upper bottom surface is larger than the area of the lower bottom surface; the angle formed by the busbar of the truncated cone and the epitaxial layer is greater than 45 degrees and less than 85 degrees; and the shapes of each second groove are consistent.

[0082] S8: Prepare a reflector on the inner wall of the second groove and fill the second groove with quantum dot material. Please refer to the schematic diagram of the device structure after preparing the reflector Figure 8 .

[0083] In a specific embodiment of the present invention, the reflector can be formed on the inner wall of the second groove by evaporation. The material of the reflector can be Ni, Ag, Al, Ti, Pt, Cr, TiWu, or Au. It is understood that the material of the reflector involved in the present invention is not limited to the materials listed above, and other reflective metal materials are within the scope of protection of the present invention.

[0084] The quantum dot materials filled in the second groove from left to right are: transparent quantum dot material, green light quantum dot material and red light quantum dot material.

[0085] Among them, a transparent electron dot material, a green light quantum dot material and a red light quantum dot material form a small RGB pixel module that can achieve full-color function. Among them, the device structure diagram after filling the quantum dot material can be referred to Figure 9 .

[0086] S9: removing the temporary substrate; in step S9, since the temporary substrate is adhered to the first P electrode by organic glue, the method of removing the temporary substrate includes at least one of the following: heating, laser, and dissolution.

[0087] S10: preparing a plurality of first N electrodes on the edge of the step and the edge of the epitaxial layer.

[0088] S11: Provide a CMOS substrate, which includes a plurality of second P electrodes and a plurality of second N electrodes; and bond the first P electrodes to the second P electrodes, and the first N electrodes to the second N electrodes, to obtain an RGB array chip. For a schematic diagram of the RGB array chip, please refer to Figure 10 .

[0089] In a specific embodiment, the bonding method includes at least one of the following: high temperature bonding, high pressure bonding, and vacuum bonding.

[0090] An embodiment of the present invention further provides an RGB array chip, which is manufactured according to the above-mentioned RGB array chip manufacturing method.

[0091] The RGB array chip fabrication method provided by the present invention directly produces an RGB three-color array chip through a single epitaxial structure combined with green and red quantum dots. The chip fabricated by this method can be directly connected and packaged with the corresponding display module, significantly improving the efficiency of the micro full-color LED chip integration solution and significantly reducing the cost of full-color micro displays.

[0092] In addition, due to the design of the first groove in the present invention, the problem of chip damage easily caused by excessive stress when peeling off the growth substrate can be solved. In addition, in the RGB array chip preparation method provided by the present invention, the traditional pick-and-place integrated three-color full-color display solution is solved, making the process solution simpler and more efficient, while significantly reducing production costs.

[0093] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or make equivalent replacements for some or all of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing an RGB array chip, characterized in that: include: S1: Providing a DPSS substrate, the DPSS substrate comprising a growth substrate and a patterned mask layer located on the growth substrate, and performing epitaxial growth on the patterned mask layer of the DPSS substrate to form an epitaxial layer; the epitaxial layer comprises a transition layer, an N-type epitaxial layer, a light-emitting layer, and a P-type epitaxial layer sequentially formed on the DPSS substrate from bottom to top; S2: performing etching on the epitaxial layer to form a plurality of steps and a first trench on the epitaxial layer; the first trench penetrates the epitaxial layer and the mask layer to the growth substrate to form a plurality of LED pixel units; S3: preparing a first conductive layer on the step, and preparing a first P electrode on the first conductive layer; S4: bonding the first P electrode to a temporary substrate and removing the growth substrate; S5: performing a thinning process on the epitaxial layer; S6: bonding the thinned epitaxial layer to the primary and secondary substrates; S7: etching the secondary substrate to form a second trench on the secondary substrate; a position of the second trench is staggered with a position of the first trench on the epitaxial layer; S8: preparing a reflective mirror on the inner wall of the second groove, and filling the second groove with quantum dot material; S9: removing the temporary substrate; S10: preparing a plurality of first N electrodes on the side surfaces of the N-type epitaxial layer and the side surfaces of the light-emitting layer; S11: providing a CMOS substrate, wherein the CMOS substrate includes a plurality of second P electrodes and a plurality of second N electrodes; and correspondingly bonding the first P electrodes to the second P electrodes, and correspondingly bonding the first N electrodes to the second N electrodes, to obtain an RGB array chip.

2. The method for preparing an RGB array chip according to claim 1, wherein: In step S3, the first conductive layer is a transparent conductive layer.

3. The method for preparing an RGB array chip according to claim 2, wherein: The material of the transparent conductive layer is: metal film material, oxide film material or polymer film material.

4. The method for preparing an RGB array chip according to claim 1, wherein: In step S4 , the first P-electrode is bonded to the temporary substrate by using organic glue.

5. The method for preparing an RGB array chip according to claim 1, wherein: In step S5 , the patterned mask layer on the DPSS substrate and the transition layer on the mask layer are removed by polishing or ICP thinning.

6. The method for preparing an RGB array chip according to claim 1, wherein: In step S6, the material of the secondary substrate is glass material or quartz material.

7. The method for preparing an RGB array chip according to claim 1, wherein: In step S7, the shape of the second trench is a truncated cone, and the side close to the epitaxial layer is the lower bottom surface, and the side away from the epitaxial layer is the upper bottom surface, the area of the upper bottom surface is larger than the area of the lower bottom surface; and the shapes of each second trench are consistent.

8. The method for preparing an RGB array chip according to claim 1, wherein: In step S9 , the temporary substrate is removed by at least one of the following methods: heating, laser, and dissolution.

9. The method for preparing an RGB array chip according to claim 1, wherein: In step S6 and step S11 , the bonding is achieved by at least one of the following methods: high temperature bonding, high pressure bonding, and vacuum bonding.

10. An RGB array chip, characterized in that: Prepared according to the RGB array chip preparation method according to any one of claims 1-9.

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