A wafer-level bonding method for SOI silicon wafer and glass

Abstract

The present invention provides a wafer-level bonding method for SOI silicon wafer and glass, characterized in that it includes the following steps: 1) taking SOI silicon wafer and glass wafer; 2) cleaning SOI silicon wafer and glass wafer; 3) bonding SOI silicon wafer and glass wafer together, and exposing part of bonding layer of SOI silicon wafer outside glass wafer; 4) connecting glass wafer with negative pole of power supply, connecting bonding layer with positive pole of power supply, and connecting device layer with zero position of power supply. The present invention is simple to operate and has simple steps. It is unnecessary to consider the thickness of insulating buried layer of SOI silicon wafer and the ion distribution of device layer of SOI silicon wafer is not affected by anodic bonding, and bonding voltage will not break down insulating buried layer of SOI silicon wafer.

Description

Technical Field

[0001] The invention relates to the field of microsystems (MEMS) and wafer-level packaging, and in particular to a wafer-level anodic bonding method for an SOI silicon wafer and glass. Background Art

[0002] At present, wafer-level bonding technology is being widely used in the fields of micromechanical systems, microelectronics, and optoelectronics. Wafer-level bonding technology is mainly divided into direct bonding and intermediate layer bonding. Direct bonding technology includes silicon-silicon melt bonding and silicon-glass anodic bonding. Intermediate layer bonding mainly adds an intermediate layer medium as an adhesive between bonded wafers. In the manufacturing process of micromechanical devices, the bonding and packaging links account for most of the cost of micromechanical devices. For those micromechanical devices that need to be isolated from the external environment, anodic bonding can achieve high-quality and low-cost bonding, so anodic bonding technology plays a very important role in the packaging process of micromechanical systems.

[0003] Anodic bonding is achieved by heating silicon and glass to 300~400℃ and then applying a DC voltage of 600~1000V. The anodic bonding process is an electrochemical reaction process. BF33 glass and silicon wafers rich in sodium ions are typical anodic bonding materials. In anodic bonding, the negative pole of the DC power supply is connected to the glass, and the positive pole of the DC power supply is connected to the silicon wafer. Under the dual effects of heat and electric field, the alkali metal ions (mainly Na+) in the glass move toward the negative pole of the power supply, generating a polarized alkali metal ion depletion layer near the interface between the glass sheet and the positive electrode.

[0004] Under the action of a strong electric field, a huge electrostatic attraction is generated at the interface between the bonded silicon wafer and the glass, driving the glass wafer to closely contact the surface of the silicon wafer through elastic deformation and viscous flow. At the same time, the high electric field force causes the oxygen anions to move toward the positive electrode of the power supply and react with the silicon wafer at the interface to form silicon oxide, thereby forming a permanent bond. The bonding time is generally tens of minutes. Temperature, voltage and bonding time are several important bonding parameters for anodic bonding. Anodic bonding of BF33 glass of general thickness requires a bonding voltage of 600~800V. The thicker the bonded glass sheet, the higher the required anodic bonding voltage.

[0005] Silicon-on-insulator (SOI) refers to silicon on an insulating layer. It is a unique silicon-based semiconductor material with a three-layer structure of "Si / buried insulating layer / Si". 2 ) achieves full dielectric isolation between the silicon device layer and the silicon substrate layer.

[0006] During the anodic bonding process between the SOI silicon wafer and the glass wafer, the anodic bonding process cannot be performed under normal voltage due to the limitation of the buried insulating layer of the SOI silicon wafer. Therefore, in order to ensure that the SOI silicon wafer and the glass wafer complete the anodic bonding, a very high bonding voltage is required to break through the buried insulating layer, which will cause damage to the silicon device layer. At the same time, due to the different thicknesses of the buried insulating layer of the SOI silicon wafer, the required bonding voltage is also different, and the universality of the anodic bonding of the SOI silicon wafer and the glass wafer cannot be achieved. Under the action of a higher electric field, the ion distribution of the SOI silicon wafer device layer (generally including a PN junction) will also change under the action of a high electric field, which has an adverse effect on the performance of the sensor device. Summary of the invention

[0007] The present invention is to overcome the above-mentioned deficiencies in the prior art and provide a wafer-level anodic bonding method for SOI silicon wafers and glass.

[0008] This application provides the following technical solutions:

[0009] A wafer-level bonding method for SOI silicon wafer and glass, characterized in that it comprises the following steps:

[0010] 1) Take a SOI silicon wafer and at least one glass wafer, the SOI silicon wafer has an insulating buried layer;

[0011] 2) Surface treatment of SOI silicon wafer and glass wafer;

[0012] 3) Align the SOI silicon wafer and the glass wafer together, and then rotate the SOI silicon wafer or the glass wafer at a certain angle to expose part of the bonding surface of the SOI silicon wafer outside the glass wafer. This bonding surface is the bonding layer;

[0013] 4) Place the SOI silicon wafer and glass wafer in the bonding equipment, connect a point electrode to the glass wafer, and cover the glass wafer outside the point electrode with a flat electrode. The point electrode and the flat electrode are connected to the negative pole of the power supply; connect the bonding layer to the positive pole of the power supply, and then perform bonding.

[0014] On the basis of the above technical solutions, there are also the following further technical solutions:

[0015] The glass sheet is Schott BF33 glass and is rich in sodium.

[0016] In step 3), the SOI silicon wafer or the glass wafer is horizontally rotated 90 degrees so that the two cuts on the SOI silicon wafer and the glass wafer are distributed at 90 degrees.

[0017] During bonding in step 4), the bonding temperature is increased to 350-400°C, the vacuum degree is maintained at 0.1Pa-1Pa, the bonding pressure is 300-500N, the bonding voltage is 600-800V, the bonding time is 5-10min, and the bonding current is 13-15mA.

[0018] In the step 4), the point electrode and the plate electrode are spaced a certain distance apart and are not connected to each other. The point electrode and the plate electrode are connected in parallel with the negative electrode of the power supply.

[0019] A device layer is prepared on the SOI silicon wafer in step 1), and in step 4), the device layer is connected to the electrode at zero position.

[0020] In the steps 1) and 3), two glass sheets are taken and the two glass sheets are bonded to the SOI silicon wafer from both sides.

[0021] Advantages of the invention:

[0022] The present invention is simple to operate and has simple steps. During bonding, the bonding layers of the glass wafer and the SOI silicon wafer are in a high electric field, and the bonding current does not need to pass through the insulating buried layer, thereby avoiding the limitation of the insulating buried layer of the SOI silicon wafer on the anodic bonding voltage, and realizing universal anodic bonding between the SOI silicon wafer and the glass wafer with different insulating buried layers. At the same time, because the device layer of the SOI silicon wafer is not in a high electric field, the ion distribution in the device layer of the SOI silicon wafer is not affected by the bonding electric field, which has an important impact on the device performance.

[0023] Description of the drawings:

[0024] Figure 1 is a schematic diagram of laminating a glass sheet and an SOI silicon sheet in Example 1 of the present invention;

[0025] Figure 2 is a schematic diagram of bonding a glass wafer and an SOI silicon wafer in Example 1;

[0026] Figure 3 This is a schematic diagram of the bonding of a glass wafer and an SOI silicon wafer in Example 2. DETAILED DESCRIPTION

[0027] Example 1

[0028] like Figure 1 and 2 As shown, a wafer-level bonding method for SOI silicon wafer and glass is characterized in that it includes the following steps:

[0029] 1) Take a SOI silicon wafer 1 and a Schott BF33 glass wafer 2 containing sodium, which is rich in sodium. A device layer 1c is prepared on the SOI silicon wafer below the insulating buried layer 1a of the SOI silicon wafer.

[0030] 2) The SOI silicon wafer 1 and the glass wafer 2 have the same outer dimensions, are circular, and have a cutout a on each of the SOI silicon wafer 1 and the glass wafer 2. The surfaces of the SOI silicon wafer and the glass wafer 2 are processed.

[0031] The glass slide was cleaned using a mixed solution of H2SO4 and H2O2, wherein the mass concentration of H2SO4 was 98%, the mass concentration of H2O2 was 30%, the volume ratio of H2SO4:H2O2=4:1, the temperature of the cleaning solution was 120~130℃, the cleaning time was 15~20min, then rinsed with deionized water for 10min, and finally the bonded sample was dried with a spin dryer.

[0032] The surface of the SOI silicon wafer was treated with gaseous HF for 10 seconds, with a gaseous HF concentration of 99.999% and a chamber pressure of 5 mTorr.

[0033] 3) Align the SOI silicon wafer 1 and the glass wafer 2 together, and then rotate the SOI silicon wafer or the glass wafer 2 horizontally by 90 degrees, so that the cuts a on the SOI silicon wafer 1 and the glass wafer 2 are distributed at a right angle of 90 degrees. In this way, part of the bonding surface of the SOI silicon wafer 1 is exposed outside the glass wafer 2, and the bonding surface is the bonding layer 1b.

[0034] 4) Place the SOI silicon wafer 1 and the glass wafer 2 in a bonding device, connect a dot electrode 9 to the glass wafer 2, and cover the glass wafer 2 outside the dot electrode 9 with a flat electrode 10. There is a certain distance between the dot electrode 9 and the flat electrode 10, and the two are not connected. The dot electrode 9 and the flat electrode 10 are connected in parallel with the negative power supply 4 of the bonding device.

[0035] The device layer 1c is connected to the electrode zero position in the bonding equipment, and the bonding layer 1b exposed outside the glass sheet 2 is connected to the positive pole of the bonding equipment power supply. Then the bonding is carried out. First, a voltage of 800V is applied to the bonding wafer using a point electrode and maintained for 2 to 3 minutes. Then, a flat electrode is applied to the glass sheet to apply a voltage of 600V to the bonding wafer and maintained for 3 to 7 minutes. Finally, the voltage is removed and the temperature of the bonding chamber slowly drops to room temperature. During the entire bonding process, the bonding temperature is increased to 350 to 400°C, the vacuum degree is maintained at 0.1Pa to 1Pa, the bonding pressure is 300 to 500N, and the bonding current is 13 to 15mA.

[0036] Embodiment 2:

[0037] like Figure 3 As shown, the difference between Embodiment 1 and Embodiment 2 is that two pieces of Schott BF33 glass sheets 2 are taken and attached to the upper and lower surfaces of the SOI silicon wafer 1 to form a sandwich structure. The two pieces of glass sheets 2 are bonded to the SOI silicon wafer 1 from the upper and lower sides respectively.

[0038] At this time, the upper and lower surfaces of the SOI silicon wafer are both bonding surfaces, namely the bonding layer 1b, so there is no need to set the device layer 1c and the electrode zero position in the bonding equipment.

Claims

1. A wafer-level bonding method for SOI silicon wafer and glass, Features: It includes the following steps: 1) taking a SOI silicon wafer (1) and at least one glass wafer (2), wherein the SOI silicon wafer (1) has an insulating buried layer (1a); 2) performing surface treatment on the SOI silicon wafer (1) and the glass wafer (2); 3) Aligning and bonding the SOI silicon wafer (1) and the glass wafer (2), and then rotating the SOI silicon wafer or the glass wafer (2) at a certain angle, so that a portion of the bonding surface of the SOI silicon wafer (1) is exposed outside the glass wafer (2), and the bonding surface is the bonding layer (1b). The SOI silicon wafer (1) or the glass wafer (2) is horizontally rotated 90 degrees, so that the two cuts (a) on the SOI silicon wafer (1) and the glass wafer (2) are distributed at 90 degrees; 4) placing the SOI silicon wafer (1) and the glass wafer (2) in a bonding device, connecting a dot electrode (9) on the glass wafer (2), and covering the glass wafer (2) outside the dot electrode (9) with a flat electrode (10), the dot electrode (9) and the flat electrode (10) are connected to the negative electrode (4) of the power supply; connecting the bonding layer (1b) to the positive electrode (3) of the power supply, and then bonding. During bonding, the bonding temperature is increased to 350-400°C, the vacuum is maintained at 0.1Pa-1Pa, the bonding pressure is 300-500N, the bonding voltage is 600-800V, the bonding time is 5-10min, and the bonding current is 13-15mA.

2. According to the wafer-level bonding method of SOI silicon wafer and glass as described in claim 1, Features: The glass sheet (2) is Schott BF33 glass and contains sodium.

3. According to the wafer-level bonding method of SOI silicon wafer and glass as described in claim 1, Features: In the step 4), a certain distance is provided between the point electrode (9) and the plate electrode (10), the two are not connected, and the point electrode (9) and the plate electrode (10) are connected in parallel with the negative electrode (4) of the power supply.

4. According to the wafer-level bonding method of SOI silicon wafer and glass as described in claim 1, Features: A device layer (1c) is prepared on the SOI silicon wafer in step 1), and in step 4), the device layer (1c) is connected to the electrode at zero position.

5. According to the wafer-level bonding method of SOI silicon wafer and glass as described in claim 1, Features: In the steps 1) and 3), two glass sheets (2) are taken, and the two glass sheets (2) are bonded to the SOI silicon sheet (1) from both sides.

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