Timed on-off method, system and storage medium
By acquiring the timer signal and comparing it with the system time, the problem of inaccurate shutdown time in the timed power-on/off method is solved, and precise shutdown control is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TSD ELECTRONICS TECH
- Filing Date
- 2021-07-15
- Publication Date
- 2026-04-14
AI Technical Summary
In existing technologies, timed power-on/off methods have problems such as inaccurate power-off times or inability to power on.
By acquiring the first signal sent by the timer, the difference between the current system time and the preset first time is compared. When the difference is less than the threshold, it is determined whether they are equal, and a second signal is sent to set the shutdown or power-on time.
It achieves accurate control of shutdown time with minimal error, avoiding problems such as incorrect shutdown time or inability to power on.
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Figure CN115617404B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of computer methods, and more specifically to a timed power-on / off method, system, and storage medium. Background Technology
[0002] A real-time clock (RTC) is also known as a clock chip. An RTC is an integrated circuit, and real-time clock chips are among the most widely used consumer electronics products in daily life. They provide accurate real-time time or a precise time reference for electronic systems. Currently, most real-time clock chips use high-precision crystal oscillators as their clock source. Some clock chips require an external battery to operate even when the main power supply is interrupted.
[0003] In existing technologies, the timing method involves receiving a timed power-on / off signal, saving the power-on / off time, setting the RTC for timed power-on, and setting the timed power-on / off signal. After a system restart, the previously saved values are read, and the RTC for timed power-on and the timed power-on / off signal are reset. However, this can lead to problems such as the system failing to power on or having incorrect power-off times. Summary of the Invention
[0004] In view of this, embodiments of the present invention provide a timed power-on / off method, system, and storage medium to solve the problems existing in the prior art.
[0005] In a first aspect, the present invention provides a timed power-on / off method, comprising the following steps: acquiring a first signal, wherein adjacent first signals have a time interval; comparing the difference between the current system time and the first time; when the difference is less than a first threshold, determining whether the first time and the system time are equal; if they are equal, sending a second signal and setting a second time; wherein the first time is a timed power-off time and the second time is a timed power-on time.
[0006] Furthermore, the first signal is a time interval signal sent by a timer, and the second signal is a system shutdown signal.
[0007] Furthermore, the time interval is in the range of 1 min to 5 min; the first threshold is in the range of 1 min to 5 min.
[0008] Furthermore, before acquiring the first signal, the method further includes: receiving a third signal and saving a first time and a second time, a first state and a second state; the third signal is a timed power-on / off signal, the first state is configured to indicate whether the first time is valid, and the second state is configured to indicate whether the second time is valid.
[0009] Furthermore, upon receiving a fourth or fifth signal, the fourth signal is configured as a system startup completion signal, and the fifth signal is configured as a system time setting signal; then the timed power-on / off method further includes: reading the first time, the first state, the second time, and the second state; when the first state is valid, resetting the first signal; when the first state is invalid, canceling the first signal; when the second state is valid, resetting the second time; when the second state is invalid, canceling the setting of the second time.
[0010] Secondly, the present invention provides a timed power-on / off system, comprising: an acquisition module for acquiring a first signal, wherein adjacent first signals have a time interval; a comparison module for comparing the difference between the current system time and the first time; when the difference is less than a first threshold, determining whether the first time and the system time are equal; if they are equal, sending a second signal and setting a second time; wherein the first time is a timed power-off time and the second time is a timed power-on time.
[0011] Thirdly, the present invention provides an electronic device, comprising: a memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the timed power-on / off method described above.
[0012] Fourthly, the present invention provides a timed power-on / off system, comprising a timer and the aforementioned electronic device; the timer is communicatively connected to the electronic device; the timer is used to send a first signal at a time interval.
[0013] Furthermore, the timed power-on / off system also includes an RTC module, which is communicatively connected to the electronic device and is used to generate a power-on pulse at a second time.
[0014] Fifthly, the present invention provides a computer-readable storage medium, characterized in that the computer-readable storage medium stores computer instructions for causing a computer to execute the timed power-on / off method described above.
[0015] The technical solution of this invention has the following advantages:
[0016] This invention provides a timed power-on / off method. By acquiring a first signal and comparing the difference between the current system time and a preset first time, the power-off time is controlled within a preset range. This method can accurately power on and off with minimal error, and avoids problems such as incorrect power-off time or inability to power on after power-off. Attached Figure Description
[0017] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0018] Figure 1 This is a flowchart of a timed power-on / off method provided in Embodiment 1 of the present invention;
[0019] Figure 2 This is a flowchart of a timed power-on / off method provided according to Embodiment 2 of the present invention;
[0020] Figure 3 This is a structural block diagram of the timed power-on / off device provided in Embodiment 3 of the present invention;
[0021] Figure 4 This is a schematic diagram of the hardware structure of the electronic device provided in Embodiment 4 of the present invention;
[0022] Figure 5 This is a structural block diagram of a timed power-on / off system provided in Embodiment 5 of the present invention. Detailed Implementation
[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0024] Example 1
[0025] like Figure 1 As shown, Embodiment 1 of the present invention provides a timed power-on / off method. By acquiring a first signal sent periodically by a timer and comparing the difference between the current system time and a preset first time, the power-off time is controlled within a preset range. This ensures accurate power-off with minimal error, preventing issues such as incorrect power-off time or inability to power on after power-off. The timed power-on / off method includes the following steps S1 to S2.
[0026] S1. Obtain a first signal, wherein adjacent first signals have a time interval.
[0027] S2. Compare the difference between the current system time and the first time; when the difference is less than the first threshold, determine whether the first time and the system time are equal; if they are equal, send a second signal and set a second time; the first time is the timed shutdown time, and the second time refers to the timed power-on time.
[0028] Specifically, when the device system receives the first timing signal continuously sent by the timer, it performs the following comparison: by comparing the difference between the current system time and the preset first time; when the difference is less than the first threshold, it determines whether the preset shutdown time and the system time are equal; if they are equal, a second signal is sent.
[0029] Therefore, by setting a timer to periodically send a comparison signal (i.e., the first signal), the difference between the current system time and the preset shutdown time is compared, and the shutdown time is controlled within the preset range. This ensures accurate shutdown with minimal error and avoids problems such as incorrect shutdown time or inability to power on after shutdown.
[0030] Example 2
[0031] like Figure 2 As shown, Embodiment 2 of the present invention provides a timed power-on / off method, including the following steps S101 to S103.
[0032] S101. Receive a third signal and save a first time and a second time, a first state, and a second state; the third signal is a timed power-on / off signal, the first state is configured to indicate whether the first time is valid, and the second state is configured to indicate whether the second time is valid. The parameter of the first state is set to 1 or 0, where 1 indicates valid and 0 indicates invalid. The parameter of the second state is set to 1 or 0, where 1 indicates valid and 0 indicates invalid.
[0033] Specifically, the system receives a third signal with a custom name and saves the first and second times, the first and second states, and generally stores the first and second times, the first and second states in plaintext in a fixed-format broadcast. The system receives the third signal and saves the power-on / off time and state. The third signal is sent by the user.
[0034] S102. Obtain a first signal, wherein adjacent first signals have a time interval. The time interval ranges from 1 min to 5 min; preferably, it is 1 min, but in other embodiments it can be 2 min, 3 min, 4 min, or 5 min. The first signal is a timing interval signal sent by a timer.
[0035] Specifically, after the timer is set to display the timing comparison signal, it will send the first signal periodically. Each time the system receives the first signal at the specified time interval, it will respond to the timing comparison signal and make the following judgment.
[0036] S103. Compare the difference between the current system time and the first time; when the difference is less than a first threshold, determine whether the first time and the system time are equal; if they are equal, send a second signal and set a second time; the first time is the timed shutdown time, and the second time is the timed power-on time. The second signal is the system shutdown signal. The range of the first threshold is 1 min to 5 min.
[0037] Upon receiving a fourth or fifth signal, wherein the fourth signal is configured as a system startup completion signal and the fifth signal is configured as a system time setting signal, the timed power-on / off method further includes: reading the first time, the first state, the second time, and the second state; when the first state is valid, resetting the first signal; when the first state is invalid, canceling the first signal; when the second state is valid, resetting the second time; when the second state is invalid, canceling the setting of the second time.
[0038] In Example 2, the system receives a third signal and saves a first time and a second time. The first power-on / off state time is generally stored in plaintext in a fixed-format broadcast. The system receives the third signal and saves the power-on / off time and state. Then, when the device system receives the first signal continuously sent by the timer and compares it, it compares the difference between the current system time and the preset first power-on time. When the difference is less than a first threshold, it determines whether the preset first time and the system time are equal. If they are equal, a second signal is sent, and a second time is set.
[0039] Example 3
[0040] like Figure 3 As shown, the present invention provides a timed power on / off system, including: an acquisition module 11 and a comparison module 12.
[0041] Acquisition module 11 is used to acquire a first signal, wherein adjacent first signals have a time interval;
[0042] The comparison module 12 is used to compare the difference between the current system time and the first time; when the difference is less than the first threshold, it determines whether the first time and the system time are equal; if they are equal, a second signal is sent and a second time is set; the first time is the timed shutdown time and the second time is the timed power-on time.
[0043] Specifically, the present invention provides a timed power-on / off system. When the timed power-on / off system acquires a first signal continuously sent by a timer and compares it, the difference between the current system time and a preset first time is compared. When the difference is less than a first threshold, it is determined whether the preset first time and the system time are equal. If they are equal, a second signal is sent.
[0044] Therefore, the timed power-on / off system sends a first signal at regular intervals by setting a timer, compares the difference between the current system time and the preset first time, and controls the power-off time within the preset range. This ensures accurate power-on and power-off with minimal error, and avoids the problem of the system being unable to power on after being shut down.
[0045] This embodiment also provides a timed power-on / off system, which is used to implement the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.
[0046] In this embodiment, the timed power-on / off system is presented in the form of functional units. Here, a unit refers to an ASIC circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.
[0047] Further functional descriptions of the above modules are the same as those in the corresponding embodiments described above, and will not be repeated here.
[0048] Example 4
[0049] like Figure 4 As shown, embodiments of the present invention also provide an electronic device having the above-described features. Figure 3 The timed on / off system shown.
[0050] Please see Figure 4 , Figure 4This is a schematic diagram of the structure of an electronic device provided in an optional embodiment of the present invention. The electronic device may include: at least one processor 51, such as a CPU (Central Processing Unit), at least one communication interface 53, a memory 54, and at least one communication bus 52. The communication bus 52 is used to realize communication between these components. The communication interface 53 may include a display screen or a keyboard; optionally, the communication interface 53 may also include a standard wired interface or a wireless interface. The memory 54 may be high-speed RAM (Random Access Memory) or non-volatile memory, such as at least one disk storage device. Optionally, the memory 54 may also be at least one storage device located remotely from the aforementioned processor 51. The processor 51 may be combined with... Figure 3 The described system includes an application program stored in memory 54, and a processor 51 that calls the program code stored in memory 54 to execute the above-described application. Figure 1 or Figure 2 The method steps of the embodiment.
[0051] The communication bus 52 can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The communication bus 52 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.
[0052] The memory 54 may include volatile memory, such as random-access memory (RAM); the memory may also include non-volatile memory, such as flash memory, hard disk drive (HDD) or solid-state drive (SSD); the memory 54 may also include a combination of the above types of memory.
[0053] The processor 51 can be a central processing unit (CPU), a network processor (NP), or a combination of CPU and NP.
[0054] The processor 51 may further include a hardware chip. This hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.
[0055] Optionally, memory 54 is also used to store program instructions. Processor 51 can invoke program instructions to implement the invention as shown in the present invention. Figure 1 or Figure 2 The timed power-on / off method is shown.
[0056] This invention also provides a non-transitory computer storage medium storing computer-executable instructions that can execute the timed power-on / off method in any of the above method embodiments. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), random access memory (RAM), flash memory, hard disk drive (HDD), or solid-state drive (SSD), etc.; the storage medium may also include combinations of the above types of memory.
[0057] Example 5
[0058] like Figure 5 As shown, the present invention provides a timed power-on / off system, including: a timer 101, an RTC module 102, and an electronic device 103.
[0059] The timer 101 and RTC module 102 are communicatively connected to the electronic device 103. The electronic device 103 stores computer instructions, and executes these instructions to perform... Figure 1 Right now Figure 2 The timed power-on / off method in the embodiment.
[0060] Then, timer 101 sends a first signal at a time interval. When electronic device 103 obtains the first signal continuously sent by timer 101 and compares it, it compares the difference between the current system time and the first time. When the difference is less than a first threshold, it determines whether the set first time and system time are equal. If they are equal, a second signal is sent.
[0061] Therefore, the timed power-on / off system obtains a timer and sends a comparison signal at regular intervals. By comparing the difference between the current system time and the preset first time, the power-off time is controlled within the preset range. This ensures accurate power-on and power-off with minimal error, and avoids the problem of the system being unable to power on after being powered off.
[0062] Specifically, the RTC module 102 generates a power-on pulse at a second time. The RTC module 102 has a preset power-on time; when the electronic device 103 receives the power-on signal, it does not execute timed power-on / off or timed restart commands within a second threshold time period. The second threshold is 2 to 6 minutes. In this embodiment, it is 3 minutes.
[0063] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.
Claims
1. A method for timed on / off switching, characterized in that, Includes the following steps: Receive a third signal and save a first time and a second time, a first state and a second state; the third signal is a timed power-on / off signal, the first state is configured to determine whether the first time is valid, and the second state is configured to determine whether the second time is valid; Acquire a first signal, wherein adjacent first signals have a time interval; Compare the current system time with the difference from the previous time; When the difference is less than the first threshold, it is determined whether the first time and the system time are equal; if they are equal, a second signal is sent and a second time is set. The first time refers to the scheduled shutdown time, and the second time refers to the scheduled power-on time. Upon receiving a fourth or fifth signal, the fourth signal is configured as a system startup completion signal, and the fifth signal is configured as a system time setting signal; it also includes: Read the first time, the first state, the second time, and the second state; when the first state is valid, reset the first signal; when the first state is invalid, cancel the first signal; when the second state is valid, reset the second time; when the second state is invalid, cancel the setting of the second time.
2. The timed power-on / off method according to claim 1, characterized in that, The first signal is a timed interval signal sent by a timer, and the second signal is a system shutdown signal.
3. The timed power-on / off method according to claim 1, characterized in that, The time interval is in the range of 1 min to 5 min; the first threshold is in the range of 1 min to 5 min.
4. A timed on / off system, characterized in that, include: An acquisition module is used to acquire a first signal, wherein adjacent first signals have a time interval; It is also used to receive a third signal and save a first time and a second time, a first state and a second state; the third signal is a timed power-on / off signal, the first state is configured to determine whether the first time is valid, and the second state is configured to determine whether the second time is valid; The comparison module is used to compare the difference between the current system time and the previous time. When the difference is less than the first threshold, it is determined whether the first time and the system time are equal. If they are equal, then send a second signal and set a second time. Upon receiving a fourth or fifth signal, the fourth signal is configured as a system startup completion signal, and the fifth signal is configured as a system time setting signal; it also includes: Read the first time, the first state, the second time, and the second state; when the first state is valid, reset the first signal; when the first state is invalid, cancel the first signal; when the second state is valid, reset the second time; when the second state is invalid, cancel the setting of the second time.
5. An electronic device, characterized in that, include: A memory and a processor are communicatively connected, the memory stores computer instructions, and the processor executes the computer instructions to perform the timed power-on / off method according to any one of claims 1-3.
6. A timed power-on / off system, comprising a timer and the electronic device as described in claim 5; The timer is communicatively connected to the electronic device; the timer is used to send a first signal at a time interval.
7. The timed on / off system according to claim 6, characterized in that, Also includes: The RTC module is communicatively connected to the electronic device and is used to generate a power-on pulse at a second time.
8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing the computer to perform the timed power-on / off method according to any one of claims 1-3.
Citation Information
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Automatic on-off schedule control method and system thereof
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