Display panel and display device
By increasing the area of the first preset active layer in the shift register of the display panel bezel area and increasing the resistance to block electrostatic transmission, the problem of electrostatic damage to the display panel is solved, thereby improving the quality of the display panel and the user experience.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAMEN TIANMA MICRO ELECTRONICS
- Filing Date
- 2020-12-31
- Publication Date
- 2026-05-26
Smart Images
Figure CN115621285B_ABST
Abstract
Description
[0001] This application is a divisional application filed on December 31, 2020, with application number 202011637184.4, entitled "Display Panel and Display Device". Technical Field
[0002] This application relates to the field of display manufacturing technology, and in particular to a display panel and display device. Background Technology
[0003] With the development of display technology, display panels are becoming increasingly common and have gradually become an indispensable component of various electronic devices. Therefore, the quality of display panels has gradually become an important factor affecting user experience.
[0004] However, existing display panels are prone to damage in practical applications, which means the user experience needs to be improved. Summary of the Invention
[0005] To address the aforementioned technical problems, this application provides a display panel that reduces the probability of damage to the display panel and improves the user experience.
[0006] To address the above problems, the embodiments of this application provide the following technical solutions:
[0007] A display panel, including
[0008] The display panel includes at least one driving circuit and at least one pixel circuit. The driving circuit provides driving signals to the pixel circuit. The driving circuit is located in the bezel area of the display panel and includes N cascaded shift registers, where N ≥ 2. The pixel circuit is located in the display area of the display panel and provides display signals to the display units of the display panel.
[0009] The shift register includes at least one first transistor, the at least one first transistor includes at least one first active layer, and the active layer with the largest area among the at least one first active layers is a first preset active layer;
[0010] The pixel circuit includes at least one second transistor, the at least one second active layer, wherein the active layer with the largest area among the silicon active layers in the at least one second active layer is a second predetermined active layer, and the active layer with the largest area among the oxide semiconductor active layers in the at least one second active layer is a third predetermined active layer; wherein,
[0011] The area of the first preset active layer is larger than the area of the second preset active layer; and,
[0012] The area of the first preset active layer is greater than the area of the third preset active layer.
[0013] A display device including the above-described display panel.
[0014] Compared with existing technologies, the above technical solution has the following advantages:
[0015] In the technical solution provided in this application embodiment, the area of the first preset active layer is larger than the area of the second preset active layer, and the area of the first preset active layer is larger than the area of the third preset active layer. By increasing the area of the first preset active layer located in the shift register, the resistance of the first preset active layer located in the border area is increased, thereby increasing the blocking effect of the first preset active layer on static electricity, reducing the probability of static electricity in the border area of the display panel being transferred to the display area, and further reducing the probability of the display area of the display panel being damaged by electrostatic discharge, thus improving the quality of the display panel. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 A top view of a display panel provided in one embodiment of this application;
[0018] Figure 2 This is a schematic diagram of the structure of cascaded shift registers in a display panel provided in one embodiment of this application;
[0019] Figure 3 A schematic diagram of the internal circuit structure of the shift register in a display panel provided in one embodiment of this application;
[0020] Figure 4 A partial top view of at least one first active layer in a display panel provided in one embodiment of this application;
[0021] Figure 5 This is a schematic diagram of the pixel circuit structure in a display panel provided in one embodiment of this application;
[0022] Figure 6 A partial top view of at least one second active layer in a display panel provided in one embodiment of this application;
[0023] Figure 7A schematic diagram of a first preset active layer, a second preset active layer, and a third preset active layer in a display panel provided according to an embodiment of this application;
[0024] Figure 8 This is a cross-sectional view of a transistor.
[0025] Figure 9 for Figure 8 Top view of the transistor shown;
[0026] Figure 10 A partial top view of at least one first active layer in a display panel provided in another embodiment of this application;
[0027] Figure 11 This is a schematic diagram showing that, in another embodiment of the present application, at least one first active layer has a concave-convex structure provided on the first side edge of the first preset active layer.
[0028] Figure 12 This is a schematic diagram of the structure of a display device provided in one embodiment of this application. Detailed Implementation
[0029] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0030] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.
[0031] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.
[0032] As described in the background section, existing display panels are prone to damage in practical applications, which makes it necessary to improve the user experience.
[0033] The inventors discovered that this is mainly because static electricity is generated in the bezel area of the display panel during operation. This static electricity can pass through the bezel area and be transmitted to the display area of the display panel, which can easily damage the display area, affecting the quality of the display panel and reducing the user experience.
[0034] In view of this, embodiments of this application provide a display panel, such as... Figure 1 As shown, the display panel includes at least one driving circuit 10 and at least one pixel circuit 20. The driving circuit 10 provides driving signals to the pixel circuit 20. The driving circuit 10 is located in the border area 100 of the display panel and includes N cascaded shift registers, where N ≥ 2. Figure 2 As shown, the driving circuit includes N cascaded shift registers VR11 to VR1N; the pixel circuit 20 is located in the display area 200 of the display panel and provides display signals to the display unit 30 of the display panel.
[0035] Specifically, in the embodiments of this application, one of the shift registers includes at least one first transistor, such as... Figure 3 As shown, M11 to M18, such as Figure 4 As shown, the at least one first transistor includes at least one first active layer, and the active layer with the largest area among the at least one first active layers is a first preset active layer 11; the pixel circuit includes at least one second transistor M2, as shown... Figure 5 As shown in M21~M27, Figure 6 As shown, the at least one second transistor includes at least one second active layer, wherein the active layer with the largest area among the active layers containing silicon is a second preset active layer 21, and the active layer with the largest area among the active layers containing oxide semiconductors is a third preset active layer 22.
[0036] It should be noted that, in the embodiments of this application, the first active layer may correspond to the active layer of a first transistor, or it may correspond to the active layer of at least two first transistors connected in series. Similarly, the second active layer may correspond to the active layer of a second transistor, or it may correspond to the active layer of at least two second transistors connected in series. This application does not limit this, and it depends on the specific circumstances.
[0037] It should also be noted that, in the embodiments of this application, the first transistor can be a single-channel transistor structure, that is, the first transistor includes one channel region, or it can be a multi-channel transistor structure, that is, the first transistor includes multiple channel regions. Similarly, the second transistor can be a single-channel transistor structure, that is, the second transistor includes one channel region, or it can be a multi-channel transistor structure, that is, the second transistor includes multiple channel regions. This application does not limit this.
[0038] As mentioned above, static electricity in the display area of a display panel is transferred from the bezel area. The driving circuit, including a multi-stage shift register, is a crucial electrical component in the bezel area of the display panel, comprising at least one first transistor. The inventors have discovered that the active layer of a transistor is typically made of polysilicon or oxide semiconductor, which has a relatively high resistance compared to other structures in the bezel area. Furthermore, the larger the area of the active layer of the transistor, the higher the resistance, and the better the static electricity resistance. Therefore, the display panel provided in the embodiments of this application, such as... Figure 7 As shown, the area of the first preset active layer 11 is larger than the area of the second preset active layer 21, and the area of the first preset active layer 11 is larger than the area of the third preset active layer 22. By increasing the area of the first preset active layer located in the shift register, the resistance of the first preset active layer located in the border area is increased, thereby increasing the blocking effect of the first preset active layer on static electricity, reducing the probability of static electricity in the border area of the display panel being transferred to the display area, and thus reducing the probability of the display area of the display panel being damaged by electrostatic discharge, and improving the quality of the display panel.
[0039] It should be noted that with the development of display technology, the requirements for display panel resolution are becoming increasingly stringent, resulting in a greater number of display units in the display area of the display panel. Consequently, the layout space for the pixel circuits corresponding to each display unit is becoming increasingly smaller. Therefore, in the display panel provided in this application embodiment, by increasing the area of the first preset active layer located in the border area, the probability of electrostatic discharge from the border area to the display area, causing damage to the display area, is reduced. This not only improves the quality of the display panel but also avoids increasing the difficulty of transistor layout in the pixel circuits, making the display panel suitable for high display density development.
[0040] It should also be noted that, in the embodiments of this application, the shift register may include one first transistor or multiple first transistors; similarly, the pixel circuit may include one second transistor or multiple second transistors, and this application does not limit this, but depends on the specific circumstances. The following description continues with an example where the shift register includes multiple first transistors and the pixel circuit includes multiple second transistors, to further illustrate the display panel provided in the embodiments of this application.
[0041] Optionally, based on the above embodiments, in one embodiment of this application, the first transistor is a polysilicon transistor, that is, the active layer of the first transistor includes polysilicon. In another embodiment of this application, the first transistor is an oxide semiconductor transistor, that is, the active layer of the first transistor includes oxide semiconductor. This application does not limit this, and it depends on the specific circumstances.
[0042] It should be noted that, in the above embodiments, when the first transistor in the shift register is a polysilicon transistor, the first preset active layer is the active layer with the largest area among the silicon-containing active layers in the at least one first active layer; when the first transistor in the shift register is an oxide semiconductor transistor, the first preset active layer is the active layer with the largest area among the oxide semiconductor active layers in the at least one first active layer.
[0043] Based on any of the above embodiments, in one embodiment of this application, the second transistor in the pixel circuit may be entirely polysilicon transistors, entirely oxide semiconductor transistors, or partially polysilicon transistors and partially oxide semiconductor transistors. This application does not limit this and it depends on the specific circumstances.
[0044] Optionally, based on any of the above embodiments, in one embodiment of this application, the polysilicon transistor is a low-temperature polysilicon transistor, i.e., an LTPS (Low Temperature Poly-silicon) transistor, and the oxide semiconductor transistor is an indium gallium zinc oxide transistor, i.e., an IGZO (Indium Gallium Zinc Oxide) transistor. However, this application does not limit this and the choice depends on the specific circumstances.
[0045] It should be noted that when the second transistor in the pixel circuit is a polysilicon transistor, the area of the first preset active layer is larger than the area of the second preset active layer. This is to increase the resistance of the first preset active layer in the bezel area by making the area of the largest active layer in at least one first active layer in the shift register larger than the area of the largest active layer in at least one second active layer in the pixel circuit. This increases the blocking effect of the first preset active layer on static electricity, reduces the probability of static electricity in the bezel area of the display panel being transferred to the display area, and further reduces the probability of the display area of the display panel being damaged by electrostatic discharge, thereby improving the quality of the display panel.
[0046] When the second transistor in the pixel circuit is an oxide semiconductor transistor, the area of the first preset active layer is larger than the area of the third preset active layer. This increases the resistance of the first preset active layer in the bezel area by making the area of the largest active layer in at least one first active layer in the shift register larger than the area of the largest active layer in at least one second active layer in the pixel circuit. This increases the blocking effect of the first preset active layer on static electricity, reduces the probability of static electricity in the bezel area of the display panel being transferred to the display area, and further reduces the probability of the display area of the display panel being damaged by electrostatic discharge, thereby improving the quality of the display panel.
[0047] When the second transistor in the pixel circuit is partly a polysilicon transistor and partly an oxide semiconductor transistor, the area of the first preset active layer is larger than the area of the second preset active layer and larger than the area of the third preset active layer. This increases the resistance of the first preset active layer in the bezel area by making the area of the largest active layer in at least one first active layer in the shift register larger than the area of the largest active layer containing silicon in at least one second active layer in the pixel circuit and larger than the area of the largest active layer containing oxide semiconductor in at least one second active layer. This increases the blocking effect of the first preset active layer on static electricity, reduces the probability of static electricity in the bezel area of the display panel being transferred to the display area, and further reduces the probability of the display area of the display panel being damaged by electrostatic discharge, thereby improving the quality of the display panel.
[0048] Optionally, in one embodiment of this application, when the second transistor in the pixel circuit includes both a polysilicon transistor and an oxide semiconductor transistor, the area of the first preset active layer is greater than the sum of the areas of the second preset active layer and the third preset active layer, so as to further increase the area of the first preset active layer, enhance the impedance of the first preset active layer to static electricity, and ensure that the area where the shift register is located has sufficient anti-static capability. However, this application does not limit this, and it depends on the specific circumstances.
[0049] It should be noted that, in this embodiment, the shift register is located in the area where the gate driving circuit is located in the bezel area. Since the area where the gate driving circuit is located has a large space, in this embodiment, the area of the first preset active layer in the shift register can be set to be greater than the sum of the areas of the second preset active layer and the third preset active layer, so that the area where the shift register is located has sufficient anti-static capability, further reducing the probability of the display area of the display panel being damaged by electrostatic discharge.
[0050] like Figure 8 and Figure 9 As shown in Figure 8, a cross-sectional view of the transistor structure is presented. Figure 9 This is a top view of the transistor structure, from Figure 8 and Figure 9 As can be seen, the structure of the transistor includes a gate G, a source S, a drain D, and an active layer. The active layer includes a channel region A that overlaps with the gate G, a source region B that is electrically connected to the source S, and a drain region C that is electrically connected to the drain D. For ease of description, the region of the active layer that overlaps with the gate G is referred to as the channel region A, and the portion of the active layer excluding the channel region A is referred to as the non-channel region F.
[0051] Specifically, in this embodiment, the area of the first preset active layer is SA1, the area of the second preset active layer is SA2, and the area of the third preset active layer is SA3. In this embodiment, the area of the first preset active layer is greater than the area of the second preset active layer, and the area of the first preset active layer is greater than the area of the third preset active layer, i.e., SA1 > SA2 and SA1 > SA3. The total area of the channel region of the first transistor corresponding to the first preset active layer is SC1, the total area of the channel region of the second transistor corresponding to the second preset active layer is SC2, and the total area of the channel region of the second transistor corresponding to the third preset active layer is SC3.
[0052] It should be noted that, regardless of whether the first preset active layer corresponds to multiple first transistors, or at least one first transistor corresponding to the first preset active layer has multiple channel regions, or the first preset active layer corresponds to multiple first transistors and at least one of the first transistors corresponding to the first preset active layer has multiple channel regions, the total area of the channel regions of the corresponding first transistors in the first preset active layer is the sum of the areas of each channel region in the first transistor corresponding to the first preset active layer; similarly, regardless of whether the second preset active layer corresponds to multiple second transistors, or at least one second transistor corresponding to the second preset active layer has multiple channel regions, or the second preset active layer corresponds to multiple second transistors and at least one of the first transistors corresponding to the first preset active layer has multiple channel regions, the total area of the channel regions of the corresponding first transistors in the first preset active layer is the sum of the areas of each channel region in the first transistor corresponding to the first preset active layer; At least one second transistor in the second transistor corresponding to the second preset active layer has multiple channel regions, and the total area of the channel regions of the second transistors in the second preset active layer is the sum of the areas of all channel regions in the second transistors in the second preset active layer; regardless of whether the third preset active layer corresponds to multiple second transistors, or at least one second transistor in the third preset active layer has multiple channel regions, or the third preset active layer corresponds to multiple second transistors and at least one of the second transistors in the third preset active layer has multiple channel regions, the total area of the channel regions of the second transistors in the third preset active layer is the sum of the areas of all channel regions in the second transistors in the third preset active layer.
[0053] It should also be noted that in practical applications, the aspect ratio of the channel region in the active layer of a transistor is a key characteristic affecting transistor performance. For transistors with specific performance characteristics, the aspect ratio is a fixed value. If the aspect ratio of the channel region in the active layer of a transistor changes, the performance of the transistor will also change. Furthermore, when the area of the channel region of the transistor is fixed, the larger the area of the non-channel region of the transistor, the longer the time required to transmit signals in the transistor.
[0054] With the development of display technology, users have increasingly higher requirements for the quality of display images. The pixel circuit is used to control the display state of the display units in the display panel. Therefore, the increase in the signal transmission time of each transistor in the pixel circuit will directly increase the delay of the display image and affect the display effect.
[0055] Therefore, in an optional embodiment of this application, by increasing the area of the non-channel region in the first preset active layer without changing the area of the channel region in the first preset active layer, the area of the second preset active layer, and the area of the third preset active layer, the area of the first preset active layer is made larger than the area of the second preset active layer and the area of the third preset active layer. This increases the resistance of the frame area of the display panel to static electricity without changing the aspect ratio of the first transistor and the second transistor, and without increasing the delay of the display screen. This reduces the probability of static electricity from the frame area being transferred to the display area and causing damage to the display area.
[0056] Specifically, in one embodiment of this application, the area of the non-channel region in the first preset active layer is greater than the area of the non-channel region in the second preset active layer, i.e., SA1-SC1 > SA2-SC2. By increasing the area of the non-channel region in the first preset active layer, the area of the first preset active layer is increased, making the area of the first preset active layer greater than the area of the second preset active layer, i.e., SA1 > SA2. This increases the anti-static capability of the first preset active layer without changing the aspect ratio of the channel region in the first transistor corresponding to the first preset active layer, and reduces the probability of static electricity from the bezel area of the display panel to the display area of the display panel causing damage to the display area of the display panel. However, this application does not limit this. In other embodiments of this application, the area of the channel region in the first preset active layer can be set to be greater than the area of the channel region in the second preset active layer, i.e., SC1 > SC2, so that the area of the first preset active layer is greater than the area of the second preset active layer. Alternatively, the area of the channel region and the area of the non-channel region in the first preset active layer can be set to be greater than the area of the channel region and the area of the non-channel region in the second preset active layer, so that the area of the first preset active layer is greater than the area of the second preset active layer. The specific method depends on the situation.
[0057] In another embodiment of this application, the area of the non-channel region in the first preset active layer is greater than the area of the non-channel region in the third preset active layer, i.e., SA1-SC1 > SA3-SC3. By increasing the area of the non-channel region in the first preset active layer, the area of the first preset active layer is increased, making the area of the first preset active layer greater than the area of the third preset active layer, i.e., SA1 > SA3. This increases the anti-static capability of the first transistor without changing the aspect ratio of the channel region of the first transistor corresponding to the first preset active layer, and reduces the probability of electrostatic discharge from the bezel area of the display panel to the display area of the display panel, thus damaging the display area of the display panel. However, this application does not limit this. In other embodiments of this application, the area of the channel region in the first preset active layer can be set to be greater than the area of the channel region in the third preset active layer, i.e., SC1 > SC3, so that the area of the first preset active layer is greater than the area of the third preset active layer. Alternatively, the area of the non-channel region in the first preset active layer can be set to be greater than the area of the non-channel region in the third preset active layer, so that the area of the first preset active layer is greater than the area of the second preset active layer. Or, the area of the channel region and the area of the non-channel region in the first preset active layer can be set to be greater than the area of the channel region and the area of the non-channel region in the third preset active layer, so that the area of the first preset active layer is greater than the area of the third preset active layer. The specific method depends on the situation.
[0058] In another embodiment of this application, the area of the non-channel region in the first preset active layer is greater than the area of the non-channel region in the second preset active layer, i.e., SA1-SC1 > SA2-SC2, and the area of the non-channel region in the first preset active layer is greater than the area of the non-channel region in the third preset active layer, i.e., SA1-SC1 > SA3-SC3. By increasing the area of the non-channel region in the first preset active layer, the area of the first preset active layer is increased, making the area of the first preset active layer greater than the areas of the second and third preset active layers, i.e., SA1 > SA2 and SA1 > SA3. This increases the anti-static capability of the first transistor without changing the aspect ratio of the channel region in the first transistor corresponding to the first preset active layer, reducing the probability of electrostatic discharge from the bezel area of the display panel to the display area of the display panel, thus causing damage to the display area of the display panel.
[0059] In other embodiments of this application, the area of the channel region in the first preset active layer can be set to be larger than the area of the channel region in the second preset active layer, and the area of the non-channel region in the first preset active layer can be set to be larger than the area of the non-channel region in the third preset active layer, such that the area of the first preset active layer is larger than the area of the second preset active layer and the area of the first preset active layer is larger than the area of the third preset active layer; or, the area of the non-channel region in the first preset active layer can be set to be larger than the area of the non-channel region in the second preset active layer, and the area of the channel region in the first preset active layer is larger than the area of the third preset active layer. The area of the channel region in the layer is such that the area of the first preset active layer is greater than the area of the second preset active layer and the area of the first preset active layer is greater than the area of the third preset active layer. Alternatively, the area of the channel region in the first preset active layer is set to be greater than the area of the channel region in the second preset active layer and the area of the channel region in the first preset active layer is greater than the area of the channel region in the third preset active layer, such that the area of the first preset active layer is greater than the area of the second preset active layer and the area of the first preset active layer is greater than the area of the third preset active layer. This application does not limit this, and it depends on the specific situation.
[0060] Optionally, in one embodiment of this application, the area of the non-channel region in the first preset active layer is greater than the sum of the areas of the non-channel regions in the second preset active layer and the third preset active layer, i.e., SA1-SC1>(SA2-SC2)+(SA3-SC3), so that without changing the aspect ratio of the channel region of the first transistor corresponding to the first preset active layer, the area where the shift register is located has sufficient anti-static capability, further reducing the probability of the display area of the display panel being damaged by electrostatic discharge.
[0061] It should be noted that, in any of the above embodiments, when a shift register includes a plurality of first transistors, the plurality of first transistors may include both polysilicon transistors and oxide semiconductor transistors, in addition to being all polysilicon transistors or all oxide semiconductor transistors. That is, some of the plurality of first transistors are polysilicon transistors and some are oxide semiconductor transistors.
[0062] Based on the above embodiments, in one embodiment of this application, when the plurality of first transistors include both polysilicon transistors and oxide semiconductor transistors, the shift register further includes a fourth preset active layer, that is, the at least one first active layer further includes a fourth preset active layer. Specifically, when the first preset active layer is an active layer containing silicon, the fourth preset active layer is the active layer with the largest area among the active layers containing oxide semiconductors in the at least one first active layer; when the first preset active layer is an active layer containing oxide semiconductors, the fourth preset active layer is the active layer with the largest area among the active layers containing silicon in the at least one first active layer.
[0063] Based on the above embodiments, in one embodiment of this application, the sum of the area of the first preset active layer and the area of the fourth preset active layer is greater than the sum of the areas of the second preset active layer and the third preset active layer. This increases the antistatic capability of the frame area of the display panel by increasing the overall area of the first preset active layer and the fourth preset active layer in the frame area, thereby reducing the probability of static electricity from the frame area of the display panel being transferred to the display area of the display panel and causing damage to the display area of the display panel.
[0064] Optionally, in one embodiment of this application, the area of the fourth preset active layer is greater than the area of the second preset active layer and / or the area of the third preset active layer, so as to increase the antistatic capability of the bezel area of the display panel by increasing the area of the fourth preset active layer. However, this application does not limit this. In other embodiments of this application, the area of the fourth preset active layer may also be smaller than the area of the second preset active layer and / or the area of the third preset active layer, as long as the sum of the areas of the first preset active layer and the fourth preset active layer is greater than the sum of the areas of the second preset active layer and the third preset active layer.
[0065] As mentioned above, the aspect ratio of the channel region in the active layer of a transistor is a key characteristic affecting transistor performance; for transistors with specific performance characteristics, the aspect ratio is a fixed value. With a fixed channel region area, the larger the area of the non-channel region, the longer it takes for the transistor to transmit signals.
[0066] Therefore, in one embodiment of this application, the sum of the areas of the non-channel regions of the first transistors corresponding to the first preset active layer and the sum of the areas of the non-channel regions of the first transistors corresponding to the fourth preset active layer is greater than the sum of the areas of the non-channel regions of the second transistors corresponding to the second preset active layer and the sum of the areas of the non-channel regions of the second transistors corresponding to the third preset active layer. This increases the resistance of the frame area to static electricity without increasing the aspect ratio of the channel regions of the first transistors corresponding to the first preset active layer and the aspect ratio of the channel regions of the first transistors corresponding to the fourth preset active layer. This reduces the probability of static electricity from the frame area being transferred to the display area and causing damage to the display area, and does not increase the delay of the display screen.
[0067] Specifically, the area of the first preset active layer is SA1, the area of the second active layer is SA2, the area of the third active layer is SA3, and the area of the fourth preset active layer is SA4; the total area of the channel region of the first transistor corresponding to the first preset active layer is SC1, the total area of the channel region of the second transistor corresponding to the second preset active layer is SC2, the total area of the channel region of the second transistor corresponding to the third preset active layer is SC3, and the total area of the channel region of the first transistor corresponding to the fourth preset active layer is SC4; then (SA1-SC1)+
[0068] (SA4-SC4) > (SA2-SC2) + (SA3-SC3) to increase the electrostatic discharge resistance of the frame area without increasing the aspect ratio of the channel region of the first transistor corresponding to the first preset active layer and the aspect ratio of the channel region of the first transistor corresponding to the fourth preset active layer. This reduces the probability of electrostatic discharge from the frame area to the display area, causing damage to the display area, and does not increase the display delay of the display panel. However, this application is not limited to this. In other embodiments of this application, the area of the channel region of the first preset active layer and / or the area of the channel region of the fourth preset active layer may be appropriately increased to further increase the antistatic discharge resistance of the first preset active layer and the fourth preset active layer without substantially changing the aspect ratio of the first transistor corresponding to the first preset active layer and the aspect ratio of the channel region corresponding to the fourth preset active layer, thereby increasing the antistatic discharge resistance of the frame area of the display panel.
[0069] The following describes, with reference to specific embodiments, how the sum of the areas of the channel regions of the first transistors corresponding to the first preset active layer and the sum of the areas of the channel regions of the first transistors corresponding to the fourth preset active layer are greater than the sum of the areas of the channel regions of the second transistors corresponding to the second preset active layer and the sum of the areas of the channel regions of the second transistors corresponding to the third preset active layer, i.e., (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3).
[0070] Specifically, in one embodiment of this application, the first preset active layer comprises silicon, and the second preset active layer comprises an oxide semiconductor.
[0071] Based on the above embodiments, in one implementation of this application, the total area of the non-channel regions of the first transistors corresponding to the first preset active layer is greater than the total area of the non-channel regions of the second transistors corresponding to the second preset active layer, i.e., SA1-SC1>SA2-SC2, so that (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3). This increases the anti-static capability of the frame area of the display panel by increasing the total area of the non-channel regions of the first transistors corresponding to the first preset active layer, and reduces the probability of static electricity from the frame area of the display panel being transferred to the display area of the display panel and damaging the display area of the display panel.
[0072] In another implementation of this application, the total area of the non-channel regions of the first transistors corresponding to the fourth preset active layer is greater than the total area of the non-channel regions of the second transistors corresponding to the third preset active layer, i.e., SA4-SC4 > SA3-SC3, so that (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3). This increases the anti-static capability of the frame area of the display panel by increasing the total area of the non-channel regions of the first transistors corresponding to the fourth preset active layer, and reduces the probability of static electricity from the frame area of the display panel being transferred to the display area of the display panel and damaging the display area of the display panel.
[0073] In another implementation of this application, the total area of the non-channel regions of the first transistors corresponding to the first preset active layer is greater than the total area of the non-channel regions of the second transistors corresponding to the second preset active layer, and the total area of the non-channel regions of the first transistors corresponding to the fourth preset active layer is greater than the total area of the non-channel regions of the second transistors corresponding to the third preset active layer, i.e., SA1-SC1>SA2-SC2 and SA4-SC4>SA3-SC3, so that (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3). This increases the anti-static capability of the frame area of the display panel by simultaneously increasing the total area of the non-channel regions of the first transistors corresponding to the first preset active layer and the total area of the non-channel regions of the first transistors corresponding to the fourth preset active layer, thereby reducing the probability of static electricity from the frame area of the display panel being transferred to the display area of the display panel and damaging the display area of the display panel.
[0074] It should be noted that the above implementation methods are described with the example of the first preset active layer containing silicon and the fourth preset active layer containing oxide semiconductor, and the implementation method of (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3). However, this application does not limit this. In other embodiments of this application, the first preset active layer may contain oxide semiconductor and the fourth preset active layer may contain silicon.
[0075] The following describes, in conjunction with specific embodiments, the implementation of (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3) when the first preset active layer contains an oxide semiconductor and the fourth preset active layer contains silicon.
[0076] In one implementation of this application, the total area of the non-channel regions of the first transistors corresponding to the fourth preset active layer is greater than the total area of the non-channel regions of the second transistors corresponding to the second preset active layer, i.e., SA4-SC4>SA2-SC2, so that (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3). This increases the anti-static capability of the frame area of the display panel by increasing the total area of the non-channel regions of the first transistors corresponding to the fourth preset active layer, and reduces the probability of static electricity from the frame area of the display panel being transferred to the display area of the display panel and damaging the display area of the display panel.
[0077] In another implementation of this application, the total area of the non-channel regions of the first transistors corresponding to the first preset active layer is greater than the total area of the non-channel regions of the second transistors corresponding to the third preset active layer, i.e., SA1-SC1 > SA3-SC3, so that (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3). This increases the anti-static capability of the frame area of the display panel by increasing the total area of the non-channel regions of the first transistors corresponding to the first preset active layer, and reduces the probability of static electricity from the frame area of the display panel being transferred to the display area of the display panel and damaging the display area of the display panel.
[0078] In another implementation of this application, the total area of the non-channel regions of the first transistors corresponding to the fourth preset active layer is greater than the total area of the non-channel regions of the second transistors corresponding to the second preset active layer, and the total area of the non-channel regions of the first transistors corresponding to the first preset active layer is greater than the total area of the non-channel regions of the second transistors corresponding to the third preset active layer, i.e., SA4-SC4 > SA2-SC2 and SA1-SC1 > SA3-SC3, so that (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3). This increases the anti-static capability of the frame area of the display panel by simultaneously increasing the total area of the non-channel regions of the first transistors corresponding to the fourth preset active layer and the total area of the non-channel regions of the first transistors corresponding to the first preset active layer, thereby reducing the probability of static electricity from the frame area of the display panel being transferred to the display area of the display panel and damaging the display area of the display panel.
[0079] Based on any of the above embodiments, in one embodiment of this application, the shift register further includes a fifth preset active layer, that is, the at least one first active layer further includes a fifth preset active layer, such as... Figure 10 As shown, the fifth preset active layer 12 is the active layer with an area second only to the first preset active layer 11 among the at least one first active layer; wherein, the area of the fifth preset active layer is larger than the area of the second preset active layer, and the area of the fifth preset active layer is larger than the area of the third preset active layer, so as to increase the resistance of the fifth preset active layer by increasing the area of the fifth preset active layer, thereby increasing the blocking effect of the fifth preset active layer on static electricity. In addition to improving the anti-static capability of the frame area of the display panel by increasing the area of the first preset active layer, the anti-static capability of the frame area of the display panel is further improved by increasing the area of the fifth preset active layer, thereby further reducing the probability of static electricity in the frame area of the display panel being transferred to the display area, thereby reducing the probability of the display area of the display panel being damaged by electrostatic discharge, and improving the quality of the display panel.
[0080] Optionally, in one embodiment of this application, the area of the fifth preset active layer is greater than the sum of the areas of the second preset active layer and the third preset active layer, so as to further increase the area of the fifth preset active layer, enhance the impedance capability of the fifth preset active layer to electrostatic discharge, and ensure that the area where the shift register is located has sufficient anti-static capability. However, this application does not limit this, and it depends on the specific circumstances.
[0081] As mentioned above, the aspect ratio of the channel region in the active layer of a transistor is a key characteristic affecting transistor performance; for transistors with specific performance characteristics, the aspect ratio is a fixed value. With a fixed channel region area, the larger the area of the non-channel region, the longer it takes for the transistor to transmit signals.
[0082] Therefore, in one embodiment of this application, by increasing the area of the non-channel region in the fifth preset active layer without changing the area of the channel region in the fifth preset active layer, the area of the second preset active layer, and the area of the third preset active layer, the area of the fifth preset active layer is made larger than the area of the second preset active layer and the area of the third preset active layer. This increases the resistance of the frame area of the display panel to static electricity without changing the aspect ratio of the first transistor and the second transistor, and without increasing the delay of the display screen. This reduces the probability of static electricity from the frame area being transferred to the display area and causing damage to the display area.
[0083] Specifically, in one embodiment of this application, the area of the non-channel region in the fifth preset active layer is larger than the area of the non-channel region in the second preset active layer, i.e., SA5-SC5 > SA2-SC2. This increases the area of the fifth preset active layer by increasing the area of the non-channel region, making the area of the fifth preset active layer larger than the area of the second preset active layer (SA5 > SA2). This increases the anti-static capability of the fifth preset active layer without changing the aspect ratio of the channel region in the first transistor corresponding to the fifth preset active layer, reducing the probability of electrostatic discharge from the bezel area of the display panel to the display area and causing damage. However, this application does not limit this specific implementation; the choice depends on the specific circumstances.
[0084] In another embodiment of this application, the area of the non-channel region in the fifth preset active layer is larger than the area of the non-channel region in the third preset active layer, i.e., SA5-SC5 > SA3-SC3. This increases the area of the fifth preset active layer by increasing the area of the non-channel region in the fifth preset active layer, making the area of the fifth preset active layer larger than the area of the third preset active layer (SA5 > SA3). This increases the anti-static capability of the first transistor without changing the aspect ratio of the channel region corresponding to the fifth preset active layer, reducing the probability of electrostatic discharge from the bezel area of the display panel to the display area and causing damage. However, this application does not limit this specific implementation; the choice depends on the specific circumstances.
[0085] In another embodiment of this application, the area of the non-channel region in the fifth preset active layer is larger than the area of the non-channel region in the second preset active layer, and the area of the non-channel region in the fifth preset active layer is larger than the area of the non-channel region in the third preset active layer, i.e., SA5-SC5 > SA2-SC2 and SA5-SC5 > SA3-SC3. By increasing the area of the non-channel region in the fifth preset active layer, the area of the fifth preset active layer is increased, making the area of the fifth preset active layer larger than the areas of the second preset active layer and the third preset active layer, i.e., SA5 > SA2 and SA5 > SA3. This increases the anti-static capability of the first transistor without changing the aspect ratio of the channel region in the first transistor corresponding to the fifth preset active layer, reducing the probability of electrostatic discharge from the bezel area of the display panel to the display area of the display panel, thus preventing damage to the display area of the display panel.
[0086] Optionally, based on the above embodiments, in one embodiment of this application, the area of the non-channel region in the fifth preset active layer is greater than the sum of the areas of the non-channel regions in the second preset active layer and the third preset active layer, i.e., SA5-SC5>(SA2-SC2)+(SA3-SC3), so that without changing the aspect ratio of the channel region of the first transistor corresponding to the fifth preset active layer, the area where the shift register is located has sufficient anti-static capability, further reducing the probability of the display area of the display panel being damaged by electrostatic discharge.
[0087] Based on any of the above embodiments, in one embodiment of this application, the following continues... Figure 1 and Figure 2As shown, the shift register extends in cascades along a first direction X, and provides a drive signal to the pixel circuit 30 located in the display area 200 of the display panel along a second direction Y. The first direction X is perpendicular to the second direction Y, wherein the second direction Y is the projection direction, and so on. Figure 10 As shown, the first preset active layer 11 and the fifth preset active layer 12 do not overlap at least partially, so as to increase the projection of the at least one first active layer in the second direction Y, thereby increasing the shielding area of the at least one first active layer for the static electricity of the frame area of the display panel when the static electricity of the frame area of the display panel is transferred to the display area of the display breadboard, and further reducing the probability of the static electricity of the frame area of the display panel being transferred to the display area of the display panel.
[0088] Optionally, in one embodiment of this application, with the second direction as the projection direction, the first preset active layer and the fifth preset active layer do not overlap at all, so as to maximize the projection of the at least one first active layer in the second direction. This increases the shielding area of the at least one first active layer against the static electricity of the frame area of the display panel when the static electricity of the frame area of the display panel is transferred to the display area of the display breadboard, thereby further reducing the probability of the static electricity of the frame area of the display panel being transferred to the display area of the display panel.
[0089] Based on any of the above embodiments, in one embodiment of this application, the pixel circuit includes a driving transistor and a switching transistor, the second preset active layer is the active layer corresponding to the driving transistor of the pixel circuit, and the third preset active layer is the active layer corresponding to the switching transistor of the pixel circuit, so that the second preset active layer and the third preset active layer are active layers corresponding to different functional transistors in the pixel circuit. Continuing as... Figure 5 Taking the pixel circuit shown as an example, Figure 5 In the pixel circuit shown, the second transistor M21 is a driving transistor, and the second transistors M22 to M27 are all switching transistors.
[0090] Based on the above embodiments, in one embodiment of this application, the area of the second preset active layer is larger than the area of the third preset active layer, so as to improve the anti-static capability of the display area of the display panel and reduce the probability of the display area of the display panel being damaged by electrostatic discharge by increasing the area of the second preset active layer in the display area of the display panel.
[0091] As mentioned above, the aspect ratio of the channel region in the active layer of a transistor is a key characteristic affecting transistor performance. For transistors with specific performance characteristics, the aspect ratio is a fixed value. Therefore, in an optional embodiment of this application, the non-channel region area of the second transistor corresponding to the second preset active layer is larger than the non-channel region area of the second transistor corresponding to the third preset active layer. This increases the anti-static capability of the second preset active layer and reduces the probability of the display area of the display panel being damaged by electrostatic discharge without changing the aspect ratio of the channel region of the second transistor corresponding to the second preset active layer.
[0092] Specifically, in this embodiment, the area of the second preset active layer is SA2, the area of the third preset active layer is SA3, the total area of the channel region of the second transistor corresponding to the second preset active layer is SC2, and the total area of the channel region of the second transistor corresponding to the third preset active layer is SC3; then SA2-SC2>SA3-SC3, so that the area of the non-channel region of the second transistor corresponding to the second preset active layer is greater than the area of the non-channel region of the second transistor corresponding to the third preset active layer.
[0093] In another embodiment of this application, the area of the third preset active layer is larger than the area of the second preset active layer, so as to improve the anti-static capability of the display area of the display panel and reduce the probability of the display area of the display panel being damaged by electrostatic discharge by increasing the area of the third preset active layer in the display area of the display panel. This application does not limit this, and it depends on the specific situation.
[0094] As mentioned above, the aspect ratio of the channel region in the active layer of a transistor is a key characteristic affecting transistor performance. For transistors with specific performance characteristics, the aspect ratio is a fixed value. Therefore, in an optional embodiment of this application, the non-channel region area of the second transistor corresponding to the third preset active layer is larger than the non-channel region area of the second transistor corresponding to the second preset active layer. This increases the anti-static capability of the third preset active layer and reduces the probability of the display area of the display panel being damaged by electrostatic discharge without changing the aspect ratio of the channel region of the second transistor corresponding to the third preset active layer.
[0095] Specifically, in this embodiment, the area of the second preset active layer is SA2, the area of the third preset active layer is SA3, the total area of the channel region of the second transistor corresponding to the second preset active layer is SC2, and the total area of the channel region of the second transistor corresponding to the third preset active layer is SC3; then SA3-SC3>SA2-SC2, so that the area of the non-channel region of the second transistor corresponding to the third preset active layer is greater than the area of the non-channel region of the second transistor corresponding to the second preset active layer.
[0096] Based on any of the above embodiments, in one embodiment of this application, such as Figure 11 As shown, at least one uneven structure 40 is provided on at least the first side edge of the first preset active layer 11, so as to increase the tip discharge phenomenon on the first side of the first preset active layer 11 by adding uneven structure 40 on the first side edge of the first preset active layer 11, and reduce the amount of static electricity transferred from the border area of the display panel to the display area of the display panel.
[0097] Optionally, to reduce the transfer of electrical charge to the display area of the display panel when the tip of the uneven structure discharges, in one specific embodiment of this application, such as... Figure 2 and Figure 11 As shown, the shift register extends in cascade along the first direction X, and provides a driving signal to the pixel circuit of the display area of the display panel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first side edge is the side edge of the first preset active layer 11 corresponding to the first direction X, but this application does not limit it. In other embodiments of this application, the first side of the first preset active layer 11 can be on the second direction Y, and the side of the first preset active layer 11 away from the display area, depending on the specific situation.
[0098] Based on any of the above embodiments, in one embodiment of this application, the following continues... Figure 11 As shown, the width K1 of the at least one concave-convex structure 40 on the side close to the first side edge is greater than the width K2 on the side away from the first side edge, so that the end of the concave-convex structure 40 away from the first preset active layer 11 discharges, thereby reducing the impact of the discharge phenomenon on the first preset active layer 11.
[0099] In addition, such as Figure 12 As shown in the illustration, this application also provides a display device, which includes the display panel provided in any of the above embodiments. Optionally, the display device can be a device with display function such as a mobile phone, computer, tablet, or television. This application does not limit the scope of the application and the choice depends on the specific circumstances.
[0100] In summary, in the display panel and display device provided in this application embodiment, the area of the first preset active layer is larger than the area of the second preset active layer, and the area of the first preset active layer is larger than the area of the third preset active layer. By increasing the area of the first preset active layer located in the shift register, the resistance of the first preset active layer located in the border area is increased, thereby increasing the blocking effect of the first preset active layer on static electricity, reducing the probability of static electricity in the border area of the display panel being transferred to the display area, and further reducing the probability of the display area of the display panel being damaged by electrostatic discharge, thus improving the quality of the display panel.
[0101] The various parts of this manual are described in a combination of parallel and progressive methods. Each part focuses on the differences between the other parts, and the same or similar parts can be referred to each other.
[0102] The features described above regarding the disclosed embodiments can be substituted or combined with each other to enable those skilled in the art to implement or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A display panel, characterized in that, include: At least one driving circuit and at least one pixel circuit, wherein the driving circuit provides driving signals to the pixel circuit, and the driving circuit includes N cascaded shift registers, where N≥2; the pixel circuit provides display signals to the display units of the display panel. The shift register includes at least one first transistor, the at least one first transistor includes at least one first active layer, and the active layer with the largest area among the at least one first active layers is a first preset active layer; The pixel circuit includes at least one second transistor, the at least one second active layer, wherein the active layer with the largest area among the silicon active layers in the at least one second active layer is a second predetermined active layer, and the active layer with the largest area among the oxide semiconductor active layers in the at least one second active layer is a third predetermined active layer; wherein, The first preset active layer is an active layer containing silicon. The shift register also includes a fourth preset active layer. The fourth preset active layer is the active layer with the largest area among the active layers containing oxide semiconductors in the at least one first active layer. The sum of the area of the first preset active layer and the area of the fourth preset active layer is greater than the sum of the areas of the second preset active layer and the third preset active layer. or, The first preset active layer is an active layer containing an oxide semiconductor. The shift register further includes a fourth preset active layer. The fourth preset active layer is the active layer with the largest area among the active layers containing silicon in the at least one first active layer. The sum of the area of the first preset active layer and the area of the fourth preset active layer is greater than the sum of the areas of the second preset active layer and the third preset active layer.
2. The display panel according to claim 1, characterized in that, The area of the first preset active layer is SA1, the area of the second preset active layer is SA2, the area of the third preset active layer is SA3, and the area of the fourth preset active layer is SA4. The total area of the channel regions of the first transistors corresponding to the first preset active layer is SC1, the total area of the channel regions of the second transistors corresponding to the second preset active layer is SC2, the total area of the channel regions of the second transistors corresponding to the third preset active layer is SC3, and the total area of the channel regions of the first transistors corresponding to the fourth preset active layer is SC4; wherein, (SA1-SC1)+(SA4-SC4)>(SA2-SC2)+(SA3-SC3).
3. The display panel according to claim 2, characterized in that, The first preset active layer comprises silicon, and the fourth preset active layer comprises an oxide semiconductor; SA1-SC1 > SA2-SC2; and / or SA4-SC4 > SA3-SC3; or, The first preset active layer comprises an oxide semiconductor, and the fourth preset active layer comprises silicon; SA4-SC4 > SA2-SC2; and / or SA1-SC1 > SA3-SC3.
4. The display panel according to claim 1, characterized in that, The second preset active layer is the active layer corresponding to the driving transistor of the pixel circuit; The third preset active layer is the active layer corresponding to the switching transistor of the pixel circuit; wherein, The area of the second preset active layer is greater than the area of the third preset active layer.
5. The display panel according to claim 1, characterized in that, The second preset active layer is the active layer corresponding to the driving transistor of the pixel circuit; The third preset active layer is the active layer corresponding to the switching transistor of the pixel circuit; wherein, The area of the third preset active layer is greater than the area of the second preset active layer.
6. The display panel according to claim 5, characterized in that, The area of the second preset active layer is SA2, and the area of the third preset active layer is SA3; The total area of the channel region of the second transistor corresponding to the second preset active layer is SC2. The total area of the channel region of the second transistor corresponding to the third preset active layer is SC3; wherein, SA3-SC3>SA2-SC2.
7. The display panel according to claim 1, characterized in that, The first preset active layer has at least one uneven structure on its first side edge.
8. The display panel according to claim 7, characterized in that, The width of the at least one concave-convex structure on the side closest to the first side edge is greater than the width on the side away from the first side edge.
9. The display panel according to claim 7, characterized in that, The shift register extends in cascades along a first direction, and provides drive signals to the pixel circuits of the display area of the display panel along a second direction, wherein the first direction is perpendicular to the second direction; wherein... The first side edge is the side edge of the first preset active layer in the first direction.
10. A display device, characterized in that, Includes the display panel as described in any one of claims 1-9.