A T-type three-level modulation method and device for reducing common-mode voltage

Abstract

The present invention relates to a T-type three-level modulation method and device for reducing common-mode voltage, including converting the three-phase space voltage vectors of a T-type three-level inverter into a 60-degree coordinate system, with each 60 degrees being a large sector; synthesizing the converted three-phase space voltage vectors into large vectors, medium vectors, small vectors, and zero vectors, including zero vector V0 = V OOO , the first small vector #imgabs0# the second small vector #imgabs1# the first large vector V L1 = V PNN , the second large vector V L2 = V PPN and the medium vector #imgabs2##imgabs3# Divide each large sector into several small sectors according to the above vectors, where the combinations of P, N, and O represent the corresponding switching states of the inverter; calculate the vector action time of each small sector, and obtain a pulse sequence according to the vector action time; obtain a PWM signal according to the vector action time and the pulse sequence, and control the T-type three-level inverter according to the PWM signal. Compared with the prior art, the present invention has the advantages of being able to reduce the common-mode voltage, etc.

Description

Technical Field

[0001] The present invention relates to the technical field of inverter modulation, and particularly to a T-type three-level modulation method and device for reducing common-mode voltage. Background Art

[0002] The current mainstream three-level inverter topologies include diode-clamped three-level inverters and T-type three-level inverters. The principles of the two topologies are similar and they can work with exactly the same modulation strategy. There are problems such as neutral point voltage fluctuation and common-mode voltage in three-level inverters, which seriously affect their safety and reduce the output voltage quality. In view of the problems of midpoint voltage fluctuation and high common-mode voltage in T-type three-level inverters, scholars at home and abroad have proposed many modulation strategies. Among them, the proposed modulation strategies mainly focus on the selection of the synthesis of basic vectors.

[0003] The existing modulation strategies are mainly divided into the traditional SVPWM modulation strategy and the control method based on constructing virtual synthesis vectors. However, the traditional SVPWM control strategy uses all basic vectors, including a large number of high common-mode vectors, resulting in the output common-mode voltage remaining at While the modulation strategy based on virtual synthesis vectors has problems such as complex basic vector selection and calculation process, and general control effect. Summary of the Invention

[0004] The purpose of the present invention is to provide a T-type three-level modulation method and device for reducing common-mode voltage to overcome the defects of the above-mentioned existing technologies.

[0005] The purpose of the present invention can be achieved through the following technical solutions:

[0006] A T-type three-level modulation method for reducing common-mode voltage, comprising the following steps:

[0007] S1. Convert the three-phase space voltage vectors of the T-type three-level inverter into a 60-degree coordinate system, with each 60 degrees as a large sector;

[0008] S2. Synthesize the converted three-phase space voltage vectors into a zero vector V0 = V OOO , the first small vector , the second small vector , the first large vector V L1 = V PNN , the second large vector V L2 = V PPN and the middle vector Divide each large sector into several small sectors according to the above vectors. The first small sector consists of a zero vector, a first small vector, and a medium vector. The second small sector consists of a zero vector, a first small vector, and a second small vector. The third small sector consists of a first large vector, a first small vector, and a medium vector. The fourth small sector consists of a first large vector, a second large vector, and a medium vector. The fifth small sector consists of a second small vector, a second large vector, and a medium vector. Among them, the combination of P, N, and O represents the corresponding switching state of the inverter;

[0009] S3. Calculate the vector action time of each small sector, and obtain a pulse sequence according to the vector action time;

[0010] S4. Obtain a PWM signal according to the vector action time and the pulse sequence, and control the T-type three-level inverter according to the PWM signal.

[0011] Further, in the step S3, the action time of the vector is calculated by the NTV rule and the volt-second balance.

[0012] Further, the corresponding common-mode voltage range of the switching state is

[0013] A T-type three-level modulation device for reducing common-mode voltage includes a memory and a processor; the memory is used for storing a computer program; the processor is used for, when executing the computer program, implementing the following method:

[0014] S1. Convert the three-phase space voltage vector of the T-type three-level inverter into a 60-degree coordinate system, with each 60 degrees as a large sector;

[0015] S2. Synthesize the converted three-phase space voltage vector into a zero vector V0 = V OOO , a first small vector a second small vector a first large vector V L1 = V PNN , a second large vector V L2 = V PPN and a medium vector Divide each large sector into several small sectors according to the above vectors. The first small sector consists of a zero vector, a first small vector, and a medium vector. The second small sector consists of a zero vector, a first small vector, and a second small vector. The third small sector consists of a first large vector, a first small vector, and a medium vector. The fourth small sector consists of a first large vector, a second large vector, and a medium vector. The fifth small sector consists of a second small vector, a second large vector, and a medium vector. Among them, the combination of P, N, and O represents the corresponding switching state of the inverter;

[0016] S3. Calculate the vector action time of each small sector, and obtain a pulse sequence according to the vector action time;

[0017] S4. Obtain the PWM signal according to the vector action time and the pulse sequence, and control the T-type three-level inverter according to the PWM signal.

[0018] Compared with the prior art, the present invention has the following advantages:

[0019] 1. The present invention converts the three-phase space voltage of the T-type three-level inverter into a 60-degree coordinate system and divides the sectors, synthesizes the vectors therein into different multiple vectors, determines the small sectors according to the synthesized vectors, calculates the vector action time, and then generates the PWM signal for controlling the inverter. The present invention adopts the method of vector synthesis, considers the new vector composition combination, combines the existing vectors into 5 different virtual vectors, makes the division of the small sectors more reasonable, and reduces the common-mode voltage. And converting the three-phase space voltage into a 60-degree coordinate system simplifies the calculation.

[0020] 2. The present invention calculates the vector action time through the NTV rule and volt-second balance, ensures the accuracy of the vector action time, and further reduces the common-mode voltage.

[0021] 3. The present invention limits the common-mode voltage range corresponding to the inverter switching state within Reduces the common-mode voltage at the root. Brief Description of the Drawings

[0022] Figure 1 It is a flow schematic diagram of the present invention.

[0023] Figure 2 It is a topological structure diagram of the T-type three-level inverter involved in the present invention.

[0024] Figure 3 It is all voltage vector spatial diagrams involved in the present invention.

[0025] Figure 4 It is a spatial voltage vector diagram in the 60-degree coordinate system in the present invention.

[0026] Figure 5 It is a small sector division diagram of the present invention.

[0027] Figure 6 It is a common-mode voltage simulation result diagram of the present invention. Detailed Embodiments

[0028] The present invention will be described in detail below with reference to the drawings and specific embodiments. This embodiment is implemented on the premise of the technical solution of the present invention, and gives the detailed implementation manner and specific operation process, but the protection scope of the present invention is not limited to the following embodiments.

[0029] This embodiment provides a T-type three-level modulation method for reducing the common-mode voltage. By reselecting appropriate vectors for the synthesis of virtual vectors, a new synthesis method is explored. And it is ensured that under this method, the common-mode voltage is small, the midpoint voltage is balanced, and it is described in the 60° coordinate system, avoiding a large number of trigonometric function operation processes and shortening the operation time. Furthermore, a T-type three-level modulation method for reducing the common-mode voltage is proposed.

[0030] As Figure 1 shown, it specifically includes the following steps:

[0031] Step S1: Convert the three-phase space voltage vectors of the T-type three-level inverter from the 90° coordinate system to the 60° coordinate system. The topological structure of the T-type three-level inverter is as Figure 2 shown, where each 60° in the 60° coordinate system is a large sector. The voltage vector space diagram converted to the 60° coordinate system is as Figure 3 and Figure 4 shown.

[0032] Step S2: Synthesize the converted three-phase space voltage vectors into large vectors, medium vectors, small vectors, and zero vectors according to the amplitude size, including the zero vector V0 = V OOO , the first small vector the second small vector the first large vector V L1 = V PNN , the second large vector V L2 = V PPN and the medium vector

[0033] According to the above vectors, each large sector is divided into several small sectors, where the combination of P, N, and O represents the corresponding switch state of the inverter.

[0034] Step S3: Calculate the vector action time of each small sector, and obtain the pulse sequence according to the vector action time.

[0035] Step S4: Obtain the PWM signal according to the vector action time and the pulse sequence, and control the conduction and cut-off of the switch tubes of the T-type three-level inverter according to the PWM signal.

[0036] Among them, the common-mode voltage range corresponding to the switch state selected in this embodiment is The basic application range of the traditional SVPWM control strategy is By reducing the magnitude of the common-mode voltage corresponding to the switch state, the common-mode voltage can be reduced from the root.

[0037] Specifically, in step S1, after converting the coordinate system, the large sector where the reference voltage vector is located can be determined according to the following method:

[0038] When \(0^{\circ}\leq\theta\lt60^{\circ}\), the voltage vector is located in the first major sector;

[0039] When \(60^{\circ}\leq\theta\lt120^{\circ}\), the voltage vector is located in the second major sector;

[0040] When \(120^{\circ}\leq\theta\lt180^{\circ}\), the voltage vector is located in the third major sector;

[0041] When \(180^{\circ}\leq\theta\lt240^{\circ}\), the voltage vector is located in the fourth major sector;

[0042] When \(240^{\circ}\leq\theta\lt300^{\circ}\), the voltage vector is located in the fifth major sector;

[0043] When \(300^{\circ}\leq\theta\lt360^{\circ}\), the voltage vector is located in the sixth major sector.

[0044] Where \(\theta\) is the angle between the reference voltage vector and the g-axis.

[0045] Wherein, in each major sector, the synthetic vector can divide it into 5 minor sectors. The specific vector composition is shown by Figure 5 The first minor sector is composed of a zero vector, a first small vector and a medium vector. The second minor sector is composed of a zero vector, a first small vector and a second small vector. The third minor sector is composed of a first large vector, a first small vector and a medium vector. The fourth minor sector is composed of a first large vector, a second large vector and a medium vector. The fifth minor sector is composed of a second small vector, a second large vector and a medium vector. Through the vector synthesis rule in step S2 and the above sector composition, the voltage vector space of the T-type three-level inverter is re-planned, effectively reducing the common-mode voltage.

[0046] In this embodiment, the action time of the vector is calculated by the NTV rule and volt-second balance. The finally obtained vector action time is shown in Table 1:

[0047] Table 1 Vector action time table for different minor sectors

[0048]

[0049] Where T s represents the control cycle size, and g represents the control parameter.

[0050] Through the above vector action time, the pulse sequence of each minor sector can be obtained, as shown in Table 2:

[0051] Table 2 Pulse sequence table for each minor sector

[0052] Small sector (n) Pulse sequence 1 <![CDATA OPN - OON - OOO - PON - PNO - PON - OOO - OON - OPN > 2 <![CDATA OPN - OOO - PON - POO - PNO - POO - PON - OOO - OPN > 3 <![CDATA OPN - OON - PON - PNN - PNO - PNN - PON - OON - OPN > 4 <![CDATA OPN - PPN - PON - PNN - PNO - PNN - PON - PPN - OPN > 5 <![CDATA OPN - PPN - PON - POO - PNO - POO - PON - PPN - OPN >

[0053] Finally, a PWM signal for controlling the inverter switching tube is obtained. By controlling the conduction and disconnection of the inverter switching tube, the common-mode voltage is reduced.

[0054] To verify the suppression effect of the common-mode voltage in this embodiment, a simulation experiment is designed using Matlab. The main simulation parameters are: a DC-side power supply of 600 V, a resistor of 0.001 Ω, a capacitor of 0.0003 F, and a load of 87 Ω. The simulation diagram of the output common-mode voltage is as Figure 6 shown.

[0055] This embodiment also provides a T-type three-level modulation device for reducing the common-mode voltage, including a memory and a processor; the memory is used to store a computer program; the processor is used to implement a T-type three-level modulation method for reducing the common-mode voltage mentioned in the above embodiment when executing the computer program.

[0056] This embodiment also provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, it implements the T-type three-level modulation method for reducing the common-mode voltage mentioned in the embodiments of the present invention. Any combination of one or more computer-readable media can be used. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (non-exhaustive list) of the computer-readable storage medium include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this document, the computer-readable storage medium can be any tangible medium that contains or stores a program, which can be used by or combined with an instruction execution system, apparatus, or device.

[0057] The preferred specific embodiments of the present invention have been described in detail above. It should be understood that those of ordinary skill in the art can make many modifications and variations based on the concept of the present invention without creative labor. Therefore, all technical solutions that can be obtained by those skilled in the art in the technical field of the present invention through logical analysis, reasoning, or limited experiments based on the concept of the present invention on the basis of the prior art should be within the protection scope determined by the claims.

Claims

1. A T-type three-level modulation method for reducing common-mode voltage, characterized in that, Including the following steps: S1. Convert the three-phase space voltage vectors of the T-type three-level inverter into a 60-degree coordinate system, with each 60 degrees being a large sector; S2. Synthesize the transformed three-phase space voltage vectors into the zero vector V0 = V OOO , the first small vector the second small vector the first large vector V L1 = V PNN , the second large vector V L2 = V PPN and the middle vector Divide each large sector into several small sectors according to the above vectors. The first small sector consists of the zero vector, the first small vector, and the middle vector. The second small sector consists of the zero vector, the first small vector, and the second small vector. The third small sector consists of the first large vector, the first small vector, and the middle vector. The fourth small sector consists of the first large vector, the second large vector, and the middle vector. The fifth small sector consists of the second small vector, the second large vector, and the middle vector. Among them, the combination of P, N, and O represents the corresponding switch state of the inverter; S3. Calculate the vector action time for each small sector, and obtain a pulse sequence based on the vector action time; S4. Obtain a PWM signal based on the vector action time and the pulse sequence, and control the T-type three-level inverter according to the PWM signal.

2. A T-type three-level modulation method for reducing common-mode voltage according to claim 1, characterized in that, In step S3, the vector action time is calculated by the NTV rule and volt-second balance.

3. A T-type three-level modulation method for reducing common-mode voltage according to claim 1, characterized in that, The corresponding common-mode voltage range for the switch state is 4. A T-type three-level modulation device for reducing common-mode voltage, characterized in that, Including a memory and a processor; the memory is used to store a computer program; the processor is used to implement the following method when executing the computer program: S1. Convert the three-phase space voltage vectors of the T-type three-level inverter into a 60-degree coordinate system, with each 60 degrees being a large sector; S2. Synthesize the transformed three-phase space voltage vectors into a zero vector V0 = V OOO , the first small vector the second small vector the first large vector V L1 = V PNN , the second large vector V L2 = V PPN and the middle vector Divide each large sector into several small sectors according to the above vectors. The first small sector consists of a zero vector, the first small vector, and the middle vector. The second small sector consists of a zero vector, the first small vector, and the second small vector. The third small sector consists of the first large vector, the first small vector, and the middle vector. The fourth small sector consists of the first large vector, the second large vector, and the middle vector. The fifth small sector consists of the second small vector, the second large vector, and the middle vector, where the combination of P, N, and O represents the corresponding switch state of the inverter; S3. Calculate the vector action time for each small sector, and obtain a pulse sequence based on the vector action time; S4. Obtain a PWM signal based on the vector action time and the pulse sequence, and control the T-type three-level inverter according to the PWM signal.

5. A T-type three-level modulation device for reducing common-mode voltage according to claim 4, characterized in that, In step S3, the vector action time is calculated by the NTV rule and volt-second balance.

6. A T-type three-level modulation device for reducing common-mode voltage according to claim 4, characterized in that, The corresponding common-mode voltage range for the switch state is

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