A pin multiplexing method and system supporting different packaging forms

Abstract

The present invention discloses a pin multiplexing method and system that supports different packaging formats. The method includes the following steps: dividing the pin multiplexing of different packaging formats, independently controlling and managing the pin multiplexing of each packaging format to form a packaging format selection configuration; writing the packaging format selection configuration to a non-volatile memory, and then reading the packaging format selection configuration from the non-volatile memory to select the multiplexed pins for a specific packaging format. Without adding additional pins, the method achieves fast switching of pin multiplexing between different packaging formats, effectively multiplexing pins for chips with different packaging formats, and reducing user complexity.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuit design, and in particular to a pin multiplexing method and system supporting different packaging forms. Background Art

[0002] Since the design requirements of integrated circuits for different users may only be partially different, the same chip design can be used through different packaging forms, that is, by leading out different pin signals to meet the application requirements of different users, thereby reducing the tape-out cost. At the same time, based on miniaturization design considerations, general integrated circuits will also have pin reuse design requirements. "A chip and its pin reuse implementation method" (CN110647485A) provides a method for mapping internal functional signals to arbitrary chip pins. This method is flexible in the application of chip pins, but in the face of complex chip designs, the design complexity of the pin reuse function is increased, and at the same time brings problems in improving the performance of the chip pins and the complexity of user use.

[0003] Due to varying user needs and packaging formats, the required functional peripheral modules and the required number of peripheral modules also vary. Therefore, the mapping of functional peripherals to off-chip pins should also be different in different packaging formats. Existing challenges exist in the art: how to quickly switch between pins in different packaging formats for the same chip, minimize the number of multiplexed functional signals on the same pin, and thus reduce the negative performance impact of pin multiplexing and user complexity. Summary of the Invention

[0004] In order to solve the problems existing in the prior art, the present invention provides a pin multiplexing method and system that supports different packaging forms. Without adding additional pins, it can realize the rapid switching of pin multiplexing under different packaging forms, realize effective pin multiplexing under different packaging forms of chips, and reduce the complexity of user use.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A pin multiplexing method supporting different package forms includes the following processes:

[0007] The pin reuse of different package types is divided and each package type is individually controlled and managed to form a package type selection configuration;

[0008] The package selection configuration is written into the non-volatile memory, and the package selection configuration in the non-volatile memory is read to select the multiplexed pins under the specific package.

[0009] Preferably, the method specifically includes the following steps:

[0010] Step 1: Divide the pin reuse of different package types, and perform pin reuse control and management for each package type separately to form a package type selection configuration;

[0011] Step 2: Write the package selection configuration into the non-volatile memory;

[0012] Step 3: The off-chip reset is used as an input to the non-volatile memory controller. When the off-chip reset is valid, the non-volatile memory controller reads the package selection configuration in the non-volatile memory and sends the package selection configuration value to the package selection configuration control management logic module. At the same time, the generated read completion indication is sent to the clock reset management module.

[0013] Step 4: The clock reset management module outputs clock and reset signals for the processor, several functional peripherals, and the pin multiplexing configuration module; the clock reset management module outputs the clock signal of the non-volatile memory controller and connects to the non-volatile memory controller;

[0014] Step 5, the pin multiplexing configuration module outputs the pin reset configuration as the input of the pin multiplexing control logic module. The pin multiplexing control logic module outputs the output pin after multiplexing of pins of different package forms as the input of the package form selection configuration control management module. The package form selection configuration control management module outputs the off-chip pin based on the package form selection configuration.

[0015] Furthermore, in step 2, the package selection configuration is written into the non-volatile memory before the circuit leaves the factory.

[0016] Furthermore, the module enable, clock enable, and power enable are controlled and managed by selecting the configuration according to the package form.

[0017] A pin multiplexing system supporting different packaging forms includes a non-volatile memory controller and a clock reset management module;

[0018] The non-volatile memory controller has a package selection configuration written therein. The package selection configuration is configured to divide the pin multiplexing of different package types, perform pin multiplexing control and management for each package type separately, and then select the multiplexed pins under the specific package type through the package selection configuration;

[0019] The clock reset management module is connected to the processor, the pin multiplexing configuration module, the non-volatile memory controller and several functional peripherals; the clock reset management module, the processor, the pin multiplexing configuration module, the non-volatile memory controller and several functional peripherals are interconnected with the system bus;

[0020] The pin multiplexing configuration module is connected to the pin multiplexing control logic module, the pin multiplexing control logic module is connected to the package selection configuration control management module, and the package selection configuration control management module outputs the off-chip pins based on the package selection configuration.

[0021] Preferably, when there are three package types, package type 1 has a function 1 pin, a function 2 pin, a function 3 pin, and a function 4 pin, the function 1 pin, the function 2 pin, the function 3 pin, and the function 4 pin are all connected to the input end of the 4-to-1 selector mux1, the selection end of the 4-to-1 selector mux1 is connected to the pin multiplexing configuration, and the output end of the 4-to-1 selector mux1 is connected to an input end of the 3-to-1 selector mux4;

[0022] Package type 2 has function 1 pin, function 2 pin, function 5 pin and function 6 pin. Function 1 pin, function 2 pin, function 5 pin and function 6 pin are connected to the input end of 4-to-1 selector mux2. The selection end of 4-to-1 selector mux2 is connected to the pin multiplexing configuration. The output end of 4-to-1 selector mux2 is connected to one input end of 3-to-1 selector mux4.

[0023] Package type 3 has function pins 5, 6, 7, and 8. Function pins 5, 6, 7, and 8 are connected to the input of 4-to-1 selector mux3. The selection end of 4-to-1 selector mux3 is connected to the pin multiplexing configuration. The output end of 4-to-1 selector mux3 is connected to an input end of 3-to-1 selector mux4.

[0024] The selection end of the 3-to-1 selector mux4 is connected to the package selection configuration, and the output end of the 3-to-1 selector mux4 is connected to the off-chip pin.

[0025] Preferably, the package selection configuration includes performing different control management on module enable, clock enable, and power enable of the functional peripheral module under different package forms.

[0026] Preferably, the non-volatile storage is an on-chip FLASH or EEPROM.

[0027] Preferably, the non-volatile memory controller, the clock reset management module, the processor, several functional peripherals, and the pin multiplexing configuration module are all interconnected with the system bus through a bus interface.

[0028] Compared with the prior art, the present invention has the following beneficial technical effects:

[0029] The present invention provides a pin multiplexing method supporting different packaging forms. By dividing the pin multiplexing functions of different packaging forms, the design is simplified, and effective pin multiplexing of a chip under different packaging forms is achieved, thereby reducing the complexity of user use. The method uses non-volatile storage bodies such as on-chip FLASH and EEPROM to select and configure the packaging form without increasing pins or additional configuration of user applications. At the same time, low-power control management of functional peripheral module enablement, clock, power supply, etc. can be performed based on the packaging form selection configuration.

[0030] The present invention provides a pin reuse system that supports pin reuse across different package types. This system simplifies the design of pin reuse based on a specific package type, reducing user complexity. This design does not increase pin count or require additional configuration for user applications. Furthermore, it enables low-power control management of functional peripheral module enable, clock, power supply, and other functions based on package type selection, providing a new solution for low-power control management. This implementation method is clear, the control logic is highly versatile, scalable, and flexible. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is a general pin multiplexing diagram;

[0032] Figure 2 This is a diagram of pin reuse based on package selection configuration;

[0033] Figure 3 A schematic diagram of a configuration system structure for selecting a packaging form based on a non-volatile memory body;

[0034] Figure 4 Additional control diagrams for selecting configurations based on package type. DETAILED DESCRIPTION

[0035] The present invention will be further described in detail below with reference to specific embodiments, which are intended to explain the present invention rather than to limit it.

[0036] The present invention provides a pin multiplexing method supporting different packaging forms. The number of designed circuit packaging forms is at least 2, and the number of pin multiplexing under each packaging form is at least 1. The method specifically includes the following steps:

[0037] Step 1: Divide the pin reuse of different package types, perform pin reuse control and management for each package type separately, and then select the reused pins under the specific package type through the package type selection configuration;

[0038] Step 2: Using a non-volatile memory, the package selection configuration is written into the non-volatile memory before the circuit leaves the factory;

[0039] Step 3: The off-chip reset is used as an input to the non-volatile memory controller. When the off-chip reset is valid, the controller reads the package selection configuration in the non-volatile memory and sends the package selection configuration value to the package selection configuration control management logic module. At the same time, the generated read completion indication is sent to the clock reset management module.

[0040] Step 4: The clock reset management module outputs clock and reset signals for the processor, functional peripheral 1, functional peripheral 2, ..., functional peripheral N, and the pin multiplexing configuration module, and is connected to the processor, functional peripheral 1, functional peripheral 2, ..., functional peripheral N, and the pin multiplexing configuration module, and outputs the clock signal of the non-volatile memory controller and is connected to the non-volatile memory controller;

[0041] Step 5: The non-volatile memory controller, the clock reset management module, the processor, the functional peripheral 1, the functional peripheral 2, ..., the functional peripheral N, and the pin multiplexing configuration module are all interconnected with the system bus through the bus interface;

[0042] Step 6: The pin multiplexing configuration module outputs the pin reset configuration as the input of the pin multiplexing control logic module. The pin multiplexing control logic module outputs the output pin after multiplexing of the pins of different package types as the input of the package type selection configuration control management module. The package type selection configuration control management module outputs the off-chip pin based on the package type selection configuration.

[0043] In step 7, you can select the configuration by package type to control and manage module enable, clock enable, power enable, etc.

[0044] The present invention provides a pin multiplexing method supporting different packaging forms. By dividing the pin multiplexing functions of different packaging forms, the design is simplified, and effective pin multiplexing of the chip under different packaging forms is achieved, thereby reducing the complexity of user use. The method and structure for selecting and configuring the packaging form through non-volatile storage bodies such as on-chip FLASH and EEPROM do not increase pins or additional configuration of user applications. At the same time, low-power control management of functional peripheral module enablement, clock, power supply, etc. can be performed based on the packaging form selection configuration.

[0045] The present invention provides a pin reuse method that supports pin reuse across different package types. This method simplifies the pin reuse design based on a specific package type, reducing user complexity. This design does not increase pin count or require additional configuration for user applications. Furthermore, low-power control management can be performed on functional peripheral module enable, clock, power supply, and other functions based on package type selection, providing a new solution for low-power control management. This method is clear, has highly versatile control logic, good scalability, and high application flexibility.

[0046] Example

[0047] like Figure 1 and Figure 2 The figure shows a schematic diagram of pin reuse based on three package types. For one off-chip pin, package type 1 has four reuse situations: function 1, function 2, function 3, and function 4; package type 2 has four reuse situations: function 1, function 2, function 5, and function 6; package type 3 has four reuse situations: function 5, function 6, function 7, and function 8.

[0048] Figure 1 The following is a general pin multiplexing diagram. Based on various package types, functional pin multiplexing is directly accumulated. In this example, the off-chip pins have eight function multiplexing situations, from function 1 to function 8. The selection end of the 8-to-1 multiplexer mux0 is connected to the pin multiplexing configuration [2:0]. The eight input ends are connected to the function 1 pin, function 2 pin, ..., function 8 pin, and the output end is connected to the off-chip pin.

[0049] Figure 2 This is a schematic diagram of the pin multiplexing based on the package selection configuration proposed in the present invention. The selection end of the 4-to-1 selector mux1 is connected to the pin multiplexing configuration [1:0], the input end is respectively connected to the function 1 pin, the function 2 pin, the function 3 pin, and the function 4 pin, and the output end is connected to one input end of the 3-to-1 selector mux4. The selection end of the 4-to-1 selector mux2 is connected to the pin multiplexing configuration [1:0], the input end is respectively connected to the function 1 pin, the function 2 pin, the function 5 pin, and the function 6 pin, and the output end is connected to the second input end of the 3-to-1 selector mux4. The selection end of the 4-to-1 selector mux3 is connected to the pin multiplexing configuration [1:0], the input end is respectively connected to the function 5 pin, the function 6 pin, the function 7 pin, and the function 8 pin, and the output end is connected to the third input end of the 3-to-1 selector mux4. The selection end of the 3-to-1 selector mux4 is connected to the package selection configuration [1:0], and the output is connected to an off-chip pin.

[0050] Figure 2 Will Figure 1 The eight different pin multiplexing schemes are reduced to four different pin multiplexing schemes. The above is merely an example. In the present invention, the number of package types is at least two, and the number of pin multiplexing schemes under each package type is at least one. The present invention divides the pin multiplexing schemes of different package types, performs independent pin multiplexing control and management for each package type, and then selects the multiplexing pins under a specific package type through package type selection configuration. All of these schemes are protected by the present invention. This method is targeted at circuits with complex pin multiplexing situations, not only simplifies the design of the pin multiplexing module, but also reduces the complexity of the pin multiplexing configuration for specific user applications.

[0051] like Figure 3As shown, the present invention provides a pin multiplexing system architecture that supports different package types. This architecture utilizes non-volatile memory. The package type selection configuration is written to the non-volatile memory before the circuit leaves the factory. An off-chip reset is used as an input to the non-volatile memory controller. When the off-chip reset is active, the controller reads the package type selection configuration from the non-volatile memory and sends the package type selection configuration value to the package type selection configuration control management logic module. Simultaneously, a read completion indication is sent to the clock reset management module. The clock reset management module outputs clock and reset signals for the processor, functional peripherals 1, 2, ..., N, and the pin multiplexing configuration module. The module is connected to the processor, functional peripherals 1, 2, ..., N, and the pin multiplexing configuration module, and outputs a clock signal from the non-volatile memory controller, which is then connected to the non-volatile memory controller. The non-volatile memory controller, clock reset management module, processor, functional peripherals 1, 2, ..., N, and the pin multiplexing configuration module are all interconnected to the system bus via a bus interface. The pin multiplexing configuration module outputs the pin reset configuration as the input of the pin multiplexing control logic module. The pin multiplexing control logic module outputs the output pin after multiplexing of pins of different package forms as the input of the package form selection configuration control management module. The package form selection configuration control management module outputs the off-chip pin based on the package form selection configuration.

[0052] The system structure does not require the addition of external circuit pins, and does not require the addition of user program configuration management for package selection. The package selection configuration management may be invisible to the user, and the user may directly configure the pin reuse according to the package form of the specific circuit.

[0053] Other control management can be performed based on the configuration selected based on the package form. Figure 4A schematic diagram shows module control management through package selection configuration. In this example, module A does not exist in package 1, but exists in package 2 / 3. The selector terminal of the 2-to-1 selector mux5 is connected to the package selection configuration [1:0]. In package 1, the input terminal is '0'. In package 2 / 3, the input is the module A enable configuration, and the output is module A enable. The selector terminal of the 2-to-1 selector mux6 is connected to the package selection configuration [1:0]. In package 1, the input terminal is '0'. In package 2 / 3, the input is the module A clock enable configuration, and the output is module A clock enable. The selector terminal of the 2-to-1 selector mux7 is connected to the package selection configuration [1:0]. In package 1, the input terminal is '0'. In package 2 / 3, the input is the module A power enable configuration, and the output is module A power enable. Therefore, when the package type is 1, module A is disabled, the clock is disabled, and the power is disabled, and cannot be configured. In other words, module A is always in low-power mode such as reset or power-down. When the package type is 2 / 3, module A is enabled, the clock is enabled, and the power is enabled normally. The above is just an example. The module enable, clock enable, power enable, etc. can be controlled and managed by selecting the configuration according to the package type.

[0054] The pin multiplexing method and system architecture of the present invention have been applied to a general-purpose 32-bit MCU and support three different package formats. The design implementation method is clear, easy to expand, and highly flexible, and is applicable to MCU, SoC, and ASIC designs.

Claims

1. A pin multiplexing method supporting different packaging forms, characterized in that: Including the following process, The pin reuse of different package types is divided and each package type is individually controlled and managed to form a package type selection configuration; Writing the package selection configuration to the non-volatile memory, reading the package selection configuration from the non-volatile memory, and selecting the multiplexed pins under a specific package according to the package selection configuration; The pin multiplexing method specifically includes the following steps: Step 1: Divide the pin reuse of different package types, and perform pin reuse control and management for each package type separately to form a package type selection configuration; Step 2: Write the package selection configuration into the non-volatile memory; Step 3: The off-chip reset is used as an input to the non-volatile memory controller. When the off-chip reset is valid, the non-volatile memory controller reads the package selection configuration in the non-volatile memory and sends the package selection configuration value to the package selection configuration control management logic module. At the same time, the generated read completion indication is sent to the clock reset management module. Step 4: The clock reset management module outputs clock and reset signals for the processor, several functional peripherals, and the pin multiplexing configuration module; The clock reset management module outputs the clock signal of the non-volatile memory controller and is connected to the non-volatile memory controller; Step 5, the pin multiplexing configuration module outputs the pin reset configuration as the input of the pin multiplexing control logic module. The pin multiplexing control logic module outputs the output pin after multiplexing of pins of different package forms as the input of the package form selection configuration control management module. The package form selection configuration control management module outputs the off-chip pin based on the package form selection configuration.

2. A pin multiplexing method supporting different packaging forms according to claim 1, characterized in that: In step 2, the package selection configuration is written into the non-volatile memory before the circuit is shipped.

3. The pin multiplexing method supporting different packaging forms according to claim 1, characterized in that: The module enable, clock enable, and power enable are controlled and managed by selecting the configuration through the package form.

4. A pin multiplexing system supporting different packaging forms, characterized in that: Including non-volatile memory controller and clock reset management module; The non-volatile memory controller has a package selection configuration written therein. The package selection configuration is configured to divide the pin multiplexing of different package types, perform pin multiplexing control and management for each package type separately, and then select the multiplexed pins under the specific package type through the package selection configuration; The clock reset management module is connected to the processor, the pin multiplexing configuration module, the non-volatile memory controller and several functional peripherals; the clock reset management module, the processor, the pin multiplexing configuration module, the non-volatile memory controller and several functional peripherals are interconnected with the system bus; The pin multiplexing configuration module is connected to the pin multiplexing control logic module, the pin multiplexing control logic module is connected to the package selection configuration control management module, and the package selection configuration control management module outputs the off-chip pins based on the package selection configuration.

5. The pin multiplexing system structure supporting different packaging forms according to claim 4, characterized in that: When there are three package types, package type 1 has function 1 pin, function 2 pin, function 3 pin, and function 4 pin. Function 1 pin, function 2 pin, function 3 pin, and function 4 pin are all connected to the input end of 4-to-1 selector mux1. The selection end of 4-to-1 selector mux1 is connected to the pin multiplexing configuration. The output end of 4-to-1 selector mux1 is connected to an input end of 3-to-1 selector mux4. Package type 2 has function 1 pin, function 2 pin, function 5 pin and function 6 pin. Function 1 pin, function 2 pin, function 5 pin and function 6 pin are connected to the input end of 4-to-1 selector mux2. The selection end of 4-to-1 selector mux2 is connected to the pin multiplexing configuration. The output end of 4-to-1 selector mux2 is connected to one input end of 3-to-1 selector mux4. Package type 3 has function pins 5, 6, 7, and 8. Function pins 5, 6, 7, and 8 are connected to the input of 4-to-1 selector mux3. The selection end of 4-to-1 selector mux3 is connected to the pin multiplexing configuration. The output end of 4-to-1 selector mux3 is connected to an input end of 3-to-1 selector mux4. The selection end of the 3-to-1 selector mux4 is connected to the package selection configuration, and the output end of the 3-to-1 selector mux4 is connected to the off-chip pin.

6. The pin multiplexing system structure supporting different packaging forms according to claim 4, characterized in that: The package selection configuration includes different control management of module enable, clock enable, and power enable of the functional peripheral module under different package forms.

7. The pin multiplexing system structure supporting different packaging forms according to claim 4, characterized in that: The non-volatile storage body is an on-chip FLASH or EEPROM.

8. The pin multiplexing system structure supporting different packaging forms according to claim 4, characterized in that: The non-volatile memory controller, the clock reset management module, the processor, several functional peripherals, and the pin multiplexing configuration module are all interconnected with the system bus through the bus interface.

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