Circuit board, chip-on-film, display device and binding method

By designing a plurality of first pins and first alignment marking groups on the circuit board and performing buckle alignment with the second alignment marking group of the crystal-covered film, the problems of space waste and alignment inspection in the prior art are solved, and more efficient space utilization and better binding quality are achieved.

CN115633548BActive Publication Date: 2025-03-07BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202180001129.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-05-13
Publication Date
2025-03-07
Estimated Expiration
2041-05-13

AI Technical Summary

Technical Problem

In the existing display devices, the binding design of the overlying film and circuit board is problematic of wasting space and difficulty in checking the alignment.

Method used

A circuit board is designed, and its binding region includes a plurality of first pins and a first alignment mark group. By matching the second alignment mark group of the crystal-covered film through the snap-type alignment, the pins are bound and bonded.

Benefits of technology

Effectively saves the space of the circuit board, reduces the width and cost of the circuit board, and improves the success rate of binding alignment and the convenience of quality inspection.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a circuit board, a chip-on-film, a display device, and a binding method. The circuit board has a plurality of binding areas for binding with the chip-on-film, wherein the binding areas include: a plurality of first pins, the plurality of first pins extending along a first direction and arranged in sequence along a second direction; at least one first alignment mark group, the first alignment mark group being located on the arrangement path of the first pins and configured to be aligned with the second alignment mark group of the chip-on-film by snap-type alignment, so that the first pins are bound and fitted one by one with the second pins of the chip-on-film.
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Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a circuit board, a chip-on-film, a display device, and a binding method. Background Art

[0002] In a display device, one end of a chip on film (COF) is connected to a printed circuit board (PCB) and is responsible for receiving data signals transmitted from the PCB. The other end is connected to a display panel (Panel) and is used to transmit data signals output by the IC to the Panel and drive the Panel for display. Summary of the invention

[0003] The present disclosure provides a circuit board, a chip-on-film, a display device and a binding method. The circuit board has a plurality of binding areas for binding with the chip-on-film, wherein the binding areas include:

[0004] A plurality of first pins, wherein the plurality of first pins extend along a first direction and are sequentially arranged along a second direction;

[0005] At least one first alignment mark group, the first alignment mark group is located on the arrangement path of the first pin, and is configured to be snap-aligned with the second alignment mark group of the chip-on-film to bind and fit the first pin with the second pin of the chip-on-film one by one.

[0006] In a possible implementation, the first alignment mark group includes a card block and a card strip group respectively located on both sides of the card block along the first direction, the card strip group includes at least one first card strip, and the first card strip extends along the first direction.

[0007] In a possible implementation manner, the circuit board includes two first alignment mark groups, and the two first alignment mark groups are respectively located at two edge areas of the binding area in the second direction.

[0008] In a possible implementation manner, the card block has a first symmetry axis parallel to the second direction and passing through the center of the card block; and the first card strips on both sides of the card block are symmetrically distributed one by one about the first symmetry axis.

[0009] In a possible implementation manner, the clamping block has a second symmetry axis which is parallel to the first direction and passes through the center of the clamping block; and the first clamping strips of the same clamping strip group are symmetrically distributed about the second symmetry axis.

[0010] In a possible implementation, in the same card strip group, ends of each first card strip away from the card block are substantially flush; in the same card strip group, ends of each first card strip facing the card block are substantially flush.

[0011] In a possible implementation manner, in the same clamping strip group, an end of the first clamping strip away from the clamping block is substantially flush with an end of the first pin.

[0012] In a possible implementation, the card strip group includes two first card strips; in the same card strip group, an outer edge extension line of one of the first card strips is away from another first card strip and parallel to the first direction, and roughly coincides with an outer edge extension line of the card block parallel to the first direction.

[0013] In a possible implementation, in the same card strip group, the lengths of the first card strips along the first direction are substantially the same; in the same card strip group, the lengths of the first card strips along the second direction are substantially the same.

[0014] In a possible implementation manner, a length of the clamping block in the first direction is substantially the same as a length of the first clamping strip in the first direction.

[0015] In a possible implementation manner, the length of the card block in the first direction is one fifth to one third of the length of the first pin in the first direction.

[0016] In a possible embodiment, the circuit board also includes an extension area located on both sides of the binding area, and the extension area includes: a plurality of floating pins extending along the first direction and arranged in sequence along the second direction, and at least one auxiliary marking group located on the floating pin arrangement path.

[0017] In a possible implementation, the display device includes two auxiliary mark groups, which are respectively located on both sides of the binding area; the auxiliary mark groups are reused as glue-coated mark groups, and conductive glue is coated between the two auxiliary mark groups.

[0018] In a possible implementation, each of the auxiliary mark groups includes two rectangular auxiliary mark blocks arranged along the first direction.

[0019] In a possible implementation, the length of each auxiliary marking block in the first direction is one-fifth to one-third of the length of the first pin in the first direction; the width of each auxiliary marking block in the second direction is greater than the width of the first pin in the second direction.

[0020] In a possible implementation manner, the number of the floating pins between each of the auxiliary marking groups and the binding area is 8-12.

[0021] The present disclosure also provides a chip-on-film, which includes:

[0022] A plurality of second pins, wherein the plurality of second pins extend along the first direction and are arranged in sequence along the second direction;

[0023] At least one second alignment mark group, wherein the second alignment mark group is located on an arrangement path of the second pins.

[0024] In a possible implementation manner, the second alignment mark group includes two second clamping strips extending along the second direction, and one end of each of the second clamping strips is connected to the same second pin.

[0025] In a possible implementation, the chip on film includes two second alignment mark groups, and the two second alignment mark groups are respectively located at two edge regions of the chip on film in the second direction.

[0026] In a possible implementation manner, the second clamping strip is connected to the second pin at the edge of the chip-on-film, and the second pin and the second clamping strip form a notch with an opening, and the opening of the notch faces the side of the chip-on-film.

[0027] In a possible implementation manner, the other end of the second clip is substantially flush with the edge of the chip-on-film.

[0028] In a possible implementation manner, the second alignment mark group includes two second card strips.

[0029] In a possible implementation manner, a width of the second clip strip in the first direction is substantially the same as a width of the second pin in the second direction.

[0030] The present disclosure also provides a display device, which includes the circuit board provided in the present disclosure and the chip-on-chip film provided in the present disclosure, wherein the first alignment mark group of the circuit board and the second alignment mark group of the chip-on-chip film are aligned by snapping so that the first pin of the circuit board and the second pin of the chip-on-chip film are bound and fitted one by one.

[0031] In a possible implementation, the first alignment mark group includes a card block, and a card strip group respectively located on both sides of the card block along the first direction, the card strip group includes at least one first card strip, and the first card strip extends along the first direction;

[0032] The second alignment mark group includes two second clamping strips extending along the second direction, and one end of each second clamping strip is connected to the same second pin;

[0033] When the first alignment mark group and the second alignment mark group are aligned in a buckle-type manner, the card block is located between adjacent second card strips, and each second card strip is located between the card block and the first card strip.

[0034] In a possible implementation manner, the length of the second card strip in the second direction is greater than the length of the card block in the second direction;

[0035] The spacing between the two second clamping strips in the first direction is greater than the length of the clamping block in the first direction.

[0036] In a possible implementation manner, a width of a gap between the first clamping strip and the clamping block in the first direction is greater than a width of the second clamping strip in the first direction.

[0037] In a possible implementation manner, every N adjacent chip-on-films are bound to the same circuit board, where N is a positive integer greater than 0.

[0038] In a possible implementation, the display device further includes a display panel and a flexible circuit board; the display panel is connected to one end of the COF; and adjacent circuit boards are connected via the flexible circuit board.

[0039] The embodiment of the present disclosure further provides a binding method for the display device provided by the embodiment of the present disclosure, wherein the binding method includes:

[0040] Providing the circuit board provided by the embodiment of the present disclosure;

[0041] Providing the chip-on-film as provided in the embodiment of the present disclosure;

[0042] The first alignment mark group of the circuit board and the second alignment mark group of the chip-on-film are aligned in a buckle manner, so that the first pins of the circuit board and the second pins of the chip-on-film are bound and fitted one by one.

[0043] In a possible implementation, the circuit board further includes two auxiliary mark groups; before the first alignment mark group of the circuit board is buckled with the second alignment mark group of the chip-on-film, the binding method further includes: coating conductive glue on the extension area and the binding area between the two auxiliary mark groups;

[0044] After the first alignment mark group of the circuit board and the second alignment mark group of the chip-on-film are aligned in a snap-type manner, the binding method further includes: laminating the circuit board and the chip-on-film. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1It is a schematic diagram of the structure of a traditional circuit board and a chip-on-film;

[0046] Figure 2 A schematic diagram of binding a circuit board and a chip-on-film provided in an embodiment of the present disclosure;

[0047] Figure 3 One of the circuit board schematic diagrams provided in the embodiment of the present disclosure;

[0048] Figure 4 One of the schematic diagrams of the chip-on-film provided in the embodiment of the present disclosure;

[0049] Figure 5 One of the schematic diagrams of a circuit board and a chip-on-film being bound together according to an embodiment of the present disclosure;

[0050] Figure 6 The second schematic diagram of the circuit board and the chip-on-film after being bound together according to the embodiment of the present disclosure;

[0051] Figure 7 A second schematic diagram of a circuit board provided in an embodiment of the present disclosure;

[0052] Figure 8 A schematic diagram of a display device provided in an embodiment of the present disclosure;

[0053] Fig. 9 One of the binding flow charts of a display device provided in an embodiment of the present disclosure;

[0054] Fig.10 This is a second binding flowchart of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0056] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0057] In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of well-known functions and well-known components.

[0058] Binding design of traditional display device Figure 1 As shown, during bonding, the alignment mark on the chip on film (COF) is aligned with the alignment mark on the printed circuit board (PCB) to complete the bonding process between the circuit board and the chip on film. The circular alignment mark on the circuit board is located at the edge of the circuit board. The larger width (2.3mm) of the edge of the circuit board is only used to store the alignment mark, and wiring or parts cannot be arranged, which wastes a lot of space. The board width of the circuit board is at least 15mm; moreover, the shape and size of the mark on the chip on film are the same as those of the mark on the circuit board. With this design, the alignment mark is covered after bonding, which is not convenient for checking the alignment during alignment, nor for checking the bonding quality after bonding.

[0059] In view of this, the present disclosure provides a circuit board 1, see Figure 2-Figure 5 As shown, Figure 2 Schematic diagram of the binding relationship between the circuit board 1 and the chip-on-film 2. Figure 3 is an enlarged schematic diagram of the circuit board 1, Figure 4 is an enlarged schematic diagram of the chip-on-film 2, Figure 5 FIG. 1 is an enlarged schematic diagram of the circuit board 1 and the chip-on-film 2 after alignment. The circuit board 1 has a plurality of binding areas S1 for binding with the chip-on-film 2, wherein the binding area S1 includes:

[0060] A plurality of first pins 11, wherein the plurality of first pins 11 extend along a first direction AB and are sequentially arranged along a second direction CD;

[0061] At least one first alignment mark group 12 is located on the arrangement path of the first pins 11 and is configured to be snap-aligned with the second alignment mark group 22 of the chip-on-film 2 so that the first pins 11 and the second pins 21 of the chip-on-film 2 are bound and fitted one by one.

[0062] In the disclosed embodiment, the circuit board has a plurality of first pins and at least one first alignment mark group. The first alignment mark group is located on the arrangement path of the first pins. Compared with setting the first alignment mark group in an area outside the first pins, it can save space on the circuit board, better utilize the circuit board space, reduce the width of the circuit board, and reduce the cost of the circuit board. In addition, the first alignment mark group and the second alignment mark group of the chip-on-film are designed to use a buckle design, and the projections do not overlap, which is convenient for observing the alignment status at any time, and can increase the success rate of binding alignment and post-alignment inspection.

[0063] In one possible implementation, combining Figure 3 or Figure 5 As shown, the first alignment mark group 12 includes a block 121, and a bar group 122 respectively located on both sides of the block 121 along the first direction AB, and the bar group 122 includes at least one first bar 1221, and the first bar 1221 extends along the first direction AB. In the disclosed embodiment, the first alignment mark group 12 includes a block 121, and a bar group 122 respectively located on both sides of the block 121 along the first direction AB. When the first alignment mark group 12 is aligned with the second alignment mark group 22 of the chip-on-film, the projections of the first alignment mark group 12 and the second alignment mark group 22 do not overlap with each other, so as to facilitate the verification of the bonding effect.

[0064] In a possible implementation manner, the card block 121 may be rectangular in shape, and the first card strip 1221 may be bar-shaped; the first card strips 1221 of the same first alignment mark group 12 may have the same shape and size.

[0065] In a specific implementation, the circuit board 1 may be a structure with a certain degree of transparency. When the chip-on-film is attached to the circuit board, the alignment of the first alignment mark group 12 and the second alignment mark group 22 can be observed through the circuit board 1 .

[0066] In one possible implementation, combining Figure 3 and Figure 5 As shown, the circuit board 1 includes two first alignment mark groups 12, and the two first alignment mark groups 12 are respectively located at two edge areas of the binding area S1 in the second direction CD. Figure 3As shown, one of the first alignment mark groups 12 is located at the left edge of the binding area S1, and the other first alignment mark group 12 is located at the right edge of the binding area S1. In the disclosed embodiment, the two first alignment mark groups 12 are respectively located at two edge areas of the binding area S1 in the second direction CD, which can have a better binding effect while making less structural changes to the circuit board 1.

[0067] In a possible implementation, the shapes, sizes and quantities of the card blocks 121 included in the two first alignment mark groups 12 may be the same, and the quantities, shapes and distribution positions of the first card strips 1221 included in the two first alignment mark groups 12 may be the same.

[0068] In one possible implementation, see Figure 6 As shown, Figure 6 is an enlarged schematic diagram of the binding area S1 , the block 121 has a first symmetry axis EF parallel to the second direction CD and passing through the center of the block 121 ; the first clamping strips 1221 on both sides of the block 121 are symmetrically distributed about the first symmetry axis EF.

[0069] In one possible implementation, see Figure 6 As shown, the block 121 has a second symmetry axis GH parallel to the first direction AB and passing through the center of the block 121; the first clamping strips 1221 of the same clamping strip group 12 are symmetrically distributed about the second symmetry axis GH. Specifically, for example, Figure 6 In the figure, the two first clip strips 1221 in the upper clip strip group 12 are symmetrically distributed about the second symmetry axis GH.

[0070] In one possible implementation, combining Figure 3 , Figure 5 and Figure 6 As shown, in the same card strip group 12, the ends of each first card strip 1221 away from the card block 121 are substantially flush. For example, specifically, Figure 3 As shown, the upper ends of the first card strips 1221 above the card block 121 are roughly flush, and the lower ends of the first card strips 1221 below the card block 121 are roughly flush; in the same card strip group 12, the ends of the first card strips 1221 facing the card block 121 are roughly flush. For example, specifically, Figure 3 As shown, the lower ends of the first clamping strips 1221 above the clamping block 121 are substantially flush with each other, and the upper ends of the first clamping strips 1221 below the clamping block 121 are substantially flush with each other.

[0071] In one possible implementation, combining Figure 3 , Figure 5 and Figure 6As shown, in the same card strip group 12, the end of the first card strip 1221 away from the card block 121 is substantially flush with the end of the first pin 11. For example, specifically, Figure 3 As shown, the upper end of the first clamping strip 1221 above the clamping block 121 is substantially flush with the upper end of the first pin 11 , and the lower end of the first clamping strip 1221 below the clamping block 121 is substantially flush with the lower end of the first pin 11 .

[0072] In one possible implementation, combining Figure 3 , Figure 5 and Figure 6 As shown, the card strip group 12 includes two first card strips 1221; in the same card strip group 12, one of the first card strips 1221 is far away from the other first card strip 1221 and is parallel to the outer edge extension line of the first direction AB, and roughly coincides with the outer edge extension line of the card block 121 parallel to the first direction AB. Figure 6 In the left side card strip group 12, the extension line X1X2 of the left edge of the left first card strip 1221 roughly coincides with the extension line Y1Y2 of the left edge of the card block 121, and the extension line X1X3 of the right edge of the right first card strip 1221 roughly coincides with the extension line Y1Y3 of the right edge of the card block 121.

[0073] In one possible implementation, combining Figure 6 As shown, in the same card strip group 12, the length h1 of each first card strip 1221 along the first direction AB is substantially the same; in the same card strip group 12, the length h2 of each first card strip 1221 along the second direction CD is substantially the same. Specifically, the length h1 of each first card strip 1221 along the first direction AB can be 0.5 mm to 0.7 mm, specifically, 0.6 mm. Specifically, the length h2 of each first card strip 1221 along the second direction CD can be 0.1 mm to 0.3 mm, specifically, 0.2 mm.

[0074] In one possible implementation, combining Figure 6 As shown, the length h3 of the clamping block 121 in the first direction AB is substantially the same as the length h1 of the first clamping strip 1221 in the first direction AB.

[0075] In one possible implementation, combining Figure 6 As shown, the length h3 of the block 121 in the first direction AB is one fifth to one third of the length h4 of the first pin 11 in the first direction AB. Specifically, the length h4 of the first pin 11 in the first direction AB may be 2.5 mm to 2.7 mm, and specifically, may be 2.6 mm.

[0076] In one possible implementation, see Figure 7As shown, the circuit board 1 also includes an extension area S2 located on both sides of the binding area S1, and the extension area S2 includes: a plurality of floating pins 13 extending along the first direction AB and arranged in sequence along the second direction CD, and at least one auxiliary mark group 14 located on the arrangement path of the floating pins 13. In the disclosed embodiment, the circuit board 1 also includes the extension area S2, and the floating pins 13 located in the extension area S2, which are helpful for heat dissipation of the circuit board 1; in addition, the auxiliary mark group 14 is provided on the arrangement path of the floating pins 13, and the alignment is further checked by observing whether the side edge of the auxiliary mark group 14 is parallel to the side edge of the chip-on-film 2, which plays a more intuitive alignment inspection role, assists alignment before and after bonding, and after bonding, the bonding effect is checked from the outside.

[0077] In one possible implementation, combining Figure 7 As shown, the display device includes two auxiliary marking groups 14, and the two auxiliary marking groups 14 are respectively located on both sides of the binding area S1. Specifically, for example, Figure 7 As shown, one auxiliary mark group 14 is located on the left side of the binding area S1, and the other auxiliary mark group 14 is located on the right side of the binding area S1; the auxiliary mark group 14 is reused as a glue coating mark group, and conductive glue is coated between the two auxiliary mark groups 14. The auxiliary mark group 14 is used as an external auxiliary alignment point of the binding area S1, and the position is set in the extension area S2 area close to the binding area S1, for example, after the 10th second pin 21, which can be used as a reference position when coating glue. The coating of glue cannot exceed the auxiliary mark group 14, which can play a role in calibrating the glue coating position and make the glue coating more accurate.

[0078] In one possible implementation, combining Figure 7 As shown, each auxiliary mark group 14 includes two rectangular auxiliary mark blocks 141 arranged along the first direction AB.

[0079] In one possible implementation, combining Figure 6 and Figure 7 As shown, the length h6 of each auxiliary marking block 141 in the first direction AB is one fifth to one third of the length h4 of the first pin 11 in the first direction AB; the width h7 of each auxiliary marking block 141 in the second direction CD is greater than the width h5 of the first pin 11 in the second direction CD.

[0080] In a possible implementation manner, the number of floating pins 13 between each auxiliary mark group 14 and the binding area S1 may be 8-12.

[0081] The present disclosure also provides a chip-on-chip film 2, combined with Figure 4 , Figure 5 and Figure 6 As shown, the chip-on-film 2 includes:

[0082] A plurality of second pins 21, wherein the plurality of second pins 21 extend along the first direction AB and are sequentially arranged along the second direction CD;

[0083] At least one second alignment mark group 22 , where the second alignment mark group 22 is located on the arrangement path of the second pins 21 .

[0084] The chip cover film 2 in the embodiment of the present disclosure, the second alignment mark group 22 is located on the arrangement path of the second pin 21, corresponding to the circuit board provided in the embodiment of the present disclosure, and when it is bonded with the circuit board, it can save the space of the circuit board, better utilize the circuit board space, reduce the width of the circuit board, and reduce the cost of the circuit board.

[0085] In a possible implementation, the number of first pins 11 in the binding area S1 can be 100 to 120, specifically 110, which is a large number. The width h5 of each first pin 11 parallel to the second direction CD is approximately 0.2 mm, and the fitting accuracy requirement is relatively high. The first alignment mark group 12 and the second alignment mark group 22 provided in the embodiment of the present disclosure can achieve high-precision fitting.

[0086] In one possible implementation, combining Figure 4 As shown, the second alignment mark group 22 includes two second clips 221 extending along the second direction CD, and one end of each second clip 221 is connected to the same second pin 21. In the disclosed embodiment, the second clip 221 is connected to the second pin 21, and one end of each second clip 221 is connected to the same second pin 21, which can ensure the relative position of the second clip 221 and the second pin 21. After the first alignment mark group 12 is aligned with the second alignment mark group 22, it is also ensured that the second pin 21 at the edge of the chip-on-film 2 is aligned with the first pin 11 at the edge of the circuit board 1.

[0087] In a possible implementation, the chip-on-cover film 2 includes two second alignment mark groups 22, and the two second alignment mark groups 22 are respectively located at two edge regions of the chip-on-cover film 2 in the second direction CD. Specifically, for example, one of the second alignment mark groups 22 is located at the left edge region of the chip-on-cover film 2 in the second direction CD, and the other second alignment mark group 22 is located at the right edge region of the chip-on-cover film 2 in the second direction CD. In the disclosed embodiment, the two second alignment mark groups 22 are respectively located at the two edge regions of the chip-on-cover film 2 in the second direction CD, which can achieve a better binding effect while making less changes to the original pin layout of the chip-on-cover film.

[0088] In one possible implementation, combining Figure 4 As shown, the second clamping strip 221 is connected to the second pin 21 at the edge of the COF 2 , and the second pin 21 and the second clamping strip 221 form a notch with an opening, and the opening of the notch faces the side of the COF 2 .

[0089] In one possible implementation, combining Figure 4 As shown, the other end of the second clip strip 221 is substantially flush with the edge of the chip-on-film 2 .

[0090] In one possible implementation, combining Figure 4 As shown, the second alignment mark group 22 includes two second card strips 221 .

[0091] In one possible implementation, combining Figure 4 As shown, the width a1 of the second clip strip 221 in the first direction AB is substantially the same as the width a5 of the second lead 21 in the second direction CD.

[0092] The present disclosure also provides a display device, Figure 4 , Figure 5 , Figure 6 and Figure 7 As shown, it includes a circuit board 1 as provided in the embodiment of the present disclosure, and includes a chip-on-film 2 as provided in the embodiment of the present disclosure, wherein a first alignment mark group 12 of the circuit board 1 and a second alignment mark group 22 of the chip-on-film 2 are aligned by a snap-type so that the first pin 11 of the circuit board 1 and the second pin 21 of the chip-on-film 2 are bound and fitted one by one.

[0093] In one possible implementation, combining Figure 4 , Figure 5 , Figure 6 and Figure 7 As shown, the first alignment mark group 12 includes a block 121, and a strip group 122 respectively located on both sides of the block 122 along the first direction AB, the strip group 122 includes at least one first strip 1221, and the first strip 1221 extends along the first direction AB; the second alignment mark group 22 includes two second strips 221 extending along the second direction CD, and one end of each second strip 221 is connected to the same second pin 21; when the first alignment mark group 122 and the second alignment mark group 22 are buckled and aligned, the block 121 is located between adjacent second strips 221, and each second strip 221 is located between the block 121 and the first strip 1221.

[0094] In one possible implementation, combining Figure 4 and Figure 6 As shown, the length a4 of the second clamping strip 221 in the second direction CD is greater than the length h8 of the clamping block 121 in the second direction CD; the spacing a2 between the two second clamping strips 221 in the first direction AB is greater than the length h3 of the clamping block 121 in the first direction AB.

[0095] In one possible implementation, combining Figure 4 and Figure 6As shown, the width k1 of the gap between the first clamping strip 1221 and the clamping block 121 in the first direction AB is greater than the width a1 of the second clamping strip 221 in the first direction AB.

[0096] In one possible implementation, combining Figure 2 As shown, every N adjacent chip-on-films 2 are bound to the same circuit board 1 , wherein N is a positive integer greater than 0. Specifically, N may be 3.

[0097] In one possible implementation, combining Figure 8 As shown, the display device further includes a display panel 3 and a flexible circuit board 4 ; the display panel 3 is connected to one end of the chip-on-film 2 ; and adjacent circuit boards 1 are connected via the flexible circuit board 4 .

[0098] In one possible implementation, combining Figure 4 and Figure 6As shown, the length h5 of the first pin 11 in parallel to the second direction CD can be 0.1mm~0.3mm, specifically, 0.2mm; the spacing k1 of the gap between the card block 121 and the first card strip 121 in parallel to the second direction CD can be 0.3mm~0.5mm, specifically, 0.4mm; in the same card strip group 12, the spacing k2 of the gap between two adjacent first card strips 121 in parallel to the first direction AB can be the same as the length h2 of the first card strip 1221 in parallel to the second direction CD, specifically, k2 can be 0.1mm~0.3mm, specifically, 0.2mm; specifically, the spacing k3 of the gap between the first pin 11 connected to the second card strip 221 and the adjacent first card strip 1221 in parallel to the second direction can be 0.05mm~0.15mm, specifically, 0.1mm; specifically, the first card strip 122 in the card strip group 122 away from the first pin 11 21, the spacing k4 between its edge running in the first direction AB and the end of the second clip 221 parallel to the second direction CD can be 0.05mm~0.15mm, specifically, can be 0.1mm; specifically, the spacing k5 between the first edge S11 of the binding area S1 and the second edge S12 of the circuit board 1 in the first direction can be 0.9mm~1.1mm, specifically, can be 1.0mm, wherein the first edge S11 can be the edge of the circuit board 1 close to the display panel 3, and the second edge S12 can be the edge of the binding area S1 close to the display panel 3; the spacing k6 between the second edge S12 of the binding area S1 and the end of the first pin 11 in the first direction AB can be 0.1mm~0.3mm, specifically, can be 0.2mm; specifically, the spacing k7 between the first edge S11 of the circuit board 1 and the third edge S13 of the binding area S1 in the first direction AB can be 3.5mm~4.0mm. Specifically, it may be 3.8 mm, wherein the third edge S13 may be an edge of the binding area S1 away from the display panel 3 ; specifically, the length k8 of the circuit board 1 parallel to the first direction AB may be 13 mm to 14 mm.Specifically, it can be 13.5mm; specifically, the spacing b1 between the first card strip 1221 and the second card strip 221 in the direction parallel to the first direction AB can be 0.05mm-0.15mm, specifically, it can be 0.1mm; the spacing b2 between the second card strip 221 and the card block 121 in the direction parallel to the first direction AB can be 0.05mm-0.15mm, specifically, it can be 0.1mm; specifically, the length a1 of the second card strip 221 in the direction parallel to the first direction AB can be 0.1mm-0.3mm, specifically Specifically, the spacing a2 between two adjacent second card strips 221 in the direction parallel to the first direction AB can be 0.7mm~0.9mm, specifically, it can be 0.8mm; specifically, the minimum spacing a3 between the second card strip 221 and the edge of the binding area S1 in the direction parallel to the first direction AB can be 0.6mm~0.8mm, specifically, it can be 0.7mm; specifically, the length a4 of the second card strip 221 in the direction parallel to the second direction CD can be 0.7mm~0.9mm, specifically, it can be 0.8mm.

[0099] The present disclosure also provides a method for binding a display device according to the present disclosure. Fig. 9 As shown, the binding method includes:

[0100] Step S100: providing a circuit board as provided in an embodiment of the present disclosure;

[0101] Step S200, providing a chip-on-film as provided in an embodiment of the present disclosure;

[0102] Step S300: aligning the first alignment mark group of the circuit board with the second alignment mark group of the chip-on-film in a buckle manner, so that the first pins of the circuit board and the second pins of the chip-on-film are bound and attached one by one.

[0103] In one possible implementation, see Fig.10 As shown, the circuit board also includes two auxiliary mark groups; before step S300, that is, before the first alignment mark group of the circuit board and the second alignment mark group of the chip-on-film are buckled, the binding method further includes: step S400, coating the extension area between the two auxiliary mark groups and the binding area with conductive glue;

[0104] After step S300 , that is, after the first alignment mark group of the circuit board and the second alignment mark group of the chip-on-film are aligned in a snap-type manner, the binding method further includes: laminating the circuit board and the chip-on-film.

[0105] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.

[0106] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if these modifications and variations of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is also intended to include these modifications and variations.

Claims

1. A circuit board having a plurality of bonding areas for bonding with a chip-on-film, wherein: The binding area includes: A plurality of first pins, wherein the plurality of first pins extend along a first direction and are sequentially arranged along a second direction; At least one first alignment mark group, the first alignment mark group is located on the arrangement path of the first pins, and is configured to be aligned with the second alignment mark group of the chip-on-film by snapping, so that the first pins are bound and fitted with the second pins of the chip-on-film one by one; The first alignment mark group includes a card block and a card strip group respectively located on both sides of the card block along the first direction, the card strip group includes at least one first card strip, and the first card strip extends along the first direction; The card block has a first symmetry axis which is parallel to the second direction and passes through the center of the card block; the first card strips on both sides of the card block are symmetrically distributed one by one about the first symmetry axis.

2. The circuit board according to claim 1, wherein: The circuit board includes two first alignment mark groups, and the two first alignment mark groups are respectively located at two edge areas of the binding area in the second direction.

3. The circuit board according to claim 1, wherein: The block has a second symmetry axis which is parallel to the first direction and passes through the center of the block; the first clamping strips of the same clamping strip group are symmetrically distributed about the second symmetry axis.

4. The circuit board according to claim 1, wherein: In the same card strip group, ends of each of the first card strips away from the card block are substantially flush; in the same card strip group, ends of each of the first card strips facing the card block are substantially flush.

5. The circuit board according to claim 4, wherein: In the same clamping strip set, the end of the first clamping strip away from the clamping block is substantially flush with the end of the first pin.

6. The circuit board according to claim 1, wherein: The card strip group includes two first card strips; in the same card strip group, an outer edge extension line of one of the first card strips is away from another first card strip and parallel to the first direction, and roughly coincides with an outer edge extension line of the card block parallel to the first direction.

7. The circuit board according to claim 1, wherein: In the same card strip group, the lengths of the first card strips along the first direction are substantially the same; in the same card strip group, the lengths of the first card strips along the second direction are substantially the same.

8. The circuit board according to claim 7, wherein: The length of the clamping block in the first direction is substantially the same as the length of the first clamping strip in the first direction.

9. The circuit board according to claim 8, wherein: The length of the card block in the first direction is one fifth to one third of the length of the first pin in the first direction.

10. The circuit board according to any one of claims 1 to 9, wherein: The circuit board also includes extension areas located on both sides of the binding area, and the extension areas include: a plurality of floating pins extending along the first direction and arranged in sequence along the second direction, and at least one auxiliary marking group located on the floating pin arrangement path.

11. The circuit board according to claim 10, wherein: The circuit board comprises two auxiliary marking groups, which are respectively located at two sides of the binding area; the auxiliary marking groups are reused as glue-coated marking groups, and conductive glue is coated between the two auxiliary marking groups.

12. The circuit board according to claim 11, wherein: Each of the auxiliary mark groups includes two rectangular auxiliary mark blocks arranged along the first direction.

13. The circuit board according to claim 12, wherein: The length of each auxiliary marking block in the first direction is one fifth to one third of the length of the first pin in the first direction; the width of each auxiliary marking block in the second direction is greater than the width of the first pin in the second direction.

14. The circuit board according to claim 10, wherein: The number of the floating pins between each auxiliary mark group and the binding area is 8 to 12.

15. A chip-on-film for binding with a circuit board as claimed in any one of claims 1 to 14, wherein: include: A plurality of second pins, wherein the plurality of second pins extend along the first direction and are arranged in sequence along the second direction; At least one second alignment mark group, wherein the second alignment mark group is located on an arrangement path of the second pins.

16. The chip on film according to claim 15, wherein: The second alignment mark group includes two second clamping strips extending along the second direction, and one end of each second clamping strip is connected to the same second pin.

17. The chip on film according to claim 16, wherein: The chip-on-film includes two second alignment mark groups, and the two second alignment mark groups are respectively located at two edge regions of the chip-on-film in the second direction.

18. The chip on film according to claim 16, wherein: The second clamping strip is connected to the second pin at the edge of the chip-on-film, and the second pin and the second clamping strip form a notch with an opening, and the opening of the notch faces the side of the chip-on-film.

19. The chip on film according to claim 16, wherein: The other end of the second clip is substantially flush with the edge of the chip-on-film.

20. The chip on film according to claim 16, wherein: The second alignment mark group includes two second card strips.

21. The chip on film according to claim 20, wherein: The width of the second clip strip in the first direction is substantially the same as the width of the second pin in the second direction.

22. A display device, wherein: It includes the circuit board as described in any one of claims 1-14, and the chip-on-film as described in any one of claims 15-21, wherein the first alignment mark group of the circuit board and the second alignment mark group of the chip-on-film are aligned by snap-type alignment so that the first pin of the circuit board and the second pin of the chip-on-film are bound and fitted one by one.

23. The display device according to claim 22, wherein: The first alignment mark group includes a card block and a card strip group respectively located on both sides of the card block along the first direction, the card strip group includes at least one first card strip, and the first card strip extends along the first direction; The second alignment mark group includes two second clamping strips extending along the second direction, and one end of each second clamping strip is connected to the same second pin; When the first alignment mark group and the second alignment mark group are aligned in a buckle-type manner, the card block is located between adjacent second card strips, and each second card strip is located between the card block and the first card strip.

24. The display device according to claim 23, wherein: The length of the second card strip in the second direction is greater than the length of the card block in the second direction; The spacing between the two second clamping strips in the first direction is greater than the length of the clamping block in the first direction.

25. The display device according to claim 24, wherein: The width of the gap between the first card strip and the card block in the first direction is greater than the width of the second card strip in the first direction.

26. The display device according to claim 22, wherein: Every N adjacent COFs are bound to the same circuit board, wherein N is a positive integer greater than 0.

27. The display device according to claim 26, wherein: The display device further includes a display panel and a flexible circuit board; the display panel is connected to one end of the COF; and adjacent circuit boards are connected via the flexible circuit board.

28. A method for binding a display device according to any one of claims 22 to 27, wherein: The binding method includes: Providing a circuit board as described in any one of claims 1 to 14; Providing a chip-on-film as claimed in any one of claims 15 to 21; The first alignment mark group of the circuit board and the second alignment mark group of the chip-on-film are aligned in a buckle manner, so that the first pins of the circuit board and the second pins of the chip-on-film are bound and fitted one by one.

29. The binding method according to claim 28, wherein: The circuit board also includes two auxiliary mark groups; before the first alignment mark group of the circuit board is aligned with the second alignment mark group of the chip-on-film by buckle-type alignment, the binding method also includes: coating the extension area and the binding area between the two auxiliary mark groups with conductive glue; After the first alignment mark group of the circuit board and the second alignment mark group of the chip-on-film are aligned in a snap-type manner, the binding method further includes: laminating the circuit board and the chip-on-film.

Citation Information

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