Chip parameter calibration method, calibration interface controller and chip

Abstract

The application discloses a chip parameter calibration method, a calibration interface controller and a chip. The method inputs a calibration configuration instruction through an interface module; according to the calibration configuration instruction, a to-be-tested parameter of the chip is configured; a calibration enable instruction is input through the interface module; according to the calibration enable instruction, the chip enters a calibration enable state, and a to-be-calibrated parameter of the chip is acquired; single-step calibration and updating are performed on the to-be-calibrated parameter, an analog quantity corresponding to the to-be-calibrated parameter after single-step calibration is acquired; the analog quantity is transmitted to an external test device; and a calibration value is determined in response to a measurement result of the external test device. The application executes various instructions of calibration in the chip, and transmits the analog quantity of the to-be-calibrated parameter acquired in the chip to the external test device, which can shorten the calibration time and improve the calibration efficiency of the chip on the one hand, and the chip does not need to be internally provided with an analog quantity comparison circuit, so that the burden and risk of chip development can be reduced on the other hand.

Description

Technical Field

[0001] This application belongs to the technical field of chip parameter calibration, and specifically relates to a chip parameter calibration method, a calibration interface controller, and a chip. Background Technology

[0002] The analog parameters of integrated circuits, such as voltage, current, and frequency, vary from chip to chip. In order to ensure that the product parameters perform as expected and have good consistency, it is usually necessary to calibrate the analog parameters of each chip in wafer-level testing (CP) or finished product testing (FT).

[0003] In related technologies, calibration methods include using external test equipment, such as ATE (Automatic Test Equipment), which searches for parameter values ​​within the expected range of the analog quantity under test according to a specific algorithm. This method only requires the chip to output the analog quantity under test and to configure the corresponding parameters through a basic communication interface. However, the search process requires frequent use of the communication interface to transmit parameters, resulting in long test times and thus affecting test costs. Another calibration method involves designing a dedicated calibration circuit inside the chip, enabling the chip to simultaneously output multiple analog quantities such as voltage, current, and frequency. However, the calibration circuits for different types of analog quantities cannot be standardized, and all internal parameters of the chip must be calibrated internally. This introduces additional development burdens and risks, and also increases chip area overhead to some extent. Summary of the Invention

[0004] To address the shortcomings of the prior art, this application provides a chip parameter calibration method. This method executes calibration instructions within the chip and transmits the analog quantities of the parameters to be calibrated acquired by the chip to external testing equipment. This shortens calibration time and improves chip calibration efficiency. Furthermore, the chip does not need to have an internal analog quantity comparison circuit, reducing the burden and risk of chip development and minimizing chip area overhead.

[0005] The technical effect to be achieved in this application is accomplished through the following solution:

[0006] In a first aspect, this application provides a chip parameter calibration method for calibrating analog parameters of a chip. The chip includes a calibration interface controller, which includes an interface module. The chip can be connected to an external testing device, which is used to perform analog quantity measurements. The method includes:

[0007] Input calibration configuration commands via the interface module;

[0008] The parameters to be tested of the chip are configured according to the calibration configuration instructions;

[0009] The calibration enable command is input through the interface module;

[0010] According to the calibration enable command, the chip enters the calibration enable state and acquires the chip's calibration parameters;

[0011] Perform single-step calibration and update on the parameter to be calibrated, and obtain the analog quantity corresponding to the parameter to be calibrated after single-step calibration;

[0012] The analog signal is transmitted to an external testing device.

[0013] In response to the measurement results from the external testing equipment, a calibration value is determined.

[0014] Further, the parameter to be tested includes the address of the parameter to be tested register, the parameter value range, the calibration step size, and the calibration algorithm; configuring the parameter to be tested of the chip according to the calibration configuration instruction includes:

[0015] According to the calibration configuration instructions, the address of the parameter under test register, the range of parameter values, the calibration step size, and the calibration algorithm of the chip are configured.

[0016] The calibration algorithm includes an incrementing algorithm, a decrementing algorithm, and a binary search method.

[0017] Furthermore, before the step of inputting calibration configuration instructions through the interface module, the following steps are included:

[0018] Connect the chip to a power source and initialize the chip.

[0019] Further, the measurement results include whether the analog quantity falls within a preset range or not; determining the calibration value in response to the measurement results of the external testing equipment includes:

[0020] If the measurement result shows that the analog quantity falls within the preset range value, the parameter to be calibrated corresponding to the analog quantity is used as the calibration value.

[0021] If the measurement result indicates that the analog quantity does not fall within the preset range value, then the single-step calibration is repeated until the analog quantity falls within the range value.

[0022] If, after iterating through all parameters to be calibrated, the analog quantity still does not fall within the preset range value, then the calibration fails.

[0023] Furthermore, the single-step calibration includes:

[0024] Input the single-step calibration command through the interface module;

[0025] The parameters to be calibrated are updated according to the single-step calibration command.

[0026] Further, updating the parameter to be calibrated according to the single-step calibration instruction includes:

[0027] In response to the single-step calibration, the parameter value range is obtained according to the calibration configuration;

[0028] The parameter to be calibrated is updated according to the range of the parameter values.

[0029] If it is the first calibration, the updated value is the initial value of the parameter to be calibrated stored in the register.

[0030] Secondly, this application provides a calibration interface controller, the controller comprising: a parameter traversal module, an internal bus interface module, an interface module, and a process control state machine;

[0031] The parameter traversal module is used to perform at least one of the following steps:

[0032] The parameters to be tested of the chip are configured according to the calibration configuration instructions;

[0033] According to the calibration enable command, the chip enters the calibration enable state and acquires the chip's calibration parameters;

[0034] Perform a single-step calibration on the parameter to be calibrated and obtain the analog quantity corresponding to the parameter to be calibrated after the single-step calibration;

[0035] The internal bus interface module is used to access registers and non-volatile memory;

[0036] The interface module includes an interface module for performing at least one of the following steps:

[0037] Input calibration configuration commands via the interface module;

[0038] The calibration enable command is input through the interface module;

[0039] The analog signal is transmitted to an external testing device.

[0040] The process control state machine is used to control the coordinated operation of the parameter traversal module, the internal bus interface module, and the interface module to execute the chip parameter calibration method as described in any of the first aspects.

[0041] Thirdly, this application provides a chip that includes a calibration interface controller as described in the second aspect.

[0042] Fourthly, this application provides a readable medium including executable instructions, which, when executed by a processor of an electronic device, cause the electronic device to perform any of the methods described in the first aspect.

[0043] Fifthly, this application provides a testing device, including an analog quantity comparison circuit for connecting to a chip, and capable of receiving analog quantities output by the chip, determining the relationship between the analog quantities and a preset range value, and outputting the measurement results to the chip.

[0044] This application has the following advantages:

[0045] This application discloses a chip parameter calibration method for calibrating analog parameters of a chip. The method involves inputting calibration configuration instructions via an interface module; configuring the parameters to be tested on the chip according to the calibration configuration instructions; inputting a calibration enable instruction via the interface module; enabling the chip to enter a calibration enable state and acquiring the parameters to be calibrated; performing single-step calibration and updating on the parameters to be calibrated to obtain the analog quantity corresponding to the calibrated parameters after single-step calibration; transmitting the analog quantity to an external testing device; and determining the calibration value in response to the measurement results of the external testing device. This application executes the calibration instructions within the chip and transmits the analog quantity of the parameters to be calibrated acquired by the chip to the external testing device. This shortens calibration time and improves chip calibration efficiency. Furthermore, the chip does not need to have an internal analog quantity comparison circuit, reducing the burden and risk of chip development and reducing chip area overhead. Attached Figure Description

[0046] To more clearly illustrate the embodiments of this application or the existing technical solutions, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 The following is a flowchart of the chip parameter calibration method described in one embodiment of this application. Figure 1 ;

[0048] Figure 2 The following is a flowchart of the chip parameter calibration method described in one embodiment of this application. Figure 2 ;

[0049] Figure 3 This is a schematic diagram of the structure of the calibration interface controller described in one embodiment of this application;

[0050] Figure 4This is a timing diagram of the interface module described in one embodiment of this application;

[0051] Figure 5 This is a schematic diagram of the interface module described in one embodiment of this application;

[0052] Figure 6 This is a process controlled by a process control state machine in one embodiment of this application;

[0053] Figure 7 This is a schematic diagram of the chip structure in one embodiment of this application;

[0054] Figure 8 This is a schematic diagram of the structure of an electronic device in one embodiment of this application. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0056] The non-limiting embodiments of this application are described in detail below with reference to the accompanying drawings.

[0057] As attached Figure 1 The diagram illustrates a flowchart of a chip parameter calibration method according to an embodiment of this application. The chip parameter calibration method is used to calibrate analog parameters of a chip. The chip includes a calibration interface controller, which includes an interface module. The chip can be connected to an external testing device, which is used to perform analog measurements. The method includes:

[0058] S101: Input calibration configuration commands via the interface module;

[0059] S102: Configure the parameters to be tested of the chip according to the calibration configuration instructions;

[0060] S103: Input the calibration enable command through the interface module;

[0061] S104: According to the calibration enable command, the chip enters the calibration enable state and obtains the chip's calibration parameters;

[0062] S105: Perform single-step calibration and update on the parameter to be calibrated, and obtain the analog quantity corresponding to the parameter to be calibrated after single-step calibration;

[0063] S106: Transmit the analog signal to an external test device;

[0064] S107: In response to the measurement results of the external testing equipment, determine the calibration value.

[0065] This application provides a chip parameter calibration method. The method executes calibration instructions within the chip and transmits the analog quantities of the parameters to be calibrated obtained by the chip to external test equipment. In this way, on the one hand, the calibration time can be shortened and the efficiency of chip calibration can be improved; on the other hand, the chip does not need to set up analog quantity comparison circuits internally, which can reduce the burden and risk of chip development and reduce the chip area overhead.

[0066] Specifically, the chip incorporates a calibration circuit, which does not include an analog quantity comparison circuit used during calibration; the analog quantity measurements are performed by external testing equipment. The chip's built-in calibration circuit is used to execute various instructions and control the calibration process, including calibration configuration instructions and calibration enable instructions. The calibration circuit is a purely digital circuit, which reduces design and development costs and risks compared to calibration circuits that include analog circuitry. Because the chip's built-in circuit executes instructions, configures parameters, and controls, it reduces the time required for analog quantity measurements. Furthermore, the lack of an analog quantity comparison circuit within the built-in circuitry provides good versatility; a single circuit can cover various analog quantity calibration needs, resulting in a smaller chip area.

[0067] In one example, the parameter under test includes the address of the parameter under test register, the parameter value range, the calibration step size, and the calibration algorithm. The configuration of the parameter under test of the chip according to the calibration configuration instruction can configure the address of the parameter under test register, the parameter value range, the calibration step size, and the calibration algorithm according to the calibration configuration instruction. The address of the parameter under test register is used for addressing parameter registers internally within the chip. All registers in the chip have corresponding addresses; the address must be given to find the register to be modified or updated. All registers in the chip are configured within allowed value ranges. Different registers have different allowed value ranges; therefore, the value range of the register to be configured needs to be specified so that the calibration operation can be performed within this range. The calibration step size refers to the amount of change in the parameter each time it is updated. For example, when the step size is set to 1, each parameter update increments or decrements the current value by 1; when the step size is set to 4, each parameter update increments or decrements the current value by 4.

[0068] The calibration algorithms include incremental, decremental, and binary search methods. These are common algorithms and will not be described in detail here. Taking the incremental algorithm as an example, based on the pre-configured address of the parameter register to be calibrated, the parameter value range, and the calibration step size, the current value of the parameter register to be calibrated is read. Then, a calibration step size value is added to this value, the calculated new value is written back to the corresponding register, and a flag signal is generated to notify other modules to perform subsequent actions. The configuration refers to initiating a write operation on the register corresponding to the parameter.

[0069] Specifically, before the step of inputting calibration configuration instructions through the interface module, the chip is connected to a power source to provide the necessary power for calibration. The chip is also initialized to provide an environment conducive to parameter calibration. Initialization may involve stopping each module to be calibrated and reading the parameters to be calibrated from its registers, preparing for subsequent parameter calibration.

[0070] In one embodiment, the measurement result includes whether the analog quantity falls within a preset range or whether the analog quantity does not fall within a preset range. (See attached...) Figure 2 As shown, determining the calibration value in response to the measurement results of the external testing equipment includes:

[0071] If the measurement result shows that the analog quantity falls within the preset range, the parameter to be calibrated corresponding to the analog quantity is used as the calibration value. The analog quantity falling within the preset range indicates that the parameter to be calibrated corresponding to the analog quantity is error-free, the functional module corresponding to the parameter to be calibrated can operate normally during chip operation, and the performance of the functional module is good. Since the parameter to be calibrated is error-free, it can be stored in a register for easy chip operation according to the calibration value.

[0072] If the measurement result indicates that the analog quantity does not fall within the preset range, the single-step calibration is repeated until the analog quantity falls within the range. The fact that the analog quantity does not fall within the preset range indicates that the parameter to be calibrated corresponding to that analog quantity is incorrect, and the functional module corresponding to that parameter may experience problems during chip operation, resulting in poor performance. In this case, the parameter to be calibrated needs to be updated, and the single-step calibration is repeated until the analog quantity of the parameter to be calibrated falls within the preset range.

[0073] If, after iterating through all parameters to be calibrated, the analog quantity still does not fall within the preset range value, the calibration fails. Upon calibration failure, a calibration failure message is sent to an external testing device, or a notification is issued.

[0074] In one embodiment, the single-step calibration can be performed by inputting a single-step calibration command through an interface module; then, the parameter to be calibrated is updated according to the single-step calibration command. Specifically, updating the parameter to be calibrated according to the single-step calibration command can be achieved by obtaining the parameter value range according to the calibration configuration in response to the single-step calibration; then, the parameter to be calibrated is updated according to the parameter value range; if it is the first calibration, the updated value is the initial value of the parameter to be calibrated stored in the register.

[0075] As attached Figure 3 The diagram illustrates the structure of a calibration interface controller according to an embodiment of this application. The controller includes: a parameter traversal module, an internal bus interface module, an interface module, and a process control state machine. The parameter traversal module is used to perform at least one of the following steps:

[0076] The parameters to be tested of the chip are configured according to the calibration configuration instructions;

[0077] According to the calibration enable command, the chip enters the calibration enable state and acquires the chip's calibration parameters;

[0078] Perform single-step calibration and update on the parameter to be calibrated, and obtain the analog quantity corresponding to the parameter to be calibrated after single-step calibration;

[0079] The internal bus interface module is used to access registers and non-volatile memory;

[0080] The interface module includes an interface module for performing at least one of the following steps:

[0081] Input calibration configuration commands via the interface module;

[0082] The calibration enable command is input through the interface module;

[0083] The analog signal is transmitted to an external testing device.

[0084] The process control state machine is used to control the coordinated operation of the parameter traversal module, the internal bus interface module, and the interface module to execute the chip parameter calibration method as described in any of the above chip parameter calibration methods.

[0085] Specifically, the parameter traversal module iterates through the parameters to be calibrated of the chip, configuring the address of the parameter under test register, the parameter value range, the calibration step size, the calibration algorithm, and generating the parameters to be calibrated. Taking the increment algorithm as an example, based on the pre-configured address of the parameter under test register, the parameter value range, and the calibration step size, it reads the current value of the parameter to be calibrated register, then adds a calibration step size value to this value, writes the calculated new value back to the corresponding register, and generates a flag signal to notify other modules to perform subsequent actions. The parameter traversal module includes a configuration register and a calibration parameter generation module. The configuration register stores the address of the parameter to be calibrated register, the parameter value range, the calibration step size, and the calibration algorithm. The calibration parameter generation module is used to traverse the register to be calibrated and generate the parameters to be calibrated.

[0086] Specifically, the internal bus interface module is responsible for accessing the chip's internal bus. Access to internal system resources such as parameter registers and non-volatile memory is performed through this module. The specific implementation of the internal bus interface module in the chip system can adopt bus protocols, such as AHB (Advanced High Performance Bus) or AXI (Advanced eXtensible Interface). Bus protocols are conventional methods in this technical field and will not be described in detail here.

[0087] Specifically, the interface module controls the interface module I / O. This interface module is a synchronous half-duplex interface, containing one input clock I / O (TEST_CLK) and one bidirectional data I / O (TEST_IO). The input clock is always driven by an external test device and serves as the communication interface operating clock. Both the chip and the external test device drive the signal on the falling edge of the clock and sample the signal on the rising edge. The interface module timing definition is as follows: Figure 4 As shown,

[0088] The process of command interaction in the interface module includes an initialization phase, a command input phase, a first idle phase, a response sequence output phase, and a second idle phase, followed by the next command input phase.

[0089] During the initialization phase, the chip performs initialization operations. After completion, the interface module is configured to receive input commands, and the external test equipment drives bidirectional data I / O.

[0090] The instruction input phase, also known as the instruction sequence input phase, involves bidirectional data I / O in an input state. External test equipment drives the bidirectional data I / O to input the instruction sequence (instruction sequence format defined by the user) to the chip on the falling edge of the input clock I / O. After input is complete, the external test equipment stops driving and releases the bidirectional data I / O. The bidirectional data I / O input value is latched into the internal input shift register on the rising edge of the input clock I / O.

[0091] In the first idle phase, the chip processes the received instructions internally, and the bidirectional data I / O is in a no-drive state. The duration of the first idle phase depends on the instruction processing time; for any given instruction, the processing time should be fixed and predictable.

[0092] In the acknowledge sequence output stage, the bidirectional data I / O is in an output state. The chip drives the input clock I / O, driving and saving the acknowledge sequence bit by bit on the falling edge of the input clock I / O. After the output is complete, the chip stops driving and releases the bidirectional data I / O. The acknowledge sequence format is defined by the user. Not all instructions require an acknowledge, so this stage can be omitted.

[0093] In the second idle phase, the external test equipment processes the chip's response, and the bidirectional data I / O is in a driverless state. This idle phase continues until the external test equipment completes its processing; the time consumption does not need to be predicted in advance and has no other special requirements. If the response sequence output phase is omitted, the corresponding second idle phase can also be omitted.

[0094] The initialization phase, instruction input phase, first idle phase, response sequence output phase, and second idle phase are arranged sequentially to form the interaction flow of a standard instruction of the interface module. If other instruction interactions are required, the process restarts from the instruction input phase to the second idle phase, and so on.

[0095] As attached Figure 5 The diagram illustrates the structure of the interface module, which is connected to bidirectional data I / O and input clock I / O. The direction of the bidirectional data I / O is controlled by the "flow control state machine". The specific operation of the input shift register is as described in the instruction input stage above, and the specific operation of the output shift register is as described in the response sequence output stage above.

[0096] Specifically, the process control state machine is used to manage the overall test and calibration process, as well as coordinate the operation of the parameter traversal module, the internal bus interface module, and the interface module. The process controlled by the process control state machine is shown in the attached figure. Figure 6As shown, starting from the chip initialization state, the interface module input command state is as follows: If the input command does not match the preset command, it returns to the interface module input command state; if the input command is a calibration configuration command, the chip enters the calibration configuration state; if the input command is a calibration completion command and a calibration enable valid command, it enters the calibration completion command output state; if the input command is a calibration value programming command or a calibration enable valid command, the chip enters the calibration value programming state. If programming is successful, the chip enters the output programming success sequence state; if programming fails, the chip enters the output programming failure sequence state; if the input command is a single-step calibration command and a calibration enable valid command, the chip enters the single-step calibration state and outputs an analog quantity or a single-step calibration completion command; if the input command is a calibration enable command, the chip enters the calibration enable state. After chip initialization is complete, it enters the "interface module shift input state." In this state, the chip receives the instruction sequence of bidirectional data IO input bit by bit, and determines which state the chip will subsequently transition to based on the received value. After completing the relevant processing in other states, it must return to the "interface module input command" state.

[0097] As attached Figure 7 As shown, this application also proposes a chip including a calibration interface controller as described above. The calibration interface controller includes an interface module I / O and non-volatile memory. The interface module I / O is connected to a digital channel for control purposes and is used to input or output instructions. A register storing the parameters to be calibrated is connected to an analog output I / O for connection to an analog measurement channel. The specific structure of this calibration interface controller is as described in the above embodiments. Since this chip adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought by the technical solutions of the above embodiments, which will not be elaborated here.

[0098] This application also proposes a testing device, including an analog quantity comparison circuit. The testing device is used to connect to a chip and can receive the analog quantity output by the chip, determine the relationship between the analog quantity and a preset range value, and output the measurement result to the chip.

[0099] Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. At the hardware level, the electronic device includes a processor, and further includes an internal bus, a network interface, and a memory. The memory may include RAM, such as high-speed random-access memory (RAM), or non-volatile memory, such as at least one disk storage device. Of course, the electronic device may also include other hardware required for other services.

[0100] The processor, network interface, and memory can be interconnected via an internal bus, which can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus, etc. This bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 8 The symbol is represented by a single double-headed arrow, but this does not mean that there is only one bus or one type of bus.

[0101] Memory is used to store instructions for execution. Specifically, instructions for execution are computer programs that can be executed. Memory can include main memory and non-volatile memory, and it provides the processor with execution instructions and data.

[0102] In one possible implementation, the processor reads the corresponding execution instructions from non-volatile memory into main memory and then executes them. Alternatively, it may obtain the corresponding execution instructions from other devices to form a chip parameter calibration method at the logical level. The processor executes the execution instructions stored in the memory to implement the chip parameter calibration method provided in any embodiment of this application through the executed instructions.

[0103] The above is as stated in this application. Figure 1 or Figure 2 The chip parameter calibration method provided in the illustrated embodiment can be applied to a processor or implemented by a processor. The processor may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor.

[0104] The steps of the method disclosed in the embodiments of this application can be directly manifested as being executed by a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory, and the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0105] This application also proposes a readable medium that stores execution instructions. When the stored execution instructions are executed by the processor of an electronic device, the electronic device can execute the chip parameter calibration method provided in any embodiment of this application, and specifically execute the chip parameter calibration method described above.

[0106] The electronic devices described in the foregoing embodiments may be computers.

[0107] Those skilled in the art will understand that the embodiments of this application can be provided as methods or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or a combination of software and hardware.

[0108] The various embodiments in this application are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the device embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0109] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0110] The above description is merely an embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of this application should be included within the scope of the claims of this application.

Claims

1. A chip parameter calibration method for calibrating chip analog parameters, characterized in that, The chip includes a calibration interface controller, which is a purely digital circuit. The calibration interface controller includes an interface module. The chip can be connected to an external test device, which is used to perform analog measurements. The chip parameter calibration method is executed by the calibration interface controller, and the method includes: Input calibration configuration commands via the interface module; The parameters to be tested of the chip are configured according to the calibration configuration instructions; The calibration enable command is input through the interface module; According to the calibration enable command, the chip enters the calibration enable state and acquires the chip's calibration parameters; Perform single-step calibration and update on the parameter to be calibrated, and obtain the analog quantity corresponding to the parameter to be calibrated after single-step calibration; The analog signal is transmitted to an external testing device. In response to the measurement results from the external testing equipment, a calibration value is determined; The step of configuring the test parameters of the chip according to the calibration configuration instruction includes: configuring the test parameter register address, parameter value range, calibration step size and calibration algorithm of the chip according to the calibration configuration instruction; wherein, the calibration algorithm includes an increment algorithm, a decrement algorithm and a binary search method.

2. The chip parameter calibration method according to claim 1, characterized in that, Before the step of inputting calibration configuration commands through the interface module, the following steps are included: Connect the chip to a power source and initialize the chip.

3. The chip parameter calibration method according to claim 1, characterized in that, The measurement results include whether the analog quantity falls within a preset range value or whether the analog quantity does not fall within a preset range value. The step of determining the calibration value in response to the measurement results of the external testing equipment includes: If the measurement result is that the analog quantity falls within the preset range value, the parameter to be calibrated corresponding to the analog quantity is used as the calibration value. If the measurement result indicates that the analog quantity does not fall within the preset range value, then the single-step calibration is repeated until the analog quantity falls within the range value. If, after iterating through all parameters to be calibrated, the analog quantity still does not fall within the preset range value, then the calibration fails.

4. The chip parameter calibration method according to claim 3, characterized in that, The single-step calibration includes: Input the single-step calibration command through the interface module; The parameters to be calibrated are updated according to the single-step calibration command.

5. The chip parameter calibration method according to claim 4, characterized in that, The step of updating the parameter to be calibrated according to the single-step calibration instruction includes: In response to the single-step calibration, the parameter value range is obtained according to the calibration configuration; The parameter to be calibrated is updated according to the range of the parameter values. If it is the first calibration, the updated value is the initial value of the parameter to be calibrated stored in the register.

6. A calibration interface controller, characterized in that, The calibration interface controller is located in the chip and is a purely digital circuit. The controller includes: a parameter traversal module, an internal bus interface module, an interface module, and a process control state machine. The parameter traversal module is used to perform at least one of the following steps: The parameters to be tested of the chip are configured according to the calibration configuration instructions; According to the calibration enable command, the chip enters the calibration enable state and acquires the chip's calibration parameters; Perform single-step calibration and update on the parameter to be calibrated, and obtain the analog quantity corresponding to the parameter to be calibrated after single-step calibration; The internal bus interface module is used to access registers and non-volatile memory; The interface module includes an interface module for performing at least one of the following steps: Input calibration configuration commands via the interface module; The calibration enable command is input through the interface module; The analog signal is transmitted to an external testing device. The process control state machine is used to control the coordinated operation of the parameter traversal module, the internal bus interface module, and the interface module to execute the chip parameter calibration method as described in any one of claims 1-5.

7. A chip, characterized in that, Includes the calibration interface controller as described in claim 6.

8. A readable medium, characterized in that, The readable medium includes execution instructions that, when executed by the processor of the electronic device, cause the electronic device to perform the method as described in any one of claims 1-5.

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