A method, system and medium device for correcting interference horizontal stripes of a detector

Abstract

The present invention discloses a method, system and medium device for correcting interference horizontal stripes of a detector, and relates to the application fields of flat panel detectors and linear array detectors. The method comprises: before normally reading out multiple columns of pixels in the current row, setting the analog switch between the pixel array and the subsequent signal readout circuit to a first switch state; confirming the number of column signal readout circuits to be output as required; averaging the outputs of the multiple column signal readout circuits to obtain the current row bias coefficient; setting the switch to a second switch state to obtain the output of the column signal readout circuit at this time; subtracting the current row bias coefficient from the multiple column outputs to obtain the correction signal output of the multiple columns of pixels in the current row; scanning row by row and repeating the above steps until the correction signal output of all pixels is obtained. Compared with the DDS function, this solution does not require complex hardware circuit support, improves the chip yield, reduces dark field image noise, and improves the detector's limit frame rate.

Description

Technical Field

[0001] The invention relates to the application field of flat panel detectors and linear array detectors, and in particular to a method, system and medium equipment for correcting interference horizontal stripes of detectors. Background Art

[0002] Flat panel detectors and linear array detectors are devices that convert X-ray energy into electrical signals. In terms of their hardware circuits, they usually include passive multi-row and multi-column pixel arrays and active signal readout arrays. The active signal readout arrays may include row selection circuits, multiple-select-one circuits, integration circuits, PGA circuits, analog-to-digital conversion circuits, and data processing circuits, depending on the architecture. Flat panel detectors and linear array detectors use rolling shutter mode, which completes the scanning of the entire pixel array by scanning row by row. Due to this working mode, the pixels of different columns corresponding to the same row complete signal readout almost at the same time, while there is a difference in row scanning time between the pixels of different rows corresponding to the same column, and this difference can usually reach the maximum millisecond level. In a typical APS pixel architecture flat panel detector, multiple rows of pixels on the same column usually share a set of column integration circuits + PGA circuits + analog-to-digital conversion circuits as column signal readout circuits, and multiple columns of pixels + integration circuits + PGA circuits + analog-to-digital conversion circuits constitute the analog circuit part of the flat panel detector. Since non-ideal factors such as system power supply noise and external electromagnetic interference will bring certain random interference, and pixels in different columns on the same row maintain almost the same signal readout time, random interference usually appears as random horizontal stripes on the two-dimensional grayscale value image corresponding to the multi-row and multi-column pixel array.

[0003] The traditional method of interfering horizontal stripe correction usually uses a detector with a double sampling function (DDS). The idea of ​​DDS function is to reset the pixel and collect the reset output again after each pixel signal is read out normally, and subtract the two outputs through hardware or program to achieve the purpose of eliminating random interference. It can be found from the principle that the DDS function obtains the bias signal output of the post-stage signal readout circuit through pixel reset after the pixel signal is read out, and eliminates the interference of non-ideal factors on the pixel readout signal by using the characteristic that the pixel readout time and the bias readout time of the post-stage signal readout circuit are close enough in time. However, it can also be found that the DDS function is relatively complex, and each pixel needs to collect the output twice, so it has several obvious disadvantages: 1. The DDS function usually requires more complex functional circuit support, which greatly affects the chip yield; 2. Each pixel needs to be collected twice under the DDS function, and the data volume increases by 2 times, which greatly affects the limit frame rate; 3. The subtraction of 2 data will increase the noise to 1.41 times of single data acquisition. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a method, system and medium device for correcting interference horizontal stripes of a detector in view of the deficiencies in the prior art.

[0005] The technical solution of the present invention to solve the above technical problems is as follows:

[0006] A method for correcting interfering horizontal stripes of a detector, comprising:

[0007] Before reading out the output of the column signal readout circuit corresponding to the multiple columns of pixels in the current row, setting the switch between the pixel array of the detector and the multiple column signal readout circuit corresponding to the subsequent stage to a first switch state;

[0008] According to the limit frame rate and noise level, the number of columns of the column signal readout circuit to be output needs to be determined;

[0009] Averaging the outputs of the plurality of columns of signal readout circuits to obtain a bias coefficient of the current row;

[0010] Setting the switch to a second switch state to obtain a plurality of columns of signal readout circuit outputs corresponding to a plurality of columns of pixels in the current row;

[0011] Subtract the bias coefficient of the current row from the output of the multi-column signal readout circuit to obtain a multi-column correction signal output corresponding to the multi-column pixels of the current row;

[0012] The above steps are repeated row by row until the correction signal output of all pixels in the pixel array is obtained.

[0013] The beneficial effect of the present invention is that before the output of multiple columns of pixels in each row is read out, the connection between the pixel array and the subsequent active circuit is disconnected and the output of the subsequent circuit is directly collected to obtain the real-time multiple column bias signals corresponding to the current row, and the row bias coefficient of the current row is obtained by selecting a certain number of column bias signals to be output and averaged, and then the pixel array is connected to the subsequent active circuit and the signal of the pixel array is normally read out, and the readout signal of the pixel array of the current row is directly subtracted from the row bias coefficient of the current row to achieve the purpose of correcting the random interference horizontal stripes.

[0014] Compared with the DDS function, this solution does not require complex hardware functional circuit support, improves chip yield, significantly reduces dark field image noise, and increases the detector's maximum frame rate.

[0015] Furthermore, the first switch state is a state in which the switch is turned off by controlling the IO to be pulled high.

[0016] Furthermore, the method for determining the number of columns of the column signal readout circuits to be output according to the limit frame rate and the noise level specifically includes:

[0017] According to the negative correlation between the limit frame rate and the number of signal readout circuit columns, and the positive correlation between the noise level and the number of signal readout circuit columns, the number of columns of the column signal readout circuits to be output is determined by balancing the two according to actual needs.

[0018] The beneficial effects of adopting the above further solution are: the method of controlling the switch through IO is simple and easy to implement, and almost no additional functional circuit needs to be added, which can greatly improve the chip yield. By seeking a balance between the noise level and the limit frame rate, the limit frame rate can be greatly increased without affecting the noise. Furthermore, the second switch state is the state of controlling the IO to pull down the switch through the pixel switch.

[0019] Another technical solution of the present invention to solve the above technical problems is as follows:

[0020] An interference horizontal stripe correction system for a detector, comprising: a first state setting module, a bias acquisition module, a real-time line bias coefficient acquisition module, a second state setting module and a correction module;

[0021] The first state setting module is used to set the analog switch between the pixel array of the detector and the column integration circuit to the first switch state before normally reading out the current row of pixels;

[0022] The bias acquisition module is used to obtain the bias outputs of the multi-column signal readout circuits corresponding to the current row;

[0023] The real-time row bias coefficient acquisition module is used to obtain the real-time row bias coefficient of the current row after averaging the bias outputs of the multi-column signal readout circuits;

[0024] The second state setting module is used to set the analog switch between the pixel array and the column integration circuit to a second switch state;

[0025] The correction module is used to deduct the corresponding row bias coefficient from the output of the multi-column signal readout circuit corresponding to the multi-column pixels in the second switch state of the current row, so as to obtain the correction signal output corresponding to the multi-column pixels. The correction module can finally complete the correction signal output of the entire pixel array by scanning from the first row to the last row through the row scanning circuit. The beneficial effects of the present invention are: the bias output of the multi-column signal processing circuit corresponding to the current row is obtained by disconnecting the connection between the passive pixel array and the subsequent active circuit and directly collecting the output of the subsequent circuit, the real-time row bias coefficient is obtained by averaging the bias output of the multi-column signal processing circuit, and then the connection between the pixel array and the subsequent active circuit is established, and the output of the pixel during normal readout is directly subtracted from the row bias coefficient of the current row to achieve the purpose of correcting the random interference horizontal stripes.

[0026] Compared with the DDS function, this solution does not require complex hardware functional circuit support, improves chip yield, significantly reduces dark field image noise, and increases the detector's maximum frame rate.

[0027] Furthermore, the first switch state is a state in which the switch is turned off by pulling up the pixel switch control IO.

[0028] Furthermore, the bias acquisition module is used to determine the number of columns of the signal readout circuits to be output based on the negative correlation between the limit frame rate and the positive correlation between the noise level and the number of columns of the signal readout circuits, and to balance between the two according to actual needs.

[0029] The beneficial effect of adopting the above further scheme is: by disconnecting the connection between the passive pixel array and the subsequent active circuit and directly collecting the output of the subsequent circuit to obtain the bias output of the multi-column signal processing circuit corresponding to the current row, the real-time row bias coefficient is obtained by averaging the bias output of the multi-column signal processing circuit, and then the connection between the pixel array and the subsequent active circuit is established, and the output of the pixel during normal reading is directly subtracted from the row bias coefficient of the current row to achieve the purpose of correcting random interference horizontal stripes.

[0030] Furthermore, the second switch state is a state in which the switch is pulled low by controlling the pixel switch IO.

[0031] Advantages of additional aspects of the present invention will be given in part in the following description, and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic flow chart of a method for correcting interfering horizontal stripes of a detector provided by an embodiment of the present invention;

[0033] Figure 2 A structural block diagram of an interference horizontal stripe correction system for a detector provided by an embodiment of the present invention;

[0034] Figure 3 A schematic diagram of a partial analog circuit of a typical APS flat panel detector provided for other embodiments of the present invention. DETAILED DESCRIPTION

[0035] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention but not to limit the scope of the present invention.

[0036] like Figure 1 As shown, a method for correcting interference horizontal stripes for a detector provided by an embodiment of the present invention includes:

[0037] S1, before normally reading out the first row of pixels, set the analog switch between the pixel array of the detector and the column integration circuit to the first switch state; wherein the first switch state can be achieved by controlling IO to pull up and turn off the analog switch between the pixel array and the column integration circuit.

[0038] S2, select the column signal readout circuits corresponding to all columns to output bias signals;

[0039] S3, after averaging the bias signal, obtain the real-time line bias coefficient of the current line; wherein the real-time line bias coefficient represents the output of the post-stage signal processing circuit when no pixel is connected, and corresponds to a specific value. Taking a 16-bit analog-to-digital conversion circuit as an example, its output range is 0 to 65535, so generally speaking, the line bias coefficient will be relatively small, roughly around several thousand.

[0040] S4, setting the analog switch between the pixel array and the column integration circuit to the second switch state, obtaining the multi-column signal readout circuit output corresponding to the multi-column pixels in the current row; wherein the second switch state can be turned on by controlling IO to pull down the analog switch between the pixel array and the column integration circuit.

[0041] S5, subtracting the real-time row bias coefficient of the current row from the output of the multi-column signal readout circuit to obtain a multi-column correction signal output corresponding to the multi-column pixels of the current row;

[0042] S6: Scanning row by row and repeating the above steps until the correction signal output of all pixels of the pixel array is obtained;

[0043] By disconnecting the passive pixel array from the subsequent active circuit and directly collecting the output of the subsequent circuit, real-time multi-column bias outputs in the same row are obtained. The real-time row bias coefficient is obtained by averaging the multi-column bias outputs. The output of the normal pixel is directly subtracted from the corresponding row bias coefficient to achieve the purpose of eliminating horizontal stripes.

[0044] Compared with the DDS function, this embodiment does not require complex hardware functional circuit support, thereby improving chip yield; and significantly reduces dark field image noise by averaging multiple column output bias signals as a bias coefficient.

[0045] In another embodiment, taking a 16-bit APS flat panel detector with a pixel matrix of 1024*1024 as an example, its typical analog circuit part is as follows: Figure 3 As shown, the pixel matrix has 1024 columns of pixels, and each column of pixels shares an integration circuit + PGA circuit + analog-to-digital conversion circuit as a column signal readout circuit. There are analog switches between pixels and each level of circuits that can be turned off / on by IO input corresponding waveforms. When using the tablet to implement the real-time bias correction described in the present invention, a typical method and steps are as follows:

[0046] 1 Before scanning and reading out the first row of pixels, the analog switch between the pixel array and the column integration circuit is turned off by controlling IO to be pulled high;

[0047] 2. Select the column signal readout circuit corresponding to columns 1 to 128 to output bias signals;

[0048] 3. After averaging the 128 column offset signals, obtain the real-time row offset coefficient offset_tmp of the current row;

[0049] 4. By controlling IO to be pulled low, the analog switch between the pixel array and the column integration circuit is turned on, and the column signal readout circuit outputs sig1_1 to sig1_1024 of the 1st row and 1st column are read out normally;

[0050] 5. Output (sig1_1-offset_tmp) to (sig1_1024-offset_tmp) as the correction signal corresponding to the 1024 columns of pixels in the first row;

[0051] 6 Scan the 2nd to 1023rd rows line by line and repeat steps 1 to 5 to obtain the correction signal output of the entire pixel array.

[0052] It can be seen that in this embodiment, the additional functional circuit used only includes switches, and due to the existence of the row scanning concept, switches usually already exist in commonly used flat panel detectors and linear array detectors, so they have almost no effect on the yield. At the same time, since offset_tmp is obtained by averaging the output of the 128-column column signal acquisition circuit, it has almost no effect on the corrected noise. The data output by the 128-column column signal acquisition circuit is significantly less than that of 1024 columns, so it has a lower impact on the limit frame rate.

[0053] Optionally, in any of the above embodiments, the first switch state is a state in which the switch is turned off by controlling IO to be pulled high.

[0054] Optionally, in any of the above embodiments, the method for determining the number of columns of the column signal readout circuits to be output according to the limit frame rate and the noise level specifically includes:

[0055] The limit frame rate is negatively correlated with the number of columns of the signal readout circuit, and the noise level is positively correlated with the number of columns of the signal readout circuit. A balance is achieved between the two according to actual needs.

[0056] The second switch state is a state in which the switch is turned on by controlling the IO to be pulled low.

[0057] During the row scanning process, the connection between the pixel array and the subsequent circuit is disconnected to separately collect the bias of the subsequent circuit, and the output bias of multiple subsequent circuits with the same function is averaged as the real-time row bias coefficient. The correction is performed by subtracting the real-time row bias coefficient of the current row from the output of multiple columns of pixels corresponding to each row, thereby achieving the purpose of correcting random interference horizontal stripes.

[0058] Optionally, in any of the above embodiments, the second switch state is a state in which the switch is pulled low by controlling IO.

[0059] In one embodiment, a correction method for random interference horizontal stripes of a flat panel detector and a linear array detector may include:

[0060] 1 Before completing the pixel scanning readout of each row, the connection between the input of the subsequent circuit in the analog link of the flat panel detector or linear array detector and the corresponding pixel charge output is disconnected by certain measures; the measures may include but are not limited to: ① turning off the switch between the previous circuit and the subsequent circuit by register configuration or IO input specific waveform ② turning off the output of the previous circuit by register configuration or IO input specific waveform ③ setting the output of the previous circuit to a fixed voltage by register configuration or IO input specific waveform;

[0061] The post-stage circuit refers to the entire analog circuit, which may be all analog circuits located after the pixel array, or may be a part of the analog circuit after the pixel array.

[0062] Here, disconnection means that there is no direct or indirect physical connection between the subsequent circuit input and its corresponding previous pixel charge output.

[0063] 2 The input terminal state of the subsequent circuit includes but is not limited to being suspended, high impedance or set to a fixed voltage. The method for determining the state of the subsequent input terminal is to be as close as possible to the working state of the subsequent circuit when the pixel charge output connection is not disconnected.

[0064] 3. Collect multiple outputs of the subsequent circuit; wherein the output of the subsequent circuit refers to the digital output after the analog-to-digital converter in the subsequent circuit.

[0065] 4. These outputs are averaged to obtain the real-time line bias coefficient of the current line; the real-time line bias coefficient is generated and updated in the current line where the line scanning circuit is working.

[0066] 5. Establish the connection between the pixel array and the subsequent circuit and collect the image normally. Subtract the row bias coefficient of the current row from the output of the subsequent circuit corresponding to the multiple columns of pixels in the current row.

[0067] In one embodiment, if Figure 2As shown, a correction system for interference horizontal stripes of a detector includes: a first state setting module 1101, a bias acquisition module 1102, a real-time line bias coefficient acquisition module 1103, a second state setting module 1104 and a correction module 1105;

[0068] The first state setting module 1101 is used to set the analog switch between the pixel array of the detector and the column integration circuit to the first switch state before normally reading out the current row of pixels;

[0069] The bias acquisition module 1102 is used to obtain the bias output of the multi-column signal readout circuit corresponding to the current row;

[0070] The real-time row bias coefficient acquisition module 1103 is used to obtain the real-time row bias coefficient of the current row after averaging the bias outputs of the multi-column signal readout circuits; the second state setting module 1104 is used to set the analog switch between the pixel array and the column integration circuit to the second switch state;

[0071] The correction module is used to deduct the corresponding row bias coefficient from the output of the multi-column signal readout circuit corresponding to the multi-column pixels in the second switch state of the current row, so as to obtain the correction signal output corresponding to the multi-column pixels. The correction module can finally complete the correction signal output of the entire pixel array by scanning from the first row to the last row through the row scanning circuit. By disconnecting the connection between the passive pixel array and the subsequent active circuit during the row scanning process and directly collecting the output of the subsequent circuit to obtain the real-time multi-column bias output of the same row, the real-time row bias coefficient is obtained by averaging the multi-column bias output, and the output of the normal pixel is directly subtracted from the corresponding row bias coefficient to achieve the same purpose.

[0072] Compared with the DDS function, this solution does not require complex hardware functional circuit support, improves chip yield, significantly reduces dark field image noise, and increases the detector's maximum frame rate.

[0073] Optionally, in any of the above embodiments, the first switch state is a state in which the switch is turned off by pulling IO high through the pixel switch control.

[0074] Optionally, in any of the above embodiments, the bias acquisition module 1102 is specifically configured to determine the number of columns of the column signal readout circuit to be output by balancing the two according to actual needs based on the negative correlation between the limit frame rate and the number of columns of the signal readout circuit, and the positive correlation between the noise level and the number of columns of the signal readout circuit;

[0075] By disconnecting the passive pixel array from the subsequent active circuit during the row scanning process and directly collecting the output of the subsequent circuit, real-time multi-column bias outputs in the same row are obtained. The real-time row bias coefficient is obtained by averaging the multi-column bias outputs, and the output of the normal pixel is directly subtracted from the corresponding row bias coefficient to achieve the same purpose.

[0076] Optionally, in any of the above embodiments, the second switch state is a state in which the switch is pulled low by controlling IO through the pixel switch.

[0077] It can be understood that in some embodiments, some or all of the optional implementation modes in the above embodiments may be included.

[0078] It should be noted that the above embodiments are product embodiments corresponding to the previous method embodiments. For the description of the optional implementation methods in the product embodiments, reference can be made to the corresponding description in the above method embodiments, which will not be repeated here.

[0079] The reader should understand that in the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction.

[0080] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the method embodiments described above are only illustrative, for example, the division of steps is only a logical function division, and there may be other division methods in actual implementation, such as multiple steps can be combined or integrated into another step, or some features can be ignored or not executed.

[0081] If the above method is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0082] The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A method for correcting interfering horizontal stripes of a detector, characterized in that: include: Before reading out the output of the column signal readout circuit corresponding to the multiple columns of pixels in the current row, setting the switch between the pixel array of the detector and the multiple column signal readout circuit corresponding to the subsequent stage to a first switch state; According to the limit frame rate and noise level, the number of columns of the column signal readout circuit to be output needs to be determined; Averaging the outputs of the plurality of columns of signal readout circuits to obtain a bias coefficient of the current row; Setting the switch to a second switch state to obtain a plurality of columns of signal readout circuit outputs corresponding to a plurality of columns of pixels in the current row; Subtract the bias coefficient of the current row from the output of the multi-column signal readout circuit to obtain a multi-column correction signal output corresponding to the multi-column pixels of the current row; Scanning row by row and repeating the above steps until the correction signal output of all pixels in the pixel array is obtained; The first switch state is a state in which the switch is turned off by controlling the IO to be pulled high; The second switch state is a state in which the switch is turned on by controlling the IO to be pulled low.

2. The method for correcting interference horizontal stripes for a detector according to claim 1, characterized in that: The method for determining the number of columns of the column signal readout circuit to be output according to the limit frame rate and the noise level specifically includes: According to the negative correlation between the limit frame rate and the number of signal readout circuit columns, and the positive correlation between the noise level and the number of signal readout circuit columns, the number of columns of the column signal readout circuits to be output is determined by balancing the two according to actual needs.

3. A detector interference fringe correction system, characterized in that: include: A first state setting module, a bias acquisition module, a real-time line bias coefficient acquisition module, a second state setting module and a correction module; The first state setting module is used to set the analog switch between the pixel array of the detector and the column integration circuit to the first switch state before normally reading out the current row of pixels; The bias acquisition module is used to acquire the bias outputs of the multi-column signal readout circuits corresponding to the current row; The real-time row bias coefficient acquisition module is used to obtain the real-time row bias coefficient of the current row after averaging the bias outputs of the multi-column signal readout circuits; The second state setting module is used to set the analog switch between the pixel array and the column integration circuit to a second switch state after executing the first state setting module, the bias acquisition module and the real-time row bias coefficient acquisition module; The correction module is used to deduct the corresponding row bias coefficient from the output of the multi-column signal readout circuit corresponding to the multi-column pixels in the second switch state of the current row, so as to obtain the correction signal output corresponding to the multi-column pixels; the correction module can finally complete the correction signal output of the entire pixel array by scanning from the first row to the last row through the row scanning circuit; The first switch state is a state in which the switch is turned off by controlling the IO to be pulled high; The second switch state is a state in which the switch is turned on by controlling the IO to be pulled low.

4. The interference horizontal stripe correction system for a detector according to claim 3, characterized in that: The bias acquisition module is specifically used to determine the number of columns of the signal readout circuits to be output based on the negative correlation between the limit frame rate and the positive correlation between the noise level and the number of columns of the signal readout circuits, and to balance between the two according to actual needs.

5. A storage medium, characterized in that: The storage medium stores instructions, and when a computer reads the instructions, the computer executes the interference horizontal stripe correction method for a detector as described in claim 1 or 2.

6. An electronic device, characterized in that: The invention comprises a processor and the storage medium as claimed in claim 5, wherein the processor executes instructions in the storage medium.

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