Model selection method and device based on offset error, storage medium, and terminal equipment

Abstract

A method and apparatus, storage medium, and terminal device for model selection based on offset error are disclosed. The method includes: obtaining a layout to be processed; using a target model to perform multiple adjustments on the layout to be processed to obtain a first number of adjusted layouts, wherein the target model is used to resize the layout to be processed based on an optical proximity effect; using the target model to calculate the offset error of the layout to be processed and the offset errors of the first number of adjusted layouts to obtain a second number of offset errors; obtaining a final offset error based on the second number of offset errors; and determining whether to select the target model based on the final offset error. The technical solution of this application can improve the reliability of model selection.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a model selection method and device based on offset error, a storage medium, and a terminal device. Background Art

[0002] Optical Proximity Correction (OPC) is a lithography enhancement technology primarily used in semiconductor chip production to ensure that the actual pattern on the exposed silicon wafer matches the designed pattern. Without OPC, the resulting pattern will differ significantly from the designed pattern, such as line widths that are narrower or wider than designed. These distortions can be compensated by modifying the reticle. OPC compensates for these distortions by shifting the edges of the pattern on the reticle or adding additional polygons.

[0003] During the calculation process of optical proximity correction, the signal sampling is discrete, and the signal between the sampling points needs to be obtained through an interpolation algorithm. Therefore, the signal value of the polygon edge is mostly the result of interpolation calculation. Among them, the sampling point refers to the position of the rectangular frame used for simulation calculation of the critical dimension (CD), which can be specifically represented by the position of the center point of the rectangular frame; the characteristic dimension of the sampling point refers to the length of the line segment (gauge) calculated using the simulation rectangular frame. The range of characteristic dimension variation at each sampling point is called shift variance. Shift variance is one of the important indicators for judging the stability of the model. In the prior art, the model calculates the shift variance based on the input original layout.

[0004] However, there is a certain degree of difference between the graphics in the original layout and the graphics in the layout after optical proximity correction, which makes the offset error calculated based on the original layout inaccurate. When the offset error is used to select the model, the optimal model cannot be selected, which in turn affects the performance of the chip. Summary of the Invention

[0005] The embodiments of the present application provide a model selection method and apparatus, a storage medium, and a terminal device based on offset error, which can improve the reliability of model selection.

[0006] To solve the above technical problems, in a first aspect, an embodiment of the present application provides a model selection method based on offset error, the method comprising: obtaining a layout to be processed; using a target model to perform multiple adjustments to the layout to be processed to obtain a first number of adjusted layouts, wherein the target model is used to adjust the size of the layout to be processed according to the optical proximity effect; using the target model to respectively calculate the offset error of the layout to be processed and the offset error of the first number of adjusted layouts to obtain a second number of offset errors; based on the second number of offset errors, obtaining a final offset error; and determining whether to select the target model based on the final offset error.

[0007] Optionally, determining whether to select the target model based on the final offset error includes: selecting the target model when the final offset error is less than or equal to a first preset threshold.

[0008] Optionally, selecting the target model based on the final offset error includes: obtaining the root mean square error of the target model; calculating the weighted sum of the root mean square error and the final offset error to obtain the function value of the cost function of the target model; and selecting the target model when the function value is less than or equal to a second preset threshold.

[0009] Optionally, the specific expression of the cost function is: Cost = (Rmse×Rmse_weight+MaxSV×MaxSV_weight) / (Rmse_weight+MaxSV_weight), wherein Cost represents the function value of the cost function, Rmse represents the root mean square error of the target model, Rmse_weight represents the weight corresponding to the root mean square error of the target model, MaxSV represents the final offset error, and MaxSV_weight represents the weight corresponding to the final offset error.

[0010] Optionally, the target model is used to make multiple adjustments to the layout to be processed to obtain a first number of adjusted layouts, including: obtaining the geometric figures to be adjusted in the layout to be processed; and the size of the geometric figures to be adjusted is adjusted at least once using the target model to obtain at least one adjusted layout corresponding to the layout to be processed.

[0011] Optionally, adjusting the size of the geometric figure to be adjusted at least once using the target model includes: increasing the size of the geometric figure to be adjusted at least once using the target model; and / or reducing the size of the geometric figure to be adjusted at least once using the target model.

[0012] Optionally, the adjusting the size of the to-be-adjusted geometric figure at least once by using the target model includes: adjusting the size of the to-be-adjusted geometric figure at least once by using the target model according to an offset step.

[0013] Optionally, the adjusting the size of the geometric figure to be adjusted at least once using the target model according to the offset step includes: obtaining the number of offsets; and adjusting the size of the geometric figure to be adjusted according to the offset step using the target model until the number of adjustments reaches the number of offsets.

[0014] Optionally, adjusting the size of the geometric figure to be adjusted according to the offset step until the number of adjustments reaches the offset number includes: when adjusting the size of the geometric figure to be adjusted for the first time, increasing and / or decreasing the size of the geometric figure to be adjusted by the offset step; iteratively obtaining the size of the figure to be adjusted after the last adjustment, and increasing and / or decreasing the offset step after the size of the figure to be adjusted after the last adjustment until the number of adjustments reaches the offset number.

[0015] Optionally, obtaining the final offset error based on the maximum value of the second number of offset errors includes: obtaining the maximum value of the second number of offset errors; and determining the maximum value as the final offset error.

[0016] In the second aspect, the present application also provides a model selection device based on offset error, and the model selection device based on offset error includes: an acquisition module for acquiring a layout to be processed; an adjustment module for using a target model to perform multiple adjustments on the layout to be processed to obtain a first number of adjusted layouts, wherein the target model is used to adjust the size of geometric figures according to the optical proximity effect; a calculation module for using the target model to respectively calculate the offset error of the layout to be processed and the offset error of the first number of adjusted layouts to obtain a second number of offset errors; an offset error determination module for obtaining a final offset error based on the second number of offset errors of the layout to be processed; and a selection module for determining whether to select the target model based on the final offset error.

[0017] In a third aspect, an embodiment of the present application further discloses a computer-readable storage medium having a computer program stored thereon, which executes the steps of the method described in the first aspect when the computer program is executed by a processor.

[0018] In a fourth aspect, an embodiment of the present application further discloses a terminal device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and the processor executes the steps of the method described in the first aspect when running the computer program.

[0019] Compared with the prior art, the technical solution of the embodiment of the present application has the following beneficial effects:

[0020] In the technical solution of the present application, a target model is used to make multiple adjustments to the layout to be processed, and the offset errors of the layout to be processed and the offset errors of the first number of adjusted layouts are calculated respectively to obtain a second number of offset errors; based on the second number of offset errors, a final offset error is obtained; and based on the final offset error, it is determined whether to select the target model. Since there are differences between the layout to be processed and the layout after optical proximity correction, the present application simulates the layout after optical proximity correction by making multiple adjustments to the layout to be processed. By calculating the second number of offset errors for the layout to be processed and the adjusted layout respectively, and obtaining the final offset error from the second number of offset errors, the final offset error is made closer to the offset error of the design figure, thereby achieving the accuracy of the offset error calculation; then, when selecting the target model based on the final offset error, the reliability of the target model selection is guaranteed, thereby ensuring the performance of the produced chip.

[0021] Furthermore, performing multiple adjustments on the layout to be processed using the target model specifically includes adjusting the size of the geometric figure to be adjusted in the layout to be processed at least once, thereby obtaining at least one adjusted layout corresponding to the layout to be processed. Because the difference between the layout to be processed and the layout after optical proximity correction is the difference in size of the geometric figures, when performing multiple adjustments on the layout to be processed, the size of the geometric figure to be adjusted may be adjusted at least once.

[0022] Furthermore, the size of the geometric figure to be adjusted is increased at least once; and / or the size of the geometric figure to be adjusted is reduced at least once. By adjusting the size of the geometric figure to be adjusted in the processed layout to varying degrees in different directions, the present application can more realistically simulate the layout after optical proximity correction, further ensuring the accuracy of offset error calculation and the reliability of model selection. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a flow chart of a model selection method based on offset error provided in an embodiment of the present application;

[0024] Figure 2 This is a schematic diagram of a specific application scenario provided by an embodiment of the present application;

[0025] Figure 3 is a schematic diagram of another specific application scenario provided by an embodiment of the present application;

[0026] Figure 4 3 is a structural diagram of a model selection device based on offset error provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] As described in the background technology, there is a certain degree of difference between the graphics in the original layout and the graphics in the layout after optical proximity correction, which causes the offset error calculated based on the original layout to be inaccurate. When the offset error is used to select the model, the optimal model cannot be selected, which in turn affects the performance of the chip.

[0028] In the technical solution of the present application, a target model is used to make multiple adjustments to the layout to be processed, and the offset errors of the layout to be processed and the offset errors of the first number of adjusted layouts are calculated respectively to obtain a second number of offset errors; based on the second number of offset errors, a final offset error is obtained; and based on the final offset error, it is determined whether to select the target model. Since there are differences between the layout to be processed and the layout after optical proximity correction, the present application simulates the layout after optical proximity correction by making multiple adjustments to the layout to be processed. By calculating the second number of offset errors for the layout to be processed and the adjusted layout respectively, and obtaining the final offset error from the second number of offset errors, the final offset error is made closer to the offset error of the design figure, thereby achieving the accuracy of the offset error calculation; then, when selecting the target model based on the final offset error, the reliability of the target model selection is guaranteed, thereby ensuring the performance of the produced chip.

[0029] The critical dimension (CD) referred to in the embodiments of the present application may also be referred to as key dimension, critical size, important dimension, or any other feasible name, and the embodiments of the present application are not limited to this.

[0030] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0031] Figure 1 This is a flowchart of a model selection method based on offset error in an embodiment of the present application.

[0032] The offset error-based model selection method in the embodiments of the present application can be used in a terminal device, that is, each step of the method can be performed by the terminal device, or by a chip or chip module in the terminal device. The terminal device can specifically be a mobile phone, a computer, a tablet computer, etc.

[0033] Specifically, the model selection method based on offset error may include the following steps:

[0034] Step 101: Obtain the layout to be processed;

[0035] Step 102: Using the target model to adjust the layout to be processed multiple times to obtain a first number of adjusted layouts, wherein the target model is used to adjust the size of the layout to be processed according to the optical proximity effect;

[0036] Step 103: using the target model to calculate the offset errors of the layout to be processed and the offset errors of the first number of adjusted layouts, respectively, to obtain a second number of offset errors;

[0037] Step 104: Obtaining a final offset error based on a second number of offset errors;

[0038] Step 105: Determine whether to select a target model based on the final offset error.

[0039] It should be noted that the serial numbers of the steps in this embodiment do not limit the execution order of the steps.

[0040] It is understood that, in a specific implementation, the offset error-based model selection method can be implemented using a software program that runs on a processor integrated within a chip or chip module. The method can also be implemented using a combination of software and hardware, which is not limited in this application.

[0041] The layout to be processed in this embodiment refers to the layout before optical proximity correction, and may also be referred to as the original layout.

[0042] In the specific implementation of step 101, the layout to be processed is obtained, which can be specifically input into the target model. The layout to be processed in the embodiment of the present invention can be a layout provided by the user that requires process verification, or a layout used for testing.

[0043] In the specific implementation of step 102, the target model is used to resize the layout to be processed based on the optical proximity effect. Resizing the layout to be processed can specifically include increasing and / or decreasing the size of the layout to be processed. Specifically, if the layout to be processed includes geometric figures, resizing the layout to be processed refers to adjusting the size of the geometric figures in the layout to be processed. More specifically, resizing the geometric figures in the layout to be processed refers to adjusting the width, length, or other dimensions of the geometric figures.

[0044] It should be noted that adjusting the size of the geometric figures in the layout to be processed is equivalent to adjusting the spacing between the geometric figures. Since the spacing between the geometric figures affects the lithography process, the adjusted layout is equivalent to simulating layouts under various size conditions, so that the next process can be simulated based on these layouts.

[0045] In a specific embodiment, the layout to be processed is input into the target model, and the target model adjusts the layout to be processed once to obtain an adjusted layout. The above process is repeated to adjust the target model to the layout to be processed multiple times to obtain a first number of adjusted layouts.

[0046] In another specific embodiment, a layout to be processed is input into a target model, and the target model adjusts the layout to be processed more than once to obtain an adjusted layout; a first number of adjusted layouts are obtained in such a manner that an adjusted layout is obtained after at least one adjustment. Unlike the previous embodiment, this embodiment obtains layouts with a greater number of varying sizes.

[0047] In one non-limiting embodiment, a layout to be processed includes a regular geometric figure, such as a rectangle. A geometric figure to be adjusted in the layout to be processed is obtained; and the size of the geometric figure to be adjusted is adjusted at least once using a target model to obtain at least one adjusted layout corresponding to the layout to be processed. Specifically, the size of the geometric figure to be adjusted is adjusted using the target model. More specifically, the width of the geometric figure to be adjusted is adjusted at least once using the target model. For example, the width of the geometric figure to be adjusted may be increased at least once, and / or the width of the geometric figure to be adjusted may be decreased at least once.

[0048] Furthermore, embodiments of the present invention can also be applied to various irregular geometric figures. For 1D and 2D layouts, one direction can be adjusted, that is, the size of the geometric figure in one direction, such as the height and width described above, can be adjusted. For example, for an L-shaped geometric figure, the length and width of the vertical portion can be adjusted, and the length or width of the horizontal portion can also be adjusted, thereby achieving the purpose of adjusting the size of the geometric figure. The adjustment of irregular geometric figures in embodiments of the present invention can be adapted to a single adjustment or multiple adjustments, without specific limitation.

[0049] Refer to Figure 2 , Figure 2 A schematic diagram showing adjustments to a layout to be processed is shown.

[0050] like Figure 2 As shown, the geometric figure to be adjusted in the processing layout 20 is a rectangle with a width a. The width a of the geometric figure is reduced once using target model 1, resulting in a geometric figure with a width a1, i.e., the adjusted layout 21. The width a of the geometric figure is increased once using target model 1, resulting in a geometric figure with a width a2, i.e., the adjusted layout 22.

[0051] It should be noted that Figure 2Only one increase and one decrease of the size of the to-be-processed layout 20 are shown. In actual application scenarios, the size of the to-be-processed layout 20 can be adjusted any number of times, and this application does not impose any limitation on this.

[0052] In another non-limiting embodiment, the target model is used to adjust the size of the geometric figure to be adjusted at least once according to an offset step size. That is, the magnitude of each adjustment to the size of the geometric figure to be adjusted is a fixed value, namely, the offset step size. Specifically, the offset step size can be selected from a configurable range of values, such as {1, 2, 3, 4}, and is expressed in nanometers (nm).

[0053] Furthermore, the number of offsets can be obtained, and the size of the geometric figure to be adjusted can be adjusted using the target model according to the offset step size until the number of adjustments reaches the number of offsets. In this embodiment, the number of offsets can represent the total number of times the size of the geometric figure to be adjusted has been adjusted. For example, a number of offsets of 8 indicates that the size of the geometric figure to be adjusted has been adjusted 8 times.

[0054] In another alternative embodiment, the size of the geometric figure to be adjusted can be adjusted in two directions (e.g., increase and decrease). In this case, the number of offsets can represent the number of times the size of the geometric figure to be adjusted is adjusted in each direction. For example, a number of offsets of 4 indicates that the size of the geometric figure to be adjusted is increased 4 times and decreased 4 times, resulting in a total number of 8 times the size of the geometric figure to be adjusted is adjusted.

[0055] Specifically, the number of offsets may also be selected from a configurable numerical range, for example, the numerical range is {0, 1, 2, 3, 4}.

[0056] The following combination Figure 3 The process of adjusting the layout to be processed according to the offset step size and the number of offsets is described in detail.

[0057] The geometry to be adjusted in the layout 30 to be processed is a rectangle, and the width of the geometry is b. The offset step size is 1 nm, and the number of offsets is 4. When the geometry to be adjusted is adjusted for the first time, the width of the geometry to be adjusted is reduced by 1 nm, and the width of the adjusted geometry is b-1=b4; and the width of the geometry to be adjusted is increased by 1 nm, and the width of the adjusted geometry is b+1=b5. Similarly, the width of the geometry to be adjusted is reduced by 2 nm, and the width of the adjusted geometry is b-2=b3; and the width of the geometry to be adjusted is increased by 2 nm, and the width of the adjusted geometry is b+2=b6. The width of the geometry to be adjusted is reduced by 3 nm, and the width of the adjusted geometry is b-3=b2; and the width of the geometry to be adjusted is increased by 3 nm, and the width of the adjusted geometry is b+3=b7.

[0058] The width of the geometric figure to be adjusted is reduced by 4 nm, and the width of the adjusted geometric figure is b-4 = b1. The width of the geometric figure to be adjusted is increased by 4 nm, and the width of the adjusted geometric figure is b+4 = b8. At this point, eight adjusted layouts can be obtained, and the widths of the geometric figures in the eight adjusted layouts are b1, b2, b3, b4, b5, b6, b7, and b8 respectively.

[0059] This application can more realistically simulate the layout after optical proximity correction by adjusting the size of the geometric figures to be adjusted in the processed layout to different degrees in different directions, further ensuring the accuracy of the offset error calculation and the reliability of the model selection.

[0060] In a specific application scenario, the target model may be an OPC model, including but not limited to an optical model and a resist model; the target model may also be an electron beam model (e-beam model) or the like.

[0061] Continue to refer to Figure 1 In the specific implementation of step 103, the target model is used to calculate the offset error of the layout to be processed and the offset errors of the first number of adjusted layouts. In the process of calculating the offset error of each layout, the difference between the maximum and minimum feature sizes of a sampling point in the layout is first taken. Then, the maximum value of the differences is obtained for all sampling points in the layout, and the maximum value is used as the offset error of the layout.

[0062] It should be noted that the specific calculation method of the offset error can be calculated using any feasible existing technology, and this application does not impose any restrictions on this.

[0063] In a specific implementation of step 104, a final offset error is obtained based on the second number of offset errors. Specifically, a maximum value among the second number of offset errors is obtained, and the maximum value is determined as the final offset error.

[0064] Continue to refer to Figure 2 , offset error 1 is calculated for layout 20 to be processed using target model 1, offset error 2 is calculated for layout 21 after adjustment, and offset error 3 is calculated for layout 22 after adjustment. The maximum value among offset error 1, offset error 2, and offset error 3 is selected to obtain the final offset error calculated for layout 20 to be processed using target model 1.

[0065] Continue to refer to Figure 3 , the target model 1 is used to calculate the offset errors of the processing layout 30 and the 8 adjusted layouts respectively, and the maximum value among the 9 offset errors is determined as the final offset error.

[0066] Because different target models have different performance, the final offset error obtained from running the same layout through different target models will be different. The final offset error can be used to characterize the performance of the target model.

[0067] For example, the target model 2 is used to execute the above steps 102 to 104 for the layout 20 to be processed, and the final offset error calculated for the layout 20 to be processed using the target model 2 is obtained. The final offset error can characterize the performance of the target model 2; similarly, the target model 3 is used to execute the above steps 102 to 104 for the layout 20 to be processed, and the final offset error calculated for the layout 20 to be processed using the target model 3 is obtained. The final offset error can characterize the performance of the target model 3.

[0068] In the specific implementation of step 105, whether to select a target model can be determined based on the final offset error. Specifically, if the final offset error meets certain requirements, the target model can be selected and used in the actual lithography process. Otherwise, the target model is rejected and will not be used in subsequent lithography processes.

[0069] In a specific embodiment, the target model is selected when the final offset error is less than or equal to a first preset threshold.

[0070] In this embodiment, the first preset threshold can be set according to the process requirements of the semiconductor. When the final offset error calculated by the target model for the layout to be processed is less than or equal to the first preset threshold, it means that the target model meets the process requirements, and the target model can be selected.

[0071] In another specific embodiment, a root mean square error (RMSE) of the target model is obtained; a weighted sum of the RMS error and the final offset error is calculated to obtain a function value of a cost function of the target model; and the target model is selected when the function value is less than or equal to a second preset threshold.

[0072] In this embodiment, the root mean square error (RMS) of the target model represents the simulation accuracy of the target model. The smaller the RMS error, the more accurate the simulation. The RMS error of the target model can be pre-measured and calculated. The RMS error and the final offset error have corresponding weights. These weights and the second preset threshold can be pre-set based on semiconductor process requirements. For example, the weight corresponding to the RMS error is 0.5, the weight corresponding to the final offset error is 0.5, and the second preset threshold is 0.95.

[0073] In a specific example, the cost function is specifically expressed as: Cost = (Rmse×Rmse_weight+MaxSV×MaxSV_weight) / (Rmse_weight+MaxSV_weight) where Cost represents the function value of the cost function, Rmse represents the root mean square error of the target model, Rmse_weight represents the weight corresponding to the root mean square error of the target model, MaxSV represents the final offset error, and MaxSV_weight represents the weight corresponding to the final offset error.

[0074] For example, the weight corresponding to the root mean square error is 0.5, the weight corresponding to the final offset error is 0.5, the second preset threshold is 0.95, the root mean square error is 1, and the final offset error is 0.5. Therefore, the function value of the cost function of the target model is 1 × 0.5 + 0.5 × 0.5 = 0.75. The function value of 0.75 is less than the second preset threshold of 0.95, so the target model meets the process requirements and can be selected.

[0075] This application simulates a layout after optical proximity correction by making multiple adjustments to the layout to be processed. By calculating a second number of offset errors for the layout to be processed and the adjusted layout, and deriving a final offset error from the second number of offset errors, the final offset error is brought closer to the offset error of the design pattern, thereby achieving accuracy in offset error calculation. This ensures the reliability of target model selection and, consequently, the performance of the produced chip, when selecting a target model based on the final offset error.

[0076] Please refer to Figure 4 The embodiment of the present application further discloses a model selection device 40 based on offset error. The model selection device 40 based on offset error may include:

[0077] An acquisition module 401 is used to acquire a layout to be processed;

[0078] An adjustment module 402 is configured to adjust the layout to be processed multiple times using a target model to obtain a first number of adjusted layouts, wherein the target model is configured to adjust the size of the geometric figure according to an optical proximity effect;

[0079] A calculation module 403 is configured to calculate the offset error of the layout to be processed and the offset errors of the first number of adjusted layouts using the target model to obtain a second number of offset errors;

[0080] An offset error determination module 404 is configured to obtain a final offset error based on a second number of offset errors of the layout to be processed;

[0081] The selection module 405 is configured to determine whether to select a target model based on the final offset error.

[0082] In a non-limiting embodiment, the selection module 405 selects the target model when the final offset error is less than or equal to a first preset threshold.

[0083] In another non-limiting embodiment, the selection module 405 includes: an acquisition unit for acquiring the root mean square error of the target model; a function value calculation unit for calculating the weighted sum of the root mean square error and the final offset error to obtain the function value of the cost function of the target model; and a selection unit for selecting the target model when the function value is less than or equal to a second preset threshold.

[0084] In a non-limiting embodiment, the adjustment module 402 includes a geometry acquisition unit for obtaining the geometry to be adjusted in the layout to be processed; and a first adjustment unit for adjusting the size of the geometry to be adjusted at least once using a target model to obtain at least one adjusted layout corresponding to the layout to be processed.

[0085] Furthermore, the first adjustment unit increases the size of the geometric figure to be adjusted at least once by using the target model; and / or reduces the size of the geometric figure to be adjusted at least once by using the target model.

[0086] Furthermore, the first adjustment unit uses the target model to adjust the size of the geometric figure to be adjusted at least once according to the offset step.

[0087] Furthermore, the first adjustment unit obtains the number of offsets, and uses the target model to adjust the size of the geometric figure to be adjusted according to the offset step size until the number of adjustments reaches the number of offsets.

[0088] For more information about the working principle and working method of the model selection device 40 based on the offset error, please refer to Figures 1 to 3The relevant description in will not be repeated here.

[0089] In a specific implementation, the above-mentioned offset error calculation device can correspond to a chip with an offset error calculation function in a terminal device, such as a SOC (System-On-a-Chip), a baseband chip, etc.; or correspond to a chip module with an offset error calculation function in a terminal device; or correspond to a chip module with a data processing function chip, or correspond to a terminal device.

[0090] Regarding the various modules / units contained in the various devices and products described in the above embodiments, they can be software modules / units, hardware modules / units, or partly software modules / units and partly hardware modules / units. For example, for various devices and products applied to or integrated in a chip, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, or at least some of the modules / units can be implemented in the form of software programs, which run on the processor integrated inside the chip, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated in a chip module, the various modules / units contained therein can all be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component of the chip module (such as a chip, circuit module, etc.) or in different components, or at least some of the modules / units can be implemented in the form of hardware such as circuits. The element can be implemented in the form of a software program, which runs on the processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits; for various devices and products applied to or integrated in the terminal, the various modules / units contained therein can be implemented in the form of hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or different components in the terminal, or, at least some modules / units can be implemented in the form of a software program, which runs on the processor integrated inside the terminal, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuits.

[0091] The present application also discloses a storage medium, which is a computer-readable storage medium having a computer program stored thereon. When the computer program is executed, the steps of the aforementioned method can be executed. The storage medium may include ROM, RAM, a magnetic disk, or an optical disk. The storage medium may also include non-volatile memory or non-transitory memory.

[0092] The present application also discloses a terminal device, which may include a memory and a processor. The memory stores a computer program executable on the processor. When the processor executes the computer program, the steps of the aforementioned method may be performed. The terminal device includes, but is not limited to, a mobile phone, a computer, a tablet computer, and other terminal devices.

[0093] It should be understood that the term "and / or" in this document simply describes a relationship between related objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. Furthermore, the character " / " in this document indicates that the related objects are in an "or" relationship.

[0094] The term "plurality" used in the embodiments of the present application refers to two or more.

[0095] The first, second, etc. descriptions appearing in the embodiments of this application are only for illustration and distinction of the description objects. There is no order, nor does it indicate any special limitation on the number of devices in the embodiments of this application, and cannot constitute any limitation on the embodiments of this application.

[0096] The "connection" appearing in the embodiments of the present application refers to various connection methods such as direct connection or indirect connection to achieve communication between devices, and the embodiments of the present application do not impose any limitations on this.

[0097] It should be understood that in the embodiments of the present application, the processor may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0098] It should also be understood that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0099] The above embodiments can be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired or wireless means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more available media sets.

[0100] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0101] In the several embodiments provided in this application, it should be understood that the disclosed methods, devices, and systems can be implemented in other ways. For example, the device embodiments described above are merely schematic; for example, the division of the units is merely a logical function division, and there may be other division methods in actual implementation; for example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, indirect coupling or communication connection of devices or units, which may be electrical, mechanical, or other forms.

[0102] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0103] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may be physically included separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0104] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium and includes a number of instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to perform some steps of the method described in each embodiment of the present application.

[0105] Although the present application is disclosed as above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined by the claims.

Claims

1. A model selection method based on offset error, characterized in that: include: Get the layout to be processed; Using a target model to adjust the layout to be processed multiple times to obtain a first number of adjusted layouts, wherein the target model is used to adjust the size of the layout to be processed according to an optical proximity effect; Using the target model, respectively calculating the offset error of the layout to be processed and the offset errors of the first number of adjusted layouts to obtain a second number of offset errors; Obtaining a final offset error based on the second number of offset errors, specifically, obtaining a maximum value among the second number of offset errors; and determining the maximum value as the final offset error; Whether to select the target model is determined based on the final offset error.

2. The model selection method based on offset error according to claim 1, characterized in that: The determining whether to select the target model based on the final offset error includes: When the final offset error is less than or equal to a first preset threshold, the target model is selected.

3. The model selection method based on offset error according to claim 1, characterized in that: The selecting the target model based on the final offset error comprises: Obtaining a root mean square error of the target model; Calculating a weighted sum of the root mean square error and the final offset error to obtain a function value of the cost function of the target model; When the function value is less than or equal to a second preset threshold, the target model is selected.

4. The model selection method based on offset error according to claim 3, characterized in that: The specific expression of the cost function is: in, represents the function value of the cost function, represents the root mean square error of the target model, represents the weight corresponding to the root mean square error of the target model, represents the final offset error, Indicates the weight corresponding to the final offset error.

5. The model selection method based on offset error according to any one of claims 1 to 4, characterized in that: The step of adjusting the layout to be processed multiple times using the target model to obtain a first number of adjusted layouts includes: Obtaining a geometric figure to be adjusted in the layout to be processed; The target model is used to adjust the size of the to-be-adjusted geometric figure at least once to obtain at least one adjusted layout corresponding to the to-be-processed layout.

6. The model selection method based on offset error according to claim 5, characterized in that: The step of adjusting the size of the geometric figure to be adjusted at least once by using the target model includes: increasing the size of the geometric figure to be adjusted at least once using the target model; and / or, The target model is used to reduce the size of the geometric figure to be adjusted at least once.

7. The model selection method based on offset error according to claim 5, characterized in that: The step of adjusting the size of the geometric figure to be adjusted at least once by using the target model includes: The target model is used to adjust the size of the geometric figure to be adjusted at least once according to the offset step size.

8. The model selection method based on offset error according to claim 7, characterized in that: The step of adjusting the size of the geometric figure to be adjusted at least once using the target model according to the offset step size includes: Get the number of offsets; The target model is used to adjust the size of the geometric figure to be adjusted according to the offset step size until the number of adjustments reaches the number of offsets.

9. A model selection device based on offset error, characterized in that: include: An acquisition module is used to obtain the layout to be processed; an adjustment module, configured to adjust the layout to be processed multiple times using a target model to obtain a first number of adjusted layouts, wherein the target model is used to adjust the size of the geometric figure according to an optical proximity effect; a calculation module, configured to calculate the offset error of the layout to be processed and the offset errors of the first number of adjusted layouts respectively using the target model to obtain a second number of offset errors; an offset error determining module, configured to obtain a final offset error based on a second number of offset errors of the layout to be processed, wherein the offset error determining module obtains a maximum value among the second number of offset errors and determines the maximum value as the final offset error; A selection module is configured to determine whether to select the target model based on the final offset error.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a computer, the step of selecting a model based on offset error according to any one of claims 1 to 8 is performed.

11. A terminal device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, characterized in that: When the processor runs the computer program, the processor performs the steps of the offset error-based model selection method according to any one of claims 1 to 8.

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