Driving circuit, LED circuit and driving method

Abstract

A drive circuit includes a switched mode power converter circuit for converting a supply voltage (e.g. rectified mains) including an energy storage component and a main control switch. The energy storage component discharges to provide a regulated DC current to an output load when the main control switch switches. The regulated current is modulated using a time-varying offset to control the voltage across the energy storage component. In this way, the voltage across the energy storage component is kept above the supply voltage with a safety margin and this serves to prevent input current spikes and hence a reduction in efficiency of the drive circuit.

Description

TECHNICAL FIELD

[0001] The present invention relates to a driver circuit, in particular for driving LED loads. BACKGROUND

[0002] LED lighting has been popular for several years and the user demand for light quality is increasing.

[0003] Many lighting applications require high power factor and low total harmonic distortion, while also maintaining flicker free light output. Especially for indoor professional applications, lighting flicker can cause eye discomfort and also make the work task more difficult.

[0004] Typically, dual stage drivers are used in order to achieve high power factor as well as flicker free applications. With the increasing stringent requirements on cost, single stage topology (or 1.5 stage topology) would be preferred to balance cost and performance.

[0005] Examples of popular single stage driver topologies are the SEPIC converter and the Cuk converter to provide low cost and reasonable performance. Single stage converters have only one control input to define the setting of the driver, instead of having a separate PFC stage. A problem encountered in some single stage driver designs (discussed further below) that implement power factor correction is that current spikes can occur in the input current, reducing the power factor and total harmonic distortion (THD) of the driver.

[0006] This can occur if the voltage stored on the capacitor in series with the load drops below the rectified input voltage, so that current can flow directly from the input to charge the capacitor without any control.

[0007] Current spikes can be removed by selecting appropriate component values in the driver circuit, but this is at the expense of reduced efficiency, and / or larger and more expensive components.

[0008] Therefore, there is a need for an improved driver design that is able to avoid input current spikes without significant impact on system efficiency or cost of required components.

[0009] US2012 / 0320641A1 discloses a method of controlling the phase angle to provide a margin between the voltage across the energy storage capacitor and the input voltage.

[0010] 20110140630A1 discloses a SEPIC converter with output current control, which uses a fixed reference current. SUMMARY

[0011] The invention is defined by the claims.

[0012] The idea of the invention is to provide a time-varying adjustment of a reference current for controlling the generation of a regulated current from a driver using a switch mode power converter. In particular, a time-varying offset is provided to modulate the regulated (output) current. By modulating the current, the discharge of the energy storage component is limited and the voltage across the energy storage component is maintained. In this way, input current spikes can be avoided by ensuring that the voltage across the energy storage component (e.g. a capacitor) of the switch mode power converter is maintained above the supply voltage. Thus, when the supply voltage charges the energy storage component, the charging is controlled.

[0013] According to the invention, there is provided a driver circuit comprising:

[0014] a converter comprising:

[0015] an input for receiving a supply voltage having a periodic ripple, the supply voltage having a peak portion and a valley portion;

[0016] a switch mode power converter circuit for converting the supply voltage, the switch mode power converter circuit comprising an energy storage component and a main control switch;

[0017] an output; and

[0018] a current sensor for sensing an output current delivered at the output and producing a sensed current signal;

[0019] a control circuit for controlling switching of the main control switch of the converter circuit, wherein the energy storage component is adapted to discharge upon switching of the main control switch to provide a regulated DC current at the output; and

[0020] a modulation circuit for applying a time-varying offset to the control circuit to modulate the regulated current to control the voltage across the energy storage component, wherein the modulation circuit comprises a ramp circuit for producing a time-varying ramp signal combined with a static reference current signal to produce a modulated reference current signal, and the control circuit comprises a comparator circuit for comparing the sensed current signal with the modulated reference current signal and the output of the comparator is used to provide a current feedback signal to the control circuit, such that the time-varying offset is adapted to ensure a margin of the voltage across the energy storage component above the supply voltage.

[0021] The driver adjusts the regulated current in such a way that it reduces the voltage ripple across the energy storage component of the converter by ensuring that the voltage across the energy storage component remains above the supply voltage (i.e. a safety margin). This measure can be used to prevent current from flowing from the supply voltage outside the control of the control circuit to the energy storage component. Such a flow of current can cause current spikes in the input current drawn from the power supply. The invention is able to prevent these current spikes while avoiding increasing the size of the energy storage component and avoiding the use of undesirable other component values (such as inductance).

[0022] The time-varying offset for example reduces the regulated current when the supply voltage is in its valley portion. The effect of this is to reduce the discharge of energy from the energy storage component and thereby to maintain a more uniform (high) voltage across the energy storage component.

[0023] The offset for example corresponds to a modification of the regulated current of less than 5% of the regulated current, the valley portion being a portion having an amplitude lower than 30% of the average amplitude of the supply voltage. The loss of output caused by the reduced current can be compensated by increasing the regulated current at the peak portion, in which case the energy storage component has been charged to a high voltage by the peak portion of the supply voltage. The energy storage component can thereby discharge more energy while still maintaining the safety margin. The peak portion is a portion having an amplitude higher than 70% of the average amplitude of the supply voltage.

[0024] Note that these definitions of peak portion and valley portion are somewhat arbitrary. The modulation of the current is relatively small (such as 5%) so that the effect on the LED current and hence on the light output is not perceptible or almost not perceptible. A 5% flicker can also be accepted by product certification bodies.

[0025] The time-varying offset for example reduces the regulated current during the decrease of the supply voltage in the valley portion when the main control switch is switched during the period in which the energy storage component discharges energy, so that the energy storage component is adapted to discharge in a limited manner. The energy storage component thereby has a maintained voltage so that the voltage across the energy storage component remains higher than the supply voltage, especially when a peak portion of the supply voltage is reached.

[0026] The offset thereby ensures that there is a sufficient maintained voltage on the energy storage component so that in a subsequent operating phase, in which the main control switch is open to allow the supply voltage to charge the energy storage component, the voltage remains higher than the supply voltage.

[0027] The time-varying offset for example increases the regulated current during the increase of the supply voltage in the peak portion when the main switch is switched during the period in which the energy storage component discharges energy, wherein the increase of the regulated current is adapted to compensate for the decrease of the regulated current in the valley portion so that the average current meets the regulated DC current.

[0028] Thus, the desired overall current regulation implemented by the driver is not affected.

[0029] Thus, the modulation is achieved by adjusting the reference current used in the current feedback control loop. This avoids the need to change the feedback control method itself. The modulation can be achieved simply by pre-processing the reference current signal.

[0030] The ramp circuit is adapted to generate a triangular time-varying offset signal as a time-varying ramp signal. The ramp signal generator is a simple low-cost circuit which can be used to adjust the reference current signal. It is driven, for example, by a square wave signal.

[0031] The ramp circuit is adapted to generate the ramp signal such that the modulated reference current signal has a valley at the zero-crossing point of the AC mains and a peak at the peak value of the AC mains.

[0032] The modulated reference current causes the output current to be small at the zero-crossing point of the AC mains, so the energy in the capacitor is preserved at this time; and when the AC mains is at the peak value, the energy preserved in the capacitor is sufficient to keep the voltage on the capacitor above the peak AC mains with a safety margin, so the inrush / peak input current is prevented.

[0033] The switch mode power converter circuit comprises, for example, a 1.5 stage switch mode power converter having an input stage and an output stage, wherein the input stage comprises a power commutation inductor which is different from an energy storage component, and the energy storage component comprises a capacitor which is connected in series between the input stage and the output stage.

[0034] The so-called 1.5 stage converter has an input stage and an output stage, but uses a single shared control switch, and thus only one control circuit. The single control switch controls the charging and discharging of both the power commutation inductor and the energy storage component (e.g. a capacitor).

[0035] In this example, the energy storage capacitor is a bulk storage capacitor connected in series between the input and output terminals, and is charged from the power supply and discharged to the load during the cyclic operation of the switch mode power converter.

[0036] In particular:

[0037] When the main control switch is on, the input stage is adapted to charge the power commutation inductor from the supply voltage, and the energy storage component is adapted to discharge into the output stage; and

[0038] When the main control switch is off, the input stage is adapted to allow the power commutation inductor and the supply voltage to charge the energy storage component, and the output stage is adapted to release the previous discharge from the energy storage component.

[0039] In a first example, the converter comprises a SEPIC converter, wherein the input stage comprises a power commutation inductor in series with the input terminal and a main control switch to ground, and the output stage comprises a diode and a parallel inductor in series with the output terminal, wherein the input stage further comprises a series diode at the input terminal.

[0040] In a second example, the converter comprises a Cuk converter, wherein the input stage comprises a power commutation inductor in series with the input terminal and a main control switch to ground, and the output stage comprises an inductor and a parallel diode in series with the output terminal, wherein the input stage further comprises a series diode at the input terminal.

[0041] In a third example, the converter comprises a BiFRED converter, wherein the input stage comprises a power commutation inductor in series with the input terminal and a main control switch to ground, and the output stage comprises a diode and a parallel transformer in series with the output terminal, wherein the input stage further comprises a series diode at the input terminal.

[0042] Thus, there are different converter topologies which can be used in the drive circuit of the present application.

[0043] The present application also provides an LED circuit comprising:

[0044] a drive circuit as defined above; and

[0045] an LED arrangement connected to the output terminal of the converter.

[0046] The LED circuit for example further comprises:

[0047] an AC input;

[0048] a rectifier; and

[0049] a smoothing capacitor in parallel across the output terminal of the rectifier,

[0050] wherein the output terminal of the rectifier comprises a supply voltage having a periodic ripple.

[0051] Thus, the LED circuit is driven from an AC input, such as mains, and utilizes a single stage (or 1.5 stage) driver topology to deliver high power factor and low total harmonic distortion.

[0052] The present application also provides a drive method comprising:

[0053] receiving a supply voltage having a periodic ripple, the supply voltage having a peak portion and a valley portion;

[0054] converting the supply voltage using a switched mode power converter, the switched mode power converter circuit comprising an energy storage component and a main control switch;

[0055] switching of a main control switch of a switched mode power converter circuit to provide a regulated current at an output, wherein an energy storage component is adapted to discharge at switching of the main control switch to provide the regulated DC current;

[0056] sensing an output current delivered at the output and generating a sensed current signal; and

[0057] modulating the regulated current using a time-varying offset to control a voltage across the energy storage component to ensure a margin of the voltage across the energy storage component above a supply voltage,

[0058] wherein the step of modulating using a time-varying offset comprises generating a time-varying ramp signal for combination with a static reference current signal to generate a modulated reference current signal;

[0059] and the step of controlling switching of the main control switch comprises comparing the sensed current signal with the modulated reference current signal, and an output of the comparison is used to provide a current feedback signal for control.

[0060] The method can comprise using the time-varying offset to reduce the regulated current during a reduction in the supply voltage at a valley portion, such that the energy storage component is adapted to discharge in a limited manner. Thereby having a retained voltage such that the voltage across the energy storage component remains above the supply voltage in a peak portion, wherein the ramp signal is generated such that the modulated reference current signal has a valley value at a zero-crossing of the AC mains and a peak value at a peak of the AC mains.

[0061] These and other aspects of the application will be apparent from and elucidated with reference to the embodiments described hereinafter. BRIEF DESCRIPTION OF DRAWINGS

[0062] For a better understanding of the present application, and to show how it can be implemented, reference will now be made, purely by way of example, to the accompanying drawings in which:

[0063] Figure 1 a 1.5 stage SEPIC (Single-Ended Primary Inductor Converter) converter is shown;

[0064] Figure 2 a 1.5 stage Cuk converter is shown;

[0065] Figure 3 a BiFRED converter is shown;

[0066] Figure 4 waveforms for operation of the circuit of Figure 1 when a current spike occurs in the input current;

[0067] Figure 5A SEPIC circuit adjusted according to the present application is shown;

[0068] Figure 6 for showing Figure 5 the operation of the circuit of

[0069] Figure 7 for showing the operation of the circuit of Figure 5 with the modulation circuit. DETAILED DESCRIPTION

[0070] The present application will be described with reference to the accompanying drawings.

[0071] It should be understood that the detailed description and specific examples, while indicating exemplary embodiments of apparatuses, systems and methods, are intended for purposes of illustration only and are not intended to limit the scope of the present application. These and other features, aspects, and advantages of the apparatuses, systems and methods of the present application will become better understood from the following description, appended claims, and accompanying drawings. It should be understood that the drawings are only schematic and are not drawn to scale. It should also be understood that the same reference numerals are used throughout the drawings for like or similar items.

[0072] The present application provides a drive circuit comprising a switched mode power converter circuit for converting a supply voltage (e.g. a rectified mains supply) comprising an energy storage component and a main control switch. The energy storage component discharges to provide a regulated DC current to an output load at the time of switching of the main control switch. The regulated current is modulated using a time-varying offset, thereby controlling the voltage across the energy storage component. In this way, the voltage across the energy storage component is kept above the supply voltage with a safety margin, and this serves to prevent the supply voltage from becoming higher than the voltage across the energy storage component, and to prevent uncontrolled input current spikes, and thus to prevent a reduction in the power factor THD of the drive circuit.

[0073] Figure 1 A 1.5 stage SEPIC (Single-Ended Primary Inductor Converter) is shown in schematic form. A rectified AC signal Vrec is provided as input. The converter comprises a first power commutation inductor LI in series with the input and a series capacitor CI acting as an energy storage component. The junction between them (the connection between the output side of the inductor LI and the input side of the capacitor CI) is connected to ground through a current sense resistor Rs1 and through a main control switch Ql. Thus, the first inductor LI is in series with the main control switch Ql between the input and ground. These components define the input stage. The current sense resistor Rs1 is used to sense the inductor current flowing through the main control switch Ql.

[0074] By using a reference signal from the feedback signal related to the LED current, the current sense signal using Rs1 is used for peak current control. The current signal through the main control switch Q1 is also used for overcurrent protection.

[0075] The output stage comprises a parallel inductor L2 (between the output side of the capacitor Cl and ground) and a diode Dl in series with the output. The output is an LED stage shown with a parallel storage capacitor C LED, and another current sense resistor Rs2 is in series with the LED load for sensing the output current.

[0076] The above components correspond to a standard SEPIC converter. An additional reverse diode D2 is added at the input, and the capacitor Cl is implemented as a high capacitance bulk capacitor. This is referred to as a modified SEPIC (“m-SEPIC”) circuit. This modification enables high PF operation.

[0077] The size of the bulk capacitor depends on the power of the circuit. The capacitor can for example be 10 pF, while for a regular SEPIC circuit, a few hundred nF is typical.

[0078] The diode D2 ensures that the energy of the bulk capacitor Cl does not flow back to the input. Furthermore, the inductance ratio L2 / L1 keeps the bulk capacitor voltage sufficiently high at all times to maintain the LED current without current ripple.

[0079] The controller 10, in particular the control circuit, controls the operation of the main switch based on the sensed current. The controller controls the main control switch to achieve a regulated current of the desired output, in particular by controlling the switching duty cycle (and / or frequency) of the main control switch.

[0080] When the main switch Ql is on, the supply voltage charges the inductor LI, while the capacitor Cl discharges the inductor L2, both through the switch Ql. When the main switch Ql is off, the inductance LI and the supply voltage form a boost converter to charge the capacitor Cl; while the inductor L2 freewheels to discharge current to the LEDs via the diode Dl.

[0081] Figure 2 A 1.5 stage Cuk converter is shown. A rectified AC signal Vrec is provided as input. The converter likewise comprises a first power commutating inductor LI in series with the input and a series capacitor Cl as energy storage component. The junction between them (the connection between the output side of the inductor LI and the input side of the capacitor Cl) is connected to ground through a current sense resistor Rs1 and a main control switch Ql. Thus, the first inductor LI is connected in series with the input and the main control switch Ql to ground. These components define the input stage. The current sense resistor Rs1 is used to sense the inductor current.

[0082] The output stage comprises a parallel diode D10 between the output side of the capacitor Cl and ground and an inductor L20 in series with the output. The output is shown as an LED stage (with a parallel storage capacitor C LED) with a voltage (of opposite polarity) across the Figure 1 Another current sense resistor Rs2 is in series with the LED load for sensing the output current.

[0083] The above components correspond to a standard Cuk converter. Also added is an additional reverse diode D2 and the capacitor Cl is implemented as a high capacitance bulk capacitor.

[0084] When the main switch Ql is on, the supply voltage charges the inductor LI and the capacitor Cl discharges the inductor L20 and the LEDs, both through the switch Ql. When the main switch Ql is off, the inductor LI and the supply voltage form a boost converter charging the capacitor Cl via D10; while the inductor L20 freewheels to discharge current to the LEDs via diode D10.

[0085] Figure 3 A BiFRED (Boost-Integrated Flyback) converter is shown. This corresponds to a SEPIC converter of Figure 1 but with a transformer with a primary side winding TP and a secondary side winding TS instead of the inductor L2. The primary side of the transformer forms the inductor of the input stage, while the secondary side of the transformer forms part of the output stage and delivers current to the load. As shown in Figure 1 a rectified AC signal Vrec is provided as input. The converter comprises a first power commutating inductor LI in series with the input and a series capacitor Cl as energy storage component. The junction between them (the connection between the output side of the inductor LI and the input side of the capacitor Cl) is connected through a current sense resistor Rs1 and through the main control switch Ql to ground. Thus, the first inductor LI is in series with the main control switch Ql between the input and ground. These components define the input stage. The current sense resistor Rs1 is for sensing the inductor current flowing through the main control switch Ql. When the main switch Ql is on, Vrec charges the inductor LI ; and the capacitor Cl discharges via the primary side winding TP and stores energy in the transformer. When the main switch Ql is off, Vrec and the inductor LI discharge energy to charge the capacitor Cl and the primary side winding TP; the primary side TP transfers the stored energy from Cl and the input energy from Vrec and the inductor LI during the main switch on period to the secondary side winding TS and the load LEDs.

[0086] In an alternative topology, Cl is moved between the primary side winding TP and ground, but the principle is the same.

[0087] The transformer provides an isolated bridge between the input stage and the output stage, and the output stage has a diode D1 in series with the secondary winding TS to the output.

[0088] In each of these circuits, the input receives a supply voltage (Vrec) with a periodic ripple, having a peak portion and a valley portion. The input is for example a rectified mains signal. The valley portion can be defined as the portion having an amplitude lower than 30% of the average amplitude of the supply voltage, while the peak portion can be defined as the portion having an amplitude higher than 70% of the average amplitude of the supply voltage.

[0089] Also, in each of these circuits, when the main control switch Q1 is on, the input stage charges the power commutation inductor LI from the supply voltage. During this time, the capacitor CI discharges to the output stage (the discharge is stored in the inductor of the output stage). When the main control switch Q1 is off, the input stage allows the power commutation inductor LI and the supply voltage to charge the capacitor CI. The output stage (inductor) releases the discharge previously provided by the capacitor CI. In other words, current is delivered from the input via the commutation inductor LI and the capacitor CI to the load (as well as together with the current from the inductor L2, L20).

[0090] Unlike a two-stage driver with two separate control mechanisms, one of which controls the current of the inductor LI to achieve low total harmonic distortion, and one of which controls the current of L2 to regulate the LED current and achieve flicker-free operation, the 1.5 stage topology without a separate power factor correction stage has only one control mechanism to maintain the absence of LED current ripple.

[0091] For a given input and output voltage, the voltage on the bulk capacitor is determined by the ratio of the inductors L2 / L1. A higher ratio corresponds to a higher voltage on the bulk capacitor, which helps to eliminate current spikes in the mains.

[0092] In the above type of converter, as well as other converters not mentioned, the bulk capacitor voltage should be higher than the mains rectified voltage Vrec, otherwise when the main switch Q1 is off, current will flow directly through D2, LI and L2 to charge the bulk capacitor CI directly without any control. This results in unwanted spikes on the input current, reducing the efficiency of the circuit.

[0093] Figure 4 The waveforms are shown for the operation of the circuit of Figure 1 when these current spikes occur.

[0094] The top graph shows the current I_L2 through inductor L2. The second graph shows the current I_L1 through inductor L1. The third graph shows the rectified mains voltage Vrec and the voltage V_C1 across capacitor C1. The bottom graph shows the input current I_IN and the LED current I_LED. The current spike in the input current is shown in region 30. In Figure 4 region 30, the voltage V_C1 has touched and extended below the voltage Vrec in the peak part of the signal Vrec, so that the voltage Vrec directly charges the capacitor C1 without being controlled or limited by the boost inductor L1. This results in the relatively large current spike 30.

[0095] There are two known ways to eliminate the current spike. The first is to increase the ratio L2 / L1 and the second is to increase the size of the bulk capacitor C1. A smaller inductance of L1 (to increase L2 / L1) results in a fast rise of the peak current through L1 and through the main control switch, which is detrimental to efficiency. The bulk capacitor impacts size and cost.

[0096] The present invention provides a modulation circuit to add a time-varying offset to the control circuit to modulate the regulated (output) current to control the discharge and thereby the voltage across the energy storage component (i.e. capacitor C1). The time-varying offset ensures a safe margin of the voltage across the energy storage component to be higher than the supply voltage. This impacts the LED current ripple and the output power. The output power (e.g. second half stage) of the SEPIC / Cuk / BiFRED circuit is controlled in this way in order to minimize the bulk capacitor voltage variation and thereby remove the input current spike. The present invention provides a flexible design that enables to improve the system efficiency.

[0097] Figure 5 A modified SEPIC circuit is shown that is adjusted according to the present invention. The same adjustments can be made to a Cuk circuit or a BiFRED circuit.

[0098] The circuit receives a mains input V_AC. The input is supplied through an EMI inductor L_EMI to a diode bridge rectifier 40. The rectifier has an output smoothing capacitor Crec.

[0099] The output Vrec of the rectifier is provided to Figure 1 a converter of the type shown. The same components are given the same reference signs, i.e. the power commutation inductor L1, the diodes D1, D2, the energy storage component (capacitor) C1, the second inductor L2 and the current sense resistors Rs1 and Rs2.

[0100] The wide range of output voltages of the circuit results in a wide range of bulk capacitor voltages, which complicates the circuit design.

[0101] To optimize efficiency, the ratio between the inductances of L2 and LI has a critical value (e.g. LI = 1 mH and L2 = 2.4 mH). Higher LI values mean lower PFC current, but lower ratio L2 / L1, which thus reduces the voltage of body capacitor CI during operation, and thus increases the chance of input current spikes.

[0102] The control circuit 10 comprises an IC controller 42 for generating a gate signal for the main control switch Ql.

[0103] The IC controller 42 receives a scaled version of the output voltage V_OUT as a first feedback parameter, and receives the voltage across the current sense resistor Rsl as a second feedback parameter.

[0104] The circuit 44 is for fixing the frequency of operation, and is not relevant to the invention. Diode D3 is involved in EMI handling.

[0105] The IC controller also receives an output current feedback signal I_FB used by the controller for regulating the output current. The current feedback signal is based on the voltage across a second current sense resistor Rsl. The voltage signal corresponding to this current is compared by comparator Ul (used as an error amplifier) with a reference voltage. The reference voltage is based in part on a desired regulated current setting, represented by a basic and static reference signal Vref. The basic reference signal is static, while the current setting remains fixed. This basic reference voltage Vref is derived from the supply voltage Vs, and is provided to one input of the comparator through an input resistor Rml.

[0106] The output of the comparator Ul is used to provide a current feedback signal to the controller IC, which basically indicates whether the current is too high or too low.

[0107] The modulation circuit of the invention is shown as unit 50, and is discussed below.

[0108] Without the modulation circuit 50, the circuit design sets cause the voltage across capacitor CI to drop to the rectified mains voltage. This is shown in Figure 6 , which is similar to Figure 4 .

[0109] The top graph likewise shows the current I_L2 through inductor L2. The second graph shows the current I_L1 through inductor LI. The third graph shows the rectified mains voltage Vrec and the voltage V_C1 across capacitor CI. The bottom graph shows the input current I_IN and the LED current I_LED. The current spikes in the input current are likewise shown in region 30.

[0110] During these regions, uncontrolled current flows through LI, D2 and L2 to charge capacitor CI. This uncontrolled current results in spikes shown on the mains input current.

[0111] The modulation circuit 50 is used to modulate the base reference voltage Vref. The modulation circuit 50 comprises a ramp circuit for generating a triangular time-varying offset signal. The ramp circuit comprises a square wave voltage input VS2 applied through a ramp resistor Rramp to a capacitor Cramp. The generated voltage is combined with the base reference voltage Vref via a resistor network 46 comprising a second input resistor Rin2. In this way, the ramp signal is combined with the reference current signal Vref to generate a modulated reference current signal Vref’ having time-varying characteristics.

[0112] The modulation serves to adjust the voltage variation across capacitor CI and in particular to avoid the capacitor voltage from dropping to the level of the rectified voltage at any point in time and thereby eliminate input current spikes.

[0113] For a conventional design without the modulation circuit, the control circuit would have a fast responding current feedback loop control. The control loop would try to eliminate all mains frequency ripples on the output LED current so that the output current strictly follows the reference signal Vref applied to the positive input of the comparator U1.

[0114] The modulation circuit effectively generates an injection signal which is applied to the base reference signal Vref to adjust the LED output current. The modulation circuit injects a current into the LED current feedback control loop. This signal will generate very small LED current ripples, for example below 5% of the current level of the driver output (for example in the range of 3% to 5%). Voltage feedback can be used to manage the driver output power level with very small variations. The ripples essentially provide less output current at the valley of the supply voltage, so more voltage is left on the capacitor CI, so at the peak of the supply voltage, the voltage across the capacitor CI is greater and has a safety margin above the supply voltage. Alternatively, the ripples also mean that at the peak of the supply voltage, more output current is provided to compensate for the reduced output current in the valley portion so that the average output current is maintained.

[0115] The power variation is designed to match the ripples on V_OUT (determined by the mains frequency and filter design) and to compensate for the charging and discharging of the capacitor CI.

[0116] The control signal based on the power variation can be generated by a controller or by an analog circuit which senses the ripples of Vbus (typically 10% to 20% ripples) or the ripples on the mains taking into account the phase shift between the mains and the voltage V_OUT.

[0117] The signal amplitude is also adjusted to a value to produce the desired ripple amplitude on the LED current. The circuit 50 injects a signal to produce the desired ripple on the LED current, while the average LED current is guaranteed by the circuit including the comparator U1.

[0118] By way of example, if the LED current ripple is about 4%, this means that the driver output power varies more than 4% (higher current will result in higher LED voltage). At the current peak, the output power (to the load of the second stage) is also at a maximum.

[0119] When the capacitor voltage rises, the control circuit positions this peak power point, because at this time more energy from the AC input is supplied to the output than charging the capacitor C1. In the same way, when the voltage across the capacitor C1 falls, the power valley of the output is positioned, thereby limiting the discharge energy of the capacitor C1. In this way, the voltage fluctuations on the capacitor are minimized without other system modifications (such as increasing the size of the capacitor C1 value or reducing the inductance ratio L2 / L1).

[0120] Figure 7 The operation of the circuit is shown.

[0121] The top graph shows the main switch control signal V_Q1 and the compensation signal Vref' used to adjust the LED current I_LED.

[0122] The second graph shows the current through the inductor L2. The third graph shows the current through the inductor L1. The fourth graph shows the rectified mains voltage Vrec and the voltage V_C1 across the capacitor C1. The bottom graph shows the input current I_IN and the LED current I_LED.

[0123] It can be seen that when the main switch is off (V_Q1 is low), the time-varying offset reduces the regulated current during the decrease of the supply voltage in the valley part. This means that the capacitor energy storage component discharges in a limited way, having a voltage that is kept. Therefore, the voltage on the capacitor remains higher than the supply voltage in the next peak part.

[0124] It can also be seen that when the main switch is on (V_Q1 is high), the time-varying increases the regulated current during the increase of the supply voltage in the peak part. This means that the increase of the regulated current compensates the decrease of the regulated current in the valley part, so that the average current meets the regulated DC current.

[0125] The current spikes in the input current are no longer visible. This is because the output power variation and the phase shift mean that the voltage ripple of the capacitor C1 is reduced and never touches the rectified voltage Vrec.

[0126] The compensation level can be adjusted by controlling the signal amplitude and will depend on the system design.

[0127] Variations to the disclosed embodiments can become apparent to those of ordinary skill in the art upon reading the foregoing description and can be implemented in practice without departing from the scope of the claimed invention. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality.

[0128] The mere fact that measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

[0129] If the term "comprises" is used in the claims or specification, it is noted that the term "comprises" is intended to be equivalent to the term "consists of.

[0130] Any reference signs in the claims should not be construed as limiting the scope.

Claims

1. A driver circuit, comprising: a converter, comprising: an input for receiving a supply voltage (Vrec) having a periodic ripple, the supply voltage having a peak portion and a valley portion; a switched mode power converter circuit for converting the supply voltage, the switched mode power converter circuit comprising an energy storage component (CI) and a main control switch (Ql); an output; and a current sensor (Rs2) for sensing an output current delivered at the output and producing a sensed current signal; a control circuit (10) for controlling switching of the main control switch of the converter circuit, wherein the energy storage component (CI) is adapted to discharge at the switching of the main control switch (Ql) to provide a regulated DC current at the output; and a modulation circuit (50) for applying a time-varying offset to the control circuit to modulate the regulated DC current, thereby controlling a voltage across the energy storage component, wherein the modulation circuit comprises a ramp circuit for producing a time-varying ramp signal, the time-varying ramp signal being for combination with a static reference current signal (Vref) to produce a modulated reference current signal (Vref’), and the control circuit comprises a comparator circuit (Ul) for comparing the sensed current signal with the modulated reference current signal (Vref’), and an output of the comparator circuit (Ul) is for providing a current feedback signal to the control circuit, such that the time-varying offset is adapted to ensure that the voltage across the energy storage component is higher than the supply voltage by a margin.

2. The driver circuit of claim 1, wherein the offset corresponds to a modification of the regulated DC current having less than 5% of the regulated DC current, the valley portion is a portion having an amplitude lower than 30% of an average amplitude of the supply voltage, and the peak portion is a portion having an amplitude higher than 70% of the average amplitude of the supply voltage.

3. The driver circuit of claim 1 or 2, wherein the time-varying offset is adapted to decrease the regulated DC current during a decrease of the supply voltage at the valley portion when the main control switch is switched, such that the energy storage component is adapted to discharge in a limited manner thereby having a voltage that is maintained, such that the voltage on the energy storage component is maintained higher than the supply voltage in the peak portion.

4. The driver circuit of claim 3, wherein the time-varying offset is adapted to increase the regulated DC current during an increase of the supply voltage at the peak portion when the main control switch is switched, wherein the increase of the regulated DC current is adapted to compensate for the decrease of the regulated DC current in the valley portion, such that an average current fulfils the regulated DC current.

5. The driver circuit of claim 1, wherein the ramp circuit (Cramp, Rramp) is adapted to produce a triangular time-varying offset signal as the time-varying ramp signal.

6. The drive circuit of claim 1 or 5, wherein the ramp circuit is adapted to generate a ramp signal such that the modulated reference current signal (Vref’) has a valley at a zero-crossing of an AC mains and a peak at a peak of the AC mains.

7. The drive circuit of any one of claims 1, 2, 4 and 5, wherein the switch mode power converter circuit comprises a 1.5 stage switch mode power converter having an input stage and an output stage, wherein the input stage comprises a power commutation inductor (LI) and the energy storage component comprises a capacitor in series between the input stage and the output stage.

8. The drive circuit of claim 7, wherein: the input stage is adapted to charge the power commutation inductor (LI) from the supply voltage and the energy storage component (CI) is adapted to discharge to the output stage when the main control switch (Ql) is on; and the input stage is adapted to allow the power commutation inductor (LI) and the supply voltage to charge the energy storage component (CI) and the output stage is adapted to allow the discharge of the energy storage component (CI) when the main control switch (Ql) is off.

9. The drive circuit of claim 8, wherein the converter comprises a SEPIC converter, wherein the input stage comprises the power commutation inductor (LI) in series with the input terminal and the main control switch to ground and the output stage comprises a parallel connection of an inductor (L2) and a diode (Dl) in series with the output terminal, wherein the input stage further comprises a diode (D2) in series with the input terminal.

10. The drive circuit of claim 8, wherein the converter comprises a Cuk converter, wherein the input stage comprises the power commutation inductor (LI) in series with the input terminal and the main control switch (Ql) to ground and the output stage comprises a parallel connection of a diode (D10) and an inductor (L20) in series with the output terminal, wherein the input stage further comprises a diode (D2) in series with the input terminal.

11. The drive circuit of claim 8, wherein the converter comprises a BiFRED converter, wherein the input stage comprises an inductor in series with the input terminal and the main control switch to ground and the output stage comprises a parallel connection of a transformer and a diode in series with the output terminal, wherein the input stage further comprises a diode in series with the input terminal.

12. An LED circuit comprising: a drive circuit of any one of claims 1 to 11; and an LED device (LED) connected to the output terminal of the converter.

13. The LED circuit of claim 12, further comprising: an AC input; a rectifier (40); and a smoothing capacitor (Crec) in parallel with an output terminal of the rectifier, wherein the output terminal of the rectifier comprises the supply voltage having a periodic ripple.

14. A drive method comprising: ​ receiving a supply voltage having a periodic ripple, the supply voltage having a peak portion and a valley portion; converting the supply voltage using a switched mode power converter circuit comprising an energy storage component (C1) and a main control switch (Q1); controlling switching of the main control switch of the switched mode power converter circuit to provide a regulated current at an output, wherein the energy storage component (C1) is adapted to discharge to provide a regulated DC current at the switching of the main control switch; sensing an output current delivered at the output and generating a sensed current signal; and modulating the regulated DC current using a time-varying offset to control a voltage across the energy storage component to ensure that the voltage across the energy storage component is higher than the supply voltage by a margin, wherein the step of modulating using a time-varying offset comprises generating a time-varying ramp signal for combination with a static reference current signal (Vref) to generate a modulated reference current signal (Vref'); and the step of controlling switching of the main control switch comprises comparing the sensed current signal with the modulated reference current signal (Vref') and an output of the comparison is used to provide a current feedback signal for the control.

15. The method of claim 14, comprising using the time-varying offset to reduce the regulated DC current during the reduction of the supply voltage in the valley portion, such that the energy storage component is adapted to discharge in a limited manner to thereby have a retained voltage, such that the voltage on the energy storage component remains higher than the supply voltage in the peak portion, wherein the ramp signal is generated such that the modulated reference current signal (Vref') has a valley value at zero-crossing points of an AC mains and a peak value at peaks of the AC mains.

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