Radar device and interference suppression method
Patent Information
- Application Number
- CN202111024479.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-07-29
- Filing Date
- 2021-09-02
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2041-09-02
AI Technical Summary
甚至,接收信号经接收电路(如噪声放大器LNA及混波器MIX)后还形成基频或中频干扰
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Figure CN115685075B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to radar technology, and more particularly to a radar device and interference suppression method according to an embodiment of the invention. Background Technology
[0002] Radar technology has been developing for many years. Based on the type of transmitted signal, radar technology can be broadly divided into two categories: pulse radar and continuous wave radar. Conventional pulse radar transmits periodic high-frequency pulses, while continuous wave radar transmits continuous wave signals. With the rapid development of science and technology, in recent years, frequency modulated continuous wave (FMCW) radar has been widely used in various fields.
[0003] It is worth noting that radar devices are frequently affected by external interference, which can influence the detection results of target objects. For example, Figure 1 This is a schematic diagram of a continuous wave (CW) Doppler radar R. Please refer to it. Figure 1 The transmitting circuit (such as amplifier PA) of a Doppler radar R amplifies and outputs a radio frequency signal based on the carrier frequency provided by oscillator LO, and transmits it externally through transmitting antenna TA. The transmitted signal is reflected by an object O to form an echo signal SO. However, inevitably, there may be interference in the environment, such as alternating current (AC) power at 50 or 60 Hz and its harmonics, or other interference. Therefore, not only the echo signal SO, but the receiving antenna RA may also receive co-channel interference (IC) and adjacent-channel interference (IAC). Furthermore, the received signal may generate fundamental frequency or intermediate frequency interference after passing through the receiving circuit (such as noise amplifier LNA and mixer MIX). Summary of the Invention
[0004] The radar device of this invention includes (but is not limited to) a clock generator, an analog-to-digital converter (ADC), and a notch filter. The clock generator generates a sampling frequency. The ADC is coupled to the clock generator and converts an analog signal into a digital signal based on the sampling frequency. The notch filter is coupled to the ADC and attenuates one or more interference frequencies in the digital signal. These interference frequencies are related to the sampling frequency.
[0005] On the other hand, the interference suppression method of this invention is applicable to radar devices. The interference suppression method includes (but is not limited to) the following steps: generating a sampling frequency; converting an analog signal into a digital signal based on the sampling frequency; estimating a frequency offset based on the interference frequency in the digital signal to adjust the sampling frequency so that the interference frequency falls within the notch filter frequency range; attenuating one or more interfered frequencies in the digital signal within the notch filter frequency range. These interfered frequencies are related to the sampling frequency.
[0006] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description
[0007] Figure 1 This is a schematic diagram of a continuous wave Doppler radar. Figure 2 This is a component block diagram of a radar device according to an embodiment of the present invention. Figure 3 This is a component block diagram of a frequency generator according to an embodiment of the present invention. Figure 4 It is the frequency response of an analog signal according to an embodiment of the present invention. Figure 5 This is a component block diagram of a notch filter according to an embodiment of the present invention. Figure 6 This is the frequency response of a notch filter according to an embodiment of the present invention. Figure 7 This is a partially enlarged view of the frequency response of a notch filter according to an embodiment of the present invention. Figure 8 It is the frequency response of a (frequency-shifted) sampled signal according to an embodiment of the present invention. Figure 9 This is a component block diagram of an offset estimator according to an embodiment of the present invention. Figure 10 It is the frequency response of the fundamental frequency signal according to an embodiment of the present invention. Figure 11A is a schematic diagram of a downmixer according to an embodiment of the present invention. Figure 11B shows the frequency response of an error signal according to an embodiment of the present invention. Figure 12 This is an equivalent schematic diagram of a frequency estimator according to an embodiment of the present invention. Figure 13 This is a component block diagram of an offset estimator according to another embodiment of the present invention. Figure 14 This is a schematic diagram of frequency error versus time according to an embodiment of the present invention. Figure 15This is a flowchart of an interference suppression method according to an embodiment of the present invention. Symbol Explanation R: Doppler radar PA: Amplifier LO: Oscillator O: Object SO: Echo signal RA: Receiving antenna IC: Co-channel interference IAC: Adjacent Channel Interference MIX: Mixer LNA: Noise Amplifier 100: Radar device 110: Frequency Generator 120: Sampling frequency lock loop 130: Analog-to-digital converter 140: Offset Estimator 150: Notch filter SF: Sampling frequency 111: Oscillator 113: Frequency divider f RC Oscillation frequency f ε Frequency offset N: Division multiple M: Multiple f AC 2f AC 3f AC Interference frequency △f: Frequency error x(n): Digital signal y(n):signal x a (t): Analog signal X a (f), X(e) j2πf ), V(e j2πf ), S(e j2πf Frequency response 151, 153: Adders 155: Buffer 157: Bandwidth Selector BW_sel: Bandwidth parameter Estimated frequency error 170: Offset estimation circuit 171: Frequency divider filter 173: Downmixer 175: Low-pass filter 177: Frequency Estimator v(n): Fundamental frequency signal s(n), s I (n), s Q (n): Error signal S1, S2: Sequences 731, 732: Mixers u(n), u2: Filtered error signals D: Delay 101: Complex number 103: Real value S1510~S1550: Steps Detailed Implementation
[0008] Figure 2 This is a component block diagram of a radar device 100 according to an embodiment of the present invention. Please refer to... Figure 2 The radar device 100 includes (but is not limited to) a frequency generator 110, an analog-to-digital converter 130, and a notch filter 150. The radar device 100 can be applied to meteorological, speed measurement, reversing, terrain observation, and military applications. The radar device 100 may further include an offset estimator 140, wherein the frequency generator 110, the analog-to-digital converter 130, and the offset estimator 140 can form a sample frequency lock loop (SFLL) 120. Please also refer to... Figure 1 The radar device 100 may further include a transmitting circuit (such as an amplifier PA) that amplifies and outputs a radio frequency signal based on the carrier frequency provided by the oscillator LO, and transmits it externally through a transmitting antenna TA. The transmitted radio frequency signal is reflected by an object O to form an echo signal SO, which is received by a receiving circuit (such as a noise amplifier LNA and a mixer MIX) to form an analog signal x. a (t) is transmitted to analog-to-digital converter 130. In one embodiment, radar device 100 may be a continuous wave (CW) Doppler radar, wherein the carrier frequency provided by oscillator LO is fixed.
[0009] Frequency generator 110 is used to generate sampling frequency SF for use by analog-to-digital converter 110.
[0010] Figure 3 This is a component block diagram of a frequency generator according to an embodiment of the present invention. Please refer to... Figure 3 In one embodiment, the frequency generator 110 includes an oscillator 111 and a frequency divider 113. The oscillator 111 is used to generate an oscillation frequency f. RC (sometimes accompanied by frequency shift f) εThe frequency signal is divided by a frequency divider 113, which is coupled to an oscillator 111 and is used to generate a sampling frequency SF based on the division factor N and the frequency signal provided by the oscillator 111. That is, for the oscillation frequency f... RC Divide by the frequency division factor N to obtain the sampling frequency.
[0011] The target frequency of the sampling frequency SF is 4M×f AC Where M is a multiple, f AC The target frequency is the frequency that is being interfered with, and the decision regarding this target frequency will be discussed in detail later. However, if there is a frequency offset f... ε Then the actual frequency of the sampling frequency SF is 4M×(f AC +△f), where △f is the frequency error, which will be discussed in detail later.
[0012] In another embodiment, the frequency generator 110 includes a frequency divider 113 and provides the frequency signal via an external microcontroller or RC oscillator. That is, the oscillator 111 can be omitted from the frequency generator 110.
[0013] An analog-to-digital converter 130 is coupled to a frequency generator 110. In one embodiment, the analog-to-digital converter 130 is used to convert the analog signal x according to a sampling frequency SF. a (t) is converted into a digital signal x(n). This analog signal x a (t) represents the intermediate frequency (IF) signal obtained by mixing the echo signal from radar device 110. Analog-to-digital converter 130 processes this IF signal (i.e., analog signal x). a (t) sampling is used to convert the intermediate frequency signal from an analog signal in the continuous time domain to a digital discrete signal (or digital sequence) in the discrete time domain, which is the digital signal x(n). The digital signal x(n) can be called the fundamental frequency signal of radar signal 100.
[0014] It is worth noting that the sampling frequency SF (or sampling rate, sampling speed) is one of the important factors affecting the sampling results. Assume the sampling frequency SF is twice the Nyquist frequency. In other words, the Nyquist frequency is half the sampling frequency SF. Furthermore, to suppress interference, this sampling frequency SF is further correlated with one or more interference frequencies that need to be suppressed.
[0015] In one embodiment, the sampling frequency SF is an integer multiple of the fundamental frequency among one or more interfered frequencies. This integer multiple can be 1, 2, 3, 4, 5, or other integers. In one embodiment, the interfered frequencies include the fundamental frequency and one or more harmonics of the fundamental frequency.
[0016] For example, Figure 4 The analog signal x is based on an embodiment of the present invention. a The frequency response X(t) a(f). Please refer to [the following]. Figure 4 Assume that the location of radar device 100 is subject to electrical interference. Therefore, the frequency f used by the power supply... AC and its multiplier 2f AC (that is, twice f) AC ), 3fAC (i.e., three times f) AC It will affect the analog signal x a (t). If the frequency f used for electricity is... AC If the fundamental frequency is the frequency being interfered with, then the sampling frequency SF can be 4M×f. AC Therefore, the sampling frequency SF is related to the number of interference frequencies covered. However, the fundamental frequency and the number of its harmonics of the interference frequencies covered can still be changed according to actual needs.
[0017] In one embodiment, these interfered frequencies are predetermined, for example, they may be 50 or 60 Hz used for power. In another embodiment, the interfered frequencies may also be other predetermined frequencies, and can be changed as needed by the user; this embodiment of the invention does not impose any limitations.
[0018] Notch filter 150 is coupled to analog-to-digital converter 130. In one embodiment, within the notch frequency range of notch filter 150, notch filter 150 is used to attenuate one or more interference frequencies in digital signal x(n) to block some or all of these interference frequencies from passing through. In other words, radar device 100 directs interference frequencies to the notch frequency range of notch filter 150.
[0019] For example, Figure 5 This is a component block diagram of a notch filter 150 according to an embodiment of the present invention. Please refer to... Figure 5 The notch filter 150 includes adders 151 and 153, a buffer 155, and a bandwidth selector 157.
[0020] Adder 151 adds the output of buffer 155 to the digital signal x(n) and subtracts the output of buffer 155 from the output of bandwidth selector 157. Adder 153 subtracts the output of adder 151 from the output of buffer 155. Buffer 155 is a tapped delay-line and provides one or more delays D to temporarily store 4M discrete signals in the digital signal x(n). In this case, the sampling frequency SF is 4M times the fundamental frequency of the interfered frequency, and M is a positive integer. Bandwidth selector 157 is used to change the bandwidth parameter BW_sel of the attenuated frequency.
[0021] Figure 5 The circuit diagram shown is equivalent to: H(z) = 1 - z-4M / 1-αz -4M ...(1) The coefficient α is 1-2 -BW_sel And the coefficient α approaches 1.
[0022] Figure 6 This is the frequency response of a notch filter 150 according to an embodiment of the present invention. Please refer to... Figure 6 Assume the Nyquist frequency is half the sampling frequency SF, and neglect the frequency error Δf. That is, 2M×f AC Therefore, the notch filter 150 can attenuate the interference frequency f. AC 2f AC ... (2M-1)f AC and 2M×f AC .
[0023] In one embodiment, the notch filter 150 can determine the number of interfered frequencies. This number is related to the number of discrete signals in the temporary buffer 155. Figure 6 The quantity shown is 2M. It should be noted that the quantity temporarily stored in buffer 155 can still be changed according to actual needs, and the embodiments of the present invention do not impose any limitations.
[0024] Figure 7 This is a partially enlarged view of the frequency response of a notch filter 150 according to an embodiment of the present invention. Please refer to... Figure 7 For any interfered frequency, the bandwidth parameter BW_sel can change the bandwidth of the notch, which is the frequency range attenuated (or the notch frequency range). Specifically, the smaller the bandwidth parameter BW_sel, the larger the bandwidth of the notch; conversely, the larger the bandwidth parameter BW_sel, the smaller the bandwidth of the notch.
[0025] Therefore, it can be seen that by relating the sampling frequency to the interfered frequency and attenuating the fundamental frequency and its harmonics (i.e., harmonics) of the interfered frequency in the discrete time domain, the interference frequency can be effectively suppressed.
[0026] In some scenarios, the sampling frequency SF may be affected by the frequency generator 110 (e.g., frequency offset f). ε This results in a frequency error Δf. Figure 8 This is based on an embodiment of the present invention (after frequency offset f) ε The frequency response X(e) of the sampled signal SF j2 πf Please refer to... Figure 8 Assume the target frequency of the sampling frequency SF is 4M×f AC However, the actual frequency is 4MHz × (f AC +△f). and the frequency f being interfered with. AC 2fAC ... (2M-1)f AC and 2M×f AC There is a deviation compared to the actual sampling frequency. Furthermore, the notch filter 150 attenuates the signal based on the actual sampling frequency. If the sampling frequency SF experiences a frequency error Δf due to frequency shift, it may result in some or all interference at a specific frequency being unsuppressed. Therefore, the sampling frequency SF needs to be corrected to improve the suppression capability.
[0027] Please refer to Figure 2 As previously described, in one embodiment, in addition to the frequency generator 110, analog-to-digital converter 130, and notch filter 150, the radar device 100 may further include an offset estimator 140. The offset estimator 140 is coupled to the analog-to-digital converter 130 and the frequency generator 110. The offset estimator 140 is used to estimate the frequency error Δf based on the digital signal x(n) (i.e., to obtain the estimated frequency error). Alternatively, it can generate a division factor N related to the frequency error Δf, which is used by the frequency generator 110 to correct the sampling frequency SF. This frequency error is the offset of the sampling frequency SF, that is, the offset between the target frequency (e.g., the determined interference frequency) of the sampling frequency SF and the actual frequency. The frequency generator 110 can then use this estimated frequency error... The sampling frequency SF is adjusted, and the analog-to-digital converter 130 then adjusts the sampling frequency based on the frequency error estimated by the sampled digital signal x(n), thus forming a sampling frequency-locked loop 120.
[0028] Figure 9 This is a component block diagram of an offset estimator 140 according to an embodiment of the present invention. Please refer to... Figure 9 The offset estimator 140 may include an offset estimation circuit 170, which may include (but is not limited to) a decimation filter 171, a down mixer 173, a low-pass filter 175, and a frequency estimator 177.
[0029] The decimation filter 171 is used to receive the digital signal x(n) and perform decimation to retain the frequency corresponding to the fundamental frequency (f) in the digital signal x(n). AC The fundamental frequency signal v(n) is calculated as +Δf). That is, the actual frequency of the sampling frequency SF is divided by the multiple M.
[0030] Figure 10 The frequency response V(e) of the fundamental frequency signal v(n) according to an embodiment of the present invention j2πf Please refer to... Figure 10 At this point, the Nyquist frequency is 2(f AC +△f), and the fundamental frequency signal v(n) is only affected by the interference frequency f. AC.
[0031] The downmixer 173 is coupled to the frequency divider filter 171 and is used to generate an error signal s(n) corresponding to the frequency error Δf based on the fundamental frequency signal v(n). That is, the fundamental frequency signal v(n) is down-frequencyed.
[0032] Figure 11A is a schematic diagram of a downmixer 173 according to an embodiment of the present invention. Referring to Figure 11A, the downmixer 173 mixes the fundamental frequency signal v(n) using sequences S1 and S2 through mixers 731 and 732, respectively. Assume that sequence S1 is {+1,0,-1,0,+1,0,-1,0,…} and sequence S2 is {0,-1,0,+1,0,-1,0,+1,…}. In this way, the downmixer 173 can output an in-phase error signal s. I (n) and orthogonal error signals s Q (n). Wherein, the error signal s(n) is s I (n)+s Q (n). It should be noted that in other embodiments, sequences S1 and S2 may be other mutually orthogonal sequences.
[0033] Figure 11B shows the frequency response S(e) of the error signal s(n) according to an embodiment of the present invention. j2πf Please refer to Figure 11B. The error signal s(n) has a value in the frequency domain only for negative frequency errors Δf.
[0034] A low-pass filter 175 is coupled to a downmixer 173. In one embodiment, the low-pass filter 175 is used to filter the error signal s(n) to generate a filtered error signal u(n). The low-pass filter 175 may retain only the frequency response within a specific bandwidth, and accordingly retain only the value of the frequency error Δf that is negative in the frequency domain.
[0035] Frequency estimator 177 is coupled to low-pass filter 175. In one embodiment, frequency estimator 177 is used to estimate the frequency of the filtered error signal u(n) to obtain the frequency error Δf. If the filtered error signal u(n) consists of only a single pulse, frequency estimator 177 can obtain the frequency error Δf based on the estimated frequency of this pulse.
[0036] Suppose the mathematical expression of the filtered error signal u(n) is: A is the gain, f s Let FS be the sampling frequency. To estimate the frequency error Δf, equation (2) can be transformed into:
[0037] According to formula (3), Figure 12This is an equivalent schematic diagram of a frequency estimator 177 according to an embodiment of the present invention. Please refer to... Figure 12 The frequency estimator 177 takes the conjugate (symbol: (.)*) and delay D of the filtered error signal u(n), and multiplies the two outputs by a real number (symbol: Re(.)) to output Re{u*(n)·u(n-1)}. On the other hand, the frequency estimator 177 takes the reciprocal of the square of the filtered error signal u(n) (symbol: 1 / ∥.∥) 2 The output is 1 / ‖u(n)‖^2. Using this as a boundary, the left side of the graph represents the complex value 101, and the right side represents the real value 103. Multiplying the two outputs (Re{u*(n)·u(n-1)} and 1 / ‖u(n)‖^2) by the frequency estimator 177 yields the result. Because f s Since the sampling frequency SF is known, the frequency estimator 177 can obtain the estimated frequency error.
[0038] Figure 13 This is a component block diagram of an offset estimator 140 according to another embodiment of the present invention. Please refer to... Figure 13 In one embodiment, in addition to the offset estimation circuit 170, the offset estimator 140 may further include a loop filter 180. The loop filter 180 is coupled to the offset estimation circuit 170 and is used to adjust the estimated frequency error. The filter (which can be a low-pass filter) generates a filtered error signal u2. The frequency generator 110 adjusts the sampling frequency SF based on this filtered error signal u2, and the analog-to-digital converter 130 further adjusts the sampling frequency based on the frequency error estimated from the sampled digital signal x(n), thus forming a sampling frequency-locked loop 120.
[0039] In another embodiment, in addition to the offset estimation circuit 170, the offset estimator 140 may further include both a loop filter 180 and a quantizer 190. The quantizer 190 is coupled to the loop filter 180. The quantizer 190 is used to quantize the filtered error signal u2 to generate a division factor N, which can be an integer. The frequency generator 110 adjusts the sampling frequency SF according to the division factor N, and the analog-to-digital converter 130 further adjusts the sampling frequency according to the frequency error estimated from the sampled digital signal x(n), thus forming a sampling frequency-locked loop 120. The quantizer 190 is, for example, a Sigma-Delta (ΣΔ) quantizer.
[0040] Since the frequency generator 110 is aware of the estimated frequency error The filtered error signal u2 or the frequency division factor N can compensate for the estimated frequency error in the newly generated sampling frequency SF. Figure 14 This is a schematic diagram showing the frequency error Δf converging to near zero with respect to time in a sampling frequency-locked loop 120 according to an embodiment of the present invention. Please refer to... Figure 14 The frequency error Δf can converge to near zero, ensuring that the frequency attenuated by the notch filter 150 is indeed located on the disturbed frequency and its harmonics.
[0041] In one embodiment, regardless of the magnitude of the frequency error Δf, the notch filter 150 can attenuate the digital signal at the frequencies affected by the interference and output the interference-suppressed signal y(n).
[0042] In another embodiment, when the frequency error Δf is greater than the error threshold, the notch filter 150 can disable, without attenuating, those frequencies in the digital signal that are interfered with. Conversely, when the frequency error Δf is not greater than the error threshold, the notch filter 150 can attenuate those frequencies in the digital signal that are interfered with.
[0043] Figure 15 This is a flowchart of an interference suppression method according to an embodiment of the present invention. Please refer to... Figure 2 and Figure 15 Frequency generator 110 generates sampling frequency SF (step S1510). Analog-to-digital converter 130 converts analog signal s according to sampling frequency SF. a (t) is converted into a digital signal x(n) (step S1530). The offset estimator 140 estimates the frequency offset based on the interference frequency in the digital signal x(n) so that the frequency generator 110 adjusts the sampling frequency SF so that the interference frequency falls within the notch frequency range of the notch filter 150 (step S1540). Within the notch frequency range, the notch filter 150 attenuates one or more of the interference frequencies in the digital signal x(n) (step S1550).
[0044] about Figure 15 The implementation details of each step are described in detail in the foregoing embodiments and implementation methods, and will not be repeated here. In addition to being implemented in the form of circuits, the steps and implementation details of the embodiments of the present invention can also be implemented in software by the processing unit, and the embodiments of the present invention are not limited thereto.
[0045] In summary, in the radar device and interference suppression method of this invention, the sampling frequency is set to be related to the interfered frequency, and discrete signals located at those interfered frequencies are suppressed in the discrete time domain. This allows for the suppression of interference at specific frequencies and their harmonics.
[0046] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the claims.
Claims
1. A radar device, characterized in that, include: A frequency generator used to generate a sampling frequency; An analog-to-digital converter, coupled to the frequency generator, is used to convert an analog signal into a digital signal according to the sampling frequency; A notch filter, coupled to the analog-to-digital converter, is used to attenuate at least one interfered frequency in the digital signal, wherein the sampling frequency is an integer multiple of a fundamental frequency among the at least one interfered frequency; and An offset estimator is coupled to the analog-to-digital converter and the frequency generator, and is used to estimate a frequency error based on the digital signal, wherein the frequency error is an offset of the sampling frequency, and the frequency generator adjusts the sampling frequency based on the frequency error.
2. The radar device as described in claim 1, characterized in that, The notch filter includes: A buffer is used to temporarily store 4M discrete signals in the digital signal, wherein the sampling frequency is 4M times the base frequency, and M is a positive integer.
3. The radar device as described in claim 1, characterized in that, The at least one interfered frequency includes the base frequency and at least one harmonic of the base frequency.
4. The radar device as described in claim 1, characterized in that, The offset estimator includes an offset estimation circuit, which includes: A frequency divider filter is used to divide the digital signal to retain a fundamental frequency signal in the digital signal corresponding to a fundamental frequency. A mixer is coupled to the frequency divider filter and used to generate an error signal corresponding to the frequency error based on the fundamental frequency signal. A low-pass filter, coupled to the downmixer, is used to filter the error signal to generate a first filtered error signal; and A frequency estimator, coupled to the low-pass filter, is used to estimate the frequency of the first filtered error signal to obtain the frequency error.
5. The radar device as described in claim 1, characterized in that, The offset estimator further includes: A loop filter is used to filter the frequency error to generate a second filtered error signal, wherein the frequency generator adjusts the sampling frequency based on the second filtered error signal.
6. The radar device as claimed in claim 1, characterized in that, The offset estimator further includes: A first-loop filter is used to filter the frequency error to generate a second filtered error signal; and A quantizer, coupled to the loop filter and the frequency generator, is used to quantize the second filtered error signal to generate a division factor, wherein the frequency generator adjusts the sampling frequency according to the division factor.
7. The radar device as claimed in claim 1, characterized in that, The frequency generator further includes: A frequency divider is used to generate the sampling frequency based on a frequency signal.
8. The radar device as described in claim 7, characterized in that, The frequency generator further includes: An oscillator, coupled to a frequency divider circuit, is used to generate the frequency signal.
9. The radar device as claimed in claim 1, characterized in that, The at least one of the interfered frequencies includes 50 or 60 Hz.
10. The radar device as claimed in claim 1, characterized in that, Including: A transmitting circuit for transmitting a radio frequency signal; as well as A receiving circuit is used to receive an echo signal and generate the analog signal, wherein the echo signal is formed by reflection from an object.
11. An interference suppression method, applicable to the radar device according to any one of claims 1-10, characterized in that, The interference suppression method includes: Generate a sampling frequency; Based on the sampling frequency, an analog signal is converted into a digital signal; Based on an interference frequency in the digital signal, a frequency offset is estimated to adjust the sampling frequency so that the interference frequency falls within a notch filter frequency range; and Attenuate at least one interfered frequency in the digital signal within the notch frequency range, wherein the sampling frequency is an integer multiple of a fundamental frequency among the at least one interfered frequency.
12. The interference suppression method as described in claim 11, characterized in that, The step of attenuating the at least one interfered frequency in the digital signal includes: Determine a quantity of the at least one interfered frequency, wherein the quantity is the number of discrete signals to be attenuated in the digital signal.
13. The interference suppression method as described in claim 11, characterized in that, The at least one interfered frequency includes the base frequency and at least one harmonic of the base frequency.
14. The interference suppression method as described in claim 11, characterized in that, The step of estimating the frequency shift based on the interference frequency in the digital signal to adjust the sampling frequency includes: A frequency error is estimated based on the digital signal, wherein the frequency error is the offset between the sampling frequency and the interfered frequency; and Adjust the sampling frequency based on the frequency error.
15. The interference suppression method as described in claim 14, characterized in that, The steps for estimating the frequency error based on the digital signal include: The digital signal is subjected to frequency division to retain a fundamental frequency signal corresponding to a fundamental frequency in the digital signal; An error signal corresponding to the frequency error is generated based on the base frequency signal; The error signal is filtered to generate a first filtered error signal; and Estimate the frequency of the first filtered error signal to obtain the frequency error.
16. The interference suppression method as described in claim 11, characterized in that, The at least one of the interfered frequencies includes 50 or 60 Hz.
17. The interference suppression method as described in claim 11, characterized in that, Including: Transmit a radio frequency signal; as well as The analog signal is generated after receiving an echo signal, which is formed by reflection from an object.
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