A compact modular assembly-type satellite-borne network control switching processor

Abstract

The present invention discloses a compact modular assembly type satellite network control switching processor, belonging to the field of satellite network control technology. The processor includes a high-speed backplane and an interface extension extension connected to the high-speed backplane, a first table forwarding extension, a second table forwarding extension, a protocol switching extension, a network control extension, a management control extension, and a power frequency synthesis extension; the first table forwarding extension and the second table forwarding extension are both used to realize the function of forwarding data including circuits and groups according to the content of the configuration table; the protocol switching extension is used to realize the function of maintaining and managing the routing table; the management control extension is used to realize the remote control command parsing and distribution of the whole machine, as well as the function of collecting and uploading telemetry data. The present invention realizes the integrated design of structure and function, with compact and simple structure, modular functions, strong expansibility, and reduced volume and weight.

Description

Technical Field

[0001] The invention relates to the technical field of satellite-borne network control, and in particular to a compact modular assembled satellite-borne network control switching processor. Background Art

[0002] Network control, switching and processing payload products are an indispensable part of satellite communication systems. With the continuous development of satellite communication systems, the existing architecture technology of network control, switching and processing payload products can no longer adapt to the application of new satellite technologies and the expansion of new businesses because of the large number of external interaction interfaces, large switching capacity, high heat consumption, many modules, and limited size and weight. Summary of the invention

[0003] In view of this, the present invention provides a compact modular assembly type onboard network control switching processor. The processor has the advantages of supporting multiple interface forms, unlimited expansion of the number of interfaces, multiple switching systems, large-capacity switching, and small size and weight.

[0004] In order to achieve the above object, the technical solution adopted by the present invention is:

[0005] A compact modular assembly-type satellite-borne network control switching processor, comprising a high-speed backplane 1 and an interface extension extension 2 connected to the high-speed backplane, a table lookup forwarding first extension 3, a table lookup forwarding second extension 4, a protocol switching extension 5, a network control extension 6, a management control extension 7 and a power frequency synthesis extension 8;

[0006] The high-speed backplane 1 is used to realize data interaction between boards and distribution of clock and power supply, and the data contains high-speed data, low-speed data and control signals;

[0007] The interface extension extension 2 is used to place external interface drivers and external connectors, so as to achieve external interface expansion of a single machine;

[0008] The table lookup forwarding first extension 3 and the table lookup forwarding second extension 4 are both used to implement the function of forwarding data including circuits and packets according to the content of the configuration table;

[0009] The protocol switch extension 5 is used to implement the functions of maintaining and managing the routing table;

[0010] The network control extension 6 is used to provide network management and control services;

[0011] The management control extension 7 is used to implement the functions of remote control command analysis and distribution of the whole machine, as well as telemetry data collection and uploading;

[0012] The power frequency synthesis extension 8 includes a power module and a frequency synthesis module. The power module is used to convert the primary bus power into the secondary power required by the whole machine. The frequency synthesis module generates the homologous processing clock required by the whole machine according to the reference clock provided by the platform. The secondary power supply and the clock are distributed through the backplane.

[0013] The table lookup forwarding first extension 3 includes a first high-speed connector 3-1, a first control FPGA 3-2, a first processing FPGA 3-3, a second processing FPGA 3-4, a third processing FPGA 3-5 and a first reconstruction refresh 3-6; the management control extension 7 transmits the control information to the first control FPGA 3-2 through the first high-speed connector 3-1, wherein the first control FPGA 3-2 is used to realize the functions of clock, reset, remote control information distribution and telemetry collection, and the first processing FPGA, the second processing FPGA and the third processing FPGA are all bidirectionally interconnected with the first control FPGA 3-2; the interface extension extension 2 transmits external data through the first high-speed connector 3-1 Connector 3-1 transmits to the first processing FPGA3-3 and the third processing FPGA3-5, wherein the first processing FPGA3-3 and the third processing FPGA3-5 are used to realize decoding, separation, multiplexing and encoding of data frames of multiple external ports, and the second processing FPGA3-4 is used to realize the function of forwarding circuit services and packet services of multiple ports according to the content of the configuration table, and the first processing FPGA3-3 and the third processing FPGA3-5 are both bidirectionally interconnected with the second FPGA; the first reconstruction refresh 3-6 mainly realizes the reconstruction refresh function of the first processing FPGA, the second processing FPGA and the third processing FPGA under the control of the first control FPGA3-2.

[0014] Furthermore, the protocol switching extension 5 includes a second high-speed connector 5-1, a second control FPGA5-2, a first CPU5-3, a fourth processing FPGA5-4, a second CPU5-5 and a second reconstruction refresh 5-6; the management control extension 7 transmits control information to the second control FPGA5-2 through the second high-speed connector 5-1, and the second control FPGA5-2 realizes the functions of clock, reset, remote control information distribution and telemetry collection. The first CPU5-3, the fourth processing FPGA5-4 and the second CPU5-5 are all bidirectionally interconnected with the second control FPGA; the table lookup forwarding first extension 3, the table lookup forwarding second extension 4 and the network control extension 6 transmit business data and control data to the fourth processing FPGA5-4 through the second high-speed connector 5-1, and the fourth processing FPGA5-4 realizes the interaction of control and business data between the table lookup forwarding first extension 3, the network control extension 6, the first CPU5-3 and the second CPU5-5. The first CPU5-3 and the second CPU5-5 mainly realize the processing of routing related protocols, and the third reconstruction refresh 5-6 mainly realizes the reconstruction refresh function of the fourth processing FPGA under the control of the second control FPGA5-2.

[0015] Furthermore, the management and control extension 7 includes a third high-speed connector 7-1, a third control FPGA 7-2 and a third CPU 7-3; the third control FPGA 7-2 is used to realize the functions of whole machine reset distribution, remote control information distribution, reconstruction information distribution and telemetry collection, the third CPU 7-3 mainly realizes the functions of remote control information processing, telemetry information group detection and reconstruction data analysis, and the third control FPGA 7-2 and the third CPU 7-3 are bidirectionally interconnected; the data of the management and control extension 7 interacts with other boards through the third high-speed connector 7-1.

[0016] The beneficial effects of the above technical solution of the present invention are:

[0017] 1. The present invention can realize high-speed hybrid switching of large capacity and multiple ports, satellite network control routing function, data encryption and decryption and other functions;

[0018] 2. The present invention has a compact and simple structure, modular functions, reduced volume and weight, and improved heat dissipation capacity. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is an electrical principle block diagram of an embodiment of the present invention.

[0020] Figure 2 It is an electrical principle block diagram of table lookup and forwarding extension 1 according to an embodiment of the present invention.

[0021] Figure 3 It is an electrical principle block diagram of the protocol switching extension according to an embodiment of the present invention.

[0022] Figure 4 It is an electrical principle block diagram of the management and control extension according to an embodiment of the present invention. DETAILED DESCRIPTION

[0023] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments.

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] A compact modular assembly-type satellite-borne network control switching processing device, comprising a high-speed backplane 1, an interface expansion module 2, a circuit switching module 3, a packet switching module 4, an inter-satellite switching module 5, a protocol processing module 6, a network control module 7, a remote control and telemetry module 8, and a power clock source module 9; characterized in that: the high-speed backplane 1 realizes data interaction between boards, including high-speed data, low-speed data, control signals, clock signals, etc., the interface expansion module 2 is mainly used to place external connection ports to realize the expansion of single-machine external interfaces, the circuit switching module 3 mainly realizes functions such as circuit switching, and the packet switching module 4 mainly realizes packet switching. The intersatellite switching module 5 mainly realizes the intersatellite data exchange and other functions, the protocol processing module 6 mainly realizes the maintenance and management of the configuration table and other functions, the network control module 7 mainly provides network management control services and other functions, the remote control and telemetry module 8 mainly realizes the remote control command parsing and distribution of the whole machine, telemetry data collection and upload and other functions, the power clock source module 9 includes a power module and a clock source module, the power module converts the primary bus power into the secondary power required by the whole machine, the clock source module generates the same source processing clock required by the whole machine according to the reference clock provided by the platform, and the secondary power supply and clock are distributed through the backplane.

[0026] The interface expansion module 2 realizes the external interface expansion function of the circuit switching module 3, the packet switching module 4 and the intersatellite switching module 5, and is connected to each other through a bidirectional LVDS connection via a high-speed backplane 1, and mainly places an external interface connector and an interface driver chip; the circuit switching module 3, the packet switching module 4 and the intersatellite switching module 5 are connected to each other through a bidirectional high-speed GTX and LVDS connection via a high-speed backplane 1, which is used to transmit large-capacity business data and control data; the protocol processing module 6 is connected to the circuit switching module 3, the packet switching module 4 and the intersatellite switching module 5 through a bidirectional LVDS connection via a high-speed backplane 1, which is used to transmit configuration tables and control information; the protocol processing module 6 is connected to the network control module 7 through a bidirectional LVDS connection via a high-speed backplane 1, which is used to transmit network control information and control information; the remote control and telemetry module 8 and other boards are connected to each other through a bidirectional single-ended line via a high-speed backplane 1, which is used to transmit control and reconstruction information.

[0027] Among them, the circuit switching module 3 includes a high-speed connector 3-1, a first control FPGA 3-2, a first processing FPGA 3-3, a second processing FPGA 3-4, a third processing FPGA 3-5, and a first reconstruction refresh 3-6; the interface expansion module 2 transmits external data to the circuit switching module 3 through the high-speed connector 3-1, the first control FPGA 3-2 realizes clock, reset, remote control information distribution, telemetry collection and other functions, the first processing FPGA 3-3 mainly realizes the separation and multiplexing of data frames of a part of the external ports, the third processing FPGA 3-5 mainly realizes the separation and multiplexing of data frames of the remaining external ports, the second processing FPGA 3-4 mainly realizes the core switching function of multiple ports, the first reconstruction refresh 3-6 mainly realizes the reconstruction refresh function of the first processing FPGA 3-3 and the third processing FPGA 3-5, and the data of the circuit switching module 3 interacts with other boards through the high-speed connector 3-1.

[0028] Among them, the protocol processing module 6 includes a high-speed connector 6-1, a second control FPGA 6-2, a first CPU 6-3, a fourth processing FPGA 6-4, a second CPU 6-5, and a second reconstruction refresh 6-6; the second control FPGA 6-2 realizes clock, reset, remote control information distribution, telemetry collection and other functions, the first CPU 6-3 and the second CPU 6-5 mainly realize the processing of related protocols such as routing, the fourth processing FPGA 6-4 mainly realizes the interaction of data between other boards, the first CPU 6-3 and the second CPU 6-5, the second reconstruction refresh 6-6 mainly realizes the reconstruction refresh function of the fourth processing FPGA 6-4, and the data of the protocol processing module 6 interacts with other boards through the high-speed connector 6-1.

[0029] Among them, the remote control and telemetry module 9 includes a high-speed connector 9-1, a third control FPGA 9-2, and a third CPU 9-3; the third control FPGA 9-2 realizes functions such as whole machine reset, remote control information distribution, and telemetry collection, and the third CPU 9-3 mainly realizes functions such as remote control information processing, telemetry information group detection and reconstruction data analysis, and the data of the remote control and telemetry module 9 interacts with other boards through the high-speed connector 9-1.

[0030] The following is a more specific embodiment:

[0031] Reference Figure 1 A compact modular assembly-type satellite-borne network control switching processing device includes a high-speed backplane 1, an interface expansion module 2, a circuit switching module 3, a packet switching module 4, an inter-satellite switching module 5, a protocol processing module 6, a network control module 7, a remote control and telemetry module 8, and a power source module 9; Figure 1 The present invention is an electrical schematic diagram of an embodiment of a compact modular assembled satellite-borne network control switching processing device.

[0032] The compact modular assembled satellite-borne network control switching and processing device has a high-speed backplane 1 that realizes data interaction between boards, an interface expansion module 2 that mainly places external interface drivers and external connectors to realize external interface expansion of a single machine, a circuit switching module 3 that mainly realizes functions such as circuit switching, a packet switching module 4 that mainly realizes functions such as packet switching, an inter-satellite switching module 5 that mainly realizes functions such as inter-satellite switching, a protocol processing module 6 that mainly realizes functions such as maintenance and management of configuration tables, a network control module 7 that mainly provides functions such as network management and control services, a remote control and telemetry module 8 that mainly realizes remote control command parsing and distribution of the entire machine, telemetry data collection and uploading, and other functions, a power supply and clock source module 9 that includes a power supply module and a clock source module, the power supply module converts the primary bus power supply into the secondary power supply required by the entire machine, and the clock source module generates the same-source processing clock required by the entire machine based on the reference clock provided by the platform, and both the secondary power supply and the clock are distributed through the backplane.

[0033] The circuit switching module 3 includes a high-speed connector 3-1, a first control FPGA 3-2, a first processing FPGA 3-3, a second processing FPGA 3-4, a third processing FPGA 3-5, and a first reconstruction refresh 3-6. Figure 2Connection line; the interface expansion module 2 transmits external data to the circuit switching module 3 through the high-speed connector 3-1, the first control FPGA 3-2 realizes clock, reset, remote control information distribution, telemetry collection and other functions, the first processing FPGA 3-3 and the third processing FPGA 3-5 mainly realize the separation and multiplexing of data frames of multiple external ports, the second processing FPGA 3-4 mainly realizes the core switching function of multiple ports, the first reconstruction and refresh 3-6 mainly realizes the reconstruction and refresh function of FPGA, and the data of the circuit switching module 3 interacts with other boards through the high-speed connector 3-1.

[0034] The protocol processing module 6 includes a high-speed connector 6-1, a second control FPGA 6-2, a first CPU 6-3, a fourth processing FPGA 6-4, a second CPU 6-5, and a second reconstruction refresh 6-6. Figure 3 Connection line; the second control FPGA6-2 realizes clock, reset, remote control information distribution, telemetry collection and other functions, the first CPU 6-3 and the second control FPGA 6-2 mainly realize the processing of related protocols such as routing, the fourth processing FPGA 6-4 mainly realizes the interaction of data between other boards, the first CPU 6-3 and the second CPU 6-5, the second reconstruction and refresh 6-6 mainly realizes the reconstruction and refresh function of FPGA, and the data of the protocol processing module 6 interacts with other boards through the high-speed connector 6-1.

[0035] The remote control and telemetry module 9 includes a high-speed connector 9-1, a third control FPGA 10-2, and a third CPU 9-3. Figure 4 Connection line; the third control FPGA 9-2 realizes the functions of whole machine reset, remote control information distribution, telemetry collection, etc. The third CPU 9-3 mainly realizes the functions of remote control information processing, telemetry information group detection and reconstruction data analysis, etc. The data of the remote control and telemetry module 9 interacts with other boards through the high-speed connector 9-1.

[0036] Each control FPGA in the embodiment adopts the JRT54X72A-CQ208 model produced by 58 Institute;

[0037] Each processing FPGA in the embodiment adopts the BQR5VLX155T model produced by 772;

[0038] Each CPU in the embodiment adopts the BM3823 model produced by 772;

[0039] All high-speed connectors in the embodiment are LRMS series high-speed connectors produced by AVIC Optronics.

[0040] Implementation principle:

[0041] A compact modular assembled satellite network control switching and processing device can realize functions such as high-speed circuit and packet switching of large capacity and multiple ports, satellite network control, etc. It has a simple architecture, modular functions, and strong expansibility. A high-speed backplane realizes data interaction between boards, including high-speed data, low-speed data, control signals, clock signals, etc. An interface expansion module mainly places external interface drivers and external connectors to realize external interface expansion of a single machine. A circuit switching module mainly realizes functions such as circuit switching, a packet switching module mainly realizes functions such as packet switching, an inter-satellite switching module mainly realizes functions such as inter-satellite switching, a protocol processing module mainly realizes functions such as maintenance and management of configuration tables, a network control module mainly provides functions such as network management control services, a remote control and telemetry module mainly realizes functions such as parsing and distribution of remote control instructions of the whole machine, and telemetry data collection and uploading, etc. A power clock source module includes a power module and a clock source module. The power module converts a primary bus power supply into a secondary power supply required by the whole machine. The clock source module generates a homologous processing clock required by the whole machine according to a reference clock provided by the platform, and both the secondary power supply and the clock are distributed through the backplane.

Claims

1. A compact modular assembly-type onboard network control switching processor, characterized in that: It comprises a high-speed backplane (1) and an interface extension extension (2) connected to the high-speed backplane, a table lookup forwarding first extension (3), a table lookup forwarding second extension (4), a protocol switching extension (5), a network control extension (6), a management control extension (7) and a power supply frequency synthesis extension (8); The high-speed backplane (1) is used to realize data interaction between boards and distribution of clock and power supply, and the data contains high-speed data, low-speed data and control signals; The interface expansion extension (2) is used to place an external interface driver and an external connector, thereby realizing the external interface expansion of a single machine; The table lookup forwarding first extension (3) and the table lookup forwarding second extension (4) are both used to implement the function of forwarding data including circuits and packets according to the content of the configuration table; The protocol switch extension (5) is used to implement the functions of maintaining and managing the routing table; The network control extension (6) is used to provide network management control services; The management control extension (7) is used to implement the functions of remote control command parsing and distribution of the whole machine, as well as telemetry data collection and uploading; The power frequency synthesis extension (8) includes a power module and a frequency synthesis module. The power module is used to convert the primary bus power into the secondary power required by the whole machine. The frequency synthesis module generates the homologous processing clock required by the whole machine according to the reference clock provided by the platform. The secondary power and the clock are distributed through the backplane. The table lookup forwarding first extension (3) comprises a first high-speed connector (3-1), a first control FPGA (3-2), a first processing FPGA (3-3), a second processing FPGA (3-4), a third processing FPGA (3-5) and a first reconstruction refresh (3-6); the management control extension (7) transmits control information to the first control FPGA (3-2) via the first high-speed connector (3-1), wherein the first control FPGA (3-2) is used to implement clock, reset, remote control information distribution and telemetry collection functions, and the first processing FPGA, the second processing FPGA and the third processing FPGA are all bidirectionally interconnected with the first control FPGA (3-2); the interface expansion extension (2) transmits external data via the first high-speed connector (3-1) to the first control FPGA (3-2). A high-speed connector (3-1) transmits data to a first processing FPGA (3-3) and a third processing FPGA (3-5), wherein the first processing FPGA (3-3) and the third processing FPGA (3-5) are used to implement decoding, separation, multiplexing and encoding of data frames of multiple external ports, the second processing FPGA (3-4) is used to implement the function of forwarding circuit services and packet services of multiple ports according to the content of a configuration table, and the first processing FPGA (3-3) and the third processing FPGA (3-5) are both bidirectionally interconnected with the second FPGA; and the first reconstruction and refresh (3-6) mainly implements the reconstruction and refresh function of the first processing FPGA, the second processing FPGA and the third processing FPGA under the control of the first control FPGA (3-2).

2. A compact modular assembled onboard network control switching processor according to claim 1, characterized in that: The protocol switching extension (5) comprises a second high-speed connector (5-1), a second control FPGA (5-2), a first CPU (5-3), a fourth processing FPGA (5-4), a second CPU (5-5) and a second reconstruction refresh (5-6); the management control extension (7) transmits control information to the second control FPGA (5-2) via the second high-speed connector (5-1); the second control FPGA (5-2) implements clock, reset, remote control information distribution and telemetry collection functions; the first CPU (5-3), the fourth processing FPGA (5-4) and the second CPU (5-5) are all interconnected with the second control FPGA in a bidirectional manner; the table lookup conversion The first extension (3), the second extension (4) and the network control extension (6) transmit the service data and control data to the fourth processing FPGA (5-4) through the second high-speed connector (5-1). The fourth processing FPGA (5-4) realizes the interaction of control and service data between the first extension (3), the network control extension (6), the first CPU (5-3) and the second CPU (5-5). The first CPU (5-3) and the second CPU (5-5) mainly realize the processing of routing related protocols. The second reconstruction and refresh (5-6) mainly realizes the reconstruction and refresh function of the fourth processing FPGA under the control of the second control FPGA (5-2).

3. The compact modular assembled on-board network control switching processor according to claim 1, characterized in that: The management control extension (7) comprises a third high-speed connector (7-1), a third control FPGA (7-2) and a third CPU (7-3); the third control FPGA (7-2) is used to realize the functions of whole machine reset distribution, remote control information distribution, reconstruction information distribution and telemetry collection, the third CPU (7-3) mainly realizes the functions of remote control information processing, telemetry information group detection and reconstruction data analysis, and the third control FPGA (7-2) and the third CPU (7-3) are bidirectionally interconnected; the data of the management control extension (7) interacts with other boards through the third high-speed connector (7-1).

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